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| author | Stefano Babic <sbabic@denx.de> | 2013-02-23 10:13:40 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2013-02-23 10:13:40 +0100 |
| commit | 9cd9b34dc7f247fd0fce08ab688bf8197f1bfdbc (patch) | |
| tree | 89561497322fff78d3d2e4a8e736f18ab4e0ddfb /arch/powerpc/cpu/mpc85xx/cpu_init.c | |
| parent | bec0160e9f5adab1d451ded3a95b0114b14e1970 (diff) | |
| parent | a5627914daad144727655a72bd3c8a8958fbcdcf (diff) | |
| download | u-boot-9cd9b34dc7f247fd0fce08ab688bf8197f1bfdbc.tar.gz u-boot-9cd9b34dc7f247fd0fce08ab688bf8197f1bfdbc.tar.xz u-boot-9cd9b34dc7f247fd0fce08ab688bf8197f1bfdbc.zip | |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/cpu_init.c')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/cpu_init.c | 44 |
1 files changed, 36 insertions, 8 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index d1155e8126..de9d916111 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -312,19 +312,33 @@ int enable_cluster_l2(void) /* Look through the remaining clusters, and set up their caches */ do { + int j, cluster_valid = 0; + l2cache = (void __iomem *)(CONFIG_SYS_FSL_CLUSTER_1_L2 + i * 0x40000); + cluster = in_be32(&gur->tp_cluster[i].lower); - /* set stash ID to (cluster) * 2 + 32 + 1 */ - clrsetbits_be32(&l2cache->l2csr1, 0xff, 32 + i * 2 + 1); + /* check that at least one core/accel is enabled in cluster */ + for (j = 0; j < 4; j++) { + u32 idx = (cluster >> (j*8)) & TP_CLUSTER_INIT_MASK; + u32 type = in_be32(&gur->tp_ityp[idx]); + + if (type & TP_ITYP_AV) + cluster_valid = 1; + } - printf("enable l2 for cluster %d %p\n", i, l2cache); + if (cluster_valid) { + /* set stash ID to (cluster) * 2 + 32 + 1 */ + clrsetbits_be32(&l2cache->l2csr1, 0xff, 32 + i * 2 + 1); - out_be32(&l2cache->l2csr0, L2CSR0_L2FI|L2CSR0_L2LFC); - while ((in_be32(&l2cache->l2csr0) & - (L2CSR0_L2FI|L2CSR0_L2LFC)) != 0) - ; - out_be32(&l2cache->l2csr0, L2CSR0_L2E); + printf("enable l2 for cluster %d %p\n", i, l2cache); + + out_be32(&l2cache->l2csr0, L2CSR0_L2FI|L2CSR0_L2LFC); + while ((in_be32(&l2cache->l2csr0) + & (L2CSR0_L2FI|L2CSR0_L2LFC)) != 0) + ; + out_be32(&l2cache->l2csr0, L2CSR0_L2E); + } i++; } while (!(cluster & TP_CLUSTER_EOC)); @@ -534,6 +548,20 @@ skip_l2: /* needs to be in ram since code uses global static vars */ fsl_serdes_init(); +#ifdef CONFIG_SYS_FSL_ERRATUM_A005871 + if (IS_SVR_REV(svr, 1, 0)) { + int i; + __be32 *p = (void __iomem *)CONFIG_SYS_DCSRBAR + 0xb004c; + + for (i = 0; i < 12; i++) { + p += i + (i > 5 ? 11 : 0); + out_be32(p, 0x2); + } + p = (void __iomem *)CONFIG_SYS_DCSRBAR + 0xb0108; + out_be32(p, 0x34); + } +#endif + #ifdef CONFIG_SYS_SRIO srio_init(); #ifdef CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER |