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| author | Thomas Chou <thomas@wytron.com.tw> | 2015-10-21 21:33:45 +0800 |
|---|---|---|
| committer | Thomas Chou <thomas@wytron.com.tw> | 2015-10-23 07:37:03 +0800 |
| commit | 88d5ecf4b9c0d5a3bff5d6d98ab7383a550a57db (patch) | |
| tree | 599e4aee08402b27726c8ae80c86a90d44d8220a /arch/nios2/dts | |
| parent | d21275ef5e7fe67c592896d6dbb157e219ec0450 (diff) | |
| download | u-boot-88d5ecf4b9c0d5a3bff5d6d98ab7383a550a57db.tar.gz u-boot-88d5ecf4b9c0d5a3bff5d6d98ab7383a550a57db.tar.xz u-boot-88d5ecf4b9c0d5a3bff5d6d98ab7383a550a57db.zip | |
nios2 : convert altera_pio to driver model
Convert altera_pio to driver model.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Chin Liang See <clsee@altera.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/nios2/dts')
| -rw-r--r-- | arch/nios2/dts/3c120_devboard.dts | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/nios2/dts/3c120_devboard.dts b/arch/nios2/dts/3c120_devboard.dts index 3d76ec4b9e..4a34ce56db 100644 --- a/arch/nios2/dts/3c120_devboard.dts +++ b/arch/nios2/dts/3c120_devboard.dts @@ -68,6 +68,9 @@ <0x00004400 0x08004400 0x00000040>, <0x00004800 0x08004800 0x00000040>, <0x00004c80 0x08004c80 0x00000020>, + <0x00004cc0 0x08004cc0 0x00000010>, + <0x00004ce0 0x08004ce0 0x00000010>, + <0x00004d00 0x08004d00 0x00000010>, <0x00004d50 0x08004d50 0x00000008>, <0x00008000 0x08008000 0x00000020>, <0x00400000 0x08400000 0x00000020>; @@ -130,6 +133,44 @@ current-speed = <115200>; clock-frequency = <62500000>; }; + + user_led_pio_8out: gpio@0x4cc0 { + compatible = "altr,pio-1.0"; + reg = <0x00004cc0 0x00000010>; + resetvalue = <255>; + altr,gpio-bank-width = <8>; + #gpio-cells = <2>; + gpio-controller; + gpio-bank-name = "led"; + }; + + user_dipsw_pio_8in: gpio@0x4ce0 { + compatible = "altr,pio-1.0"; + reg = <0x00004ce0 0x00000010>; + interrupt-parent = <&cpu>; + interrupts = <8>; + edge_type = <2>; + level_trigger = <0>; + resetvalue = <0>; + altr,gpio-bank-width = <8>; + #gpio-cells = <2>; + gpio-controller; + gpio-bank-name = "dipsw"; + }; + + user_pb_pio_4in: gpio@0x4d00 { + compatible = "altr,pio-1.0"; + reg = <0x00004d00 0x00000010>; + interrupt-parent = <&cpu>; + interrupts = <9>; + edge_type = <2>; + level_trigger = <0>; + resetvalue = <0>; + altr,gpio-bank-width = <4>; + #gpio-cells = <2>; + gpio-controller; + gpio-bank-name = "pb"; + }; }; cfi_flash_64m: flash@0x0 { |