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author | Weijie Gao <weijie.gao@mediatek.com> | 2019-07-11 14:26:24 +0800 |
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committer | Tom Rini <trini@konsulko.com> | 2019-07-18 11:31:30 -0400 |
commit | 58067b0de1e5d8a07ccb8c3a5497beaa0e043c6b (patch) | |
tree | dd5cf04d59d4916bf4867b6c13b53037ae201734 /arch/nds32 | |
parent | 1b96da67a0f5c70e4096bec9ce0769925f70513f (diff) | |
download | u-boot-58067b0de1e5d8a07ccb8c3a5497beaa0e043c6b.tar.gz u-boot-58067b0de1e5d8a07ccb8c3a5497beaa0e043c6b.tar.xz u-boot-58067b0de1e5d8a07ccb8c3a5497beaa0e043c6b.zip |
arm: dts: MediaTek: fix clock order for timer0 node of mt7629.dtsi
The timer0 node has its two clocks written in reversed order. The timer0
is used as the tick timer which causes a problem that the time a delay
function used is 4 times longer.
This patch reverses these two clocks to solve this issue.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Diffstat (limited to 'arch/nds32')
0 files changed, 0 insertions, 0 deletions