diff options
| author | Tom Rini <trini@konsulko.com> | 2018-07-09 15:09:55 -0400 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2018-08-08 13:33:51 +0200 |
| commit | 215b4fae518a1ddcd36817cd1e420fa03d058d8e (patch) | |
| tree | 2999ebbe6d077db3bcbbcd84c3bef562b51329fa /arch/mips | |
| parent | b1aad8dbe28415695b290726199681ced969c118 (diff) | |
| download | u-boot-215b4fae518a1ddcd36817cd1e420fa03d058d8e.tar.gz u-boot-215b4fae518a1ddcd36817cd1e420fa03d058d8e.tar.xz u-boot-215b4fae518a1ddcd36817cd1e420fa03d058d8e.zip | |
mips: dbau1x00: Remove this board
This platform has been marked as orphan since June of 2016 and should
have been removed some time ago. Do so now.
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/Kconfig | 11 | ||||
| -rw-r--r-- | arch/mips/mach-au1x00/au1x00_eth.c | 5 | ||||
| -rw-r--r-- | arch/mips/mach-au1x00/include/mach/au1x00.h | 31 |
3 files changed, 0 insertions, 47 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 31b622ff51..01c4e1628d 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -52,16 +52,6 @@ config TARGET_VCT select SUPPORTS_CPU_MIPS32_R2 select SYS_MIPS_CACHE_INIT_RAM_LOAD -config TARGET_DBAU1X00 - bool "Support dbau1x00" - select MIPS_TUNE_4KC - select ROM_EXCEPTION_VECTORS - select SUPPORTS_BIG_ENDIAN - select SUPPORTS_CPU_MIPS32_R1 - select SUPPORTS_CPU_MIPS32_R2 - select SUPPORTS_LITTLE_ENDIAN - select SYS_MIPS_CACHE_INIT_RAM_LOAD - config TARGET_PB1X00 bool "Support pb1x00" select MIPS_TUNE_4KC @@ -131,7 +121,6 @@ config TARGET_XILFPGA endchoice -source "board/dbau1x00/Kconfig" source "board/imgtec/boston/Kconfig" source "board/imgtec/malta/Kconfig" source "board/imgtec/xilfpga/Kconfig" diff --git a/arch/mips/mach-au1x00/au1x00_eth.c b/arch/mips/mach-au1x00/au1x00_eth.c index 84a1f59ba0..ef9be891ec 100644 --- a/arch/mips/mach-au1x00/au1x00_eth.c +++ b/arch/mips/mach-au1x00/au1x00_eth.c @@ -27,15 +27,10 @@ #define ETH0_BASE AU1500_ETH0_BASE #define MAC0_ENABLE AU1500_MAC0_ENABLE #else -#ifdef CONFIG_SOC_AU1550 -#define ETH0_BASE AU1550_ETH0_BASE -#define MAC0_ENABLE AU1550_MAC0_ENABLE -#else #error "No valid cpu set" #endif #endif #endif -#endif #include <common.h> #include <malloc.h> diff --git a/arch/mips/mach-au1x00/include/mach/au1x00.h b/arch/mips/mach-au1x00/include/mach/au1x00.h index e242489978..1fabcba65d 100644 --- a/arch/mips/mach-au1x00/include/mach/au1x00.h +++ b/arch/mips/mach-au1x00/include/mach/au1x00.h @@ -118,27 +118,6 @@ static __inline__ int au_ffs(int x) #define CP0_DEBUG $23 /* SDRAM Controller */ -#ifdef CONFIG_SOC_AU1550 - -#define MEM_SDMODE0 0xB4000800 -#define MEM_SDMODE1 0xB4000808 -#define MEM_SDMODE2 0xB4000810 - -#define MEM_SDADDR0 0xB4000820 -#define MEM_SDADDR1 0xB4000828 -#define MEM_SDADDR2 0xB4000830 - -#define MEM_SDCONFIGA 0xB4000840 -#define MEM_SDCONFIGB 0xB4000848 -#define MEM_SDPRECMD 0xB40008c0 -#define MEM_SDAUTOREF 0xB40008c8 - -#define MEM_SDWRMD0 0xB4000880 -#define MEM_SDWRMD1 0xB4000888 -#define MEM_SDWRMD2 0xB4000890 - -#else /* CONFIG_SOC_AU1550 */ - #define MEM_SDMODE0 0xB4000000 #define MEM_SDMODE1 0xB4000004 #define MEM_SDMODE2 0xB4000008 @@ -155,8 +134,6 @@ static __inline__ int au_ffs(int x) #define MEM_SDWRMD1 0xB4000028 #define MEM_SDWRMD2 0xB400002C -#endif /* CONFIG_SOC_AU1550 */ - #define MEM_SDSLEEP 0xB4000030 #define MEM_SDSMCKE 0xB4000034 @@ -483,8 +460,6 @@ static __inline__ int au_ffs(int x) #define AU1500_ETH0_BASE 0xB1500000 #define AU1500_ETH1_BASE 0xB1510000 #define AU1100_ETH0_BASE 0xB0500000 -#define AU1550_ETH0_BASE 0xB0500000 -#define AU1550_ETH1_BASE 0xB0510000 /* 4 byte offsets from AU1000_ETH_BASE */ #define MAC_CONTROL 0x0 @@ -534,8 +509,6 @@ static __inline__ int au_ffs(int x) #define AU1500_MAC0_ENABLE 0xB1520000 #define AU1500_MAC1_ENABLE 0xB1520004 #define AU1100_MAC0_ENABLE 0xB0520000 -#define AU1550_MAC0_ENABLE 0xB0520000 -#define AU1550_MAC1_ENABLE 0xB0520004 #define MAC_EN_CLOCK_ENABLE (1<<0) #define MAC_EN_RESET0 (1<<1) @@ -995,11 +968,7 @@ static __inline__ int au_ffs(int x) #define DB1000_BCSR_ADDR 0xAE000000 #define DB1550_BCSR_ADDR 0xAF000000 -#ifdef CONFIG_DBAU1550 -#define DB1XX0_BCSR_ADDR DB1550_BCSR_ADDR -#else #define DB1XX0_BCSR_ADDR DB1000_BCSR_ADDR -#endif #ifdef CONFIG_SOC_AU1500 /* Au1500 PCI Controller */ |