diff options
author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2019-07-10 20:07:41 +0900 |
---|---|---|
committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2019-07-10 22:42:02 +0900 |
commit | 739ba41d5a0964a9bc0d5705055ddb706d7e070d (patch) | |
tree | 8102586f592acf93236ca9acd4336a8c82a1e0b4 /arch/arm/mach-uniphier/arm32/debug_ll.S | |
parent | d41b358fb331c2907f1f217686d38eeaf17eece4 (diff) | |
download | u-boot-739ba41d5a0964a9bc0d5705055ddb706d7e070d.tar.gz u-boot-739ba41d5a0964a9bc0d5705055ddb706d7e070d.tar.xz u-boot-739ba41d5a0964a9bc0d5705055ddb706d7e070d.zip |
ARM: uniphier: de-couple SC macros into base address and offset
The SC_* macros represent the address of SysCtrl registers.
For a planned new SoC, its base address will be changed.
Turn the SC_* macros into the offset from the base address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/arm32/debug_ll.S')
-rw-r--r-- | arch/arm/mach-uniphier/arm32/debug_ll.S | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-uniphier/arm32/debug_ll.S b/arch/arm/mach-uniphier/arm32/debug_ll.S index c155246ae8..3fed7985fc 100644 --- a/arch/arm/mach-uniphier/arm32/debug_ll.S +++ b/arch/arm/mach-uniphier/arm32/debug_ll.S @@ -63,7 +63,7 @@ ld4_end: mov r1, #1 str r1, [r0] - ldr r0, =SC_CLKCTRL + ldr r0, =(SC_BASE + SC_CLKCTRL) ldr r1, [r0] orr r1, r1, #SC_CLKCTRL_CEN_PERI str r1, [r0] @@ -104,7 +104,7 @@ sld8_end: mov r1, #1 str r1, [r0] - ldr r0, =SC_CLKCTRL + ldr r0, =(SC_BASE + SC_CLKCTRL) ldr r1, [r0] orr r1, r1, #SC_CLKCTRL_CEN_PERI str r1, [r0] @@ -129,7 +129,7 @@ pro5_end: sg_set_pinsel 113, 8, 8, 4, r0, r1 @ TXD2 -> TXD2 sg_set_pinsel 219, 8, 8, 4, r0, r1 @ TXD3 -> TXD3 - ldr r0, =SC_CLKCTRL + ldr r0, =(SC_BASE + SC_CLKCTRL) ldr r1, [r0] orr r1, r1, #SC_CLKCTRL_CEN_PERI str r1, [r0] @@ -153,7 +153,7 @@ pxs2_end: sg_set_pinsel 115, 0, 8, 4, r0, r1 @ TXD1 -> TXD1 sg_set_pinsel 113, 2, 8, 4, r0, r1 @ SBO0 -> TXD2 - ldr r0, =SC_CLKCTRL + ldr r0, =(SC_BASE + SC_CLKCTRL) ldr r1, [r0] orr r1, r1, #SC_CLKCTRL_CEN_PERI str r1, [r0] |