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authorPatrick Delaunay <patrick.delaunay@st.com>2020-06-16 18:27:44 +0200
committerPatrick Delaunay <patrick.delaunay@st.com>2020-07-07 16:01:23 +0200
commitbd3f60d29c2494d156b353c33678be7366caafbd (patch)
tree801d0d34f6335506ceaf86a7ee0775f226d44054 /arch/arm/mach-stm32mp/bsec.c
parent03c4e6224a0650c6de07f7000db444cd1a30b1cc (diff)
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arm: stm32mp: protect DBGMCU_IDC access with BSEC
As debugger must be totally closed on Sec closed chip, the DBGMCU_IDC register is no more accessible (self hosted debug is disabled with OTP). This patch adds a function bsec_dbgswenable() to check if the DBGMCU registers are available before to access them: BSEC_DENABLE.DBGSWENABLE = self hosted debug status. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'arch/arm/mach-stm32mp/bsec.c')
-rw-r--r--arch/arm/mach-stm32mp/bsec.c25
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c
index 059ef0b1f5..0c56b440f5 100644
--- a/arch/arm/mach-stm32mp/bsec.c
+++ b/arch/arm/mach-stm32mp/bsec.c
@@ -8,6 +8,7 @@
#include <log.h>
#include <misc.h>
#include <asm/io.h>
+#include <asm/arch/bsec.h>
#include <asm/arch/stm32mp1_smc.h>
#include <linux/arm-smccc.h>
#include <linux/iopoll.h>
@@ -21,6 +22,7 @@
#define BSEC_OTP_WRDATA_OFF 0x008
#define BSEC_OTP_STATUS_OFF 0x00C
#define BSEC_OTP_LOCK_OFF 0x010
+#define BSEC_DENABLE_OFF 0x014
#define BSEC_DISTURBED_OFF 0x01C
#define BSEC_ERROR_OFF 0x034
#define BSEC_WRLOCK_OFF 0x04C /* OTP write permananet lock */
@@ -46,6 +48,9 @@
#define BSEC_MODE_PROGFAIL_MASK 0x10
#define BSEC_MODE_PWR_MASK 0x20
+/* DENABLE Register */
+#define BSEC_DENABLE_DBGSWENABLE BIT(10)
+
/*
* OTP Lock services definition
* Value must corresponding to the bit number in the register
@@ -506,3 +511,23 @@ U_BOOT_DRIVER(stm32mp_bsec) = {
.ops = &stm32mp_bsec_ops,
.probe = stm32mp_bsec_probe,
};
+
+bool bsec_dbgswenable(void)
+{
+ struct udevice *dev;
+ struct stm32mp_bsec_platdata *plat;
+ int ret;
+
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_GET_DRIVER(stm32mp_bsec), &dev);
+ if (ret || !dev) {
+ pr_debug("bsec driver not available\n");
+ return false;
+ }
+
+ plat = dev_get_platdata(dev);
+ if (readl(plat->base + BSEC_DENABLE_OFF) & BSEC_DENABLE_DBGSWENABLE)
+ return true;
+
+ return false;
+}