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| author | Vignesh Raghavendra <vigneshr@ti.com> | 2021-02-09 13:38:48 +0530 |
|---|---|---|
| committer | Lokesh Vutla <lokeshvutla@ti.com> | 2021-02-16 10:29:57 +0530 |
| commit | 1e8f246563df822becdf909919d5e7667165f70f (patch) | |
| tree | 382ea538e72ce49be88698a3ea4867a886292d06 /arch/arm/mach-socfpga | |
| parent | 767582cd4c755c52bce3e1813bc462f37047cb5c (diff) | |
| download | u-boot-1e8f246563df822becdf909919d5e7667165f70f.tar.gz u-boot-1e8f246563df822becdf909919d5e7667165f70f.tar.xz u-boot-1e8f246563df822becdf909919d5e7667165f70f.zip | |
ARM: dts: k3-j7200-common-proc-board-u-boot: Fix broken ethernet
Since commit 6239cc8c4e ("arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts
into U-Boot") ranges have been added to CPSW node which results in
U-Boot CPSW driver failing to acquire phy_gmii_sel register range and
thus failing to configure GMII mode correctly.
Fix this by deleting ranges in -u-boot-dtsi just like its done for other
K3 platforms.
Fixes: 6239cc8c4e ("arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts into U-Boot")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Diffstat (limited to 'arch/arm/mach-socfpga')
0 files changed, 0 insertions, 0 deletions