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| author | Tom Rini <trini@konsulko.com> | 2018-08-17 07:24:34 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-08-17 07:24:34 -0400 |
| commit | 719afeb0b3c60af82f701f122978b935aa6a5217 (patch) | |
| tree | 2e8c4d6074f4cea83524faa719aef0aafd8683b0 /arch/arm/mach-socfpga/misc_gen5.c | |
| parent | 86cf1c82850f7c226f23684e19616e526ffaf10f (diff) | |
| parent | b0c0a715f90690a7dd4f33cb5b5c21960be26d3c (diff) | |
| download | u-boot-719afeb0b3c60af82f701f122978b935aa6a5217.tar.gz u-boot-719afeb0b3c60af82f701f122978b935aa6a5217.tar.xz u-boot-719afeb0b3c60af82f701f122978b935aa6a5217.zip | |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Diffstat (limited to 'arch/arm/mach-socfpga/misc_gen5.c')
| -rw-r--r-- | arch/arm/mach-socfpga/misc_gen5.c | 29 |
1 files changed, 17 insertions, 12 deletions
diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c index 848551c73f..429c3d6cd5 100644 --- a/arch/arm/mach-socfpga/misc_gen5.c +++ b/arch/arm/mach-socfpga/misc_gen5.c @@ -175,6 +175,22 @@ static void socfpga_nic301_slave_ns(void) writel(0x1, &nic301_regs->sdrdata); } +void socfpga_sdram_remap_zero(void) +{ + socfpga_nic301_slave_ns(); + + /* + * Private components security: + * U-Boot : configure private timer, global timer and cpu component + * access as non secure for kernel stage (as required by Linux) + */ + setbits_le32(&scu_regs->sacr, 0xfff); + + /* Configure the L2 controller to make SDRAM start at 0 */ + writel(0x1, &nic301_regs->remap); /* remap.mpuzero */ + writel(0x1, &pl310->pl310_addr_filter_start); +} + static u32 iswgrp_handoff[8]; int arch_early_init_r(void) @@ -195,18 +211,7 @@ int arch_early_init_r(void) socfpga_bridges_reset(1); - socfpga_nic301_slave_ns(); - - /* - * Private components security: - * U-Boot : configure private timer, global timer and cpu component - * access as non secure for kernel stage (as required by Linux) - */ - setbits_le32(&scu_regs->sacr, 0xfff); - - /* Configure the L2 controller to make SDRAM start at 0 */ - writel(0x1, &nic301_regs->remap); /* remap.mpuzero */ - writel(0x1, &pl310->pl310_addr_filter_start); + socfpga_sdram_remap_zero(); /* Add device descriptor to FPGA device table */ socfpga_fpga_add(); |