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author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-02-20 17:04:09 +0900 |
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committer | Tom Rini <trini@ti.com> | 2015-02-21 08:23:51 -0500 |
commit | 3e93b4e6001104152fec850d4724ea9ffad03e05 (patch) | |
tree | 8c205453e2b26d85e3abb5d20e81f50cada96707 /arch/arm/mach-orion5x/dram.c | |
parent | 72a8ff4b04771071023ff1024e268c2fbdf159e7 (diff) | |
download | u-boot-3e93b4e6001104152fec850d4724ea9ffad03e05.tar.gz u-boot-3e93b4e6001104152fec850d4724ea9ffad03e05.tar.xz u-boot-3e93b4e6001104152fec850d4724ea9ffad03e05.zip |
ARM: orion5x: move SoC sources to mach-orion5x
Move
arch/arm/cpu/arm926ejs/orion5x/* -> arch/arm/mach-orion5x/*
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Diffstat (limited to 'arch/arm/mach-orion5x/dram.c')
-rw-r--r-- | arch/arm/mach-orion5x/dram.c | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/arch/arm/mach-orion5x/dram.c b/arch/arm/mach-orion5x/dram.c new file mode 100644 index 0000000000..9ed93d25bc --- /dev/null +++ b/arch/arm/mach-orion5x/dram.c @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net> + * + * Based on original Kirkwood support which is + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar <prafulla@marvell.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <config.h> +#include <asm/arch/cpu.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* + * orion5x_sdram_bar - reads SDRAM Base Address Register + */ +u32 orion5x_sdram_bar(enum memory_bank bank) +{ + struct orion5x_ddr_addr_decode_registers *winregs = + (struct orion5x_ddr_addr_decode_registers *) + ORION5X_DRAM_BASE; + + u32 result = 0; + u32 enable = 0x01 & winregs[bank].size; + + if ((!enable) || (bank > BANK3)) + return 0; + + result = winregs[bank].base; + return result; +} +int dram_init (void) +{ + /* dram_init must store complete ramsize in gd->ram_size */ + gd->ram_size = get_ram_size( + (long *) orion5x_sdram_bar(0), + CONFIG_MAX_RAM_BANK_SIZE); + return 0; +} + +void dram_init_banksize (void) +{ + int i; + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + gd->bd->bi_dram[i].start = orion5x_sdram_bar(i); + gd->bd->bi_dram[i].size = get_ram_size( + (long *) (gd->bd->bi_dram[i].start), + CONFIG_MAX_RAM_BANK_SIZE); + } +} |