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| author | Lokesh Vutla <lokeshvutla@ti.com> | 2015-07-28 14:16:45 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-08-12 20:47:53 -0400 |
| commit | 74af583e9f7a255443d8f625c8dce6da7b9703be (patch) | |
| tree | fbd63bb5fad0a796a8dcfcf4cfca0623fa235f17 /arch/arm/mach-keystone/include/mach/hardware.h | |
| parent | 7b50e1599f4e6551a3348ca5f061a596f6f6896e (diff) | |
| download | u-boot-74af583e9f7a255443d8f625c8dce6da7b9703be.tar.gz u-boot-74af583e9f7a255443d8f625c8dce6da7b9703be.tar.xz u-boot-74af583e9f7a255443d8f625c8dce6da7b9703be.zip | |
ARM: keystone2: Use common structure for PLLs
Register Base addresses are same for PLLs in all
keystone platforms. If a PLL is not available, the corresponding
register addresses are marked as reserved.
Hence use a common definition.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'arch/arm/mach-keystone/include/mach/hardware.h')
| -rw-r--r-- | arch/arm/mach-keystone/include/mach/hardware.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-keystone/include/mach/hardware.h b/arch/arm/mach-keystone/include/mach/hardware.h index cf32ae547a..53f28ec8da 100644 --- a/arch/arm/mach-keystone/include/mach/hardware.h +++ b/arch/arm/mach-keystone/include/mach/hardware.h @@ -165,6 +165,8 @@ typedef volatile unsigned int *dv_reg_p; #define KS2_PASSPLLCTL1 (KS2_DEVICE_STATE_CTRL_BASE + 0x35C) #define KS2_DDR3APLLCTL0 (KS2_DEVICE_STATE_CTRL_BASE + 0x360) #define KS2_DDR3APLLCTL1 (KS2_DEVICE_STATE_CTRL_BASE + 0x364) +#define KS2_DDR3BPLLCTL0 (KS2_DEVICE_STATE_CTRL_BASE + 0x368) +#define KS2_DDR3BPLLCTL1 (KS2_DEVICE_STATE_CTRL_BASE + 0x36C) #define KS2_ARMPLLCTL0 (KS2_DEVICE_STATE_CTRL_BASE + 0x370) #define KS2_ARMPLLCTL1 (KS2_DEVICE_STATE_CTRL_BASE + 0x374) |