Merge git://git.denx.de/u-boot

10 files changed, 145 insertions, 12 deletions

diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 313eb47894..30f2b49b69 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -1,3 +1,7 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
 obj-$(CONFIG_AT91_WANTS_COMMON_PHY) += phy.o
 ifneq ($(CONFIG_SPL_BUILD),)
 obj-$(CONFIG_AT91SAM9260) += sdram.o spl_at91.o
diff --git a/arch/arm/mach-at91/armv7/clock.c b/arch/arm/mach-at91/armv7/clock.c
index 0bf453eff5..41dbf16afd 100644
--- a/arch/arm/mach-at91/armv7/clock.c
+++ b/arch/arm/mach-at91/armv7/clock.c
@@ -5,11 +5,13 @@
  * Copyright (C) 2005 Ivan Kokshaysky
  * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
  * Copyright (C) 2013 Bo Shen <voice.shen@atmel.com>
+ * Copyright (C) 2015 Wenyou Yang <wenyou.yang@atmel.com>
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
+#include <asm/errno.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/at91_pmc.h>
@@ -173,3 +175,96 @@ void at91_periph_clk_disable(int id)
 
 	writel(regval, &pmc->pcr);
 }
+
+int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+	u32 regval, status;
+	u32 timeout = 1000;
+
+	if (id > AT91_PMC_PCR_PID_MASK)
+		return -EINVAL;
+
+	if (div > 0xff)
+		return -EINVAL;
+
+	writel(id, &pmc->pcr);
+	regval = readl(&pmc->pcr);
+	regval &= ~AT91_PMC_PCR_GCKCSS;
+	regval &= ~AT91_PMC_PCR_GCKDIV;
+
+	switch (clk_source) {
+	case GCK_CSS_SLOW_CLK:
+		regval |= AT91_PMC_PCR_GCKCSS_SLOW_CLK;
+		break;
+	case GCK_CSS_MAIN_CLK:
+		regval |= AT91_PMC_PCR_GCKCSS_MAIN_CLK;
+		break;
+	case GCK_CSS_PLLA_CLK:
+		regval |= AT91_PMC_PCR_GCKCSS_PLLA_CLK;
+		break;
+	case GCK_CSS_UPLL_CLK:
+		regval |= AT91_PMC_PCR_GCKCSS_UPLL_CLK;
+		break;
+	case GCK_CSS_MCK_CLK:
+		regval |= AT91_PMC_PCR_GCKCSS_MCK_CLK;
+		break;
+	case GCK_CSS_AUDIO_CLK:
+		regval |= AT91_PMC_PCR_GCKCSS_AUDIO_CLK;
+		break;
+	default:
+		printf("Error GCK clock source selection!\n");
+		return -EINVAL;
+	}
+
+	regval |= AT91_PMC_PCR_CMD_WRITE |
+		  AT91_PMC_PCR_GCKDIV_(div) |
+		  AT91_PMC_PCR_GCKEN;
+
+	writel(regval, &pmc->pcr);
+
+	do {
+		udelay(1);
+		status = readl(&pmc->sr);
+	} while ((!!(--timeout)) && (!(status & AT91_PMC_GCKRDY)));
+
+	if (!timeout)
+		printf("Timeout waiting for GCK ready!\n");
+
+	return 0;
+}
+
+u32 at91_get_periph_generated_clk(u32 id)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+	u32 regval, clk_source, div;
+	u32 freq;
+
+	if (id > AT91_PMC_PCR_PID_MASK)
+		return 0;
+
+	writel(id, &pmc->pcr);
+	regval = readl(&pmc->pcr);
+
+	clk_source = regval & AT91_PMC_PCR_GCKCSS;
+	switch (clk_source) {
+	case AT91_PMC_PCR_GCKCSS_SLOW_CLK:
+		freq = CONFIG_SYS_AT91_SLOW_CLOCK;
+		break;
+	case AT91_PMC_PCR_GCKCSS_MAIN_CLK:
+		freq = gd->arch.main_clk_rate_hz;
+		break;
+	case AT91_PMC_PCR_GCKCSS_PLLA_CLK:
+		freq = gd->arch.plla_rate_hz;
+		break;
+	default:
+		printf("Improper GCK clock source selection!\n");
+		freq = 0;
+		break;
+	}
+
+	div = ((regval & AT91_PMC_PCR_GCKDIV) >> AT91_PMC_PCR_GCKDIV_OFFSET);
+	div += 1;
+
+	return freq / div;
+}
diff --git a/arch/arm/mach-at91/armv7/cpu.c b/arch/arm/mach-at91/armv7/cpu.c
index 8d86f97e3d..7843aed813 100644
--- a/arch/arm/mach-at91/armv7/cpu.c
+++ b/arch/arm/mach-at91/armv7/cpu.c
@@ -12,7 +12,6 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/at91_dbu.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_pit.h>
 #include <asm/arch/at91_gpbr.h>
@@ -65,12 +64,14 @@ void enable_caches(void)
 	dcache_enable();
 }
 
+#define ATMEL_CHIPID_CIDR_VERSION	0x1f
+
 unsigned int get_chip_id(void)
 {
-	return readl(ATMEL_BASE_DBGU + AT91_DBU_CIDR) & ~AT91_DBU_CIDR_MASK;
+	return readl(ATMEL_CHIPID_CIDR) & ~ATMEL_CHIPID_CIDR_VERSION;
 }
 
 unsigned int get_extension_chip_id(void)
 {
-	return readl(ATMEL_BASE_DBGU + AT91_DBU_EXID);
+	return readl(ATMEL_CHIPID_EXID);
 }
diff --git a/arch/arm/mach-at91/include/mach/at91_dbu.h b/arch/arm/mach-at91/include/mach/at91_dbu.h
index 7346fc0569..3181138322 100644
--- a/arch/arm/mach-at91/include/mach/at91_dbu.h
+++ b/arch/arm/mach-at91/include/mach/at91_dbu.h
@@ -35,8 +35,4 @@ typedef struct at91_dbu {
 #define AT91_DBU_CID_ARCH_9xx		0x01900000
 #define AT91_DBU_CID_ARCH_9XExx	0x02900000
 
-#define AT91_DBU_CIDR_MASK		0x1f
-#define AT91_DBU_CIDR			0x40
-#define AT91_DBU_EXID			0x44
-
 #endif
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 8a3fb942f7..5a51be6288 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -153,8 +153,20 @@ typedef struct at91_pmc {
 #define AT91_PMC_IXR_MOSCSELS		0x00010000
 
 #define AT91_PMC_PCR_PID_MASK		(0x3f)
+#define AT91_PMC_PCR_GCKCSS		(0x7 << 8)
+#define		AT91_PMC_PCR_GCKCSS_SLOW_CLK	(0x0 << 8)
+#define		AT91_PMC_PCR_GCKCSS_MAIN_CLK	(0x1 << 8)
+#define		AT91_PMC_PCR_GCKCSS_PLLA_CLK	(0x2 << 8)
+#define		AT91_PMC_PCR_GCKCSS_UPLL_CLK	(0x3 << 8)
+#define		AT91_PMC_PCR_GCKCSS_MCK_CLK	(0x4 << 8)
+#define		AT91_PMC_PCR_GCKCSS_AUDIO_CLK	(0x5 << 8)
 #define AT91_PMC_PCR_CMD_WRITE		(0x1 << 12)
+#define AT91_PMC_PCR_DIV		(0x3 << 16)
+#define AT91_PMC_PCR_GCKDIV		(0xff << 20)
+#define		AT91_PMC_PCR_GCKDIV_(x)		((x & 0xff) << 20)
+#define		AT91_PMC_PCR_GCKDIV_OFFSET	20
 #define AT91_PMC_PCR_EN			(0x1 << 28)
+#define AT91_PMC_PCR_GCKEN		(0x1 << 29)
 
 #define		AT91_PMC_PCK		(1 <<  0)		/* Processor Clock */
 #define		AT91RM9200_PMC_UDP	(1 <<  1)		/* USB Devcice Port Clock [AT91RM9200 only] */
@@ -236,6 +248,7 @@ typedef struct at91_pmc {
 #define		AT91_PMC_PCK1RDY	(1 <<  9)		/* Programmable Clock 1 */
 #define		AT91_PMC_PCK2RDY	(1 << 10)		/* Programmable Clock 2 */
 #define		AT91_PMC_PCK3RDY	(1 << 11)		/* Programmable Clock 3 */
+#define		AT91_PMC_GCKRDY		(1 << 24)
 
 #define		AT91_PMC_PROTKEY	0x504d4301	/* Activation Code */
 #endif
diff --git a/arch/arm/mach-at91/include/mach/atmel_sdhci.h b/arch/arm/mach-at91/include/mach/atmel_sdhci.h
new file mode 100644
index 0000000000..9652bc20c8
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/atmel_sdhci.h
@@ -0,0 +1,13 @@
+/*
+ * Copyright (c) 2015 Atmel Corporation
+ *		      Wenyou.Yang <wenyou.yang@atmel.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ATMEL_SDHCI_H
+#define __ATMEL_SDHCI_H
+
+int atmel_sdhci_init(void *regbase, u32 id);
+
+#endif
diff --git a/arch/arm/mach-at91/include/mach/clk.h b/arch/arm/mach-at91/include/mach/clk.h
index 1d45e2dc11..ad839275ec 100644
--- a/arch/arm/mach-at91/include/mach/clk.h
+++ b/arch/arm/mach-at91/include/mach/clk.h
@@ -13,6 +13,13 @@
 #include <asm/arch/at91_pmc.h>
 #include <asm/global_data.h>
 
+#define GCK_CSS_SLOW_CLK	0
+#define GCK_CSS_MAIN_CLK	1
+#define GCK_CSS_PLLA_CLK	2
+#define GCK_CSS_UPLL_CLK	3
+#define GCK_CSS_MCK_CLK		4
+#define GCK_CSS_AUDIO_CLK	5
+
 static inline unsigned long get_cpu_clk_rate(void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
@@ -119,4 +126,7 @@ static inline unsigned long get_pit_clk_rate(void)
 int at91_clock_init(unsigned long main_clock);
 void at91_periph_clk_enable(int id);
 void at91_periph_clk_disable(int id);
+int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div);
+u32 at91_get_periph_generated_clk(u32 id);
+
 #endif /* __ASM_ARM_ARCH_CLK_H__ */
diff --git a/arch/arm/mach-at91/include/mach/sama5d3.h b/arch/arm/mach-at91/include/mach/sama5d3.h
index b749cb3359..33f6c97c11 100644
--- a/arch/arm/mach-at91/include/mach/sama5d3.h
+++ b/arch/arm/mach-at91/include/mach/sama5d3.h
@@ -158,6 +158,9 @@
 #define ATMEL_BASE_RTC		0xfffffeb0
 /* Reserved:	0xfffffee0 - 0xffffffff */
 
+#define ATMEL_CHIPID_CIDR	0xffffee40
+#define ATMEL_CHIPID_EXID	0xffffee44
+
 /*
  * Internal Memory.
  */
diff --git a/arch/arm/mach-at91/include/mach/sama5d4.h b/arch/arm/mach-at91/include/mach/sama5d4.h
index 7773ace439..3da8aff27e 100644
--- a/arch/arm/mach-at91/include/mach/sama5d4.h
+++ b/arch/arm/mach-at91/include/mach/sama5d4.h
@@ -144,6 +144,9 @@
 #define ATMEL_BASE_PIOE		0xfc06d000
 #define ATMEL_BASE_AIC		0xfc06e000
 
+#define ATMEL_CHIPID_CIDR	0xfc069040
+#define ATMEL_CHIPID_EXID	0xfc069044
+
 /*
  * Internal Memory.
  */
diff --git a/arch/arm/mach-at91/spl_atmel.c b/arch/arm/mach-at91/spl_atmel.c
index 8ac53353e6..b2fb51d0ac 100644
--- a/arch/arm/mach-at91/spl_atmel.c
+++ b/arch/arm/mach-at91/spl_atmel.c
@@ -98,9 +98,4 @@ void board_init_f(ulong dummy)
 	preloader_console_init();
 
 	mem_init();
-
-	/* Clear the BSS. */
-	memset(__bss_start, 0, __bss_end - __bss_start);
-
-	board_init_r(NULL, 0);
 }