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| author | maxims@google.com <maxims@google.com> | 2017-04-17 12:00:33 -0700 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-05-08 11:57:35 -0400 |
| commit | defb184904c05df8ca49bd0265969ce72cb92401 (patch) | |
| tree | 2ef2073c46d5a2fa68a512486d9f559d78bda6cd /arch/arm/include/asm/barriers.h | |
| parent | 3b95902d47f89f95242ac143cd2a9ed1fd196157 (diff) | |
| download | u-boot-defb184904c05df8ca49bd0265969ce72cb92401.tar.gz u-boot-defb184904c05df8ca49bd0265969ce72cb92401.tar.xz u-boot-defb184904c05df8ca49bd0265969ce72cb92401.zip | |
aspeed: Refactor SCU to use consistent mask & shift
Refactor SCU header to use consistent Mask & Shift values.
Now, consistently, to read value from SCU register, mask needs
to be applied before shift.
Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/include/asm/barriers.h')
0 files changed, 0 insertions, 0 deletions