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author | Stefano Babic <sbabic@denx.de> | 2014-03-05 12:51:26 +0100 |
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committer | Stefano Babic <sbabic@denx.de> | 2014-03-05 12:51:26 +0100 |
commit | 1ad6364eeb4f578e423081d1748e8a3fdf1ab01d (patch) | |
tree | f55731737edf1cfd653b21f2ff9d387e6c53ae24 /arch/arm/dts/tegra20-whistler.dts | |
parent | 335143c76612a0ae26eef8abeda77641d4f63b50 (diff) | |
parent | cc07294bc704694ae33db75b25ac557e5917a83f (diff) | |
download | u-boot-1ad6364eeb4f578e423081d1748e8a3fdf1ab01d.tar.gz u-boot-1ad6364eeb4f578e423081d1748e8a3fdf1ab01d.tar.xz u-boot-1ad6364eeb4f578e423081d1748e8a3fdf1ab01d.zip |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'arch/arm/dts/tegra20-whistler.dts')
-rw-r--r-- | arch/arm/dts/tegra20-whistler.dts | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/arch/arm/dts/tegra20-whistler.dts b/arch/arm/dts/tegra20-whistler.dts new file mode 100644 index 0000000000..eb92264f9d --- /dev/null +++ b/arch/arm/dts/tegra20-whistler.dts @@ -0,0 +1,73 @@ +/dts-v1/; + +#include "tegra20.dtsi" + +/ { + model = "NVIDIA Tegra20 Whistler evaluation board"; + compatible = "nvidia,whistler", "nvidia,tegra20"; + + aliases { + i2c0 = "/i2c@7000d000"; + usb0 = "/usb@c5008000"; + sdhci0 = "/sdhci@c8000600"; + sdhci1 = "/sdhci@c8000400"; + }; + + memory { + device_type = "memory"; + reg = < 0x00000000 0x20000000 >; + }; + + serial@70006000 { + clock-frequency = < 216000000 >; + }; + + i2c@7000c000 { + status = "disabled"; + }; + + i2c@7000c400 { + status = "disabled"; + }; + + i2c@7000c500 { + status = "disabled"; + }; + + i2c@7000d000 { + clock-frequency = <100000>; + + pmic@3c { + compatible = "maxim,max8907b"; + reg = <0x3c>; + + clk_32k: clock { + compatible = "fixed-clock"; + /* + * leave out for now due to CPP: + * #clock-cells = <0>; + */ + clock-frequency = <32768>; + }; + }; + }; + + usb@c5000000 { + status = "disabled"; + }; + + usb@c5004000 { + status = "disabled"; + }; + + sdhci@c8000400 { + status = "okay"; + wp-gpios = <&gpio 173 0>; /* gpio PV5 */ + bus-width = <8>; + }; + + sdhci@c8000600 { + status = "okay"; + bus-width = <8>; + }; +}; |