diff options
author | Peng Fan <peng.fan@nxp.com> | 2019-09-16 03:09:55 +0000 |
---|---|---|
committer | Stefano Babic <sbabic@denx.de> | 2019-11-05 10:27:18 +0100 |
commit | d239d9d9464f7eb3a9ae1d3b45865149a758b501 (patch) | |
tree | ac7d7d6d560cefbe0f8c0da59e44fd50b06288af /arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | |
parent | dadb072f1231850e0eb3cff53c88ff69211e099f (diff) | |
download | u-boot-d239d9d9464f7eb3a9ae1d3b45865149a758b501.tar.gz u-boot-d239d9d9464f7eb3a9ae1d3b45865149a758b501.tar.xz u-boot-d239d9d9464f7eb3a9ae1d3b45865149a758b501.zip |
imx: add i.MX8MN DDR4 board support
Support pinctrl/clk/sdhc, include ddr4 timing data.
Log:
U-Boot SPL 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800)
Normal Boot
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0
U-Boot 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800)
CPU: Freescale i.MX8MNano rev1.0 at 24 MHz
Reset cause: POR
Model: NXP i.MX8MNano DDR4 EVK board
DRAM: 2 GiB
MMC: FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... *** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: No ethernet found.
Hit any key to stop autoboot: 0
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi')
-rw-r--r-- | arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 92 |
1 files changed, 92 insertions, 0 deletions
diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi new file mode 100644 index 0000000000..8d61597e0c --- /dev/null +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + */ + +&{/soc@0} { + u-boot,dm-pre-reloc; + u-boot,dm-spl; +}; + +&clk { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&osc_24m { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&aips1 { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&aips2 { + u-boot,dm-spl; +}; + +&aips3 { + u-boot,dm-spl; +}; + +&iomuxc { + u-boot,dm-spl; +}; + +&pinctrl_reg_usdhc2_vmmc { + u-boot,dm-spl; +}; + +&pinctrl_uart2 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc2_gpio { + u-boot,dm-spl; +}; + +&pinctrl_usdhc2 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc3 { + u-boot,dm-spl; +}; + +&gpio1 { + u-boot,dm-spl; +}; + +&gpio2 { + u-boot,dm-spl; +}; + +&gpio3 { + u-boot,dm-spl; +}; + +&gpio4 { + u-boot,dm-spl; +}; + +&gpio5 { + u-boot,dm-spl; +}; + +&uart2 { + u-boot,dm-spl; +}; + +&usdhc1 { + u-boot,dm-spl; +}; + +&usdhc2 { + u-boot,dm-spl; +}; + +&usdhc3 { + u-boot,dm-spl; +}; |