diff options
| author | Fabio Estevam <festevam@gmail.com> | 2019-11-05 09:47:54 -0300 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2019-12-06 12:05:08 +0100 |
| commit | 2d4b87f86743c78aa86f7998e1a95a3b1ec45159 (patch) | |
| tree | 8351dd19dd65a4fc2b00ddbc6c90253093cf1677 /arch/arm/dts/imx7ulp.dtsi | |
| parent | d136eb9bfeca97131aaa6daf214018823e8a3869 (diff) | |
| download | u-boot-2d4b87f86743c78aa86f7998e1a95a3b1ec45159.tar.gz u-boot-2d4b87f86743c78aa86f7998e1a95a3b1ec45159.tar.xz u-boot-2d4b87f86743c78aa86f7998e1a95a3b1ec45159.zip | |
mx7ulp: Sync the device tree related files
Sync the mx7ulp device tree related files with the one from
NXP U-Boot vendor tree (imx_v2019.04_4.19.35_1.0.0).
The mainline support for i.MX7ULP is very premature at this stage.
We should probably re-sync with mainline Linux dts when it gets
in better shape, but for now sync with the U-Boot vendor code.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Diffstat (limited to 'arch/arm/dts/imx7ulp.dtsi')
| -rw-r--r-- | arch/arm/dts/imx7ulp.dtsi | 28 |
1 files changed, 24 insertions, 4 deletions
diff --git a/arch/arm/dts/imx7ulp.dtsi b/arch/arm/dts/imx7ulp.dtsi index a8458f89d5..7bcd2cc346 100644 --- a/arch/arm/dts/imx7ulp.dtsi +++ b/arch/arm/dts/imx7ulp.dtsi @@ -16,10 +16,12 @@ interrupt-parent = <&intc>; aliases { - gpio0 = &gpio0; - gpio1 = &gpio1; - gpio2 = &gpio2; - gpio3 = &gpio3; + gpio0 = &gpio4; + gpio1 = &gpio5; + gpio2 = &gpio0; + gpio3 = &gpio1; + gpio4 = &gpio2; + gpio5 = &gpio3; mmc0 = &usdhc0; mmc1 = &usdhc1; serial0 = &lpuart4; @@ -27,10 +29,12 @@ serial2 = &lpuart6; serial3 = &lpuart7; usbphy0 = &usbphy1; + usb0 = &usbotg1; i2c4 = &lpi2c4; i2c5 = &lpi2c5; i2c6 = &lpi2c6; i2c7 = &lpi2c7; + spi0 = &qspi1; }; cpus { @@ -503,6 +507,22 @@ fsl,mux_mask = <0xf00>; }; + gpio4: gpio@4103f000 { + compatible = "fsl,imx7ulp-gpio"; + reg = <0x4103f000 0x1000 0x4100F000 0x40>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&iomuxc 0 0 32>; + }; + + gpio5: gpio@41040000 { + compatible = "fsl,imx7ulp-gpio"; + reg = <0x41040000 0x1000 0x4100F040 0x40>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&iomuxc 0 32 32>; + }; + gpio0: gpio@40ae0000 { compatible = "fsl,imx7ulp-gpio"; reg = <0x40ae0000 0x1000 0x400F0000 0x40>; |