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| author | Igal Liberman <igall@marvell.com> | 2017-04-26 15:40:00 +0300 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2021-04-29 07:45:24 +0200 |
| commit | 2dbba24088b8ef06aabee5df17ff7105ff259aca (patch) | |
| tree | 849d494fb675e5deacff8d284fcb02c600bd2861 /arch/arm/dts/armada-8040-puzzle-m801.dts | |
| parent | 4568e2041c9fb6288f841bfb63474aecc1560af9 (diff) | |
| download | u-boot-2dbba24088b8ef06aabee5df17ff7105ff259aca.tar.gz u-boot-2dbba24088b8ef06aabee5df17ff7105ff259aca.tar.xz u-boot-2dbba24088b8ef06aabee5df17ff7105ff259aca.zip | |
phy: marvell: rename comphy related definitions to COMPHY_XX
Currently, all comphy definitions are PHY_TYPE_XX and PHY_SPEEED_XX.
Those definition might be confused with MDIO PHY definitions.
This patch does the following changes:
- PHY_TYPE_XX --> COMPHY_TYPE_XX
- PHY_SPEED_XX --> COMPHY_SPEED_XX
This improves readability, no functional change.
Change-Id: I2bd1d9289ebbc5c16fa80f9870f797ea1bcaf5fa
Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Diffstat (limited to 'arch/arm/dts/armada-8040-puzzle-m801.dts')
| -rw-r--r-- | arch/arm/dts/armada-8040-puzzle-m801.dts | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/dts/armada-8040-puzzle-m801.dts b/arch/arm/dts/armada-8040-puzzle-m801.dts index ff46ce50cb..0becc4ff0d 100644 --- a/arch/arm/dts/armada-8040-puzzle-m801.dts +++ b/arch/arm/dts/armada-8040-puzzle-m801.dts @@ -220,24 +220,24 @@ * Lane 5: SATA1 */ phy0 { - phy-type = <PHY_TYPE_PEX0>; + phy-type = <COMPHY_TYPE_PEX0>; }; phy1 { - phy-type = <PHY_TYPE_SGMII2>; - phy-speed = <PHY_SPEED_1_25G>; + phy-type = <COMPHY_TYPE_SGMII2>; + phy-speed = <COMPHY_SPEED_1_25G>; }; phy2 { - phy-type = <PHY_TYPE_SATA0>; + phy-type = <COMPHY_TYPE_SATA0>; }; phy3 { - phy-type = <PHY_TYPE_SGMII1>; - phy-speed = <PHY_SPEED_1_25G>; + phy-type = <COMPHY_TYPE_SGMII1>; + phy-speed = <COMPHY_SPEED_1_25G>; }; phy4 { - phy-type = <PHY_TYPE_SFI>; + phy-type = <COMPHY_TYPE_SFI>; }; phy5 { - phy-type = <PHY_TYPE_SATA1>; + phy-type = <COMPHY_TYPE_SATA1>; }; }; @@ -367,23 +367,23 @@ * Lane 5: SGMII2 */ phy0 { - phy-type = <PHY_TYPE_PEX0>; + phy-type = <COMPHY_TYPE_PEX0>; }; phy1 { - phy-type = <PHY_TYPE_PEX0>; + phy-type = <COMPHY_TYPE_PEX0>; }; phy2 { - phy-type = <PHY_TYPE_USB3_HOST0>; + phy-type = <COMPHY_TYPE_USB3_HOST0>; }; phy3 { - phy-type = <PHY_TYPE_SGMII1>; - phy-speed = <PHY_SPEED_1_25G>; + phy-type = <COMPHY_TYPE_SGMII1>; + phy-speed = <COMPHY_SPEED_1_25G>; }; phy4 { - phy-type = <PHY_TYPE_SFI>; + phy-type = <COMPHY_TYPE_SFI>; }; phy5 { - phy-type = <PHY_TYPE_SGMII2>; - phy-speed = <PHY_SPEED_1_25G>; + phy-type = <COMPHY_TYPE_SGMII2>; + phy-speed = <COMPHY_SPEED_1_25G>; }; }; |