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| author | Hans de Goede <hdegoede@redhat.com> | 2015-04-27 11:44:22 +0200 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2015-05-04 16:51:54 +0200 |
| commit | 375de01702f4b0b1a27715ca1a18110d6dbfdebe (patch) | |
| tree | 76d808f5d177d7debdc68ccaa1ac03d0f19e51ee /arch/arm/cpu/armv7/sunxi | |
| parent | 421b32b8808a4d3dc59e84c69fc23b5d62302272 (diff) | |
| download | u-boot-375de01702f4b0b1a27715ca1a18110d6dbfdebe.tar.gz u-boot-375de01702f4b0b1a27715ca1a18110d6dbfdebe.tar.xz u-boot-375de01702f4b0b1a27715ca1a18110d6dbfdebe.zip | |
sunxi: usb: Move setup of host controller clocks to the host controller drivers
The sunxi "usbc" code is mostly about phy setup, but currently also sets up
the host controller clocks, which is something which really belongs in the
host controller drivers, so move it there.
This is a preparation patch for moving the sunxi ehci code to the driver
model and for adding ohci support.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Diffstat (limited to 'arch/arm/cpu/armv7/sunxi')
| -rw-r--r-- | arch/arm/cpu/armv7/sunxi/usbc.c | 14 |
1 files changed, 1 insertions, 13 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/usbc.c b/arch/arm/cpu/armv7/sunxi/usbc.c index 21032aa348..6ae6dfa9d8 100644 --- a/arch/arm/cpu/armv7/sunxi/usbc.c +++ b/arch/arm/cpu/armv7/sunxi/usbc.c @@ -11,12 +11,12 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include <common.h> #include <asm/arch/clock.h> #include <asm/arch/cpu.h> #include <asm/arch/usbc.h> #include <asm/gpio.h> #include <asm/io.h> -#include <common.h> #include <errno.h> #ifdef CONFIG_AXP152_POWER #include <axp152.h> @@ -44,25 +44,21 @@ static struct sunxi_usbc_hcd { struct usb_hcd *hcd; int usb_rst_mask; - int ahb_clk_mask; int gpio_vbus; int gpio_vbus_det; int id; } sunxi_usbc_hcd[] = { { .usb_rst_mask = CCM_USB_CTRL_PHY0_RST | CCM_USB_CTRL_PHY0_CLK, - .ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB0, .id = 0, }, { .usb_rst_mask = CCM_USB_CTRL_PHY1_RST | CCM_USB_CTRL_PHY1_CLK, - .ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0, .id = 1, }, #if (CONFIG_USB_MAX_CONTROLLER_COUNT > 1) { .usb_rst_mask = CCM_USB_CTRL_PHY2_RST | CCM_USB_CTRL_PHY2_CLK, - .ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI1, .id = 2, } #endif @@ -227,10 +223,6 @@ void sunxi_usbc_enable(int index) setbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE); setbits_le32(&ccm->usb_clk_cfg, sunxi_usbc->usb_rst_mask); - setbits_le32(&ccm->ahb_gate0, sunxi_usbc->ahb_clk_mask); -#ifdef CONFIG_SUNXI_GEN_SUN6I - setbits_le32(&ccm->ahb_reset0_cfg, sunxi_usbc->ahb_clk_mask); -#endif sunxi_usb_phy_init(sunxi_usbc); @@ -248,10 +240,6 @@ void sunxi_usbc_disable(int index) if (sunxi_usbc->id != 0) sunxi_usb_passby(sunxi_usbc, !SUNXI_USB_PASSBY_EN); -#ifdef CONFIG_SUNXI_GEN_SUN6I - clrbits_le32(&ccm->ahb_reset0_cfg, sunxi_usbc->ahb_clk_mask); -#endif - clrbits_le32(&ccm->ahb_gate0, sunxi_usbc->ahb_clk_mask); clrbits_le32(&ccm->usb_clk_cfg, sunxi_usbc->usb_rst_mask); /* disable common PHY only once, for the last enabled hcd */ |