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authorHeiko Schocher <hs@denx.de>2014-07-18 06:07:20 +0200
committerStefano Babic <sbabic@denx.de>2014-07-23 12:25:42 +0200
commita0ae0091d783b1140f8d321d8c6d221aeb0d39d0 (patch)
treee6197115bbf6c6c78f5a60d460661fa0d39a131a /arch/arm/cpu/armv7/mx6
parentb2f97cf279c54c51741539455116ec3393a871ea (diff)
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i.MX6: add enable_spi_clk()
add enable_spi_clk(), so board code can enable spi clocks. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/cpu/armv7/mx6')
-rw-r--r--arch/arm/cpu/armv7/mx6/clock.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index e1fb5abdea..abd9d619dc 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -71,6 +71,24 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
}
#endif
+/* spi_num can be from 0 - SPI_MAX_NUM */
+int enable_spi_clk(unsigned char enable, unsigned spi_num)
+{
+ u32 reg;
+ u32 mask;
+
+ if (spi_num > SPI_MAX_NUM)
+ return -EINVAL;
+
+ mask = MXC_CCM_CCGR_CG_MASK << (spi_num << 1);
+ reg = __raw_readl(&imx_ccm->CCGR1);
+ if (enable)
+ reg |= mask;
+ else
+ reg &= ~mask;
+ __raw_writel(reg, &imx_ccm->CCGR1);
+ return 0;
+}
static u32 decode_pll(enum pll_clocks pll, u32 infreq)
{
u32 div;