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| author | Hao Zhang <hzhang@ti.com> | 2014-07-16 00:59:24 +0300 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-07-25 16:26:11 -0400 |
| commit | 20187fd11c37226fac8661bbac96ddd4fdf507b1 (patch) | |
| tree | a44f40207f8bc097ac8a3af82f1db40ea9b6ce14 /arch/arm/cpu/armv7/keystone/msmc.c | |
| parent | 4dca7f0acc88708100a2b25b019befc9eea02f45 (diff) | |
| download | u-boot-20187fd11c37226fac8661bbac96ddd4fdf507b1.tar.gz u-boot-20187fd11c37226fac8661bbac96ddd4fdf507b1.tar.xz u-boot-20187fd11c37226fac8661bbac96ddd4fdf507b1.zip | |
ARM: keystone2: add MSMC cache coherency support for K2E SOC
This patch adds Keystone2 K2E SOC specific code to support
MSMC cache coherency. Also create header file for msmc to hold
its API.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/keystone/msmc.c')
| -rw-r--r-- | arch/arm/cpu/armv7/keystone/msmc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/keystone/msmc.c b/arch/arm/cpu/armv7/keystone/msmc.c index af858fa758..7d8e5978df 100644 --- a/arch/arm/cpu/armv7/keystone/msmc.c +++ b/arch/arm/cpu/armv7/keystone/msmc.c @@ -8,7 +8,7 @@ */ #include <common.h> -#include <asm/arch/hardware.h> +#include <asm/arch/msmc.h> struct mpax { u32 mpaxl; @@ -56,7 +56,7 @@ struct msms_regs { }; -void share_all_segments(int priv_id) +void msmc_share_all_segments(int priv_id) { struct msms_regs *msmc = (struct msms_regs *)KS2_MSMC_CTRL_BASE; int j; |