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| author | Stefano Babic <sbabic@denx.de> | 2012-12-08 12:02:45 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2012-12-08 12:02:45 +0100 |
| commit | 05a860c228fe6c8f2e7aced8cc8ef88bc1038363 (patch) | |
| tree | 764536da9202b9de387a0d957829f64dfba818b7 /arch/arm/cpu/armv7/am33xx/clock.c | |
| parent | 393ff47ba3123208f7c4f08d63f114300a41d0c4 (diff) | |
| parent | fd4d564b3c80b111f18c93adb14233a6a7ddb0e9 (diff) | |
| download | u-boot-05a860c228fe6c8f2e7aced8cc8ef88bc1038363.tar.gz u-boot-05a860c228fe6c8f2e7aced8cc8ef88bc1038363.tar.xz u-boot-05a860c228fe6c8f2e7aced8cc8ef88bc1038363.zip | |
Merge branch 'master' of git://git.denx.de/u-boot into master
Conflicts:
drivers/power/power_fsl.c
include/configs/mx35pdk.h
include/configs/mx53loco.h
include/configs/woodburn_common.h
board/woodburn/woodburn.c
These boards still use the old old PMIC framework, so they
do not merge properly after the power framework was merged into
mainline.
Fix all conflicts and update woodburn to use Power Framework.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/cpu/armv7/am33xx/clock.c')
| -rw-r--r-- | arch/arm/cpu/armv7/am33xx/clock.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c index bc2abb657c..0b4cb4e529 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -40,6 +40,7 @@ #define CLK_MODE_MASK 0xfffffff8 #define CLK_DIV_SEL 0xFFFFFFE0 #define CPGMAC0_IDLE 0x30000 +#define DPLL_CLKDCOLDO_GATE_CTRL 0x300 const struct cm_perpll *cmper = (struct cm_perpll *)CM_PER; const struct cm_wkuppll *cmwkup = (struct cm_wkuppll *)CM_WKUP; @@ -194,6 +195,11 @@ static void enable_per_clocks(void) writel(PRCM_MOD_EN, &cmrtc->rtcclkctrl); while (readl(&cmrtc->rtcclkctrl) != PRCM_MOD_EN) ; + + /* MUSB */ + writel(PRCM_MOD_EN, &cmper->usb0clkctrl); + while (readl(&cmper->usb0clkctrl) != PRCM_MOD_EN) + ; } static void mpu_pll_config(void) @@ -290,6 +296,8 @@ static void per_pll_config(void) while (readl(&cmwkup->idlestdpllper) != ST_DPLL_CLK) ; + + writel(DPLL_CLKDCOLDO_GATE_CTRL, &cmwkup->clkdcoldodpllper); } void ddr_pll_config(unsigned int ddrpll_m) |