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authorFabio Estevam <fabio.estevam@freescale.com>2014-08-25 13:34:16 -0300
committerStefano Babic <sbabic@denx.de>2014-09-09 15:05:37 +0200
commitdb5b7f566e513dc1b7f364102010558e5ae7e14f (patch)
tree19c6e32ee78d8a270e2a9a02bea8877517414b3d /Kconfig
parenta6bc0195dba895fa0e9facc718d17eb098695685 (diff)
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net: fec_mxc: Adjust RX DMA alignment for mx6solox
mx6solox has a requirement for 64 bytes alignment for RX DMA transfer. Other SoCs work with the standard 32 bytes alignment. Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers, which addresses the needs from mx6solox and also works for the other SoCs. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
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