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authorBin Meng <bmeng.cn@gmail.com>2018-06-10 06:25:01 -0700
committerBin Meng <bmeng.cn@gmail.com>2018-06-13 09:50:57 +0800
commitfcfc8a82b10c8acb844b8f0ed6c5d2cadce1291f (patch)
tree580c1e6caf6fff431e10821c8b871f120802a791
parent594d089c8a6439910b7df784e8929b65229b9e91 (diff)
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x86: Conditionally build the pinctrl_ich6 driver
The pinctrl_ich6 driver is currently unconditionally built for all x86 boards. Let's use a Kconfig option to control the build. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/x86/Kconfig6
-rw-r--r--arch/x86/cpu/baytrail/Kconfig1
-rw-r--r--arch/x86/cpu/ivybridge/Kconfig1
-rw-r--r--arch/x86/lib/Makefile2
4 files changed, 9 insertions, 1 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 5c23b2cb57..18c7fb2d49 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -735,6 +735,12 @@ config I8259_PIC
slave) interrupt controllers. Include this to have U-Boot set up
the interrupt correctly.
+config PINCTRL_ICH6
+ bool
+ help
+ Intel ICH6 compatible chipset pinctrl driver. It needs to work
+ together with the ICH6 compatible gpio driver.
+
config I8254_TIMER
bool
default y
diff --git a/arch/x86/cpu/baytrail/Kconfig b/arch/x86/cpu/baytrail/Kconfig
index ac58b03810..022a9f2e51 100644
--- a/arch/x86/cpu/baytrail/Kconfig
+++ b/arch/x86/cpu/baytrail/Kconfig
@@ -12,6 +12,7 @@ config INTEL_BAYTRAIL
imply AHCI_PCI
imply ICH_SPI
imply INTEL_ICH6_GPIO
+ imply PINCTRL_ICH6
imply MMC
imply MMC_PCI
imply MMC_SDHCI
diff --git a/arch/x86/cpu/ivybridge/Kconfig b/arch/x86/cpu/ivybridge/Kconfig
index eec92df1bc..5f0e60837c 100644
--- a/arch/x86/cpu/ivybridge/Kconfig
+++ b/arch/x86/cpu/ivybridge/Kconfig
@@ -13,6 +13,7 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE
imply AHCI_PCI
imply ICH_SPI
imply INTEL_ICH6_GPIO
+ imply PINCTRL_ICH6
imply SCSI
imply SCSI_AHCI
imply SPI_FLASH
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index 5a64f6eddc..e80a7ce2bd 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -24,7 +24,7 @@ obj-$(CONFIG_ENABLE_MRC_CACHE) += mrccache.o
obj-y += northbridge-uclass.o
obj-$(CONFIG_I8259_PIC) += i8259.o
obj-$(CONFIG_I8254_TIMER) += i8254.o
-obj-y += pinctrl_ich6.o
+obj-$(CONFIG_PINCTRL_ICH6) += pinctrl_ich6.o
obj-y += pirq_routing.o
obj-y += relocate.o
obj-y += physmem.o