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| author | Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com> | 2017-07-28 15:59:22 -0400 |
|---|---|---|
| committer | Joe Hershberger <joe.hershberger@ni.com> | 2017-08-07 15:18:31 -0500 |
| commit | ef1f61aa03b30498a86ae0aa839f734bcb3737ec (patch) | |
| tree | 2a3f4d514f8964e45249408f91001fbc5f1b34df | |
| parent | 704f3acfcf55343043bbed01c5fb0a0094a68e8a (diff) | |
| download | u-boot-ef1f61aa03b30498a86ae0aa839f734bcb3737ec.tar.gz u-boot-ef1f61aa03b30498a86ae0aa839f734bcb3737ec.tar.xz u-boot-ef1f61aa03b30498a86ae0aa839f734bcb3737ec.zip | |
net: phy: micrel: add an option to disable gigabit for the KSZ9031
The environment variable "disable_giga" can now be used to disable
1000baseTx on the Micrel's KSZ9031.
Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| -rw-r--r-- | drivers/net/phy/micrel_ksz90x1.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/drivers/net/phy/micrel_ksz90x1.c b/drivers/net/phy/micrel_ksz90x1.c index 785143d089..20f8a55196 100644 --- a/drivers/net/phy/micrel_ksz90x1.c +++ b/drivers/net/phy/micrel_ksz90x1.c @@ -335,12 +335,40 @@ static int ksz9031_phy_extwrite(struct phy_device *phydev, int addr, static int ksz9031_config(struct phy_device *phydev) { int ret; + ret = ksz9031_of_config(phydev); if (ret) return ret; ret = ksz9031_center_flp_timing(phydev); if (ret) return ret; + + /* add an option to disable the gigabit feature of this PHY */ + if (getenv("disable_giga")) { + unsigned features; + unsigned bmcr; + + /* disable speed 1000 in features supported by the PHY */ + features = phydev->drv->features; + features &= ~(SUPPORTED_1000baseT_Half | + SUPPORTED_1000baseT_Full); + phydev->advertising = phydev->supported = features; + + /* disable speed 1000 in Basic Control Register */ + bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); + bmcr &= ~(1 << 6); + phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, bmcr); + + /* disable speed 1000 in 1000Base-T Control Register */ + phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, 0); + + /* start autoneg */ + genphy_config_aneg(phydev); + genphy_restart_aneg(phydev); + + return 0; + } + return genphy_config(phydev); } |