diff options
| author | Ye Li <ye.li@nxp.com> | 2019-07-22 01:25:00 +0000 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2019-10-08 16:35:16 +0200 |
| commit | eb6d2e5920fa518fc924025e1e7987cd0dde73ad (patch) | |
| tree | 20b614523935163c824ce265ecc7396365d2eb48 | |
| parent | 3399a2e1d25be46725ebfd4b5aba66232467c32d (diff) | |
i.MX7ULP: Fix SPLL/APLL clock rate calculation issue
The num/denom is a float value, but in the calculation it is convert
to integer 0, and cause the result wrong.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
| -rw-r--r-- | arch/arm/mach-imx/mx7ulp/scg.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/mx7ulp/scg.c b/arch/arm/mach-imx/mx7ulp/scg.c index 85d726fe30..a28a2bc81b 100644 --- a/arch/arm/mach-imx/mx7ulp/scg.c +++ b/arch/arm/mach-imx/mx7ulp/scg.c @@ -503,7 +503,10 @@ u32 decode_pll(enum pll_clocks pll) infreq = infreq / pre_div; - return infreq * mult + infreq * num / denom; + if (denom) + return infreq * mult + infreq * num / denom; + else + return infreq * mult; case PLL_A7_APLL: reg = readl(&scg1_regs->apllcsr); @@ -532,7 +535,10 @@ u32 decode_pll(enum pll_clocks pll) infreq = infreq / pre_div; - return infreq * mult + infreq * num / denom; + if (denom) + return infreq * mult + infreq * num / denom; + else + return infreq * mult; case PLL_USB: reg = readl(&scg1_regs->upllcsr); |