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authorhuang lin <hl@rock-chips.com>2015-12-07 11:08:56 +0800
committerSimon Glass <sjg@chromium.org>2015-12-13 20:51:44 -0700
commite390680015c79c8ce390b5245646324eb6f9d9c6 (patch)
tree9ca169b0ed9be88085c2e8560790adf0b5bfa37a
parentf4a8a1757b5c53a6f86b2724aea51436d4e4f9cc (diff)
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rockchip: rk3036 sdram setting cs1_row when rank larger than 1
only rank large than 1, we will use cs1_row, so check rank, when rank larger than 1, we set the cs1_row. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/arm/mach-rockchip/rk3036/sdram_rk3036.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index 7a05e310d7..e3ca870074 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -701,15 +701,19 @@ finish:
static void sdram_all_config(struct rk3036_sdram_priv *priv)
{
u32 os_reg = 0;
+ u32 cs1_row = 0;
struct rk3036_ddr_config config = priv->ddr_config;
+ if (config.rank > 1)
+ cs1_row = config.cs1_row - 13;
+
os_reg = config.ddr_type << DDR_TYPE_SHIFT |
0 << DDR_CHN_CNT_SHIFT |
(config.rank - 1) << DDR_RANK_CNT_SHIFT |
(config.col - 1) << DDR_COL_SHIFT |
(config.bank == 3 ? 0 : 1) << DDR_BANK_SHIFT |
(config.cs0_row - 13) << DDR_CS0_ROW_SHIFT |
- (config.cs1_row - 13) << DDR_CS1_ROW_SHIFT |
+ cs1_row << DDR_CS1_ROW_SHIFT |
1 << DDR_BW_SHIFT | config.bw << DDR_DIE_BW_SHIFT;
writel(os_reg, &priv->grf->os_reg[1]);
}