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| author | Marek Vasut <marex@denx.de> | 2018-08-21 16:26:32 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2018-08-24 12:05:21 +0200 |
| commit | b67f80148e6961dce00b36fc043962aa2a140fac (patch) | |
| tree | 0898e1ac73a3db9085358d40d47c9b285132a5a9 | |
| parent | 331c37221057e6a1291b6e14d9f033a7a90051f1 (diff) | |
| download | u-boot-b67f80148e6961dce00b36fc043962aa2a140fac.tar.gz u-boot-b67f80148e6961dce00b36fc043962aa2a140fac.tar.xz u-boot-b67f80148e6961dce00b36fc043962aa2a140fac.zip | |
ARM: dts: socfpga: Drop ad-hoc UART clock frequency encoding from DT
The UART clock frequency can be obtained from the clock framework by the
ns16550 driver, so drop this redundant DT node.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
| -rw-r--r-- | arch/arm/dts/socfpga_arria10_socdk.dtsi | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/dts/socfpga_arria10_socdk.dtsi b/arch/arm/dts/socfpga_arria10_socdk.dtsi index 17e0b75a8f..42e888548e 100644 --- a/arch/arm/dts/socfpga_arria10_socdk.dtsi +++ b/arch/arm/dts/socfpga_arria10_socdk.dtsi @@ -154,7 +154,6 @@ }; &uart1 { - clock-frequency = <50000000>; u-boot,dm-pre-reloc; status = "okay"; }; |