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author | Ye Li <ye.li@nxp.com> | 2016-01-26 22:01:57 +0800 |
---|---|---|
committer | Stefano Babic <sbabic@denx.de> | 2016-02-02 21:25:05 +0100 |
commit | 9655ebdd50c42f24179d738e4e6230c048f41de1 (patch) | |
tree | a75ed30c46eaa9fea29f4fe8655444a245b53d38 | |
parent | 6967c97fdb722b26859a6dab0bfcdba9a892d146 (diff) | |
download | u-boot-9655ebdd50c42f24179d738e4e6230c048f41de1.tar.gz u-boot-9655ebdd50c42f24179d738e4e6230c048f41de1.tar.xz u-boot-9655ebdd50c42f24179d738e4e6230c048f41de1.zip |
imx: mx6sx: Fix issue in LCDIF clock enablement
Wrong checking for the base_addr paramter with LCDIF1 and LCDIF2. Always
enter the -EINVAL return.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
-rw-r--r-- | arch/arm/cpu/armv7/mx6/clock.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index 27a3f2f4e6..007204dd4d 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -742,8 +742,8 @@ int enable_lcdif_clock(u32 base_addr) u32 lcdif_clk_sel_mask, lcdif_ccgr3_mask; if (is_cpu_type(MXC_CPU_MX6SX)) { - if ((base_addr == LCDIF1_BASE_ADDR) || - (base_addr == LCDIF2_BASE_ADDR)) { + if ((base_addr != LCDIF1_BASE_ADDR) && + (base_addr != LCDIF2_BASE_ADDR)) { puts("Wrong LCD interface!\n"); return -EINVAL; } |