Merge branch 'master' of git://git.denx.de/u-boot-arm

Conflicts:
	cpu/arm1176/cpu.c
	cpu/arm1176/start.S
	cpu/arm_cortexa8/s5pc1xx/Makefile
	cpu/arm_cortexa8/s5pc1xx/clock.c
	drivers/serial/serial_s5p.c
	include/asm-arm/arch-s5pc1xx/clk.h
	include/asm-arm/arch-s5pc1xx/gpio.h
	include/asm-arm/arch-s5pc1xx/uart.h

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

2227 files changed, 10106 insertions, 6746 deletions

diff --git a/CHANGELOG b/CHANGELOG
index 9f8c7cd477..d4cd8f121c 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -1,3 +1,460 @@
+commit 8e64d6efd8d778a5f83d8bff9cd273a86dcc182f
+Author: Heiko Schocher <hs@denx.de>
+Date:	Wed Mar 31 08:34:51 2010 +0200
+
+    net, doc: How to setup MAC address correctly
+
+    As this seems unclear, document how the flow of setting up
+    the MAC address is correct.
+
+    Signed-off-by: Heiko Schocher <hs@denx.de>
+
+    Text changed slightly, adding input from Mike Frysinger.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit b78b48c6a0c34b2991e31fc4548aaf773d34f2b3
+Author: Heiko Schocher <hs@denx.de>
+Date:	Wed Mar 31 08:34:46 2010 +0200
+
+    net, fec_mxc: only setup the device enetaddr with eeprom value
+
+    Only fill the device enetaddr with the contents of the eeprom,
+    do not program it in MAC address registers
+
+    Signed-off-by: Heiko Schocher <hs@denx.de>
+    Acked-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit d5a64237d58ded31c2eed455c7a346e1c85f5565
+Author: Felix Radensky <felix@embedded-sol.com>
+Date:	Tue Mar 30 15:02:13 2010 +0300
+
+    doc: Fix ramdisk examples in doc/uImage.FIT/multi.its
+
+    The ramdisk sections in doc/uImage.FIT/multi.its lack
+    load address and entry point properties. Using examples
+    from this file will result in unbootable image, u-boot
+    will issue the following error messages:
+
+    Can't get ramdisk subimage load address!
+    Ramdisk image is corrupt or invalid
+
+    This patch adds missing properties to ramdisk sections.
+
+    Signed-off-by: Felix Radensky <felix@embedded-sol.com>
+
+commit 2d2018f3db5ed834bc1ee208a2c6212fdf00bca1
+Author: Heiko Schocher <heiko.schocher@invitel.hu>
+Date:	Wed Mar 24 13:22:50 2010 +0100
+
+    jffs2, suen3: Fix compiler warning
+
+    $ ./MAKEALL suen3
+    jffs2_1pass.c: In function 'get_fl_mem':
+    jffs2_1pass.c:399: warning: unused variable 'id'
+    jffs2_1pass.c: In function 'get_node_mem':
+    jffs2_1pass.c:423: warning: unused variable 'id'
+
+    Signed-off-by: Heiko Schocher <hs@denx.de>
+    Tested-by: Tom <Tom.Rix@windriver.com>
+
+commit 9ff32d8ccf0e23b5577c25610f001af8d761b4a2
+Author: Timur Tabi <timur@freescale.com>
+Date:	Mon Mar 29 12:51:07 2010 -0500
+
+    mpc86xx: set the DDR BATs after calculating true DDR size
+
+    After determining how much DDR is actually in the system, set DBAT0 and
+    IBAT0 accordingly.	This ensures that the CPU won't attempt to access
+    (via speculation) addresses outside of actual memory.
+
+    On 86xx systems, DBAT0 and IBAT0 (the BATs for DDR) are initialized to 2GB
+    and kept that way.	If the system has less than 2GB of memory (typical for
+    an MPC8610 HPCD), the CPU may attempt to access this memory during
+    speculation.  The zlib code is notorious for generating such memory reads,
+    and indeed on the MPC8610, uncompressing the Linux kernel causes a machine
+    check (without this patch).
+
+    Currently we are limited to power of two sized DDR since we only use a
+    single bat.  If a non-power of two size is used that is less than
+    CONFIG_MAX_MEM_MAPPED u-boot will crash.
+
+    Signed-off-by: Timur Tabi <timur@freescale.com>
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 33f57bd553edf29dffef5a6c7d76e169c79a6049
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date:	Fri Mar 26 15:14:43 2010 -0500
+
+    85xx: Fix enabling of L1 cache parity on secondary cores
+
+    Use the same code between primary and secondary cores to init the
+    L1 cache.  We were not enabling cache parity on the secondary cores.
+
+    Also, reworked the L1 cache init code to match the e500mc L2 init code
+    that first invalidates the cache and locks.  Than enables the cache and
+    makes sure its enabled before continuing.
+
+    Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 1a332da61df9c38b567359af114daeaaaefaead8
+Author: Stefan Roese <sr@denx.de>
+Date:	Mon Mar 29 15:30:46 2010 +0200
+
+    ppc4xx: Fix problem with I2C bus >= 1 initialization
+
+    This patch fixes a problem introduced with patch eb5eb2b0
+    [ppc4xx: Cleanup PPC4xx I2C infrastructure]. We need to assign the I2C
+    base address to the "i2c" pointer inside of the controller loop.
+    Otherwise controller 0 is initialized multiple times instead of
+    initializing each I2C controller sequentially.
+
+    Tested on Katmai.
+
+    Signed-off-by: Stefan Roese <sr@denx.de>
+    Acked-by: Heiko Schocher <hs@denx.de>
+
+commit 24de2f4be00f81c58270d0df47296bf3a3601cef
+Author: Heiko Schocher <hs@denx.de>
+Date:	Mon Mar 29 13:15:48 2010 +0200
+
+    bootm, linux: fix booting Multi-File Image with "kernel+ramdisk+fdt"
+
+    Booting a "Multi-File Image" including a linux kernel, ramdisk and
+    fdt, generated with
+
+    mkimage -A ppc \
+	-O linux \
+	-T multi \
+	-C gzip \
+	-a 00000000 \
+	-e 00000000 \
+	-n "kernel-2.6+initrd+dtb" \
+	-d "vmlinux.bin.gz:ramdisk_image.gz:board.dtb" \
+	multi.bin
+
+    actually fails, because ramdisk start and end addresses
+    didn;t get initialized. This patch fixes this issue.
+
+    Tested on the KUP4K board.
+
+    Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 2883cc2d48e99fd1873ef8af03fee7966611b735
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Sun Mar 28 00:25:14 2010 +0100
+
+    Prepare 2010.03-rc3
+
+    Update CHANGELOG
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 060f28532b09dd3d2c78423bdd809ac768a27629
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Thu Mar 25 14:07:23 2010 +0100
+
+    cmd_usb.c: print debug messages only when DEBUG is defined
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit a574cff121b1479c8e962b7a2a29310020387260
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Wed Mar 24 12:19:19 2010 +0100
+
+    ml300: remove support for broken, orphaned board
+
+    The ml300 board has a number of issues, but nobody cares about this
+    long-orphaned board any more.  Remove it.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Acked-by: Michal Simek <monstr@monstr.eu>
+
+commit 04387d24a17b1ee13024dd4779da4b84d47c65cc
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Sat Mar 27 23:37:46 2010 +0100
+
+    mkimage: fix Segmentation Fault when run without "-n name" option
+
+    The restructuring of the mkimage command in commit 89a4d6b1 ("tools:
+    mkimage: split code into core, default and FIT image specific")
+    introduced a bug that caused mkimage to segfault when run without
+    "-n name" option.  Initialize the imagename entry to prevent that.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit c40c94a3d20a8616264c2dfcda85279185d69aeb
+Author: Renato Andreola <renato.andreola@imagos.it>
+Date:	Wed Mar 24 23:00:47 2010 +0800
+
+    cfi_flash: precision and underflow problem in tout calculation
+
+    With old configuration it could happen tout=0 if CONFIG_SYS_HZ<1000.
+
+    Signed-off-by: Renato Andreola <renato.andreola@imagos.it>
+    Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
+    Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c550afada5fcad426aa6a219a329feb9eedae8b2
+Author: Rupjyoti Sarmah <rsarmah@appliedmicro.com>
+Date:	Wed Mar 24 16:52:02 2010 +0530
+
+    ppc4xx fix unstable 440EPx bootstrap options
+
+    440EPx fixed bootstrap options A, B, D, and E sets PLL FWDVA to a value = 1.
+    This results in the PLLOUTB being greater than the CPU clock frequency
+    resulting unstable 440EPx operation resulting in various software hang
+    conditions.
+
+    This patch reprograms the FWDVA satisfying the requirement of setting FWDVB
+    to a value greater than 1 while using one of the four deafult bootstrap options.
+
+    Signed-off-by: Rupjyoti Sarmah <rsarmah@amcc.com>
+    Acked-by : Victor Gallardo <vgallardo@appliedmicro.com>
+    Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit fb508b8b39a52a4063d098f5a9b4355bc5b30c14
+Author: Matthias Fuchs <matthias.fuchs@esd.eu>
+Date:	Wed Mar 24 10:16:20 2010 +0100
+
+    at91: Get rid of some warnings when building for otc570
+
+    The soft-i2c code for AT91 defines I2C_SOFT_DECLARATIONS
+    for direct access by dereferencing a pio pointer.
+    The OTC570 platform uses the AT91 gpio API so it does not
+    need the pio variable.
+
+    Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
+
+commit acb13868936a28502782a16e1edaec378e494a29
+Author: Alessandro Rubini <rubini@unipv.it>
+Date:	Sat Mar 13 17:44:08 2010 +0100
+
+    lcd: make 16bpp work
+
+    Support for 16bpp was supposed to be in the code but was not working.
+    This makes it work and has been tested in the nhk8815 board.
+
+    Signed-off-by: Alessandro Rubini <rubini@unipv.it>
+    Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
+    Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit 152dda3d94e97ede7af3f9560a59a659384d4585
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Mon Mar 22 23:25:00 2010 +0100
+
+    Prepare v2010.03-rc2
+
+    Update CHANGELOG
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit d650da2dd4af99967aabc43cccbd8f160eb4cea6
+Author: Matthias Kaehlcke <matthias@kaehlcke.net>
+Date:	Tue Mar 9 22:13:33 2010 +0100
+
+    ep93xx timer: Fix resolution of get_ticks()
+
+    ep93xx timer: Make get_ticks() return a value in CONFIG_SYS_HZ resolution,
+    as announced by get_tbclk()
+
+    Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
+
+commit 7e67fb5bf27a07d3b8d6b97c76f7195f7d68af58
+Author: Matthias Kaehlcke <matthias@kaehlcke.net>
+Date:	Tue Mar 9 22:13:20 2010 +0100
+
+    ep93xx timer: Fix possible overflow in usecs_to_ticks()
+
+    ep93xx timer: Use 64-bit values in usecs_to_ticks() in order to avoid
+    overflows in intermediate values
+
+    Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
+
+commit daa989b47297c9f73426783599c286ef3a1f3f49
+Author: Asen Dimov <dimov@ronetix.at>
+Date:	Thu Mar 18 13:41:47 2010 +0200
+
+    correct a syntax typo in at91_matrix.h
+
+    Signed-off-by: Asen Dimov <dimov@ronetix.at>
+
+commit 322ff395c9aec7b87a2211fe4333fdf44377c564
+Author: Jeff Angielski <jeff@theptrgroup.com>
+Date:	Wed Mar 17 15:09:26 2010 -0400
+
+    env: fix endian ordering in crc table
+
+    The crc table was being built as little endian for big endian
+    targets.  This would cause fw_printenv to always fail with
+    "Warning: Bad CRC, using default environment" messages.
+
+    Signed-off-by: Jeff Angielski <jeff@theptrgroup.com>
+    Acked-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+
+commit 51c2ac9bb574c1420b993615268392b0c1f829f6
+Author: Anatolij Gustschin <agust@denx.de>
+Date:	Tue Mar 16 17:10:08 2010 +0100
+
+    mpc5121: cpu/mpc512x/diu.c: fix warnings
+
+    Fix warnings while compiling with CONFIG_VIDEO enabled:
+
+    diu.c: In function 'video_hw_init':
+    diu.c:158: warning: 'return' with no value, in function returning non-void
+    diu.c:162: warning: format '%ld' expects type 'long int', but argument 6 has type 'int'
+    diu.c:162: warning: format '%ld' expects type 'long int', but argument 7 has type 'int'
+
+    Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit a74908161a1b37d780d3a826a86807bbc50a3857
+Author: Anatolij Gustschin <agust@denx.de>
+Date:	Tue Mar 16 15:29:33 2010 +0100
+
+    console.c: fix problem with splashimage
+
+    If a board uses cfb_console driver and splash image
+    and also defines CONFIG_SILENT_CONSOLE, the user is
+    locked out even if "silent" is not set. It is not
+    possible to get any output, neither on vga console
+    device nor on serial console after redirecting the
+    output to the serial console, since the GD_FLG_SILENT
+    flag remains set.
+
+    Fix the problem by redirecting the output from frame
+    buffer to serial console if splashimage is used.
+    Only suppress the output if "silent" environment
+    variable was set and don't set the GD_FLG_SILENT
+    flag arbitrarily.
+
+    Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit 5647f78d04174b0b99857d2a7cbf25141bd14a45
+Author: Thomas Weber <swirl@gmx.li>
+Date:	Sat Mar 13 23:14:45 2010 +0100
+
+    mod change 755 => 644 for multiple files
+
+    I executed 'find . -name "*.[chS]" -perm 755 -exec chmod 644 {} \;'
+
+    Signed-off-by: Thomas Weber <swirl@gmx.li>
+    Add some more: neither Makefile nor config.mk need execute permissions.
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 99c006a320ceb9ea19135ac1512e4a81e8bebb72
+Author: Stefano Babic <sbabic@denx.de>
+Date:	Sat Mar 13 21:09:00 2010 +0100
+
+    mxcmmc: fix warnings due to access 32 bit registers with 16 bit accessors
+
+    Some registers of the mxcmmc driver were accessed using
+    16 bit accessor functions, because only the LSB is
+    significant. This is not needed and generates
+    warnings.
+
+    Signed-off-by: Stefano Babic <sbabic@denx.de>
+
+commit c96f86eefc215b67dd222694ce2b6f60e6a42b0b
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Sun Jan 17 23:55:53 2010 +0100
+
+    TFTP: allow for adjustable retransmission timout
+
+    So far, TFTP negotiated a fixed retransmission timeout of 5 seconds.
+    In some cases (busy networks, slow TFTP servers) this caused very
+    slow transfers. A new environment variable "tftptimeout" allows to
+    set this timeout. Lowering this value may make downloads succeed
+    faster in networks with high packet loss rates or with unreliable
+    TFTP servers.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+    Cc: Ben Warren <biggerbadderben@gmail.com>
+    Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 252b404d954f91499a4477a3e1064eb237ce5a1c
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Tue Mar 9 14:27:25 2010 +0100
+
+    Fix PCI_BASE_ADDRESS_5 handling in pci_hose_config_device()
+
+    Signed-off-by: FUJITA Kazutoshi <fujita@soum.co.jp>
+    Signed-off-by: <wd@denx.de>
+    Acked-by: Stefan Roese <sr@denx.de>
+
+commit 9d90a93d367272ee65550c0c9f82615cec967c70
+Author: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
+Date:	Thu Feb 25 14:03:08 2010 +0100
+
+    cmd_mmc remove \n
+
+    This patch removes the \n after the help message for mmcinfo.
+    This resulted in an empty line being displayed after the mmcinfo line
+    when the help command was given.
+
+    Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
+
+commit 67c7189dd35cb368ef665126fd17816581bd2e92
+Author: Renato Andreola <renato.andreola@imagos.it>
+Date:	Tue Mar 16 16:01:29 2010 -0400
+
+    nios2: Added support to YANU UART
+
+    Signed-off-by: Scott McNutt <smcnutt@psyent.com>
+
+commit 1e67fb32fbdae7949bb423c9e20b3f77c0a61663
+Author: Thomas Chou <thomas@wytron.com.tw>
+Date:	Tue Mar 16 12:12:48 2010 -0400
+
+    nios2: use generic unaligned.h
+
+    Signed-off-by: Scott McNutt <smcnutt@psyent.com>
+
+commit 05022629a2ca6c385dc390d32c20aa27cf5d915a
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Thu Jan 21 05:01:15 2010 -0500
+
+    asm-blackfin/unaligned.h: add for zlib code
+
+    The new zlib code wants asm/unaligned.h, so have the Blackfin version pull
+    in the asm-generic/unaligned.h.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 3adc1fda38a6aacd4aaf3c2c9cc62a1e69e6de17
+Author: Mike Frysinger <vapier@gentoo.org>
+Date:	Thu Jan 21 05:01:14 2010 -0500
+
+    asm-generic/unaligned.h: dynamic default unaligned accesses
+
+    This is based on the asm-arm/unaligned.h, but made generic so all arches
+    that cannot do unaligned accesses can utilize it.
+
+    Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit be129aa71882421ad0b50cd3762915d10ace27ad
+Author: Matthias Weisser <matthias.weisser@graf-syteco.de>
+Date:	Tue Jan 12 12:06:31 2010 +0100
+
+    video: Fix console display when splashscreen is used
+
+    If a splashscreen is used the console scrolling used the
+    scroll size as needed when a logo was displayed. This
+    patch sets the scroll size to the whole screen if
+    a splashscreen is shown.
+
+    Signed-off-by: Matthias Weisser <matthias.weisser@graf-syteco.de>
+
+commit 93910edb595a88d394da3eb2cf5148096155dfe9
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Fri Mar 12 23:06:04 2010 +0100
+
+    Prepare v2010.03-rc1
+
+    Coding style cleanup, update CHANGELOG.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
 commit 4e72fb15c9073129e05820cc9c54f54bc4985835
 Author: Wolfgang Denk <wd@denx.de>
 Date:	Fri Mar 12 22:11:00 2010 +0100
diff --git a/CREDITS b/CREDITS
index 2471029fc5..4f3cdbb231 100644
--- a/CREDITS
+++ b/CREDITS
@@ -437,7 +437,7 @@ D: FADS823 configuration, MPC823 video support, I2C, wireless keyboard, lots mor
 
 N: Andre Schwarz
 E: andre.schwarz@matrix-vision.de
-D: Support for Matrix Vision boards (MVBLM7/MVBC_P)
+D: Support for Matrix Vision boards (MVBLM7/MVBC_P/MVSMR)
 
 N: Robert Schwebel
 E: r.schwebel@pengutronix.de
@@ -511,6 +511,11 @@ N: Martin Winistoerfer
 E: martinwinistoerfer@gmx.ch
 D: Port to MPC555/556 microcontrollers and support for cmi board
 
+N: David Wu
+E: support@arcturusnetworks.com
+D: Mercury Security EP2500
+W: http://www.arcturusnetworks.com
+
 N: Ming-Len Wu
 E: minglen_wu@techware.com.tw
 D: Motorola MX1ADS board support
diff --git a/MAINTAINERS b/MAINTAINERS
index 092ebecc01..0e759c95da 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -80,7 +80,6 @@ Torsten Demke <torsten.demke@fci.com>
 
 Wolfgang Denk <wd@denx.de>
 
-	IceCube_5100	MGT5100
 	IceCube_5200	MPC5200
 
 	ARIA		MPC5121e
@@ -423,6 +422,7 @@ Andre Schwarz <andre.schwarz@matrix-vision.de>
 
 	mvbc_p		MPC5200
 	mvblm7		MPC8343
+	mvsmr		MPC5200
 
 Jon Smirl <jonsmirl@gmail.com>
 
@@ -734,6 +734,10 @@ Jens Scharsig <esw@bus-elektronik.de>
 
 	eb_cpux9k2	ARM920T (AT91RM9200 SoC)
 
+Heiko Schocher <hs@denx.de>
+
+	magnesium	i.MX27
+
 Robert Schwebel <r.schwebel@pengutronix.de>
 
 	csb226		xscale
@@ -897,6 +901,10 @@ TsiChung Liew <Tsi-Chung.Liew@freescale.com>
 	M5475EVB	mcf547x_8x
 	M5485EVB	mcf547x_8x
 
+Wolfgang Wegner <w.wegner@astro-kom.de>
+
+	astro_mcf5373l	MCF5373L
+
 #########################################################################
 # AVR32 Systems:							#
 #									#
@@ -1012,6 +1020,10 @@ Anton Shurpin <shurpin.aa@niistt.ru>
 
 	BF561-ACVILON	BF561
 
+Brent Kandetzki <brentk@teleco.com>
+
+	IP04		BF532
+
 #########################################################################
 # End of MAINTAINERS list						#
 #########################################################################
diff --git a/MAKEALL b/MAKEALL
index beacb5f517..b15d407faf 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -61,7 +61,6 @@ LIST_5xxx="		\
 	EVAL5200	\
 	fo300		\
 	galaxy5200	\
-	icecube_5100	\
 	icecube_5200	\
 	inka4x0		\
 	ipek01		\
@@ -71,12 +70,12 @@ LIST_5xxx="		\
 	motionpro	\
 	munices		\
 	MVBC_P		\
+	MVSMR		\
 	o2dnt		\
 	pcm030		\
 	pf5200		\
 	PM520		\
 	TB5200		\
-	Total5100	\
 	Total5200	\
 	Total5200_Rev2	\
 	TQM5200		\
@@ -238,7 +237,6 @@ LIST_4xx="		\
 	MIP405		\
 	MIP405T		\
 	ML2		\
-	ml300		\
 	ml507		\
 	ml507_flash	\
 	neo		\
@@ -564,6 +562,7 @@ LIST_ARM9="			\
 	edb9315a		\
 	imx27lite		\
 	lpd7a400		\
+	magnesium		\
 	mv88f6281gtw_ge		\
 	mx1ads			\
 	mx1fs2			\
@@ -841,6 +840,7 @@ LIST_microblaze="			\
 #########################################################################
 
 LIST_coldfire="			\
+	astro_mcf5373l		\
 	cobra5272		\
 	EB+MCF-EV123		\
 	EB+MCF-EV123_internal	\
@@ -907,6 +907,7 @@ LIST_blackfin="		\
 	cm-bf548	\
 	cm-bf561	\
 	ibf-dsp561	\
+	ip04		\
 	tcm-bf518	\
 	tcm-bf537	\
 "
diff --git a/Makefile b/Makefile
index d801e2597a..8b4e0b9381 100644
--- a/Makefile
+++ b/Makefile
@@ -1,5 +1,5 @@
 #
-# (C) Copyright 2000-2009
+# (C) Copyright 2000-2010
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
 # See file CREDITS for list of people who contributed to this
@@ -24,7 +24,7 @@
 VERSION = 2010
 PATCHLEVEL = 03
 SUBLEVEL =
-EXTRAVERSION = -rc1
+EXTRAVERSION =
 ifneq "$(SUBLEVEL)" ""
 U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
 else
@@ -169,33 +169,33 @@ include $(TOPDIR)/config.mk
 #########################################################################
 # U-Boot objects....order is important (i.e. start must be first)
 
-OBJS  = cpu/$(CPU)/start.o
+OBJS  = $(CPUDIR)/start.o
 ifeq ($(CPU),i386)
-OBJS += cpu/$(CPU)/start16.o
-OBJS += cpu/$(CPU)/resetvec.o
+OBJS += $(CPUDIR)/start16.o
+OBJS += $(CPUDIR)/resetvec.o
 endif
 ifeq ($(CPU),ppc4xx)
-OBJS += cpu/$(CPU)/resetvec.o
+OBJS += $(CPUDIR)/resetvec.o
 endif
 ifeq ($(CPU),mpc85xx)
-OBJS += cpu/$(CPU)/resetvec.o
+OBJS += $(CPUDIR)/resetvec.o
 endif
 
 OBJS := $(addprefix $(obj),$(OBJS))
 
-LIBS  = lib_generic/libgeneric.a
-LIBS += lib_generic/lzma/liblzma.a
-LIBS += lib_generic/lzo/liblzo.a
+LIBS  = lib/libgeneric.a
+LIBS += lib/lzma/liblzma.a
+LIBS += lib/lzo/liblzo.a
 LIBS += $(shell if [ -f board/$(VENDOR)/common/Makefile ]; then echo \
 	"board/$(VENDOR)/common/lib$(VENDOR).a"; fi)
-LIBS += cpu/$(CPU)/lib$(CPU).a
+LIBS += $(CPUDIR)/lib$(CPU).a
 ifdef SOC
-LIBS += cpu/$(CPU)/$(SOC)/lib$(SOC).a
+LIBS += $(CPUDIR)/$(SOC)/lib$(SOC).a
 endif
 ifeq ($(CPU),ixp)
-LIBS += cpu/ixp/npe/libnpe.a
+LIBS += arch/arm/cpu/ixp/npe/libnpe.a
 endif
-LIBS += lib_$(ARCH)/lib$(ARCH).a
+LIBS += arch/$(ARCH)/lib/lib$(ARCH).a
 LIBS += fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a \
 	fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a fs/yaffs2/libyaffs2.a \
 	fs/ubifs/libubifs.a
@@ -227,12 +227,12 @@ LIBS += drivers/qe/qe.a
 endif
 ifeq ($(CPU),mpc85xx)
 LIBS += drivers/qe/qe.a
-LIBS += cpu/mpc8xxx/ddr/libddr.a
-LIBS += cpu/mpc8xxx/lib8xxx.a
+LIBS += arch/ppc/cpu/mpc8xxx/ddr/libddr.a
+LIBS += arch/ppc/cpu/mpc8xxx/lib8xxx.a
 endif
 ifeq ($(CPU),mpc86xx)
-LIBS += cpu/mpc8xxx/ddr/libddr.a
-LIBS += cpu/mpc8xxx/lib8xxx.a
+LIBS += arch/ppc/cpu/mpc8xxx/ddr/libddr.a
+LIBS += arch/ppc/cpu/mpc8xxx/lib8xxx.a
 endif
 LIBS += drivers/rtc/librtc.a
 LIBS += drivers/serial/libserial.a
@@ -244,7 +244,7 @@ LIBS += drivers/usb/phy/libusb_phy.a
 LIBS += drivers/video/libvideo.a
 LIBS += drivers/watchdog/libwatchdog.a
 LIBS += common/libcommon.a
-LIBS += libfdt/libfdt.a
+LIBS += lib/libfdt/libfdt.a
 LIBS += api/libapi.a
 LIBS += post/libpost.a
 
@@ -257,7 +257,7 @@ LIBBOARD := $(addprefix $(obj),$(LIBBOARD))
 # Add GCC lib
 ifdef USE_PRIVATE_LIBGCC
 ifeq ("$(USE_PRIVATE_LIBGCC)", "yes")
-PLATFORM_LIBGCC = -L $(OBJTREE)/lib_$(ARCH) -lgcc
+PLATFORM_LIBGCC = -L $(OBJTREE)/arch/$(ARCH)/lib -lgcc
 else
 PLATFORM_LIBGCC = -L $(USE_PRIVATE_LIBGCC) -lgcc
 endif
@@ -354,7 +354,7 @@ ifeq ($(CONFIG_KALLSYMS),y)
 endif
 
 $(OBJS):	depend
-		$(MAKE) -C cpu/$(CPU) $(if $(REMOTE_BUILD),$@,$(notdir $@))
+		$(MAKE) -C $(CPUDIR) $(if $(REMOTE_BUILD),$@,$(notdir $@))
 
 $(LIBS):	depend $(SUBDIRS)
 		$(MAKE) -C $(dir $(subst $(obj),,$@))
@@ -404,7 +404,7 @@ env:
 # Explicitly make _depend in subdirs containing multiple targets to prevent
 # parallel sub-makes creating .depend files simultaneously.
 depend dep:	$(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
-		for dir in $(SUBDIRS) cpu/$(CPU) $(dir $(LDSCRIPT)) ; do \
+		for dir in $(SUBDIRS) $(CPUDIR) $(dir $(LDSCRIPT)) ; do \
 			$(MAKE) -C $$dir _depend ; done
 
 TAG_SUBDIRS = $(SUBDIRS)
@@ -548,8 +548,7 @@ icecube_5200_LOWBOOT_config		\
 icecube_5200_LOWBOOT08_config		\
 icecube_5200_DDR_config			\
 icecube_5200_DDR_LOWBOOT_config		\
-icecube_5200_DDR_LOWBOOT08_config	\
-icecube_5100_config:			unconfig
+icecube_5200_DDR_LOWBOOT08_config:	unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)board/icecube
 	@[ -z "$(findstring LOWBOOT_,$@)" ] || \
@@ -568,14 +567,6 @@ icecube_5100_config:			unconfig
 		{ echo "#define CONFIG_MPC5200_DDR"	>>$(obj)include/config.h ; \
 		  $(XECHO) "... DDR memory revision" ; \
 		}
-	@[ -z "$(findstring 5200,$@)" ] || \
-		{ echo "#define CONFIG_MPC5200"		>>$(obj)include/config.h ; \
-		  $(XECHO) "... with MPC5200 processor" ; \
-		}
-	@[ -z "$(findstring 5100,$@)" ] || \
-		{ echo "#define CONFIG_MGT5100"		>>$(obj)include/config.h ; \
-		  $(XECHO) "... with MGT5100 processor" ; \
-		}
 	@$(MKCONFIG) -a IceCube ppc mpc5xxx icecube
 
 jupiter_config:	unconfig
@@ -594,7 +585,6 @@ lite5200b_LOWBOOT_config:	unconfig
 	@mkdir -p $(obj)board/icecube
 	@ echo "#define CONFIG_MPC5200_DDR"	>>$(obj)include/config.h
 	@ $(XECHO) "... DDR memory revision"
-	@ echo "#define CONFIG_MPC5200"		>>$(obj)include/config.h
 	@ echo "#define CONFIG_LITE5200B"	>>$(obj)include/config.h
 	@[ -z "$(findstring _PM_,$@)" ] || \
 		{ echo "#define CONFIG_LITE5200B_PM"	>>$(obj)include/config.h ; \
@@ -604,7 +594,6 @@ lite5200b_LOWBOOT_config:	unconfig
 		{ echo "TEXT_BASE = 0xFF000000" >$(obj)board/icecube/config.tmp ; \
 		  $(XECHO) "... with LOWBOOT configuration" ; \
 		}
-	@ $(XECHO) "... with MPC5200B processor"
 	@$(MKCONFIG) -a IceCube  ppc mpc5xxx icecube
 
 mcc200_config	\
@@ -675,6 +664,11 @@ MVBC_P_config: unconfig
 	{   	echo "#define CONFIG_MVBC_P" 	>>$(obj)include/config.h; }
 	@$(MKCONFIG) -n $@ -a MVBC_P ppc mpc5xxx mvbc_p matrix_vision
 
+MVSMR_config: unconfig
+	@mkdir -p $(obj)include
+	@mkdir -p $(obj)board/matrix_vision/mvsmr
+	@$(MKCONFIG) $(@:_config=) ppc mpc5xxx mvsmr matrix_vision
+
 o2dnt_config:	unconfig
 	@$(MKCONFIG) o2dnt ppc mpc5xxx o2dnt
 
@@ -728,21 +722,12 @@ TOP5200_config:	unconfig
 	@ echo "#define CONFIG_$(@:_config=) 1"	>$(obj)include/config.h
 	@$(MKCONFIG) -n $@ -a TOP5200 ppc mpc5xxx top5200 emk
 
-Total5100_config		\
 Total5200_config		\
 Total5200_lowboot_config	\
 Total5200_Rev2_config		\
 Total5200_Rev2_lowboot_config:	unconfig
 	@mkdir -p $(obj)include
 	@mkdir -p $(obj)board/total5200
-	@[ -z "$(findstring 5100,$@)" ] || \
-		{ echo "#define CONFIG_MGT5100"		>>$(obj)include/config.h ; \
-		  $(XECHO) "... with MGT5100 processor" ; \
-		}
-	@[ -z "$(findstring 5200,$@)" ] || \
-		{ echo "#define CONFIG_MPC5200"		>>$(obj)include/config.h ; \
-		  $(XECHO) "... with MPC5200 processor" ; \
-		}
 	@[ -n "$(findstring Rev,$@)" ] || \
 		{ echo "#define CONFIG_TOTAL5200_REV 1"	>>$(obj)include/config.h ; \
 		  $(XECHO) "... revision 1 board" ; \
@@ -1435,9 +1420,6 @@ MIP405T_config:	unconfig
 ML2_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx ml2
 
-ml300_config:	unconfig
-	@$(MKCONFIG) $(@:_config=) ppc ppc4xx ml300 xilinx
-
 ml507_flash_config: unconfig
 	@mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic
 	@mkdir -p $(obj)include $(obj)board/xilinx/ml507
@@ -1996,6 +1978,10 @@ ZPC1900_config: unconfig
 ## Coldfire
 #########################################################################
 
+astro_mcf5373l_config \
+astro_mcf5373l_RAM_config :	unconfig
+	@$(MKCONFIG) -t $(@:_config=) astro_mcf5373l m68k mcf532x mcf5373l astro
+
 M5208EVBE_config :		unconfig
 	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5208evbe freescale
 
@@ -2064,6 +2050,9 @@ EB+MCF-EV123_internal_config :	unconfig
 	@echo "TEXT_BASE = 0xF0000000"|tee $(obj)board/BuS/EB+MCF-EV123/textbase.mk
 	@$(MKCONFIG) EB+MCF-EV123 m68k mcf52x2 EB+MCF-EV123 BuS
 
+EP2500_config:			unconfig
+	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 ep2500 Mercury
+
 idmr_config :			unconfig
 	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 idmr
 
@@ -2952,6 +2941,7 @@ davinci_dm365evm_config :	unconfig
 davinci_dm6467evm_config :	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm926ejs dm6467evm davinci davinci
 
+magnesium_config	\
 imx27lite_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm926ejs imx27lite logicpd mx27
 
@@ -3570,7 +3560,7 @@ BFIN_BOARDS += cm-bf527 cm-bf533 cm-bf537e cm-bf537u cm-bf548 cm-bf561 \
 	tcm-bf518 tcm-bf537
 
 # Misc third party boards
-BFIN_BOARDS += bf537-minotaur bf537-srv1 bf561-acvilon blackstamp
+BFIN_BOARDS += bf537-minotaur bf537-srv1 bf561-acvilon blackstamp ip04
 
 # I-SYST Micromodule
 BFIN_BOARDS += ibf-dsp561
@@ -3754,9 +3744,9 @@ clean:
 	       $(obj)board/netstar/{eeprom,crcek,crcit,*.srec,*.bin}	  \
 	       $(obj)board/trab/trab_fkt   $(obj)board/voiceblue/eeprom   \
 	       $(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds  \
-	       $(obj)lib_blackfin/u-boot.lds				  \
+	       $(obj)arch/blackfin/lib/u-boot.lds				  \
 	       $(obj)u-boot.lds						  \
-	       $(obj)cpu/blackfin/bootrom-asm-offsets.[chs]
+	       $(obj)arch/blackfin/cpu/bootrom-asm-offsets.[chs]
 	@rm -f $(obj)include/bmp_logo.h
 	@rm -f $(obj)nand_spl/{u-boot.lds,u-boot-spl,u-boot-spl.map,System.map}
 	@rm -f $(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl.map}
@@ -3779,7 +3769,7 @@ clobber:	clean
 	@rm -f $(obj)u-boot.kwb
 	@rm -f $(obj)u-boot.imx
 	@rm -f $(obj)tools/{env/crc32.c,inca-swap-bytes}
-	@rm -f $(obj)cpu/mpc824x/bedbug_603e.c
+	@rm -f $(obj)arch/ppc/cpu/mpc824x/bedbug_603e.c
 	@rm -f $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm
 	@[ ! -d $(obj)nand_spl ] || find $(obj)nand_spl -name "*" -type l -print | xargs rm -f
 	@[ ! -d $(obj)onenand_ipl ] || find $(obj)onenand_ipl -name "*" -type l -print | xargs rm -f
diff --git a/README b/README
index 940b507942..99320abadd 100644
--- a/README
+++ b/README
@@ -138,68 +138,91 @@ U-Boot will always have a patchlevel of "0".
 Directory Hierarchy:
 ====================
 
-- api		Machine/arch independent API for external apps
-- board		Board dependent files
-- common	Misc architecture independent functions
-- cpu		CPU specific files
-  - 74xx_7xx	Files specific to Freescale MPC74xx and 7xx CPUs
-  - arm720t	Files specific to ARM 720 CPUs
-  - arm920t	Files specific to ARM 920 CPUs
-    - at91rm9200 Files specific to Atmel AT91RM9200 CPU
-    - imx	Files specific to Freescale MC9328 i.MX CPUs
-    - s3c24x0	Files specific to Samsung S3C24X0 CPUs
-  - arm925t	Files specific to ARM 925 CPUs
-  - arm926ejs	Files specific to ARM 926 CPUs
-  - arm1136	Files specific to ARM 1136 CPUs
-  - at32ap	Files specific to Atmel AVR32 AP CPUs
-  - blackfin	Files specific to Analog Devices Blackfin CPUs
-  - i386	Files specific to i386 CPUs
-  - ixp		Files specific to Intel XScale IXP CPUs
-  - leon2	Files specific to Gaisler LEON2 SPARC CPU
-  - leon3	Files specific to Gaisler LEON3 SPARC CPU
-  - mcf52x2	Files specific to Freescale ColdFire MCF52x2 CPUs
-  - mcf5227x	Files specific to Freescale ColdFire MCF5227x CPUs
-  - mcf532x	Files specific to Freescale ColdFire MCF5329 CPUs
-  - mcf5445x	Files specific to Freescale ColdFire MCF5445x CPUs
-  - mcf547x_8x	Files specific to Freescale ColdFire MCF547x_8x CPUs
-  - mips	Files specific to MIPS CPUs
-  - mpc5xx	Files specific to Freescale MPC5xx  CPUs
-  - mpc5xxx	Files specific to Freescale MPC5xxx CPUs
-  - mpc8xx	Files specific to Freescale MPC8xx  CPUs
-  - mpc8220	Files specific to Freescale MPC8220 CPUs
-  - mpc824x	Files specific to Freescale MPC824x CPUs
-  - mpc8260	Files specific to Freescale MPC8260 CPUs
-  - mpc85xx	Files specific to Freescale MPC85xx CPUs
-  - nios	Files specific to Altera NIOS CPUs
-  - nios2	Files specific to Altera Nios-II CPUs
-  - ppc4xx	Files specific to AMCC PowerPC 4xx CPUs
-  - pxa		Files specific to Intel XScale PXA CPUs
-  - s3c44b0	Files specific to Samsung S3C44B0 CPUs
-  - sa1100	Files specific to Intel StrongARM SA1100 CPUs
-- disk		Code for disk drive partition handling
-- doc		Documentation (don't expect too much)
-- drivers	Commonly used device drivers
-- examples	Example code for standalone applications, etc.
-- fs		Filesystem code (cramfs, ext2, jffs2, etc.)
-- include	Header Files
-- lib_arm	Files generic to ARM	 architecture
-- lib_avr32	Files generic to AVR32	 architecture
-- lib_blackfin	Files generic to Blackfin architecture
-- lib_generic	Files generic to all	 architectures
-- lib_i386	Files generic to i386	 architecture
-- lib_m68k	Files generic to m68k	 architecture
-- lib_microblaze Files generic to microblaze architecture
-- lib_mips	Files generic to MIPS	 architecture
-- lib_nios	Files generic to NIOS	 architecture
-- lib_nios2	Files generic to NIOS2	 architecture
-- lib_ppc	Files generic to PowerPC architecture
-- lib_sh	Files generic to SH	 architecture
-- lib_sparc	Files generic to SPARC	 architecture
-- libfdt	Library files to support flattened device trees
-- net		Networking code
-- post		Power On Self Test
-- rtc		Real Time Clock drivers
-- tools		Tools to build S-Record or U-Boot images, etc.
+/arch			Architecture specific files
+  /arm			Files generic to ARM architecture
+    /cpu		CPU specific files
+      /arm720t		Files specific to ARM 720 CPUs
+      /arm920t		Files specific to ARM 920 CPUs
+        /at91rm9200	Files specific to Atmel AT91RM9200 CPU
+        /imx		Files specific to Freescale MC9328 i.MX CPUs
+        /s3c24x0	Files specific to Samsung S3C24X0 CPUs
+      /arm925t		Files specific to ARM 925 CPUs
+      /arm926ejs	Files specific to ARM 926 CPUs
+      /arm1136		Files specific to ARM 1136 CPUs
+      /ixp		Files specific to Intel XScale IXP CPUs
+      /pxa		Files specific to Intel XScale PXA CPUs
+      /s3c44b0		Files specific to Samsung S3C44B0 CPUs
+      /sa1100		Files specific to Intel StrongARM SA1100 CPUs
+    /lib		Architecture specific library files
+  /avr32		Files generic to AVR32 architecture
+    /cpu		CPU specific files
+    /lib		Architecture specific library files
+  /blackfin		Files generic to Analog Devices Blackfin architecture
+    /cpu		CPU specific files
+    /lib		Architecture specific library files
+  /i386			Files generic to i386 architecture
+    /cpu		CPU specific files
+    /lib		Architecture specific library files
+  /m68k			Files generic to m68k architecture
+    /cpu		CPU specific files
+      /mcf52x2		Files specific to Freescale ColdFire MCF52x2 CPUs
+      /mcf5227x		Files specific to Freescale ColdFire MCF5227x CPUs
+      /mcf532x		Files specific to Freescale ColdFire MCF5329 CPUs
+      /mcf5445x		Files specific to Freescale ColdFire MCF5445x CPUs
+      /mcf547x_8x	Files specific to Freescale ColdFire MCF547x_8x CPUs
+    /lib		Architecture specific library files
+  /microblaze		Files generic to microblaze architecture
+    /cpu		CPU specific files
+    /lib		Architecture specific library files
+  /mips			Files generic to MIPS architecture
+    /cpu		CPU specific files
+    /lib		Architecture specific library files
+  /nios			Files generic to Altera NIOS architecture
+    /cpu		CPU specific files
+    /lib		Architecture specific library files
+  /nios2		Files generic to Altera NIOS2 architecture
+    /cpu		CPU specific files
+    /lib		Architecture specific library files
+  /ppc			Files generic to PowerPC architecture
+    /cpu		CPU specific files
+      /74xx_7xx		Files specific to Freescale MPC74xx and 7xx CPUs
+      /mpc5xx		Files specific to Freescale MPC5xx CPUs
+      /mpc5xxx		Files specific to Freescale MPC5xxx CPUs
+      /mpc8xx		Files specific to Freescale MPC8xx CPUs
+      /mpc8220		Files specific to Freescale MPC8220 CPUs
+      /mpc824x		Files specific to Freescale MPC824x CPUs
+      /mpc8260		Files specific to Freescale MPC8260 CPUs
+      /mpc85xx		Files specific to Freescale MPC85xx CPUs
+      /ppc4xx		Files specific to AMCC PowerPC 4xx CPUs
+    /lib		Architecture specific library files
+  /sh			Files generic to SH architecture
+    /cpu		CPU specific files
+      /sh2		Files specific to sh2 CPUs
+      /sh3		Files specific to sh3 CPUs
+      /sh4		Files specific to sh4 CPUs
+    /lib		Architecture specific library files
+  /sparc		Files generic to SPARC architecture
+    /cpu		CPU specific files
+      /leon2		Files specific to Gaisler LEON2 SPARC CPU
+      /leon3		Files specific to Gaisler LEON3 SPARC CPU
+    /lib		Architecture specific library files
+/api			Machine/arch independent API for external apps
+/board			Board dependent files
+/common			Misc architecture independent functions
+/disk			Code for disk drive partition handling
+/doc			Documentation (don't expect too much)
+/drivers		Commonly used device drivers
+/examples		Example code for standalone applications, etc.
+/fs			Filesystem code (cramfs, ext2, jffs2, etc.)
+/include		Header Files
+/lib			Files generic to all architectures
+  /libfdt		Library files to support flattened device trees
+  /lzma			Library files to support LZMA decompression
+  /lzo			Library files to support LZO decompression
+/net			Networking code
+/post			Power On Self Test
+/rtc			Real Time Clock drivers
+/tools			Tools to build S-Record or U-Boot images, etc.
 
 Software Configuration:
 =======================
@@ -1133,6 +1156,12 @@ The following options need to be configured:
 		images, gzipped BMP images can be displayed via the
 		splashscreen support or the bmp command.
 
+- Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8
+
+		If this option is set, 8-bit RLE compressed BMP images
+		can be displayed via the splashscreen support or the
+		bmp command.
+
 - Compression support:
 		CONFIG_BZIP2
 
@@ -1387,10 +1416,11 @@ The following options need to be configured:
 		to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie
 		the CPU's i2c node address).
 
-		Now, the u-boot i2c code for the mpc8xx (cpu/mpc8xx/i2c.c)
-		sets the CPU up as a master node and so its address should
-		therefore be cleared to 0 (See, eg, MPC823e User's Manual
-		p.16-473). So, set CONFIG_SYS_I2C_SLAVE to 0.
+		Now, the u-boot i2c code for the mpc8xx
+		(arch/ppc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node
+		and so its address should therefore be cleared to 0 (See,
+		eg, MPC823e User's Manual p.16-473). So, set
+		CONFIG_SYS_I2C_SLAVE to 0.
 
 		CONFIG_SYS_I2C_INIT_MPC5XXX
 
@@ -1934,9 +1964,9 @@ Legacy uImage format:
    13	common/image.c		Start multifile image verification
    14	common/image.c		No initial ramdisk, no multifile, continue.
 
-   15	lib_<arch>/bootm.c	All preparation done, transferring control to OS
+   15	arch/<arch>/lib/bootm.c	All preparation done, transferring control to OS
 
-  -30	lib_ppc/board.c		Fatal error, hang the system
+  -30	arch/ppc/lib/board.c	Fatal error, hang the system
   -31	post/post.c		POST test failed, detected by post_output_backlog()
   -32	post/post.c		POST test failed, detected by post_run_single()
 
@@ -2697,7 +2727,7 @@ Low Level (hardware related) configuration options:
   CONFIG_SYS_PCI_MSTR_MEMIO_SIZE, CONFIG_SYS_POCMR1_MASK_ATTRIB, CONFIG_SYS_PCI_MSTR_IO_LOCAL,
   CONFIG_SYS_PCI_MSTR_IO_BUS, CONFIG_SYS_CPU_PCI_IO_START, CONFIG_SYS_PCI_MSTR_IO_SIZE,
   CONFIG_SYS_POCMR2_MASK_ATTRIB: (MPC826x only)
-		Overrides the default PCI memory map in cpu/mpc8260/pci.c if set.
+		Overrides the default PCI memory map in arch/ppc/cpu/mpc8260/pci.c if set.
 
 - CONFIG_PCI_DISABLE_PCIE:
 		Disable PCI-Express on systems where it is supported but not
diff --git a/lib_arm/config.mk b/arch/arm/config.mk
index 3c078df3c1..e10dafca58 100644
--- a/lib_arm/config.mk
+++ b/arch/arm/config.mk
@@ -59,8 +59,8 @@ PLATFORM_CPPFLAGS += $(call cc-option,\
 # For EABI, make sure to provide raise()
 ifneq (,$(findstring -mabi=aapcs-linux,$(PLATFORM_CPPFLAGS)))
 # This file is parsed several times; make sure to add only once.
-ifeq (,$(findstring lib_arm/eabi_compat.o,$(PLATFORM_LIBS)))
-PLATFORM_LIBS += $(OBJTREE)/lib_arm/eabi_compat.o
+ifeq (,$(findstring arch/arm/lib/eabi_compat.o,$(PLATFORM_LIBS)))
+PLATFORM_LIBS += $(OBJTREE)/arch/arm/lib/eabi_compat.o
 endif
 endif
-LDSCRIPT := $(SRCTREE)/cpu/$(CPU)/u-boot.lds
+LDSCRIPT := $(SRCTREE)/$(CPUDIR)/u-boot.lds
diff --git a/cpu/arm1136/Makefile b/arch/arm/cpu/arm1136/Makefile
index 7701b03bbe..7701b03bbe 100644
--- a/cpu/arm1136/Makefile
+++ b/arch/arm/cpu/arm1136/Makefile
diff --git a/cpu/arm1136/config.mk b/arch/arm/cpu/arm1136/config.mk
index 3e685354ab..3e685354ab 100644
--- a/cpu/arm1136/config.mk
+++ b/arch/arm/cpu/arm1136/config.mk
diff --git a/cpu/arm1136/cpu.c b/arch/arm/cpu/arm1136/cpu.c
index ade7f46800..ade7f46800 100644
--- a/cpu/arm1136/cpu.c
+++ b/arch/arm/cpu/arm1136/cpu.c
diff --git a/cpu/arm1136/mx31/Makefile b/arch/arm/cpu/arm1136/mx31/Makefile
index c8e18f7f02..c8e18f7f02 100644
--- a/cpu/arm1136/mx31/Makefile
+++ b/arch/arm/cpu/arm1136/mx31/Makefile
diff --git a/cpu/arm1136/mx31/devices.c b/arch/arm/cpu/arm1136/mx31/devices.c
index 1f4ca7eb44..1f4ca7eb44 100644
--- a/cpu/arm1136/mx31/devices.c
+++ b/arch/arm/cpu/arm1136/mx31/devices.c
diff --git a/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c
index 1415d6c2ae..1415d6c2ae 100644
--- a/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
diff --git a/cpu/arm1136/mx31/timer.c b/arch/arm/cpu/arm1136/mx31/timer.c
index 7972ba0dd7..7972ba0dd7 100644
--- a/cpu/arm1136/mx31/timer.c
+++ b/arch/arm/cpu/arm1136/mx31/timer.c
diff --git a/cpu/arm1136/omap24xx/Makefile b/arch/arm/cpu/arm1136/omap24xx/Makefile
index 48dc7e3283..48dc7e3283 100644
--- a/cpu/arm1136/omap24xx/Makefile
+++ b/arch/arm/cpu/arm1136/omap24xx/Makefile
diff --git a/cpu/arm1136/omap24xx/reset.S b/arch/arm/cpu/arm1136/omap24xx/reset.S
index 5f8343fe62..5f8343fe62 100644
--- a/cpu/arm1136/omap24xx/reset.S
+++ b/arch/arm/cpu/arm1136/omap24xx/reset.S
diff --git a/cpu/arm1136/omap24xx/timer.c b/arch/arm/cpu/arm1136/omap24xx/timer.c
index 67547490fd..67547490fd 100644
--- a/cpu/arm1136/omap24xx/timer.c
+++ b/arch/arm/cpu/arm1136/omap24xx/timer.c
diff --git a/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index 957f4389b2..957f4389b2 100644
--- a/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
diff --git a/cpu/arm1136/u-boot.lds b/arch/arm/cpu/arm1136/u-boot.lds
index 7181a569ea..e7eefc972c 100644
--- a/cpu/arm1136/u-boot.lds
+++ b/arch/arm/cpu/arm1136/u-boot.lds
@@ -39,7 +39,7 @@ SECTIONS
 	. = ALIGN(4);
 	.text :
 	{
-		cpu/arm1136/start.o	(.text)
+		arch/arm/cpu/arm1136/start.o	(.text)
 		*(.text)
 	}
 
diff --git a/cpu/arm1176/Makefile b/arch/arm/cpu/arm1176/Makefile
index 1ca9199a64..1ca9199a64 100644
--- a/cpu/arm1176/Makefile
+++ b/arch/arm/cpu/arm1176/Makefile
diff --git a/cpu/arm1176/config.mk b/arch/arm/cpu/arm1176/config.mk
index 14346cfff3..14346cfff3 100644
--- a/cpu/arm1176/config.mk
+++ b/arch/arm/cpu/arm1176/config.mk
diff --git a/cpu/arm1176/cpu.c b/arch/arm/cpu/arm1176/cpu.c
index befa0cdcc4..befa0cdcc4 100644
--- a/cpu/arm1176/cpu.c
+++ b/arch/arm/cpu/arm1176/cpu.c
diff --git a/cpu/arm1176/s3c64xx/Makefile b/arch/arm/cpu/arm1176/s3c64xx/Makefile
index b527939137..b527939137 100644
--- a/cpu/arm1176/s3c64xx/Makefile
+++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile
diff --git a/cpu/arm1176/s3c64xx/config.mk b/arch/arm/cpu/arm1176/s3c64xx/config.mk
index 14346cfff3..14346cfff3 100644
--- a/cpu/arm1176/s3c64xx/config.mk
+++ b/arch/arm/cpu/arm1176/s3c64xx/config.mk
diff --git a/cpu/arm1176/s3c64xx/cpu_init.S b/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S
index df88cba342..df88cba342 100644
--- a/cpu/arm1176/s3c64xx/cpu_init.S
+++ b/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S
diff --git a/cpu/arm1176/s3c64xx/reset.S b/arch/arm/cpu/arm1176/s3c64xx/reset.S
index eae572e4fd..eae572e4fd 100644
--- a/cpu/arm1176/s3c64xx/reset.S
+++ b/arch/arm/cpu/arm1176/s3c64xx/reset.S
diff --git a/cpu/arm1176/s3c64xx/speed.c b/arch/arm/cpu/arm1176/s3c64xx/speed.c
index 11962acade..11962acade 100644
--- a/cpu/arm1176/s3c64xx/speed.c
+++ b/arch/arm/cpu/arm1176/s3c64xx/speed.c
diff --git a/cpu/arm1176/s3c64xx/timer.c b/arch/arm/cpu/arm1176/s3c64xx/timer.c
index 9768319efa..9768319efa 100644
--- a/cpu/arm1176/s3c64xx/timer.c
+++ b/arch/arm/cpu/arm1176/s3c64xx/timer.c
diff --git a/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index e2b6c9b08d..e2b6c9b08d 100644
--- a/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
diff --git a/cpu/arm1176/u-boot.lds b/arch/arm/cpu/arm1176/u-boot.lds
index cc682f54df..8969587e8c 100644
--- a/cpu/arm1176/u-boot.lds
+++ b/arch/arm/cpu/arm1176/u-boot.lds
@@ -31,7 +31,7 @@ SECTIONS
 	. = ALIGN(4);
 	.text :
 	{
-		cpu/arm1176/start.o	(.text)
+		arch/arm/cpu/arm1176/start.o	(.text)
 		*(.text)
 	}
 
diff --git a/cpu/arm720t/Makefile b/arch/arm/cpu/arm720t/Makefile
index d5ac7d3fd9..d5ac7d3fd9 100644
--- a/cpu/arm720t/Makefile
+++ b/arch/arm/cpu/arm720t/Makefile
diff --git a/cpu/arm720t/config.mk b/arch/arm/cpu/arm720t/config.mk
index 3844c626af..3844c626af 100644
--- a/cpu/arm720t/config.mk
+++ b/arch/arm/cpu/arm720t/config.mk
diff --git a/cpu/arm720t/cpu.c b/arch/arm/cpu/arm720t/cpu.c
index 88c71bfe18..88c71bfe18 100644
--- a/cpu/arm720t/cpu.c
+++ b/arch/arm/cpu/arm720t/cpu.c
diff --git a/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c
index eb8d425318..eb8d425318 100644
--- a/cpu/arm720t/interrupts.c
+++ b/arch/arm/cpu/arm720t/interrupts.c
diff --git a/cpu/arm720t/lpc2292/Makefile b/arch/arm/cpu/arm720t/lpc2292/Makefile
index 240f1e3b3b..240f1e3b3b 100644
--- a/cpu/arm720t/lpc2292/Makefile
+++ b/arch/arm/cpu/arm720t/lpc2292/Makefile
diff --git a/cpu/arm720t/lpc2292/flash.c b/arch/arm/cpu/arm720t/lpc2292/flash.c
index 3d2dc32231..3d2dc32231 100644
--- a/cpu/arm720t/lpc2292/flash.c
+++ b/arch/arm/cpu/arm720t/lpc2292/flash.c
diff --git a/cpu/arm720t/lpc2292/iap_entry.S b/arch/arm/cpu/arm720t/lpc2292/iap_entry.S
index c31d5190bd..c31d5190bd 100644
--- a/cpu/arm720t/lpc2292/iap_entry.S
+++ b/arch/arm/cpu/arm720t/lpc2292/iap_entry.S
diff --git a/cpu/arm720t/lpc2292/mmc.c b/arch/arm/cpu/arm720t/lpc2292/mmc.c
index beaffe944c..beaffe944c 100644
--- a/cpu/arm720t/lpc2292/mmc.c
+++ b/arch/arm/cpu/arm720t/lpc2292/mmc.c
diff --git a/cpu/arm720t/lpc2292/mmc_hw.c b/arch/arm/cpu/arm720t/lpc2292/mmc_hw.c
index b4dc4a6e2f..b4dc4a6e2f 100644
--- a/cpu/arm720t/lpc2292/mmc_hw.c
+++ b/arch/arm/cpu/arm720t/lpc2292/mmc_hw.c
diff --git a/cpu/arm720t/lpc2292/mmc_hw.h b/arch/arm/cpu/arm720t/lpc2292/mmc_hw.h
index 3687dbf696..3687dbf696 100644
--- a/cpu/arm720t/lpc2292/mmc_hw.h
+++ b/arch/arm/cpu/arm720t/lpc2292/mmc_hw.h
diff --git a/cpu/arm720t/lpc2292/spi.c b/arch/arm/cpu/arm720t/lpc2292/spi.c
index d296bdac68..d296bdac68 100644
--- a/cpu/arm720t/lpc2292/spi.c
+++ b/arch/arm/cpu/arm720t/lpc2292/spi.c
diff --git a/cpu/arm720t/s3c4510b/Makefile b/arch/arm/cpu/arm720t/s3c4510b/Makefile
index c099036351..c099036351 100644
--- a/cpu/arm720t/s3c4510b/Makefile
+++ b/arch/arm/cpu/arm720t/s3c4510b/Makefile
diff --git a/cpu/arm720t/s3c4510b/cache.c b/arch/arm/cpu/arm720t/s3c4510b/cache.c
index 104d287b26..104d287b26 100644
--- a/cpu/arm720t/s3c4510b/cache.c
+++ b/arch/arm/cpu/arm720t/s3c4510b/cache.c
diff --git a/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index 022b873e35..022b873e35 100644
--- a/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
diff --git a/cpu/arm720t/u-boot.lds b/arch/arm/cpu/arm720t/u-boot.lds
index 111c3f5a6a..c975fc3d5e 100644
--- a/cpu/arm720t/u-boot.lds
+++ b/arch/arm/cpu/arm720t/u-boot.lds
@@ -31,7 +31,7 @@ SECTIONS
 	. = ALIGN(4);
 	.text :
 	{
-		cpu/arm720t/start.o	(.text)
+		arch/arm/cpu/arm720t/start.o	(.text)
 		*(.text)
 	}
 
diff --git a/cpu/arm920t/Makefile b/arch/arm/cpu/arm920t/Makefile
index cbb13b2a4c..cbb13b2a4c 100644
--- a/cpu/arm920t/Makefile
+++ b/arch/arm/cpu/arm920t/Makefile
diff --git a/cpu/arm920t/a320/Makefile b/arch/arm/cpu/arm920t/a320/Makefile
index f030c53626..f030c53626 100644
--- a/cpu/arm920t/a320/Makefile
+++ b/arch/arm/cpu/arm920t/a320/Makefile
diff --git a/cpu/arm920t/a320/ftsmc020.c b/arch/arm/cpu/arm920t/a320/ftsmc020.c
index 76465373ec..76465373ec 100644
--- a/cpu/arm920t/a320/ftsmc020.c
+++ b/arch/arm/cpu/arm920t/a320/ftsmc020.c
diff --git a/cpu/arm920t/a320/reset.S b/arch/arm/cpu/arm920t/a320/reset.S
index 12ca527c5d..12ca527c5d 100644
--- a/cpu/arm920t/a320/reset.S
+++ b/arch/arm/cpu/arm920t/a320/reset.S
diff --git a/cpu/arm920t/a320/timer.c b/arch/arm/cpu/arm920t/a320/timer.c
index bb655930de..bb655930de 100644
--- a/cpu/arm920t/a320/timer.c
+++ b/arch/arm/cpu/arm920t/a320/timer.c
diff --git a/cpu/arm920t/at91/Makefile b/arch/arm/cpu/arm920t/at91/Makefile
index d8a4383650..d8a4383650 100644
--- a/cpu/arm920t/at91/Makefile
+++ b/arch/arm/cpu/arm920t/at91/Makefile
diff --git a/cpu/arm920t/at91/lowlevel_init.S b/arch/arm/cpu/arm920t/at91/lowlevel_init.S
index 22fc86cd5b..22fc86cd5b 100644
--- a/cpu/arm920t/at91/lowlevel_init.S
+++ b/arch/arm/cpu/arm920t/at91/lowlevel_init.S
diff --git a/cpu/arm920t/at91/reset.c b/arch/arm/cpu/arm920t/at91/reset.c
index ce9c156154..ce9c156154 100644
--- a/cpu/arm920t/at91/reset.c
+++ b/arch/arm/cpu/arm920t/at91/reset.c
diff --git a/cpu/arm920t/at91/timer.c b/arch/arm/cpu/arm920t/at91/timer.c
index 91377d47a6..91377d47a6 100644
--- a/cpu/arm920t/at91/timer.c
+++ b/arch/arm/cpu/arm920t/at91/timer.c
diff --git a/cpu/arm920t/at91rm9200/Makefile b/arch/arm/cpu/arm920t/at91rm9200/Makefile
index 114d8adeb2..114d8adeb2 100644
--- a/cpu/arm920t/at91rm9200/Makefile
+++ b/arch/arm/cpu/arm920t/at91rm9200/Makefile
diff --git a/cpu/arm920t/at91rm9200/bcm5221.c b/arch/arm/cpu/arm920t/at91rm9200/bcm5221.c
index 8de3cba738..8de3cba738 100644
--- a/cpu/arm920t/at91rm9200/bcm5221.c
+++ b/arch/arm/cpu/arm920t/at91rm9200/bcm5221.c
diff --git a/cpu/arm920t/at91rm9200/dm9161.c b/arch/arm/cpu/arm920t/at91rm9200/dm9161.c
index 6d4384f41a..6d4384f41a 100644
--- a/cpu/arm920t/at91rm9200/dm9161.c
+++ b/arch/arm/cpu/arm920t/at91rm9200/dm9161.c
diff --git a/cpu/arm920t/at91rm9200/ether.c b/arch/arm/cpu/arm920t/at91rm9200/ether.c
index 91eab95eed..91eab95eed 100644
--- a/cpu/arm920t/at91rm9200/ether.c
+++ b/arch/arm/cpu/arm920t/at91rm9200/ether.c
diff --git a/cpu/arm920t/at91rm9200/i2c.c b/arch/arm/cpu/arm920t/at91rm9200/i2c.c
index 1711088ad3..1711088ad3 100644
--- a/cpu/arm920t/at91rm9200/i2c.c
+++ b/arch/arm/cpu/arm920t/at91rm9200/i2c.c
diff --git a/cpu/arm920t/at91rm9200/ks8721.c b/arch/arm/cpu/arm920t/at91rm9200/ks8721.c
index 9fe379369a..9fe379369a 100644
--- a/cpu/arm920t/at91rm9200/ks8721.c
+++ b/arch/arm/cpu/arm920t/at91rm9200/ks8721.c
diff --git a/cpu/arm920t/at91rm9200/lowlevel_init.S b/arch/arm/cpu/arm920t/at91rm9200/lowlevel_init.S
index d8bb96004b..d8bb96004b 100644
--- a/cpu/arm920t/at91rm9200/lowlevel_init.S
+++ b/arch/arm/cpu/arm920t/at91rm9200/lowlevel_init.S
diff --git a/cpu/arm920t/at91rm9200/lxt972.c b/arch/arm/cpu/arm920t/at91rm9200/lxt972.c
index 260d393cf0..260d393cf0 100644
--- a/cpu/arm920t/at91rm9200/lxt972.c
+++ b/arch/arm/cpu/arm920t/at91rm9200/lxt972.c
diff --git a/cpu/arm920t/at91rm9200/reset.c b/arch/arm/cpu/arm920t/at91rm9200/reset.c
index 945ea2c248..945ea2c248 100644
--- a/cpu/arm920t/at91rm9200/reset.c
+++ b/arch/arm/cpu/arm920t/at91rm9200/reset.c
diff --git a/cpu/arm920t/at91rm9200/spi.c b/arch/arm/cpu/arm920t/at91rm9200/spi.c
index f3cb5d8c2c..f3cb5d8c2c 100644
--- a/cpu/arm920t/at91rm9200/spi.c
+++ b/arch/arm/cpu/arm920t/at91rm9200/spi.c
diff --git a/cpu/arm920t/at91rm9200/timer.c b/arch/arm/cpu/arm920t/at91rm9200/timer.c
index 9c54bbedbe..9c54bbedbe 100644
--- a/cpu/arm920t/at91rm9200/timer.c
+++ b/arch/arm/cpu/arm920t/at91rm9200/timer.c
diff --git a/cpu/arm920t/at91rm9200/usb.c b/arch/arm/cpu/arm920t/at91rm9200/usb.c
index 72355dcf9a..72355dcf9a 100644
--- a/cpu/arm920t/at91rm9200/usb.c
+++ b/arch/arm/cpu/arm920t/at91rm9200/usb.c
diff --git a/cpu/arm920t/config.mk b/arch/arm/cpu/arm920t/config.mk
index 8f6c1a354c..8f6c1a354c 100644
--- a/cpu/arm920t/config.mk
+++ b/arch/arm/cpu/arm920t/config.mk
diff --git a/cpu/arm920t/cpu.c b/arch/arm/cpu/arm920t/cpu.c
index be82c87c7d..be82c87c7d 100644
--- a/cpu/arm920t/cpu.c
+++ b/arch/arm/cpu/arm920t/cpu.c
diff --git a/cpu/arm920t/ep93xx/Makefile b/arch/arm/cpu/arm920t/ep93xx/Makefile
index 01a2f5555a..01a2f5555a 100644
--- a/cpu/arm920t/ep93xx/Makefile
+++ b/arch/arm/cpu/arm920t/ep93xx/Makefile
diff --git a/cpu/arm920t/ep93xx/cpu.c b/arch/arm/cpu/arm920t/ep93xx/cpu.c
index 1abb9c6faa..1abb9c6faa 100644
--- a/cpu/arm920t/ep93xx/cpu.c
+++ b/arch/arm/cpu/arm920t/ep93xx/cpu.c
diff --git a/cpu/arm920t/ep93xx/led.c b/arch/arm/cpu/arm920t/ep93xx/led.c
index 7e2c897757..7e2c897757 100644
--- a/cpu/arm920t/ep93xx/led.c
+++ b/arch/arm/cpu/arm920t/ep93xx/led.c
diff --git a/cpu/arm920t/ep93xx/lowlevel_init.S b/arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S
index a20ec894be..a20ec894be 100644
--- a/cpu/arm920t/ep93xx/lowlevel_init.S
+++ b/arch/arm/cpu/arm920t/ep93xx/lowlevel_init.S
diff --git a/cpu/arm920t/ep93xx/speed.c b/arch/arm/cpu/arm920t/ep93xx/speed.c
index c83a3bb91d..c83a3bb91d 100644
--- a/cpu/arm920t/ep93xx/speed.c
+++ b/arch/arm/cpu/arm920t/ep93xx/speed.c
diff --git a/cpu/arm920t/ep93xx/timer.c b/arch/arm/cpu/arm920t/ep93xx/timer.c
index 31304b7f97..4a0ce4da64 100644
--- a/cpu/arm920t/ep93xx/timer.c
+++ b/arch/arm/cpu/arm920t/ep93xx/timer.c
@@ -1,8 +1,7 @@
 /*
  * Cirrus Logic EP93xx timer support.
  *
- * Copyright (C) 2009, 2010
- * Matthias Kaehlcke <matthias@kaehlcke.net>
+ * Copyright (C) 2009, 2010 Matthias Kaehlcke <matthias@kaehlcke.net>
  *
  * Copyright (C) 2004, 2005
  * Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com>
@@ -42,17 +41,9 @@
 static struct ep93xx_timer
 {
 	unsigned long long ticks;
-	unsigned long last_update;
+	unsigned long last_read;
 } timer;
 
-static inline unsigned long clk_to_systicks(unsigned long long clk_ticks)
-{
-	unsigned long long sys_ticks = (clk_ticks * CONFIG_SYS_HZ);
-	do_div(sys_ticks, TIMER_FREQ);
-
-	return (unsigned long)sys_ticks;
-}
-
 static inline unsigned long long usecs_to_ticks(unsigned long usecs)
 {
 	unsigned long long ticks = (unsigned long long)usecs * TIMER_FREQ;
@@ -61,11 +52,18 @@ static inline unsigned long long usecs_to_ticks(unsigned long usecs)
 	return ticks;
 }
 
-static inline unsigned long read_timer(void)
+static inline void read_timer(void)
 {
-	struct timer_regs *timer = (struct timer_regs *)TIMER_BASE;
+	struct timer_regs *timer_regs = (struct timer_regs *)TIMER_BASE;
+	const unsigned long now = TIMER_MAX_VAL - readl(&timer_regs->timer3.value);
+
+	if (now >= timer.last_read)
+		timer.ticks += now - timer.last_read;
+	else
+		/* an overflow occurred */
+		timer.ticks += TIMER_MAX_VAL - timer.last_read + now;
 
-	return TIMER_MAX_VAL - readl(&timer->timer3.value);
+	timer.last_read = now;
 }
 
 /*
@@ -73,17 +71,14 @@ static inline unsigned long read_timer(void)
  */
 unsigned long long get_ticks(void)
 {
-	const unsigned long now = read_timer();
+	unsigned long long sys_ticks;
 
-	if (now >= timer.last_update)
-		timer.ticks += now - timer.last_update;
-	else
-		/* an overflow occurred */
-		timer.ticks += TIMER_MAX_VAL - timer.last_update + now;
+	read_timer();
 
-	timer.last_update = now;
+	sys_ticks = timer.ticks * CONFIG_SYS_HZ;
+	do_div(sys_ticks, TIMER_FREQ);
 
-	return clk_to_systicks(timer.ticks);
+	return sys_ticks;
 }
 
 unsigned long get_timer_masked(void)
@@ -98,7 +93,7 @@ unsigned long get_timer(unsigned long base)
 
 void reset_timer_masked(void)
 {
-	timer.last_update = read_timer();
+	read_timer();
 	timer.ticks = 0;
 }
 
@@ -109,28 +104,29 @@ void reset_timer(void)
 
 void __udelay(unsigned long usec)
 {
-	/* read the timer and update timer.ticks */
-	get_ticks();
+	unsigned long long target;
+
+	read_timer();
 
-	const unsigned long long target = timer.ticks + usecs_to_ticks(usec);
+	target = timer.ticks + usecs_to_ticks(usec);
 
 	while (timer.ticks < target)
-		get_ticks();
+		read_timer();
 }
 
 int timer_init(void)
 {
-	struct timer_regs *timer = (struct timer_regs *)TIMER_BASE;
+	struct timer_regs *timer_regs = (struct timer_regs *)TIMER_BASE;
 
-	/* use timer 3 with 508KHz and free running */
-	writel(TIMER_CLKSEL, &timer->timer3.control);
+	/* use timer 3 with 508KHz and free running, not enabled now */
+	writel(TIMER_CLKSEL, &timer_regs->timer3.control);
 
-	/* set initial timer value 3 */
-	writel(TIMER_MAX_VAL, &timer->timer3.load);
+	/* set initial timer value */
+	writel(TIMER_MAX_VAL, &timer_regs->timer3.load);
 
 	/* Enable the timer */
 	writel(TIMER_ENABLE | TIMER_CLKSEL,
-		&timer->timer3.control);
+		&timer_regs->timer3.control);
 
 	reset_timer_masked();
 
diff --git a/cpu/arm920t/ep93xx/u-boot.lds b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
index 737c9d8c1b..5bfcb02317 100644
--- a/cpu/arm920t/ep93xx/u-boot.lds
+++ b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
@@ -31,7 +31,7 @@ SECTIONS
 	. = ALIGN(4);
 	.text      :
 	{
-	  cpu/arm920t/start.o	(.text)
+	  arch/arm/cpu/arm920t/start.o	(.text)
 		/* the EP93xx expects to find the pattern 'CRUS' at 0x1000 */
 	  . = 0x1000;
 	  LONG(0x53555243)
diff --git a/cpu/arm920t/imx/Makefile b/arch/arm/cpu/arm920t/imx/Makefile
index 28945e22cb..28945e22cb 100644
--- a/cpu/arm920t/imx/Makefile
+++ b/arch/arm/cpu/arm920t/imx/Makefile
diff --git a/cpu/arm920t/imx/generic.c b/arch/arm/cpu/arm920t/imx/generic.c
index aa7c8c159d..aa7c8c159d 100644
--- a/cpu/arm920t/imx/generic.c
+++ b/arch/arm/cpu/arm920t/imx/generic.c
diff --git a/cpu/arm920t/imx/speed.c b/arch/arm/cpu/arm920t/imx/speed.c
index 1e296987d6..1e296987d6 100644
--- a/cpu/arm920t/imx/speed.c
+++ b/arch/arm/cpu/arm920t/imx/speed.c
diff --git a/cpu/arm920t/imx/timer.c b/arch/arm/cpu/arm920t/imx/timer.c
index b06b518f03..b06b518f03 100644
--- a/cpu/arm920t/imx/timer.c
+++ b/arch/arm/cpu/arm920t/imx/timer.c
diff --git a/cpu/arm920t/interrupts.c b/arch/arm/cpu/arm920t/interrupts.c
index 561083ec73..561083ec73 100644
--- a/cpu/arm920t/interrupts.c
+++ b/arch/arm/cpu/arm920t/interrupts.c
diff --git a/cpu/arm920t/ks8695/Makefile b/arch/arm/cpu/arm920t/ks8695/Makefile
index f53fdc2b25..f53fdc2b25 100644
--- a/cpu/arm920t/ks8695/Makefile
+++ b/arch/arm/cpu/arm920t/ks8695/Makefile
diff --git a/cpu/arm920t/ks8695/lowlevel_init.S b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S
index e9f1227dd6..e9f1227dd6 100644
--- a/cpu/arm920t/ks8695/lowlevel_init.S
+++ b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S
diff --git a/cpu/arm920t/ks8695/timer.c b/arch/arm/cpu/arm920t/ks8695/timer.c
index 886e370596..886e370596 100644
--- a/cpu/arm920t/ks8695/timer.c
+++ b/arch/arm/cpu/arm920t/ks8695/timer.c
diff --git a/cpu/arm920t/s3c24x0/Makefile b/arch/arm/cpu/arm920t/s3c24x0/Makefile
index 7e8d6ed5f2..7e8d6ed5f2 100644
--- a/cpu/arm920t/s3c24x0/Makefile
+++ b/arch/arm/cpu/arm920t/s3c24x0/Makefile
diff --git a/cpu/arm920t/s3c24x0/interrupts.c b/arch/arm/cpu/arm920t/s3c24x0/interrupts.c
index 879fda66a9..879fda66a9 100644
--- a/cpu/arm920t/s3c24x0/interrupts.c
+++ b/arch/arm/cpu/arm920t/s3c24x0/interrupts.c
diff --git a/cpu/arm920t/s3c24x0/speed.c b/arch/arm/cpu/arm920t/s3c24x0/speed.c
index b13283a798..b13283a798 100644
--- a/cpu/arm920t/s3c24x0/speed.c
+++ b/arch/arm/cpu/arm920t/s3c24x0/speed.c
diff --git a/cpu/arm920t/s3c24x0/timer.c b/arch/arm/cpu/arm920t/s3c24x0/timer.c
index 7d47354381..7d47354381 100644
--- a/cpu/arm920t/s3c24x0/timer.c
+++ b/arch/arm/cpu/arm920t/s3c24x0/timer.c
diff --git a/cpu/arm920t/s3c24x0/usb.c b/arch/arm/cpu/arm920t/s3c24x0/usb.c
index e468ed08fc..e468ed08fc 100644
--- a/cpu/arm920t/s3c24x0/usb.c
+++ b/arch/arm/cpu/arm920t/s3c24x0/usb.c
diff --git a/cpu/arm920t/s3c24x0/usb_ohci.c b/arch/arm/cpu/arm920t/s3c24x0/usb_ohci.c
index 5aa8d64a55..5aa8d64a55 100644
--- a/cpu/arm920t/s3c24x0/usb_ohci.c
+++ b/arch/arm/cpu/arm920t/s3c24x0/usb_ohci.c
diff --git a/cpu/arm920t/s3c24x0/usb_ohci.h b/arch/arm/cpu/arm920t/s3c24x0/usb_ohci.h
index f272d78859..f272d78859 100644
--- a/cpu/arm920t/s3c24x0/usb_ohci.h
+++ b/arch/arm/cpu/arm920t/s3c24x0/usb_ohci.h
diff --git a/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index 779f192e51..779f192e51 100644
--- a/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
diff --git a/cpu/arm920t/u-boot.lds b/arch/arm/cpu/arm920t/u-boot.lds
index d9bfbee73b..a7decfcd7d 100644
--- a/cpu/arm920t/u-boot.lds
+++ b/arch/arm/cpu/arm920t/u-boot.lds
@@ -39,7 +39,7 @@ SECTIONS
 	. = ALIGN(4);
 	.text :
 	{
-		cpu/arm920t/start.o	(.text)
+		arch/arm/cpu/arm920t/start.o	(.text)
 		*(.text)
 	}
 
diff --git a/cpu/arm925t/Makefile b/arch/arm/cpu/arm925t/Makefile
index 8d0e88f902..8d0e88f902 100644
--- a/cpu/arm925t/Makefile
+++ b/arch/arm/cpu/arm925t/Makefile
diff --git a/cpu/arm925t/config.mk b/arch/arm/cpu/arm925t/config.mk
index 8f6c1a354c..8f6c1a354c 100644
--- a/cpu/arm925t/config.mk
+++ b/arch/arm/cpu/arm925t/config.mk
diff --git a/cpu/arm925t/cpu.c b/arch/arm/cpu/arm925t/cpu.c
index 71700bb175..71700bb175 100644
--- a/cpu/arm925t/cpu.c
+++ b/arch/arm/cpu/arm925t/cpu.c
diff --git a/cpu/arm925t/omap925.c b/arch/arm/cpu/arm925t/omap925.c
index 65dab9f88d..65dab9f88d 100644
--- a/cpu/arm925t/omap925.c
+++ b/arch/arm/cpu/arm925t/omap925.c
diff --git a/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S
index 567e80479e..567e80479e 100644
--- a/cpu/arm925t/start.S
+++ b/arch/arm/cpu/arm925t/start.S
diff --git a/cpu/arm925t/timer.c b/arch/arm/cpu/arm925t/timer.c
index 7dfe2b5646..7dfe2b5646 100644
--- a/cpu/arm925t/timer.c
+++ b/arch/arm/cpu/arm925t/timer.c
diff --git a/cpu/arm925t/u-boot.lds b/arch/arm/cpu/arm925t/u-boot.lds
index 694780eba2..e21d6dc5a7 100644
--- a/cpu/arm925t/u-boot.lds
+++ b/arch/arm/cpu/arm925t/u-boot.lds
@@ -34,7 +34,7 @@ SECTIONS
 	. = ALIGN(4);
 	.text :
 	{
-		cpu/arm925t/start.o	(.text)
+		arch/arm/cpu/arm925t/start.o	(.text)
 		*(.text)
 	}
 
diff --git a/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile
index 7701b03bbe..7701b03bbe 100644
--- a/cpu/arm926ejs/Makefile
+++ b/arch/arm/cpu/arm926ejs/Makefile
diff --git a/cpu/arm926ejs/at91/Makefile b/arch/arm/cpu/arm926ejs/at91/Makefile
index 4f467be91c..4f467be91c 100644
--- a/cpu/arm926ejs/at91/Makefile
+++ b/arch/arm/cpu/arm926ejs/at91/Makefile
diff --git a/cpu/arm926ejs/at91/at91cap9_devices.c b/arch/arm/cpu/arm926ejs/at91/at91cap9_devices.c
index 2d878fdde6..2d878fdde6 100644
--- a/cpu/arm926ejs/at91/at91cap9_devices.c
+++ b/arch/arm/cpu/arm926ejs/at91/at91cap9_devices.c
diff --git a/cpu/arm926ejs/at91/at91sam9260_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c
index 77d49ab1c7..77d49ab1c7 100644
--- a/cpu/arm926ejs/at91/at91sam9260_devices.c
+++ b/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c
diff --git a/cpu/arm926ejs/at91/at91sam9261_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c
index b4353ef5cb..b4353ef5cb 100644
--- a/cpu/arm926ejs/at91/at91sam9261_devices.c
+++ b/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c
diff --git a/cpu/arm926ejs/at91/at91sam9263_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c
index deda3e54d9..deda3e54d9 100644
--- a/cpu/arm926ejs/at91/at91sam9263_devices.c
+++ b/arch/arm/cpu/arm926ejs/at91/at91sam9263_devices.c
diff --git a/cpu/arm926ejs/at91/at91sam9m10g45_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9m10g45_devices.c
index 4ad9b1fcc9..4ad9b1fcc9 100644
--- a/cpu/arm926ejs/at91/at91sam9m10g45_devices.c
+++ b/arch/arm/cpu/arm926ejs/at91/at91sam9m10g45_devices.c
diff --git a/cpu/arm926ejs/at91/at91sam9rl_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9rl_devices.c
index 4f570f4fb5..4f570f4fb5 100644
--- a/cpu/arm926ejs/at91/at91sam9rl_devices.c
+++ b/arch/arm/cpu/arm926ejs/at91/at91sam9rl_devices.c
diff --git a/cpu/arm926ejs/at91/clock.c b/arch/arm/cpu/arm926ejs/at91/clock.c
index b06d7601b9..ecf91f5187 100644
--- a/cpu/arm926ejs/at91/clock.c
+++ b/arch/arm/cpu/arm926ejs/at91/clock.c
@@ -203,7 +203,8 @@ int at91_clock_init(unsigned long main_clock)
 	if (mckr & AT91_PMC_MCKR_MDIV_MASK)
 		freq /= 2;			/* processor clock division */
 #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
-	mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) == AT91SAM9_PMC_MDIV_3
+	mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ==
+		(AT91_PMC_MCKR_MDIV_2 | AT91_PMC_MCKR_MDIV_4)
 		? freq / 3
 		: freq / (1 << ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
 #else
diff --git a/cpu/arm926ejs/at91/config.mk b/arch/arm/cpu/arm926ejs/at91/config.mk
index 19296fdba2..19296fdba2 100644
--- a/cpu/arm926ejs/at91/config.mk
+++ b/arch/arm/cpu/arm926ejs/at91/config.mk
diff --git a/cpu/arm926ejs/at91/cpu.c b/arch/arm/cpu/arm926ejs/at91/cpu.c
index 141a7d1ec6..141a7d1ec6 100644
--- a/cpu/arm926ejs/at91/cpu.c
+++ b/arch/arm/cpu/arm926ejs/at91/cpu.c
diff --git a/cpu/arm926ejs/at91/led.c b/arch/arm/cpu/arm926ejs/at91/led.c
index 0a315c4971..0a315c4971 100644
--- a/cpu/arm926ejs/at91/led.c
+++ b/arch/arm/cpu/arm926ejs/at91/led.c
diff --git a/cpu/arm926ejs/at91/lowlevel_init.S b/arch/arm/cpu/arm926ejs/at91/lowlevel_init.S
index 559c35c9ee..559c35c9ee 100644
--- a/cpu/arm926ejs/at91/lowlevel_init.S
+++ b/arch/arm/cpu/arm926ejs/at91/lowlevel_init.S
diff --git a/cpu/arm926ejs/at91/reset.c b/arch/arm/cpu/arm926ejs/at91/reset.c
index 1b67e77887..1b67e77887 100644
--- a/cpu/arm926ejs/at91/reset.c
+++ b/arch/arm/cpu/arm926ejs/at91/reset.c
diff --git a/cpu/arm926ejs/at91/timer.c b/arch/arm/cpu/arm926ejs/at91/timer.c
index d21eebfb4e..d21eebfb4e 100644
--- a/cpu/arm926ejs/at91/timer.c
+++ b/arch/arm/cpu/arm926ejs/at91/timer.c
diff --git a/cpu/arm926ejs/config.mk b/arch/arm/cpu/arm926ejs/config.mk
index f8ef90f2d5..f8ef90f2d5 100644
--- a/cpu/arm926ejs/config.mk
+++ b/arch/arm/cpu/arm926ejs/config.mk
diff --git a/cpu/arm926ejs/cpu.c b/arch/arm/cpu/arm926ejs/cpu.c
index 5c902dfc13..5c902dfc13 100644
--- a/cpu/arm926ejs/cpu.c
+++ b/arch/arm/cpu/arm926ejs/cpu.c
diff --git a/cpu/arm926ejs/davinci/Makefile b/arch/arm/cpu/arm926ejs/davinci/Makefile
index d7e9e2ca04..d7e9e2ca04 100644
--- a/cpu/arm926ejs/davinci/Makefile
+++ b/arch/arm/cpu/arm926ejs/davinci/Makefile
diff --git a/cpu/arm926ejs/davinci/config.mk b/arch/arm/cpu/arm926ejs/davinci/config.mk
index 565adda11d..565adda11d 100644
--- a/cpu/arm926ejs/davinci/config.mk
+++ b/arch/arm/cpu/arm926ejs/davinci/config.mk
diff --git a/cpu/arm926ejs/davinci/cpu.c b/arch/arm/cpu/arm926ejs/davinci/cpu.c
index fc3551c302..fc3551c302 100644
--- a/cpu/arm926ejs/davinci/cpu.c
+++ b/arch/arm/cpu/arm926ejs/davinci/cpu.c
diff --git a/cpu/arm926ejs/davinci/dm355.c b/arch/arm/cpu/arm926ejs/davinci/dm355.c
index bc45b67fbe..bc45b67fbe 100644
--- a/cpu/arm926ejs/davinci/dm355.c
+++ b/arch/arm/cpu/arm926ejs/davinci/dm355.c
diff --git a/cpu/arm926ejs/davinci/dm365.c b/arch/arm/cpu/arm926ejs/davinci/dm365.c
index 56c1bc032b..56c1bc032b 100644
--- a/cpu/arm926ejs/davinci/dm365.c
+++ b/arch/arm/cpu/arm926ejs/davinci/dm365.c
diff --git a/cpu/arm926ejs/davinci/dm644x.c b/arch/arm/cpu/arm926ejs/davinci/dm644x.c
index bb105b56ee..bb105b56ee 100644
--- a/cpu/arm926ejs/davinci/dm644x.c
+++ b/arch/arm/cpu/arm926ejs/davinci/dm644x.c
diff --git a/cpu/arm926ejs/davinci/dm646x.c b/arch/arm/cpu/arm926ejs/davinci/dm646x.c
index 329825f453..329825f453 100644
--- a/cpu/arm926ejs/davinci/dm646x.c
+++ b/arch/arm/cpu/arm926ejs/davinci/dm646x.c
diff --git a/cpu/arm926ejs/davinci/dp83848.c b/arch/arm/cpu/arm926ejs/davinci/dp83848.c
index c71c685f72..c71c685f72 100644
--- a/cpu/arm926ejs/davinci/dp83848.c
+++ b/arch/arm/cpu/arm926ejs/davinci/dp83848.c
diff --git a/cpu/arm926ejs/davinci/lowlevel_init.S b/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S
index 0a4b2cf674..0a4b2cf674 100644
--- a/cpu/arm926ejs/davinci/lowlevel_init.S
+++ b/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S
diff --git a/cpu/arm926ejs/davinci/lxt972.c b/arch/arm/cpu/arm926ejs/davinci/lxt972.c
index ce3e41c551..ce3e41c551 100644
--- a/cpu/arm926ejs/davinci/lxt972.c
+++ b/arch/arm/cpu/arm926ejs/davinci/lxt972.c
diff --git a/cpu/arm926ejs/davinci/psc.c b/arch/arm/cpu/arm926ejs/davinci/psc.c
index 8273a7fae4..8273a7fae4 100644
--- a/cpu/arm926ejs/davinci/psc.c
+++ b/arch/arm/cpu/arm926ejs/davinci/psc.c
diff --git a/cpu/arm926ejs/davinci/reset.S b/arch/arm/cpu/arm926ejs/davinci/reset.S
index ba0a7c3b4b..ba0a7c3b4b 100644
--- a/cpu/arm926ejs/davinci/reset.S
+++ b/arch/arm/cpu/arm926ejs/davinci/reset.S
diff --git a/cpu/arm926ejs/davinci/timer.c b/arch/arm/cpu/arm926ejs/davinci/timer.c
index 9da7443f30..9da7443f30 100644
--- a/cpu/arm926ejs/davinci/timer.c
+++ b/arch/arm/cpu/arm926ejs/davinci/timer.c
diff --git a/cpu/arm926ejs/kirkwood/Makefile b/arch/arm/cpu/arm926ejs/kirkwood/Makefile
index fc2cc03001..fc2cc03001 100644
--- a/cpu/arm926ejs/kirkwood/Makefile
+++ b/arch/arm/cpu/arm926ejs/kirkwood/Makefile
diff --git a/cpu/arm926ejs/kirkwood/cpu.c b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
index 6fc3902580..6fc3902580 100644
--- a/cpu/arm926ejs/kirkwood/cpu.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
diff --git a/cpu/arm926ejs/kirkwood/dram.c b/arch/arm/cpu/arm926ejs/kirkwood/dram.c
index 8f2a18af6b..8f2a18af6b 100644
--- a/cpu/arm926ejs/kirkwood/dram.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/dram.c
diff --git a/cpu/arm926ejs/kirkwood/mpp.c b/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
index b2f0ad55e3..b2f0ad55e3 100644
--- a/cpu/arm926ejs/kirkwood/mpp.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/mpp.c
diff --git a/cpu/arm926ejs/kirkwood/timer.c b/arch/arm/cpu/arm926ejs/kirkwood/timer.c
index 2ec6a93807..2ec6a93807 100644
--- a/cpu/arm926ejs/kirkwood/timer.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/timer.c
diff --git a/cpu/arm926ejs/mx25/Makefile b/arch/arm/cpu/arm926ejs/mx25/Makefile
index 55c1e899be..76f01791a0 100644
--- a/cpu/arm926ejs/mx25/Makefile
+++ b/arch/arm/cpu/arm926ejs/mx25/Makefile
@@ -28,7 +28,7 @@ COBJS	= generic.o timer.o
 MX27OBJS = reset.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-SRCS	+= $(addprefix $(SRCTREE)/cpu/arm926ejs/mx27/,$(MX27OBJS:.o=.c))
+SRCS	+= $(addprefix $(SRCTREE)/arch/arm/cpu/arm926ejs/mx27/,$(MX27OBJS:.o=.c))
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS) $(MX27OBJS))
 
 all:	$(obj).depend $(LIB)
diff --git a/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c
index 694841dd10..694841dd10 100644
--- a/cpu/arm926ejs/mx25/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx25/generic.c
diff --git a/cpu/arm926ejs/mx25/reset.c b/arch/arm/cpu/arm926ejs/mx25/reset.c
index 1e33150eb9..1e33150eb9 100644
--- a/cpu/arm926ejs/mx25/reset.c
+++ b/arch/arm/cpu/arm926ejs/mx25/reset.c
diff --git a/cpu/arm926ejs/mx25/timer.c b/arch/arm/cpu/arm926ejs/mx25/timer.c
index 11d41a8bf9..11d41a8bf9 100644
--- a/cpu/arm926ejs/mx25/timer.c
+++ b/arch/arm/cpu/arm926ejs/mx25/timer.c
diff --git a/cpu/arm926ejs/mx27/Makefile b/arch/arm/cpu/arm926ejs/mx27/Makefile
index 67d1b0e303..67d1b0e303 100644
--- a/cpu/arm926ejs/mx27/Makefile
+++ b/arch/arm/cpu/arm926ejs/mx27/Makefile
diff --git a/cpu/arm926ejs/mx27/generic.c b/arch/arm/cpu/arm926ejs/mx27/generic.c
index 30cf544712..ae2ce5841c 100644
--- a/cpu/arm926ejs/mx27/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx27/generic.c
@@ -316,6 +316,23 @@ void mx27_fec_init_pins(void)
 #endif /* CONFIG_FEC_MXC */
 
 #ifdef CONFIG_MXC_MMC
+void mx27_sd1_init_pins(void)
+{
+	int i;
+	unsigned int mode[] = {
+		PE18_PF_SD1_D0,
+		PE19_PF_SD1_D1,
+		PE20_PF_SD1_D2,
+		PE21_PF_SD1_D3,
+		PE22_PF_SD1_CMD,
+		PE23_PF_SD1_CLK,
+	};
+
+	for (i = 0; i < ARRAY_SIZE(mode); i++)
+		imx_gpio_mode(mode[i]);
+
+}
+
 void mx27_sd2_init_pins(void)
 {
 	int i;
diff --git a/cpu/arm926ejs/mx27/reset.c b/arch/arm/cpu/arm926ejs/mx27/reset.c
index 6c54eafd37..6c54eafd37 100644
--- a/cpu/arm926ejs/mx27/reset.c
+++ b/arch/arm/cpu/arm926ejs/mx27/reset.c
diff --git a/cpu/arm926ejs/mx27/timer.c b/arch/arm/cpu/arm926ejs/mx27/timer.c
index 8f1d47bba7..8f1d47bba7 100644
--- a/cpu/arm926ejs/mx27/timer.c
+++ b/arch/arm/cpu/arm926ejs/mx27/timer.c
diff --git a/cpu/arm926ejs/nomadik/Makefile b/arch/arm/cpu/arm926ejs/nomadik/Makefile
index 0fc9f2a4c1..0fc9f2a4c1 100644
--- a/cpu/arm926ejs/nomadik/Makefile
+++ b/arch/arm/cpu/arm926ejs/nomadik/Makefile
diff --git a/cpu/arm926ejs/nomadik/gpio.c b/arch/arm/cpu/arm926ejs/nomadik/gpio.c
index 62a375b5b5..62a375b5b5 100644
--- a/cpu/arm926ejs/nomadik/gpio.c
+++ b/arch/arm/cpu/arm926ejs/nomadik/gpio.c
diff --git a/cpu/arm926ejs/nomadik/reset.S b/arch/arm/cpu/arm926ejs/nomadik/reset.S
index ec954726ae..ec954726ae 100644
--- a/cpu/arm926ejs/nomadik/reset.S
+++ b/arch/arm/cpu/arm926ejs/nomadik/reset.S
diff --git a/cpu/arm926ejs/nomadik/timer.c b/arch/arm/cpu/arm926ejs/nomadik/timer.c
index 047b9e3513..1d98ef3eb3 100644
--- a/cpu/arm926ejs/nomadik/timer.c
+++ b/arch/arm/cpu/arm926ejs/nomadik/timer.c
@@ -34,8 +34,8 @@
 #define TICKS_PER_HZ		(TIMER_CLOCK / CONFIG_SYS_HZ)
 #define TICKS_TO_HZ(x)		((x) / TICKS_PER_HZ)
 
-/* macro to read the 32 bit timer: since it decrements, we invert read value */
-#define READ_TIMER() (~readl(CONFIG_SYS_TIMERBASE + MTU_VAL(0)))
+/* macro to read the decrementing 32 bit timer as an increasing count */
+#define READ_TIMER() (0 - readl(CONFIG_SYS_TIMERBASE + MTU_VAL(0)))
 
 /* Configure a free-running, auto-wrap counter with no prescaler */
 int timer_init(void)
@@ -49,7 +49,16 @@ int timer_init(void)
 /* Restart counting from 0 */
 void reset_timer(void)
 {
-	writel(0, CONFIG_SYS_TIMERBASE + MTU_LR(0)); /* Immediate effect */
+	ulong val;
+	writel(0, CONFIG_SYS_TIMERBASE + MTU_LR(0));
+	/*
+	 * The load-register isn't really immediate: it changes on clock
+	 * edges, so we must wait for our newly-written value to appear.
+	 * Since we might miss reading 0, wait for any change in value.
+	 */
+	val = READ_TIMER();
+	while (READ_TIMER() == val)
+		;
 }
 
 /* Return how many HZ passed since "base" */
diff --git a/cpu/arm926ejs/omap/Makefile b/arch/arm/cpu/arm926ejs/omap/Makefile
index 74aea74189..74aea74189 100644
--- a/cpu/arm926ejs/omap/Makefile
+++ b/arch/arm/cpu/arm926ejs/omap/Makefile
diff --git a/cpu/arm926ejs/omap/cpuinfo.c b/arch/arm/cpu/arm926ejs/omap/cpuinfo.c
index 0052daba8e..0052daba8e 100644
--- a/cpu/arm926ejs/omap/cpuinfo.c
+++ b/arch/arm/cpu/arm926ejs/omap/cpuinfo.c
diff --git a/cpu/arm926ejs/omap/reset.S b/arch/arm/cpu/arm926ejs/omap/reset.S
index 4b20756d1b..4b20756d1b 100644
--- a/cpu/arm926ejs/omap/reset.S
+++ b/arch/arm/cpu/arm926ejs/omap/reset.S
diff --git a/cpu/arm926ejs/omap/timer.c b/arch/arm/cpu/arm926ejs/omap/timer.c
index 2ac38c40b7..2ac38c40b7 100644
--- a/cpu/arm926ejs/omap/timer.c
+++ b/arch/arm/cpu/arm926ejs/omap/timer.c
diff --git a/cpu/arm926ejs/spear/Makefile b/arch/arm/cpu/arm926ejs/spear/Makefile
index bf8dfa8c3c..bf8dfa8c3c 100644
--- a/cpu/arm926ejs/spear/Makefile
+++ b/arch/arm/cpu/arm926ejs/spear/Makefile
diff --git a/cpu/arm926ejs/spear/reset.c b/arch/arm/cpu/arm926ejs/spear/reset.c
index 73ad86da30..73ad86da30 100644
--- a/cpu/arm926ejs/spear/reset.c
+++ b/arch/arm/cpu/arm926ejs/spear/reset.c
diff --git a/cpu/arm926ejs/spear/timer.c b/arch/arm/cpu/arm926ejs/spear/timer.c
index 06858b4a13..06858b4a13 100644
--- a/cpu/arm926ejs/spear/timer.c
+++ b/arch/arm/cpu/arm926ejs/spear/timer.c
diff --git a/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index 3b81151f49..3b81151f49 100644
--- a/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
diff --git a/cpu/arm926ejs/u-boot.lds b/arch/arm/cpu/arm926ejs/u-boot.lds
index ee5eeb590a..ecbc58c7c2 100644
--- a/cpu/arm926ejs/u-boot.lds
+++ b/arch/arm/cpu/arm926ejs/u-boot.lds
@@ -31,7 +31,7 @@ SECTIONS
 	. = ALIGN(4);
 	.text :
 	{
-		cpu/arm926ejs/start.o	(.text)
+		arch/arm/cpu/arm926ejs/start.o	(.text)
 		*(.text)
 	}
 
diff --git a/cpu/arm926ejs/versatile/Makefile b/arch/arm/cpu/arm926ejs/versatile/Makefile
index c335d5c866..c335d5c866 100644
--- a/cpu/arm926ejs/versatile/Makefile
+++ b/arch/arm/cpu/arm926ejs/versatile/Makefile
diff --git a/cpu/arm926ejs/versatile/reset.S b/arch/arm/cpu/arm926ejs/versatile/reset.S
index 4b20756d1b..4b20756d1b 100644
--- a/cpu/arm926ejs/versatile/reset.S
+++ b/arch/arm/cpu/arm926ejs/versatile/reset.S
diff --git a/cpu/arm926ejs/versatile/timer.c b/arch/arm/cpu/arm926ejs/versatile/timer.c
index 563db36548..563db36548 100644
--- a/cpu/arm926ejs/versatile/timer.c
+++ b/arch/arm/cpu/arm926ejs/versatile/timer.c
diff --git a/cpu/arm946es/Makefile b/arch/arm/cpu/arm946es/Makefile
index e81f2da29d..e81f2da29d 100644
--- a/cpu/arm946es/Makefile
+++ b/arch/arm/cpu/arm946es/Makefile
diff --git a/cpu/arm946es/config.mk b/arch/arm/cpu/arm946es/config.mk
index e783f697a1..e783f697a1 100644
--- a/cpu/arm946es/config.mk
+++ b/arch/arm/cpu/arm946es/config.mk
diff --git a/cpu/arm946es/cpu.c b/arch/arm/cpu/arm946es/cpu.c
index c63c98be86..c63c98be86 100644
--- a/cpu/arm946es/cpu.c
+++ b/arch/arm/cpu/arm946es/cpu.c
diff --git a/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S
index 627e3cb94d..627e3cb94d 100644
--- a/cpu/arm946es/start.S
+++ b/arch/arm/cpu/arm946es/start.S
diff --git a/cpu/lh7a40x/u-boot.lds b/arch/arm/cpu/arm946es/u-boot.lds
index e7543c97ce..fef21c7587 100644
--- a/cpu/lh7a40x/u-boot.lds
+++ b/arch/arm/cpu/arm946es/u-boot.lds
@@ -31,7 +31,7 @@ SECTIONS
 	. = ALIGN(4);
 	.text :
 	{
-		cpu/lh7a40x/start.o	(.text)
+		arch/arm/cpu/arm946es/start.o	(.text)
 		*(.text)
 	}
 
diff --git a/cpu/arm_cortexa8/Makefile b/arch/arm/cpu/arm_cortexa8/Makefile
index ae20299db7..ae20299db7 100644
--- a/cpu/arm_cortexa8/Makefile
+++ b/arch/arm/cpu/arm_cortexa8/Makefile
diff --git a/cpu/arm_cortexa8/config.mk b/arch/arm/cpu/arm_cortexa8/config.mk
index 49ac9c74ae..49ac9c74ae 100644
--- a/cpu/arm_cortexa8/config.mk
+++ b/arch/arm/cpu/arm_cortexa8/config.mk
diff --git a/cpu/arm_cortexa8/cpu.c b/arch/arm/cpu/arm_cortexa8/cpu.c
index a01e0d605f..a01e0d605f 100644
--- a/cpu/arm_cortexa8/cpu.c
+++ b/arch/arm/cpu/arm_cortexa8/cpu.c
diff --git a/cpu/arm_cortexa8/mx51/Makefile b/arch/arm/cpu/arm_cortexa8/mx51/Makefile
index 7cfaa2c130..7cfaa2c130 100644
--- a/cpu/arm_cortexa8/mx51/Makefile
+++ b/arch/arm/cpu/arm_cortexa8/mx51/Makefile
diff --git a/cpu/arm_cortexa8/mx51/clock.c b/arch/arm/cpu/arm_cortexa8/mx51/clock.c
index 38480ac5a1..38480ac5a1 100644
--- a/cpu/arm_cortexa8/mx51/clock.c
+++ b/arch/arm/cpu/arm_cortexa8/mx51/clock.c
diff --git a/cpu/arm_cortexa8/mx51/iomux.c b/arch/arm/cpu/arm_cortexa8/mx51/iomux.c
index 62b2954be9..62b2954be9 100644
--- a/cpu/arm_cortexa8/mx51/iomux.c
+++ b/arch/arm/cpu/arm_cortexa8/mx51/iomux.c
diff --git a/cpu/arm_cortexa8/mx51/lowlevel_init.S b/arch/arm/cpu/arm_cortexa8/mx51/lowlevel_init.S
index 31af9e2b58..783c81f72a 100644
--- a/cpu/arm_cortexa8/mx51/lowlevel_init.S
+++ b/arch/arm/cpu/arm_cortexa8/mx51/lowlevel_init.S
@@ -158,6 +158,7 @@
 	/* Switch peripheral to PLL 3 */
 	ldr r0, =CCM_BASE_ADDR
 	ldr r1, =0x000010C0
+	orr r1,r1,#CONFIG_SYS_DDR_CLKSEL
 	str r1, [r0, #CLKCTL_CBCMR]
 	ldr r1, =0x13239145
 	str r1, [r0, #CLKCTL_CBCDR]
@@ -171,6 +172,7 @@
 	ldr r1, =0x19239145
 	str r1, [r0, #CLKCTL_CBCDR]
 	ldr r1, =0x000020C0
+	orr r1,r1,#CONFIG_SYS_DDR_CLKSEL
 	str r1, [r0, #CLKCTL_CBCMR]
 
 	mov r3, #DP_OP_216
@@ -201,9 +203,10 @@
 	/* setup the rest */
 	/* Use lp_apm (24MHz) source for perclk */
 	ldr r1, =0x000020C2
+	orr r1,r1,#CONFIG_SYS_DDR_CLKSEL
 	str r1, [r0, #CLKCTL_CBCMR]
 	/* ddr clock from PLL 1, all perclk dividers are 1 since using 24MHz */
-	ldr r1, =0x59E35100
+	ldr r1, =CONFIG_SYS_CLKTL_CBCDR
 	str r1, [r0, #CLKCTL_CBCDR]
 
 	/* Restore the default values in the Gate registers */
diff --git a/cpu/arm_cortexa8/mx51/soc.c b/arch/arm/cpu/arm_cortexa8/mx51/soc.c
index 2a139b21d5..2a139b21d5 100644
--- a/cpu/arm_cortexa8/mx51/soc.c
+++ b/arch/arm/cpu/arm_cortexa8/mx51/soc.c
diff --git a/cpu/arm_cortexa8/mx51/speed.c b/arch/arm/cpu/arm_cortexa8/mx51/speed.c
index a444def7eb..a444def7eb 100644
--- a/cpu/arm_cortexa8/mx51/speed.c
+++ b/arch/arm/cpu/arm_cortexa8/mx51/speed.c
diff --git a/cpu/arm_cortexa8/mx51/timer.c b/arch/arm/cpu/arm_cortexa8/mx51/timer.c
index 8ecfec66da..8ecfec66da 100644
--- a/cpu/arm_cortexa8/mx51/timer.c
+++ b/arch/arm/cpu/arm_cortexa8/mx51/timer.c
diff --git a/cpu/arm_cortexa8/mx51/u-boot.lds b/arch/arm/cpu/arm_cortexa8/mx51/u-boot.lds
index 84c173ac71..2953b93632 100644
--- a/cpu/arm_cortexa8/mx51/u-boot.lds
+++ b/arch/arm/cpu/arm_cortexa8/mx51/u-boot.lds
@@ -36,7 +36,7 @@ SECTIONS
 	. = ALIGN(4);
 	.text	   :
 	{
-	  cpu/arm_cortexa8/start.o
+	  arch/arm/cpu/arm_cortexa8/start.o
 	  *(.text)
 	}
 
diff --git a/cpu/arm_cortexa8/omap3/Makefile b/arch/arm/cpu/arm_cortexa8/omap3/Makefile
index 136b163ad7..136b163ad7 100644
--- a/cpu/arm_cortexa8/omap3/Makefile
+++ b/arch/arm/cpu/arm_cortexa8/omap3/Makefile
diff --git a/cpu/arm_cortexa8/omap3/board.c b/arch/arm/cpu/arm_cortexa8/omap3/board.c
index 7b78fa448b..7b78fa448b 100644
--- a/cpu/arm_cortexa8/omap3/board.c
+++ b/arch/arm/cpu/arm_cortexa8/omap3/board.c
diff --git a/cpu/arm_cortexa8/omap3/cache.S b/arch/arm/cpu/arm_cortexa8/omap3/cache.S
index 0f63815359..0f63815359 100644
--- a/cpu/arm_cortexa8/omap3/cache.S
+++ b/arch/arm/cpu/arm_cortexa8/omap3/cache.S
diff --git a/cpu/arm_cortexa8/omap3/clock.c b/arch/arm/cpu/arm_cortexa8/omap3/clock.c
index 6330c9e5da..6330c9e5da 100644
--- a/cpu/arm_cortexa8/omap3/clock.c
+++ b/arch/arm/cpu/arm_cortexa8/omap3/clock.c
diff --git a/cpu/arm_cortexa8/omap3/gpio.c b/arch/arm/cpu/arm_cortexa8/omap3/gpio.c
index aeb6066d89..aeb6066d89 100644
--- a/cpu/arm_cortexa8/omap3/gpio.c
+++ b/arch/arm/cpu/arm_cortexa8/omap3/gpio.c
diff --git a/cpu/arm_cortexa8/omap3/lowlevel_init.S b/arch/arm/cpu/arm_cortexa8/omap3/lowlevel_init.S
index 73063ec8e6..73063ec8e6 100644
--- a/cpu/arm_cortexa8/omap3/lowlevel_init.S
+++ b/arch/arm/cpu/arm_cortexa8/omap3/lowlevel_init.S
diff --git a/cpu/arm_cortexa8/omap3/mem.c b/arch/arm/cpu/arm_cortexa8/omap3/mem.c
index dfb7e4c2ad..dfb7e4c2ad 100644
--- a/cpu/arm_cortexa8/omap3/mem.c
+++ b/arch/arm/cpu/arm_cortexa8/omap3/mem.c
diff --git a/cpu/arm_cortexa8/omap3/reset.S b/arch/arm/cpu/arm_cortexa8/omap3/reset.S
index a53c408195..a53c408195 100644
--- a/cpu/arm_cortexa8/omap3/reset.S
+++ b/arch/arm/cpu/arm_cortexa8/omap3/reset.S
diff --git a/cpu/arm_cortexa8/omap3/sys_info.c b/arch/arm/cpu/arm_cortexa8/omap3/sys_info.c
index 08fb32eaae..08fb32eaae 100644
--- a/cpu/arm_cortexa8/omap3/sys_info.c
+++ b/arch/arm/cpu/arm_cortexa8/omap3/sys_info.c
diff --git a/cpu/arm_cortexa8/omap3/syslib.c b/arch/arm/cpu/arm_cortexa8/omap3/syslib.c
index 9ced495c8d..9ced495c8d 100644
--- a/cpu/arm_cortexa8/omap3/syslib.c
+++ b/arch/arm/cpu/arm_cortexa8/omap3/syslib.c
diff --git a/cpu/arm_cortexa8/omap3/timer.c b/arch/arm/cpu/arm_cortexa8/omap3/timer.c
index 401bfe6d09..401bfe6d09 100644
--- a/cpu/arm_cortexa8/omap3/timer.c
+++ b/arch/arm/cpu/arm_cortexa8/omap3/timer.c
diff --git a/cpu/arm_cortexa8/s5pc1xx/Makefile b/arch/arm/cpu/arm_cortexa8/s5pc1xx/Makefile
index 3785593d25..3785593d25 100644
--- a/cpu/arm_cortexa8/s5pc1xx/Makefile
+++ b/arch/arm/cpu/arm_cortexa8/s5pc1xx/Makefile
diff --git a/cpu/arm_cortexa8/s5pc1xx/cache.S b/arch/arm/cpu/arm_cortexa8/s5pc1xx/cache.S
index 23f527a485..906118d820 100644
--- a/cpu/arm_cortexa8/s5pc1xx/cache.S
+++ b/arch/arm/cpu/arm_cortexa8/s5pc1xx/cache.S
@@ -2,7 +2,7 @@
  * Copyright (C) 2009 Samsung Electronics
  * Minkyu Kang <mk7.kang@samsung.com>
  *
- * based on cpu/arm_cortexa8/omap3/cache.S
+ * based on arch/arm/cpu/arm_cortexa8/omap3/cache.S
  *
  * See file CREDITS for list of people who contributed to this
  * project.
diff --git a/cpu/arm_cortexa8/s5pc1xx/clock.c b/arch/arm/cpu/arm_cortexa8/s5pc1xx/clock.c
index 19619f92cd..19619f92cd 100644
--- a/cpu/arm_cortexa8/s5pc1xx/clock.c
+++ b/arch/arm/cpu/arm_cortexa8/s5pc1xx/clock.c
diff --git a/cpu/arm_cortexa8/s5pc1xx/cpu_info.c b/arch/arm/cpu/arm_cortexa8/s5pc1xx/cpu_info.c
index f16c0ff130..f16c0ff130 100644
--- a/cpu/arm_cortexa8/s5pc1xx/cpu_info.c
+++ b/arch/arm/cpu/arm_cortexa8/s5pc1xx/cpu_info.c
diff --git a/cpu/arm_cortexa8/s5pc1xx/reset.S b/arch/arm/cpu/arm_cortexa8/s5pc1xx/reset.S
index 7f6ff9c35f..7f6ff9c35f 100644
--- a/cpu/arm_cortexa8/s5pc1xx/reset.S
+++ b/arch/arm/cpu/arm_cortexa8/s5pc1xx/reset.S
diff --git a/cpu/arm_cortexa8/s5pc1xx/sromc.c b/arch/arm/cpu/arm_cortexa8/s5pc1xx/sromc.c
index 380be81be5..380be81be5 100644
--- a/cpu/arm_cortexa8/s5pc1xx/sromc.c
+++ b/arch/arm/cpu/arm_cortexa8/s5pc1xx/sromc.c
diff --git a/cpu/arm_cortexa8/s5pc1xx/timer.c b/arch/arm/cpu/arm_cortexa8/s5pc1xx/timer.c
index c5df5c5ab5..c5df5c5ab5 100644
--- a/cpu/arm_cortexa8/s5pc1xx/timer.c
+++ b/arch/arm/cpu/arm_cortexa8/s5pc1xx/timer.c
diff --git a/cpu/arm_cortexa8/start.S b/arch/arm/cpu/arm_cortexa8/start.S
index 29dae2f282..29dae2f282 100644
--- a/cpu/arm_cortexa8/start.S
+++ b/arch/arm/cpu/arm_cortexa8/start.S
diff --git a/cpu/arm_cortexa8/u-boot.lds b/arch/arm/cpu/arm_cortexa8/u-boot.lds
index 4f1711cca0..820e3a1043 100644
--- a/cpu/arm_cortexa8/u-boot.lds
+++ b/arch/arm/cpu/arm_cortexa8/u-boot.lds
@@ -34,7 +34,7 @@ SECTIONS
 	. = ALIGN(4);
 	.text	:
 	{
-		cpu/arm_cortexa8/start.o	(.text)
+		arch/arm/cpu/arm_cortexa8/start.o	(.text)
 		*(.text)
 	}
 
diff --git a/cpu/arm_intcm/Makefile b/arch/arm/cpu/arm_intcm/Makefile
index 7701b03bbe..7701b03bbe 100644
--- a/cpu/arm_intcm/Makefile
+++ b/arch/arm/cpu/arm_intcm/Makefile
diff --git a/cpu/arm_intcm/config.mk b/arch/arm/cpu/arm_intcm/config.mk
index e783f697a1..e783f697a1 100644
--- a/cpu/arm_intcm/config.mk
+++ b/arch/arm/cpu/arm_intcm/config.mk
diff --git a/cpu/arm_intcm/cpu.c b/arch/arm/cpu/arm_intcm/cpu.c
index c0748e872e..c0748e872e 100644
--- a/cpu/arm_intcm/cpu.c
+++ b/arch/arm/cpu/arm_intcm/cpu.c
diff --git a/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S
index bb1f003592..bb1f003592 100644
--- a/cpu/arm_intcm/start.S
+++ b/arch/arm/cpu/arm_intcm/start.S
diff --git a/cpu/arm946es/u-boot.lds b/arch/arm/cpu/arm_intcm/u-boot.lds
index 5bd4390fb5..4ed7d8906d 100644
--- a/cpu/arm946es/u-boot.lds
+++ b/arch/arm/cpu/arm_intcm/u-boot.lds
@@ -31,7 +31,7 @@ SECTIONS
 	. = ALIGN(4);
 	.text :
 	{
-		cpu/arm946es/start.o	(.text)
+		arch/arm/cpu/arm_intcm/start.o	(.text)
 		*(.text)
 	}
 
diff --git a/cpu/ixp/Makefile b/arch/arm/cpu/ixp/Makefile
index 1403c4f390..1403c4f390 100644
--- a/cpu/ixp/Makefile
+++ b/arch/arm/cpu/ixp/Makefile
diff --git a/cpu/ixp/config.mk b/arch/arm/cpu/ixp/config.mk
index deca3f4d55..deca3f4d55 100644
--- a/cpu/ixp/config.mk
+++ b/arch/arm/cpu/ixp/config.mk
diff --git a/cpu/ixp/cpu.c b/arch/arm/cpu/ixp/cpu.c
index ce275e5f3c..ce275e5f3c 100644
--- a/cpu/ixp/cpu.c
+++ b/arch/arm/cpu/ixp/cpu.c
diff --git a/cpu/ixp/interrupts.c b/arch/arm/cpu/ixp/interrupts.c
index 06a826af63..06a826af63 100644
--- a/cpu/ixp/interrupts.c
+++ b/arch/arm/cpu/ixp/interrupts.c
diff --git a/cpu/ixp/npe/IxEthAcc.c b/arch/arm/cpu/ixp/npe/IxEthAcc.c
index 061b24bb50..061b24bb50 100644
--- a/cpu/ixp/npe/IxEthAcc.c
+++ b/arch/arm/cpu/ixp/npe/IxEthAcc.c
diff --git a/cpu/ixp/npe/IxEthAccCommon.c b/arch/arm/cpu/ixp/npe/IxEthAccCommon.c
index 211203dffd..211203dffd 100644
--- a/cpu/ixp/npe/IxEthAccCommon.c
+++ b/arch/arm/cpu/ixp/npe/IxEthAccCommon.c
diff --git a/cpu/ixp/npe/IxEthAccControlInterface.c b/arch/arm/cpu/ixp/npe/IxEthAccControlInterface.c
index 44328473e6..44328473e6 100644
--- a/cpu/ixp/npe/IxEthAccControlInterface.c
+++ b/arch/arm/cpu/ixp/npe/IxEthAccControlInterface.c
diff --git a/cpu/ixp/npe/IxEthAccDataPlane.c b/arch/arm/cpu/ixp/npe/IxEthAccDataPlane.c
index b62f0d016e..b62f0d016e 100644
--- a/cpu/ixp/npe/IxEthAccDataPlane.c
+++ b/arch/arm/cpu/ixp/npe/IxEthAccDataPlane.c
diff --git a/cpu/ixp/npe/IxEthAccMac.c b/arch/arm/cpu/ixp/npe/IxEthAccMac.c
index 369ee91d94..369ee91d94 100644
--- a/cpu/ixp/npe/IxEthAccMac.c
+++ b/arch/arm/cpu/ixp/npe/IxEthAccMac.c
diff --git a/cpu/ixp/npe/IxEthAccMii.c b/arch/arm/cpu/ixp/npe/IxEthAccMii.c
index d282aa6725..d282aa6725 100644
--- a/cpu/ixp/npe/IxEthAccMii.c
+++ b/arch/arm/cpu/ixp/npe/IxEthAccMii.c
diff --git a/cpu/ixp/npe/IxEthDBAPI.c b/arch/arm/cpu/ixp/npe/IxEthDBAPI.c
index b2bfb72606..b2bfb72606 100644
--- a/cpu/ixp/npe/IxEthDBAPI.c
+++ b/arch/arm/cpu/ixp/npe/IxEthDBAPI.c
diff --git a/cpu/ixp/npe/IxEthDBAPISupport.c b/arch/arm/cpu/ixp/npe/IxEthDBAPISupport.c
index 25633a3d56..25633a3d56 100644
--- a/cpu/ixp/npe/IxEthDBAPISupport.c
+++ b/arch/arm/cpu/ixp/npe/IxEthDBAPISupport.c
diff --git a/cpu/ixp/npe/IxEthDBCore.c b/arch/arm/cpu/ixp/npe/IxEthDBCore.c
index 25b7cbb8b8..25b7cbb8b8 100644
--- a/cpu/ixp/npe/IxEthDBCore.c
+++ b/arch/arm/cpu/ixp/npe/IxEthDBCore.c
diff --git a/cpu/ixp/npe/IxEthDBEvents.c b/arch/arm/cpu/ixp/npe/IxEthDBEvents.c
index 4d44e03337..4d44e03337 100644
--- a/cpu/ixp/npe/IxEthDBEvents.c
+++ b/arch/arm/cpu/ixp/npe/IxEthDBEvents.c
diff --git a/cpu/ixp/npe/IxEthDBFeatures.c b/arch/arm/cpu/ixp/npe/IxEthDBFeatures.c
index 7a58d268ca..7a58d268ca 100644
--- a/cpu/ixp/npe/IxEthDBFeatures.c
+++ b/arch/arm/cpu/ixp/npe/IxEthDBFeatures.c
diff --git a/cpu/ixp/npe/IxEthDBFirewall.c b/arch/arm/cpu/ixp/npe/IxEthDBFirewall.c
index eb46174b6c..eb46174b6c 100644
--- a/cpu/ixp/npe/IxEthDBFirewall.c
+++ b/arch/arm/cpu/ixp/npe/IxEthDBFirewall.c
diff --git a/cpu/ixp/npe/IxEthDBHashtable.c b/arch/arm/cpu/ixp/npe/IxEthDBHashtable.c
index f1b18e6b48..f1b18e6b48 100644
--- a/cpu/ixp/npe/IxEthDBHashtable.c
+++ b/arch/arm/cpu/ixp/npe/IxEthDBHashtable.c
diff --git a/cpu/ixp/npe/IxEthDBLearning.c b/arch/arm/cpu/ixp/npe/IxEthDBLearning.c
index 2287dbe96c..2287dbe96c 100644
--- a/cpu/ixp/npe/IxEthDBLearning.c
+++ b/arch/arm/cpu/ixp/npe/IxEthDBLearning.c
diff --git a/cpu/ixp/npe/IxEthDBMem.c b/arch/arm/cpu/ixp/npe/IxEthDBMem.c
index 133cbef8d6..133cbef8d6 100644
--- a/cpu/ixp/npe/IxEthDBMem.c
+++ b/arch/arm/cpu/ixp/npe/IxEthDBMem.c
diff --git a/cpu/ixp/npe/IxEthDBNPEAdaptor.c b/arch/arm/cpu/ixp/npe/IxEthDBNPEAdaptor.c
index 112a46c998..112a46c998 100644
--- a/cpu/ixp/npe/IxEthDBNPEAdaptor.c
+++ b/arch/arm/cpu/ixp/npe/IxEthDBNPEAdaptor.c
diff --git a/cpu/ixp/npe/IxEthDBPortUpdate.c b/arch/arm/cpu/ixp/npe/IxEthDBPortUpdate.c
index cdf114bfc4..cdf114bfc4 100644
--- a/cpu/ixp/npe/IxEthDBPortUpdate.c
+++ b/arch/arm/cpu/ixp/npe/IxEthDBPortUpdate.c
diff --git a/cpu/ixp/npe/IxEthDBReports.c b/arch/arm/cpu/ixp/npe/IxEthDBReports.c
index 9c7ae1cc6a..9c7ae1cc6a 100644
--- a/cpu/ixp/npe/IxEthDBReports.c
+++ b/arch/arm/cpu/ixp/npe/IxEthDBReports.c
diff --git a/cpu/ixp/npe/IxEthDBSearch.c b/arch/arm/cpu/ixp/npe/IxEthDBSearch.c
index 4a10878b68..4a10878b68 100644
--- a/cpu/ixp/npe/IxEthDBSearch.c
+++ b/arch/arm/cpu/ixp/npe/IxEthDBSearch.c
diff --git a/cpu/ixp/npe/IxEthDBSpanningTree.c b/arch/arm/cpu/ixp/npe/IxEthDBSpanningTree.c
index 6d9fd6ec18..6d9fd6ec18 100644
--- a/cpu/ixp/npe/IxEthDBSpanningTree.c
+++ b/arch/arm/cpu/ixp/npe/IxEthDBSpanningTree.c
diff --git a/cpu/ixp/npe/IxEthDBUtil.c b/arch/arm/cpu/ixp/npe/IxEthDBUtil.c
index e708bf1bce..e708bf1bce 100644
--- a/cpu/ixp/npe/IxEthDBUtil.c
+++ b/arch/arm/cpu/ixp/npe/IxEthDBUtil.c
diff --git a/cpu/ixp/npe/IxEthDBVlan.c b/arch/arm/cpu/ixp/npe/IxEthDBVlan.c
index e2efb9b339..e2efb9b339 100644
--- a/cpu/ixp/npe/IxEthDBVlan.c
+++ b/arch/arm/cpu/ixp/npe/IxEthDBVlan.c
diff --git a/cpu/ixp/npe/IxEthDBWiFi.c b/arch/arm/cpu/ixp/npe/IxEthDBWiFi.c
index 0a6043f364..0a6043f364 100644
--- a/cpu/ixp/npe/IxEthDBWiFi.c
+++ b/arch/arm/cpu/ixp/npe/IxEthDBWiFi.c
diff --git a/cpu/ixp/npe/IxEthMii.c b/arch/arm/cpu/ixp/npe/IxEthMii.c
index 4d92f17eef..4d92f17eef 100644
--- a/cpu/ixp/npe/IxEthMii.c
+++ b/arch/arm/cpu/ixp/npe/IxEthMii.c
diff --git a/cpu/ixp/npe/IxFeatureCtrl.c b/arch/arm/cpu/ixp/npe/IxFeatureCtrl.c
index 2e196a19aa..2e196a19aa 100644
--- a/cpu/ixp/npe/IxFeatureCtrl.c
+++ b/arch/arm/cpu/ixp/npe/IxFeatureCtrl.c
diff --git a/cpu/ixp/npe/IxNpeDl.c b/arch/arm/cpu/ixp/npe/IxNpeDl.c
index 3738337538..3738337538 100644
--- a/cpu/ixp/npe/IxNpeDl.c
+++ b/arch/arm/cpu/ixp/npe/IxNpeDl.c
diff --git a/cpu/ixp/npe/IxNpeDlImageMgr.c b/arch/arm/cpu/ixp/npe/IxNpeDlImageMgr.c
index 9bcdc9c0d8..9bcdc9c0d8 100644
--- a/cpu/ixp/npe/IxNpeDlImageMgr.c
+++ b/arch/arm/cpu/ixp/npe/IxNpeDlImageMgr.c
diff --git a/cpu/ixp/npe/IxNpeDlNpeMgr.c b/arch/arm/cpu/ixp/npe/IxNpeDlNpeMgr.c
index f5a4c5f508..f5a4c5f508 100644
--- a/cpu/ixp/npe/IxNpeDlNpeMgr.c
+++ b/arch/arm/cpu/ixp/npe/IxNpeDlNpeMgr.c
diff --git a/cpu/ixp/npe/IxNpeDlNpeMgrUtils.c b/arch/arm/cpu/ixp/npe/IxNpeDlNpeMgrUtils.c
index 18cac50208..18cac50208 100644
--- a/cpu/ixp/npe/IxNpeDlNpeMgrUtils.c
+++ b/arch/arm/cpu/ixp/npe/IxNpeDlNpeMgrUtils.c
diff --git a/cpu/ixp/npe/IxNpeMh.c b/arch/arm/cpu/ixp/npe/IxNpeMh.c
index 8703def8bc..8703def8bc 100644
--- a/cpu/ixp/npe/IxNpeMh.c
+++ b/arch/arm/cpu/ixp/npe/IxNpeMh.c
diff --git a/cpu/ixp/npe/IxNpeMhConfig.c b/arch/arm/cpu/ixp/npe/IxNpeMhConfig.c
index 50c8f21138..50c8f21138 100644
--- a/cpu/ixp/npe/IxNpeMhConfig.c
+++ b/arch/arm/cpu/ixp/npe/IxNpeMhConfig.c
diff --git a/cpu/ixp/npe/IxNpeMhReceive.c b/arch/arm/cpu/ixp/npe/IxNpeMhReceive.c
index 57c8be30e5..57c8be30e5 100644
--- a/cpu/ixp/npe/IxNpeMhReceive.c
+++ b/arch/arm/cpu/ixp/npe/IxNpeMhReceive.c
diff --git a/cpu/ixp/npe/IxNpeMhSend.c b/arch/arm/cpu/ixp/npe/IxNpeMhSend.c
index 318913ac84..318913ac84 100644
--- a/cpu/ixp/npe/IxNpeMhSend.c
+++ b/arch/arm/cpu/ixp/npe/IxNpeMhSend.c
diff --git a/cpu/ixp/npe/IxNpeMhSolicitedCbMgr.c b/arch/arm/cpu/ixp/npe/IxNpeMhSolicitedCbMgr.c
index 8e083a63bf..8e083a63bf 100644
--- a/cpu/ixp/npe/IxNpeMhSolicitedCbMgr.c
+++ b/arch/arm/cpu/ixp/npe/IxNpeMhSolicitedCbMgr.c
diff --git a/cpu/ixp/npe/IxNpeMhUnsolicitedCbMgr.c b/arch/arm/cpu/ixp/npe/IxNpeMhUnsolicitedCbMgr.c
index d37f9f9306..d37f9f9306 100644
--- a/cpu/ixp/npe/IxNpeMhUnsolicitedCbMgr.c
+++ b/arch/arm/cpu/ixp/npe/IxNpeMhUnsolicitedCbMgr.c
diff --git a/cpu/ixp/npe/IxOsalBufferMgt.c b/arch/arm/cpu/ixp/npe/IxOsalBufferMgt.c
index fa8db477af..fa8db477af 100644
--- a/cpu/ixp/npe/IxOsalBufferMgt.c
+++ b/arch/arm/cpu/ixp/npe/IxOsalBufferMgt.c
diff --git a/cpu/ixp/npe/IxOsalIoMem.c b/arch/arm/cpu/ixp/npe/IxOsalIoMem.c
index 34df92bf79..34df92bf79 100644
--- a/cpu/ixp/npe/IxOsalIoMem.c
+++ b/arch/arm/cpu/ixp/npe/IxOsalIoMem.c
diff --git a/cpu/ixp/npe/IxOsalOsCacheMMU.c b/arch/arm/cpu/ixp/npe/IxOsalOsCacheMMU.c
index 3db1a70da9..3db1a70da9 100644
--- a/cpu/ixp/npe/IxOsalOsCacheMMU.c
+++ b/arch/arm/cpu/ixp/npe/IxOsalOsCacheMMU.c
diff --git a/cpu/ixp/npe/IxOsalOsMsgQ.c b/arch/arm/cpu/ixp/npe/IxOsalOsMsgQ.c
index 45a5c68b16..45a5c68b16 100644
--- a/cpu/ixp/npe/IxOsalOsMsgQ.c
+++ b/arch/arm/cpu/ixp/npe/IxOsalOsMsgQ.c
diff --git a/cpu/ixp/npe/IxOsalOsSemaphore.c b/arch/arm/cpu/ixp/npe/IxOsalOsSemaphore.c
index 443aefd4fc..443aefd4fc 100644
--- a/cpu/ixp/npe/IxOsalOsSemaphore.c
+++ b/arch/arm/cpu/ixp/npe/IxOsalOsSemaphore.c
diff --git a/cpu/ixp/npe/IxOsalOsServices.c b/arch/arm/cpu/ixp/npe/IxOsalOsServices.c
index e18c6c4c1e..e18c6c4c1e 100644
--- a/cpu/ixp/npe/IxOsalOsServices.c
+++ b/arch/arm/cpu/ixp/npe/IxOsalOsServices.c
diff --git a/cpu/ixp/npe/IxOsalOsThread.c b/arch/arm/cpu/ixp/npe/IxOsalOsThread.c
index e6a4967fcd..e6a4967fcd 100644
--- a/cpu/ixp/npe/IxOsalOsThread.c
+++ b/arch/arm/cpu/ixp/npe/IxOsalOsThread.c
diff --git a/cpu/ixp/npe/IxQMgrAqmIf.c b/arch/arm/cpu/ixp/npe/IxQMgrAqmIf.c
index 738651322c..738651322c 100644
--- a/cpu/ixp/npe/IxQMgrAqmIf.c
+++ b/arch/arm/cpu/ixp/npe/IxQMgrAqmIf.c
diff --git a/cpu/ixp/npe/IxQMgrDispatcher.c b/arch/arm/cpu/ixp/npe/IxQMgrDispatcher.c
index 09f69ce322..09f69ce322 100644
--- a/cpu/ixp/npe/IxQMgrDispatcher.c
+++ b/arch/arm/cpu/ixp/npe/IxQMgrDispatcher.c
diff --git a/cpu/ixp/npe/IxQMgrInit.c b/arch/arm/cpu/ixp/npe/IxQMgrInit.c
index b00c22d08e..b00c22d08e 100644
--- a/cpu/ixp/npe/IxQMgrInit.c
+++ b/arch/arm/cpu/ixp/npe/IxQMgrInit.c
diff --git a/cpu/ixp/npe/IxQMgrQAccess.c b/arch/arm/cpu/ixp/npe/IxQMgrQAccess.c
index 8885736246..8885736246 100644
--- a/cpu/ixp/npe/IxQMgrQAccess.c
+++ b/arch/arm/cpu/ixp/npe/IxQMgrQAccess.c
diff --git a/cpu/ixp/npe/IxQMgrQCfg.c b/arch/arm/cpu/ixp/npe/IxQMgrQCfg.c
index ec7d837c38..ec7d837c38 100644
--- a/cpu/ixp/npe/IxQMgrQCfg.c
+++ b/arch/arm/cpu/ixp/npe/IxQMgrQCfg.c
diff --git a/cpu/ixp/npe/Makefile b/arch/arm/cpu/ixp/npe/Makefile
index 8fefd29eb5..e1f970062d 100644
--- a/cpu/ixp/npe/Makefile
+++ b/arch/arm/cpu/ixp/npe/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB := $(obj)libnpe.a
 
-LOCAL_CFLAGS  += -I$(TOPDIR)/cpu/ixp/npe/include -DCONFIG_IXP425_COMPONENT_ETHDB -D__linux
+LOCAL_CFLAGS  += -I$(TOPDIR)/arch/arm/cpu/ixp/npe/include -DCONFIG_IXP425_COMPONENT_ETHDB -D__linux
 CFLAGS  += $(LOCAL_CFLAGS)
 HOSTCFLAGS  += $(LOCAL_CFLAGS)
 
diff --git a/cpu/ixp/npe/include/IxAssert.h b/arch/arm/cpu/ixp/npe/include/IxAssert.h
index eae8b3f273..eae8b3f273 100644
--- a/cpu/ixp/npe/include/IxAssert.h
+++ b/arch/arm/cpu/ixp/npe/include/IxAssert.h
diff --git a/cpu/ixp/npe/include/IxAtmSch.h b/arch/arm/cpu/ixp/npe/include/IxAtmSch.h
index 73c3be29ab..73c3be29ab 100644
--- a/cpu/ixp/npe/include/IxAtmSch.h
+++ b/arch/arm/cpu/ixp/npe/include/IxAtmSch.h
diff --git a/cpu/ixp/npe/include/IxAtmTypes.h b/arch/arm/cpu/ixp/npe/include/IxAtmTypes.h
index 8624c3328e..8624c3328e 100644
--- a/cpu/ixp/npe/include/IxAtmTypes.h
+++ b/arch/arm/cpu/ixp/npe/include/IxAtmTypes.h
diff --git a/cpu/ixp/npe/include/IxAtmdAcc.h b/arch/arm/cpu/ixp/npe/include/IxAtmdAcc.h
index ae7b2434c3..ae7b2434c3 100644
--- a/cpu/ixp/npe/include/IxAtmdAcc.h
+++ b/arch/arm/cpu/ixp/npe/include/IxAtmdAcc.h
diff --git a/cpu/ixp/npe/include/IxAtmdAccCtrl.h b/arch/arm/cpu/ixp/npe/include/IxAtmdAccCtrl.h
index e2230493f2..e2230493f2 100644
--- a/cpu/ixp/npe/include/IxAtmdAccCtrl.h
+++ b/arch/arm/cpu/ixp/npe/include/IxAtmdAccCtrl.h
diff --git a/cpu/ixp/npe/include/IxAtmm.h b/arch/arm/cpu/ixp/npe/include/IxAtmm.h
index fcf523fca4..fcf523fca4 100644
--- a/cpu/ixp/npe/include/IxAtmm.h
+++ b/arch/arm/cpu/ixp/npe/include/IxAtmm.h
diff --git a/cpu/ixp/npe/include/IxDmaAcc.h b/arch/arm/cpu/ixp/npe/include/IxDmaAcc.h
index 45c7527de9..45c7527de9 100644
--- a/cpu/ixp/npe/include/IxDmaAcc.h
+++ b/arch/arm/cpu/ixp/npe/include/IxDmaAcc.h
diff --git a/cpu/ixp/npe/include/IxEthAcc.h b/arch/arm/cpu/ixp/npe/include/IxEthAcc.h
index ff706c451d..ff706c451d 100644
--- a/cpu/ixp/npe/include/IxEthAcc.h
+++ b/arch/arm/cpu/ixp/npe/include/IxEthAcc.h
diff --git a/cpu/ixp/npe/include/IxEthAccDataPlane_p.h b/arch/arm/cpu/ixp/npe/include/IxEthAccDataPlane_p.h
index 8b8e6b256c..8b8e6b256c 100644
--- a/cpu/ixp/npe/include/IxEthAccDataPlane_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxEthAccDataPlane_p.h
diff --git a/cpu/ixp/npe/include/IxEthAccMac_p.h b/arch/arm/cpu/ixp/npe/include/IxEthAccMac_p.h
index 93e9d98e76..93e9d98e76 100644
--- a/cpu/ixp/npe/include/IxEthAccMac_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxEthAccMac_p.h
diff --git a/cpu/ixp/npe/include/IxEthAccMii_p.h b/arch/arm/cpu/ixp/npe/include/IxEthAccMii_p.h
index 568d4a0fa4..568d4a0fa4 100644
--- a/cpu/ixp/npe/include/IxEthAccMii_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxEthAccMii_p.h
diff --git a/cpu/ixp/npe/include/IxEthAccQueueAssign_p.h b/arch/arm/cpu/ixp/npe/include/IxEthAccQueueAssign_p.h
index e5fd16e2fb..e5fd16e2fb 100644
--- a/cpu/ixp/npe/include/IxEthAccQueueAssign_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxEthAccQueueAssign_p.h
diff --git a/cpu/ixp/npe/include/IxEthAcc_p.h b/arch/arm/cpu/ixp/npe/include/IxEthAcc_p.h
index 0ee4123557..0ee4123557 100644
--- a/cpu/ixp/npe/include/IxEthAcc_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxEthAcc_p.h
diff --git a/cpu/ixp/npe/include/IxEthDB.h b/arch/arm/cpu/ixp/npe/include/IxEthDB.h
index 1189c9a140..1189c9a140 100644
--- a/cpu/ixp/npe/include/IxEthDB.h
+++ b/arch/arm/cpu/ixp/npe/include/IxEthDB.h
diff --git a/cpu/ixp/npe/include/IxEthDBLocks_p.h b/arch/arm/cpu/ixp/npe/include/IxEthDBLocks_p.h
index 1d8b24fdf6..1d8b24fdf6 100644
--- a/cpu/ixp/npe/include/IxEthDBLocks_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxEthDBLocks_p.h
diff --git a/cpu/ixp/npe/include/IxEthDBLog_p.h b/arch/arm/cpu/ixp/npe/include/IxEthDBLog_p.h
index 1d6b0bb20d..1d6b0bb20d 100644
--- a/cpu/ixp/npe/include/IxEthDBLog_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxEthDBLog_p.h
diff --git a/cpu/ixp/npe/include/IxEthDBMessages_p.h b/arch/arm/cpu/ixp/npe/include/IxEthDBMessages_p.h
index ff18160c1f..ff18160c1f 100644
--- a/cpu/ixp/npe/include/IxEthDBMessages_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxEthDBMessages_p.h
diff --git a/cpu/ixp/npe/include/IxEthDBPortDefs.h b/arch/arm/cpu/ixp/npe/include/IxEthDBPortDefs.h
index c3acbdddef..c3acbdddef 100644
--- a/cpu/ixp/npe/include/IxEthDBPortDefs.h
+++ b/arch/arm/cpu/ixp/npe/include/IxEthDBPortDefs.h
diff --git a/cpu/ixp/npe/include/IxEthDBQoS.h b/arch/arm/cpu/ixp/npe/include/IxEthDBQoS.h
index 6d34889452..6d34889452 100644
--- a/cpu/ixp/npe/include/IxEthDBQoS.h
+++ b/arch/arm/cpu/ixp/npe/include/IxEthDBQoS.h
diff --git a/cpu/ixp/npe/include/IxEthDB_p.h b/arch/arm/cpu/ixp/npe/include/IxEthDB_p.h
index ccec7ea7be..ccec7ea7be 100644
--- a/cpu/ixp/npe/include/IxEthDB_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxEthDB_p.h
diff --git a/cpu/ixp/npe/include/IxEthMii.h b/arch/arm/cpu/ixp/npe/include/IxEthMii.h
index 397253a947..397253a947 100644
--- a/cpu/ixp/npe/include/IxEthMii.h
+++ b/arch/arm/cpu/ixp/npe/include/IxEthMii.h
diff --git a/cpu/ixp/npe/include/IxEthMii_p.h b/arch/arm/cpu/ixp/npe/include/IxEthMii_p.h
index 104b65c1f0..104b65c1f0 100644
--- a/cpu/ixp/npe/include/IxEthMii_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxEthMii_p.h
diff --git a/cpu/ixp/npe/include/IxEthNpe.h b/arch/arm/cpu/ixp/npe/include/IxEthNpe.h
index 21bdedc5a7..21bdedc5a7 100644
--- a/cpu/ixp/npe/include/IxEthNpe.h
+++ b/arch/arm/cpu/ixp/npe/include/IxEthNpe.h
diff --git a/cpu/ixp/npe/include/IxFeatureCtrl.h b/arch/arm/cpu/ixp/npe/include/IxFeatureCtrl.h
index dabc38e25e..dabc38e25e 100644
--- a/cpu/ixp/npe/include/IxFeatureCtrl.h
+++ b/arch/arm/cpu/ixp/npe/include/IxFeatureCtrl.h
diff --git a/cpu/ixp/npe/include/IxHssAcc.h b/arch/arm/cpu/ixp/npe/include/IxHssAcc.h
index 07bb119b0b..07bb119b0b 100644
--- a/cpu/ixp/npe/include/IxHssAcc.h
+++ b/arch/arm/cpu/ixp/npe/include/IxHssAcc.h
diff --git a/cpu/ixp/npe/include/IxI2cDrv.h b/arch/arm/cpu/ixp/npe/include/IxI2cDrv.h
index 92c6b24b46..92c6b24b46 100644
--- a/cpu/ixp/npe/include/IxI2cDrv.h
+++ b/arch/arm/cpu/ixp/npe/include/IxI2cDrv.h
diff --git a/cpu/ixp/npe/include/IxNpeA.h b/arch/arm/cpu/ixp/npe/include/IxNpeA.h
index 7427cc41c8..7427cc41c8 100644
--- a/cpu/ixp/npe/include/IxNpeA.h
+++ b/arch/arm/cpu/ixp/npe/include/IxNpeA.h
diff --git a/cpu/ixp/npe/include/IxNpeDl.h b/arch/arm/cpu/ixp/npe/include/IxNpeDl.h
index 86f69f4144..86f69f4144 100644
--- a/cpu/ixp/npe/include/IxNpeDl.h
+++ b/arch/arm/cpu/ixp/npe/include/IxNpeDl.h
diff --git a/cpu/ixp/npe/include/IxNpeDlImageMgr_p.h b/arch/arm/cpu/ixp/npe/include/IxNpeDlImageMgr_p.h
index 622f879a41..622f879a41 100644
--- a/cpu/ixp/npe/include/IxNpeDlImageMgr_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxNpeDlImageMgr_p.h
diff --git a/cpu/ixp/npe/include/IxNpeDlMacros_p.h b/arch/arm/cpu/ixp/npe/include/IxNpeDlMacros_p.h
index e32906a63a..e32906a63a 100644
--- a/cpu/ixp/npe/include/IxNpeDlMacros_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxNpeDlMacros_p.h
diff --git a/cpu/ixp/npe/include/IxNpeDlNpeMgrEcRegisters_p.h b/arch/arm/cpu/ixp/npe/include/IxNpeDlNpeMgrEcRegisters_p.h
index f682126677..f682126677 100644
--- a/cpu/ixp/npe/include/IxNpeDlNpeMgrEcRegisters_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxNpeDlNpeMgrEcRegisters_p.h
diff --git a/cpu/ixp/npe/include/IxNpeDlNpeMgrUtils_p.h b/arch/arm/cpu/ixp/npe/include/IxNpeDlNpeMgrUtils_p.h
index a752f26e88..a752f26e88 100644
--- a/cpu/ixp/npe/include/IxNpeDlNpeMgrUtils_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxNpeDlNpeMgrUtils_p.h
diff --git a/cpu/ixp/npe/include/IxNpeDlNpeMgr_p.h b/arch/arm/cpu/ixp/npe/include/IxNpeDlNpeMgr_p.h
index b7fb0f0217..b7fb0f0217 100644
--- a/cpu/ixp/npe/include/IxNpeDlNpeMgr_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxNpeDlNpeMgr_p.h
diff --git a/cpu/ixp/npe/include/IxNpeMh.h b/arch/arm/cpu/ixp/npe/include/IxNpeMh.h
index 20ee38b062..20ee38b062 100644
--- a/cpu/ixp/npe/include/IxNpeMh.h
+++ b/arch/arm/cpu/ixp/npe/include/IxNpeMh.h
diff --git a/cpu/ixp/npe/include/IxNpeMhConfig_p.h b/arch/arm/cpu/ixp/npe/include/IxNpeMhConfig_p.h
index 375b3468e6..375b3468e6 100644
--- a/cpu/ixp/npe/include/IxNpeMhConfig_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxNpeMhConfig_p.h
diff --git a/cpu/ixp/npe/include/IxNpeMhMacros_p.h b/arch/arm/cpu/ixp/npe/include/IxNpeMhMacros_p.h
index 68f34ef357..68f34ef357 100644
--- a/cpu/ixp/npe/include/IxNpeMhMacros_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxNpeMhMacros_p.h
diff --git a/cpu/ixp/npe/include/IxNpeMhReceive_p.h b/arch/arm/cpu/ixp/npe/include/IxNpeMhReceive_p.h
index 6416bedcbc..6416bedcbc 100644
--- a/cpu/ixp/npe/include/IxNpeMhReceive_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxNpeMhReceive_p.h
diff --git a/cpu/ixp/npe/include/IxNpeMhSend_p.h b/arch/arm/cpu/ixp/npe/include/IxNpeMhSend_p.h
index 977cc94a7f..977cc94a7f 100644
--- a/cpu/ixp/npe/include/IxNpeMhSend_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxNpeMhSend_p.h
diff --git a/cpu/ixp/npe/include/IxNpeMhSolicitedCbMgr_p.h b/arch/arm/cpu/ixp/npe/include/IxNpeMhSolicitedCbMgr_p.h
index 40cd496c94..40cd496c94 100644
--- a/cpu/ixp/npe/include/IxNpeMhSolicitedCbMgr_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxNpeMhSolicitedCbMgr_p.h
diff --git a/cpu/ixp/npe/include/IxNpeMhUnsolicitedCbMgr_p.h b/arch/arm/cpu/ixp/npe/include/IxNpeMhUnsolicitedCbMgr_p.h
index dea8cafa25..dea8cafa25 100644
--- a/cpu/ixp/npe/include/IxNpeMhUnsolicitedCbMgr_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxNpeMhUnsolicitedCbMgr_p.h
diff --git a/cpu/ixp/npe/include/IxNpeMicrocode.h b/arch/arm/cpu/ixp/npe/include/IxNpeMicrocode.h
index 893d8030a1..893d8030a1 100644
--- a/cpu/ixp/npe/include/IxNpeMicrocode.h
+++ b/arch/arm/cpu/ixp/npe/include/IxNpeMicrocode.h
diff --git a/cpu/ixp/npe/include/IxOsBufLib.h b/arch/arm/cpu/ixp/npe/include/IxOsBufLib.h
index a297a97d8b..a297a97d8b 100644
--- a/cpu/ixp/npe/include/IxOsBufLib.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsBufLib.h
diff --git a/cpu/ixp/npe/include/IxOsBuffMgt.h b/arch/arm/cpu/ixp/npe/include/IxOsBuffMgt.h
index b7de712bc5..b7de712bc5 100644
--- a/cpu/ixp/npe/include/IxOsBuffMgt.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsBuffMgt.h
diff --git a/cpu/ixp/npe/include/IxOsBuffPoolMgt.h b/arch/arm/cpu/ixp/npe/include/IxOsBuffPoolMgt.h
index 4a983c7911..4a983c7911 100644
--- a/cpu/ixp/npe/include/IxOsBuffPoolMgt.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsBuffPoolMgt.h
diff --git a/cpu/ixp/npe/include/IxOsCacheMMU.h b/arch/arm/cpu/ixp/npe/include/IxOsCacheMMU.h
index 2c8592fe80..2c8592fe80 100644
--- a/cpu/ixp/npe/include/IxOsCacheMMU.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsCacheMMU.h
diff --git a/cpu/ixp/npe/include/IxOsPrintf.h b/arch/arm/cpu/ixp/npe/include/IxOsPrintf.h
index 218e140934..218e140934 100644
--- a/cpu/ixp/npe/include/IxOsPrintf.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsPrintf.h
diff --git a/cpu/ixp/npe/include/IxOsServices.h b/arch/arm/cpu/ixp/npe/include/IxOsServices.h
index 62e8a790b9..62e8a790b9 100644
--- a/cpu/ixp/npe/include/IxOsServices.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsServices.h
diff --git a/cpu/ixp/npe/include/IxOsServicesComponents.h b/arch/arm/cpu/ixp/npe/include/IxOsServicesComponents.h
index d662cd3eee..d662cd3eee 100644
--- a/cpu/ixp/npe/include/IxOsServicesComponents.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsServicesComponents.h
diff --git a/cpu/ixp/npe/include/IxOsServicesEndianess.h b/arch/arm/cpu/ixp/npe/include/IxOsServicesEndianess.h
index 0d6cd8ccef..0d6cd8ccef 100644
--- a/cpu/ixp/npe/include/IxOsServicesEndianess.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsServicesEndianess.h
diff --git a/cpu/ixp/npe/include/IxOsServicesMemAccess.h b/arch/arm/cpu/ixp/npe/include/IxOsServicesMemAccess.h
index 58e9941065..58e9941065 100644
--- a/cpu/ixp/npe/include/IxOsServicesMemAccess.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsServicesMemAccess.h
diff --git a/cpu/ixp/npe/include/IxOsServicesMemMap.h b/arch/arm/cpu/ixp/npe/include/IxOsServicesMemMap.h
index 4ce37c3f67..4ce37c3f67 100644
--- a/cpu/ixp/npe/include/IxOsServicesMemMap.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsServicesMemMap.h
diff --git a/cpu/ixp/npe/include/IxOsal.h b/arch/arm/cpu/ixp/npe/include/IxOsal.h
index b2a93a5dba..b2a93a5dba 100644
--- a/cpu/ixp/npe/include/IxOsal.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsal.h
diff --git a/cpu/ixp/npe/include/IxOsalAssert.h b/arch/arm/cpu/ixp/npe/include/IxOsalAssert.h
index 04a4f515aa..04a4f515aa 100644
--- a/cpu/ixp/npe/include/IxOsalAssert.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalAssert.h
diff --git a/cpu/ixp/npe/include/IxOsalBackward.h b/arch/arm/cpu/ixp/npe/include/IxOsalBackward.h
index ea9f30731a..ea9f30731a 100644
--- a/cpu/ixp/npe/include/IxOsalBackward.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalBackward.h
diff --git a/cpu/ixp/npe/include/IxOsalBackwardAssert.h b/arch/arm/cpu/ixp/npe/include/IxOsalBackwardAssert.h
index be1e27255d..be1e27255d 100644
--- a/cpu/ixp/npe/include/IxOsalBackwardAssert.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalBackwardAssert.h
diff --git a/cpu/ixp/npe/include/IxOsalBackwardBufferMgt.h b/arch/arm/cpu/ixp/npe/include/IxOsalBackwardBufferMgt.h
index 4cf80d31eb..4cf80d31eb 100644
--- a/cpu/ixp/npe/include/IxOsalBackwardBufferMgt.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalBackwardBufferMgt.h
diff --git a/cpu/ixp/npe/include/IxOsalBackwardCacheMMU.h b/arch/arm/cpu/ixp/npe/include/IxOsalBackwardCacheMMU.h
index fe570e6417..fe570e6417 100644
--- a/cpu/ixp/npe/include/IxOsalBackwardCacheMMU.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalBackwardCacheMMU.h
diff --git a/cpu/ixp/npe/include/IxOsalBackwardMemMap.h b/arch/arm/cpu/ixp/npe/include/IxOsalBackwardMemMap.h
index 3881a3b6da..3881a3b6da 100644
--- a/cpu/ixp/npe/include/IxOsalBackwardMemMap.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalBackwardMemMap.h
diff --git a/cpu/ixp/npe/include/IxOsalBackwardOsServices.h b/arch/arm/cpu/ixp/npe/include/IxOsalBackwardOsServices.h
index 0ccff84aee..0ccff84aee 100644
--- a/cpu/ixp/npe/include/IxOsalBackwardOsServices.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalBackwardOsServices.h
diff --git a/cpu/ixp/npe/include/IxOsalBackwardOssl.h b/arch/arm/cpu/ixp/npe/include/IxOsalBackwardOssl.h
index 634b494aec..634b494aec 100644
--- a/cpu/ixp/npe/include/IxOsalBackwardOssl.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalBackwardOssl.h
diff --git a/cpu/ixp/npe/include/IxOsalBufferMgt.h b/arch/arm/cpu/ixp/npe/include/IxOsalBufferMgt.h
index 497ed04710..497ed04710 100644
--- a/cpu/ixp/npe/include/IxOsalBufferMgt.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalBufferMgt.h
diff --git a/cpu/ixp/npe/include/IxOsalBufferMgtDefault.h b/arch/arm/cpu/ixp/npe/include/IxOsalBufferMgtDefault.h
index 684b52edb4..684b52edb4 100644
--- a/cpu/ixp/npe/include/IxOsalBufferMgtDefault.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalBufferMgtDefault.h
diff --git a/cpu/ixp/npe/include/IxOsalConfig.h b/arch/arm/cpu/ixp/npe/include/IxOsalConfig.h
index d56e796393..d56e796393 100644
--- a/cpu/ixp/npe/include/IxOsalConfig.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalConfig.h
diff --git a/cpu/ixp/npe/include/IxOsalEndianess.h b/arch/arm/cpu/ixp/npe/include/IxOsalEndianess.h
index 3b1c739474..3b1c739474 100644
--- a/cpu/ixp/npe/include/IxOsalEndianess.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalEndianess.h
diff --git a/cpu/ixp/npe/include/IxOsalIoMem.h b/arch/arm/cpu/ixp/npe/include/IxOsalIoMem.h
index ea6d64d000..ea6d64d000 100644
--- a/cpu/ixp/npe/include/IxOsalIoMem.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalIoMem.h
diff --git a/cpu/ixp/npe/include/IxOsalMemAccess.h b/arch/arm/cpu/ixp/npe/include/IxOsalMemAccess.h
index 9e7fb87be5..9e7fb87be5 100644
--- a/cpu/ixp/npe/include/IxOsalMemAccess.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalMemAccess.h
diff --git a/cpu/ixp/npe/include/IxOsalOem.h b/arch/arm/cpu/ixp/npe/include/IxOsalOem.h
index f89402620c..f89402620c 100644
--- a/cpu/ixp/npe/include/IxOsalOem.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalOem.h
diff --git a/cpu/ixp/npe/include/IxOsalOs.h b/arch/arm/cpu/ixp/npe/include/IxOsalOs.h
index 6c66613415..6c66613415 100644
--- a/cpu/ixp/npe/include/IxOsalOs.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalOs.h
diff --git a/cpu/ixp/npe/include/IxOsalOsAssert.h b/arch/arm/cpu/ixp/npe/include/IxOsalOsAssert.h
index e4c3e1f614..e4c3e1f614 100644
--- a/cpu/ixp/npe/include/IxOsalOsAssert.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalOsAssert.h
diff --git a/cpu/ixp/npe/include/IxOsalOsBufferMgt.h b/arch/arm/cpu/ixp/npe/include/IxOsalOsBufferMgt.h
index 8e46586ea0..8e46586ea0 100644
--- a/cpu/ixp/npe/include/IxOsalOsBufferMgt.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalOsBufferMgt.h
diff --git a/cpu/ixp/npe/include/IxOsalOsIxp400.h b/arch/arm/cpu/ixp/npe/include/IxOsalOsIxp400.h
index 44a94fb30f..44a94fb30f 100644
--- a/cpu/ixp/npe/include/IxOsalOsIxp400.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalOsIxp400.h
diff --git a/cpu/ixp/npe/include/IxOsalOsIxp400CustomizedMapping.h b/arch/arm/cpu/ixp/npe/include/IxOsalOsIxp400CustomizedMapping.h
index 47ce3a2d80..47ce3a2d80 100644
--- a/cpu/ixp/npe/include/IxOsalOsIxp400CustomizedMapping.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalOsIxp400CustomizedMapping.h
diff --git a/cpu/ixp/npe/include/IxOsalOsTypes.h b/arch/arm/cpu/ixp/npe/include/IxOsalOsTypes.h
index 272eef185e..272eef185e 100644
--- a/cpu/ixp/npe/include/IxOsalOsTypes.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalOsTypes.h
diff --git a/cpu/ixp/npe/include/IxOsalOsUtilitySymbols.h b/arch/arm/cpu/ixp/npe/include/IxOsalOsUtilitySymbols.h
index beb45a0794..beb45a0794 100644
--- a/cpu/ixp/npe/include/IxOsalOsUtilitySymbols.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalOsUtilitySymbols.h
diff --git a/cpu/ixp/npe/include/IxOsalTypes.h b/arch/arm/cpu/ixp/npe/include/IxOsalTypes.h
index a190a707e3..a190a707e3 100644
--- a/cpu/ixp/npe/include/IxOsalTypes.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalTypes.h
diff --git a/cpu/ixp/npe/include/IxOsalUtilitySymbols.h b/arch/arm/cpu/ixp/npe/include/IxOsalUtilitySymbols.h
index f2a73db8b9..f2a73db8b9 100644
--- a/cpu/ixp/npe/include/IxOsalUtilitySymbols.h
+++ b/arch/arm/cpu/ixp/npe/include/IxOsalUtilitySymbols.h
diff --git a/cpu/ixp/npe/include/IxParityENAcc.h b/arch/arm/cpu/ixp/npe/include/IxParityENAcc.h
index 62fe1714f1..62fe1714f1 100644
--- a/cpu/ixp/npe/include/IxParityENAcc.h
+++ b/arch/arm/cpu/ixp/npe/include/IxParityENAcc.h
diff --git a/cpu/ixp/npe/include/IxPerfProfAcc.h b/arch/arm/cpu/ixp/npe/include/IxPerfProfAcc.h
index 65c0ba96ab..65c0ba96ab 100644
--- a/cpu/ixp/npe/include/IxPerfProfAcc.h
+++ b/arch/arm/cpu/ixp/npe/include/IxPerfProfAcc.h
diff --git a/cpu/ixp/npe/include/IxQMgr.h b/arch/arm/cpu/ixp/npe/include/IxQMgr.h
index 165ed96e54..165ed96e54 100644
--- a/cpu/ixp/npe/include/IxQMgr.h
+++ b/arch/arm/cpu/ixp/npe/include/IxQMgr.h
diff --git a/cpu/ixp/npe/include/IxQMgrAqmIf_p.h b/arch/arm/cpu/ixp/npe/include/IxQMgrAqmIf_p.h
index 4f0f64d273..4f0f64d273 100644
--- a/cpu/ixp/npe/include/IxQMgrAqmIf_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxQMgrAqmIf_p.h
diff --git a/cpu/ixp/npe/include/IxQMgrDefines_p.h b/arch/arm/cpu/ixp/npe/include/IxQMgrDefines_p.h
index 0183596af5..0183596af5 100644
--- a/cpu/ixp/npe/include/IxQMgrDefines_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxQMgrDefines_p.h
diff --git a/cpu/ixp/npe/include/IxQMgrDispatcher_p.h b/arch/arm/cpu/ixp/npe/include/IxQMgrDispatcher_p.h
index 71a3f8588e..71a3f8588e 100644
--- a/cpu/ixp/npe/include/IxQMgrDispatcher_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxQMgrDispatcher_p.h
diff --git a/cpu/ixp/npe/include/IxQMgrLog_p.h b/arch/arm/cpu/ixp/npe/include/IxQMgrLog_p.h
index 6b685b8a28..6b685b8a28 100644
--- a/cpu/ixp/npe/include/IxQMgrLog_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxQMgrLog_p.h
diff --git a/cpu/ixp/npe/include/IxQMgrQAccess_p.h b/arch/arm/cpu/ixp/npe/include/IxQMgrQAccess_p.h
index 8612670a17..8612670a17 100644
--- a/cpu/ixp/npe/include/IxQMgrQAccess_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxQMgrQAccess_p.h
diff --git a/cpu/ixp/npe/include/IxQMgrQCfg_p.h b/arch/arm/cpu/ixp/npe/include/IxQMgrQCfg_p.h
index c9dae1ef04..c9dae1ef04 100644
--- a/cpu/ixp/npe/include/IxQMgrQCfg_p.h
+++ b/arch/arm/cpu/ixp/npe/include/IxQMgrQCfg_p.h
diff --git a/cpu/ixp/npe/include/IxQueueAssignments.h b/arch/arm/cpu/ixp/npe/include/IxQueueAssignments.h
index f7194e72ec..f7194e72ec 100644
--- a/cpu/ixp/npe/include/IxQueueAssignments.h
+++ b/arch/arm/cpu/ixp/npe/include/IxQueueAssignments.h
diff --git a/cpu/ixp/npe/include/IxSspAcc.h b/arch/arm/cpu/ixp/npe/include/IxSspAcc.h
index 35e7abf06f..35e7abf06f 100644
--- a/cpu/ixp/npe/include/IxSspAcc.h
+++ b/arch/arm/cpu/ixp/npe/include/IxSspAcc.h
diff --git a/cpu/ixp/npe/include/IxTimeSyncAcc.h b/arch/arm/cpu/ixp/npe/include/IxTimeSyncAcc.h
index 25effed90b..25effed90b 100644
--- a/cpu/ixp/npe/include/IxTimeSyncAcc.h
+++ b/arch/arm/cpu/ixp/npe/include/IxTimeSyncAcc.h
diff --git a/cpu/ixp/npe/include/IxTimerCtrl.h b/arch/arm/cpu/ixp/npe/include/IxTimerCtrl.h
index 669dd3ef28..669dd3ef28 100644
--- a/cpu/ixp/npe/include/IxTimerCtrl.h
+++ b/arch/arm/cpu/ixp/npe/include/IxTimerCtrl.h
diff --git a/cpu/ixp/npe/include/IxTypes.h b/arch/arm/cpu/ixp/npe/include/IxTypes.h
index c4c5a2d267..c4c5a2d267 100644
--- a/cpu/ixp/npe/include/IxTypes.h
+++ b/arch/arm/cpu/ixp/npe/include/IxTypes.h
diff --git a/cpu/ixp/npe/include/IxUART.h b/arch/arm/cpu/ixp/npe/include/IxUART.h
index 03a44441c5..03a44441c5 100644
--- a/cpu/ixp/npe/include/IxUART.h
+++ b/arch/arm/cpu/ixp/npe/include/IxUART.h
diff --git a/cpu/ixp/npe/include/IxVersionId.h b/arch/arm/cpu/ixp/npe/include/IxVersionId.h
index 27796ede84..27796ede84 100644
--- a/cpu/ixp/npe/include/IxVersionId.h
+++ b/arch/arm/cpu/ixp/npe/include/IxVersionId.h
diff --git a/cpu/ixp/npe/include/ix_error.h b/arch/arm/cpu/ixp/npe/include/ix_error.h
index d32ace20b5..d32ace20b5 100644
--- a/cpu/ixp/npe/include/ix_error.h
+++ b/arch/arm/cpu/ixp/npe/include/ix_error.h
diff --git a/cpu/ixp/npe/include/ix_macros.h b/arch/arm/cpu/ixp/npe/include/ix_macros.h
index 53f5942f97..53f5942f97 100644
--- a/cpu/ixp/npe/include/ix_macros.h
+++ b/arch/arm/cpu/ixp/npe/include/ix_macros.h
diff --git a/cpu/ixp/npe/include/ix_os_type.h b/arch/arm/cpu/ixp/npe/include/ix_os_type.h
index 8575096722..8575096722 100644
--- a/cpu/ixp/npe/include/ix_os_type.h
+++ b/arch/arm/cpu/ixp/npe/include/ix_os_type.h
diff --git a/cpu/ixp/npe/include/ix_ossl.h b/arch/arm/cpu/ixp/npe/include/ix_ossl.h
index b59f7d0873..b59f7d0873 100644
--- a/cpu/ixp/npe/include/ix_ossl.h
+++ b/arch/arm/cpu/ixp/npe/include/ix_ossl.h
diff --git a/cpu/ixp/npe/include/ix_symbols.h b/arch/arm/cpu/ixp/npe/include/ix_symbols.h
index f7bb029d66..f7bb029d66 100644
--- a/cpu/ixp/npe/include/ix_symbols.h
+++ b/arch/arm/cpu/ixp/npe/include/ix_symbols.h
diff --git a/cpu/ixp/npe/include/ix_types.h b/arch/arm/cpu/ixp/npe/include/ix_types.h
index fc7b1e993a..fc7b1e993a 100644
--- a/cpu/ixp/npe/include/ix_types.h
+++ b/arch/arm/cpu/ixp/npe/include/ix_types.h
diff --git a/cpu/ixp/npe/include/npe.h b/arch/arm/cpu/ixp/npe/include/npe.h
index 3d6f727476..3d6f727476 100644
--- a/cpu/ixp/npe/include/npe.h
+++ b/arch/arm/cpu/ixp/npe/include/npe.h
diff --git a/cpu/ixp/npe/include/os_datatypes.h b/arch/arm/cpu/ixp/npe/include/os_datatypes.h
index 4387b2a052..4387b2a052 100644
--- a/cpu/ixp/npe/include/os_datatypes.h
+++ b/arch/arm/cpu/ixp/npe/include/os_datatypes.h
diff --git a/cpu/ixp/npe/miiphy.c b/arch/arm/cpu/ixp/npe/miiphy.c
index b208c51eae..b208c51eae 100644
--- a/cpu/ixp/npe/miiphy.c
+++ b/arch/arm/cpu/ixp/npe/miiphy.c
diff --git a/cpu/ixp/npe/npe.c b/arch/arm/cpu/ixp/npe/npe.c
index 2e6868960a..2e6868960a 100644
--- a/cpu/ixp/npe/npe.c
+++ b/arch/arm/cpu/ixp/npe/npe.c
diff --git a/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S
index 5ebce5338c..5ebce5338c 100644
--- a/cpu/ixp/start.S
+++ b/arch/arm/cpu/ixp/start.S
diff --git a/cpu/ixp/timer.c b/arch/arm/cpu/ixp/timer.c
index edf341ff9f..edf341ff9f 100644
--- a/cpu/ixp/timer.c
+++ b/arch/arm/cpu/ixp/timer.c
diff --git a/cpu/ixp/u-boot.lds b/arch/arm/cpu/ixp/u-boot.lds
index 85209caf74..b8ff2eed5c 100644
--- a/cpu/ixp/u-boot.lds
+++ b/arch/arm/cpu/ixp/u-boot.lds
@@ -31,7 +31,7 @@ SECTIONS
 	. = ALIGN(4);
 	.text :
 	{
-		cpu/ixp/start.o(.text)
+		arch/arm/cpu/ixp/start.o(.text)
 		*(.text)
 	}
 
diff --git a/cpu/lh7a40x/Makefile b/arch/arm/cpu/lh7a40x/Makefile
index 1b3f58abb9..1b3f58abb9 100644
--- a/cpu/lh7a40x/Makefile
+++ b/arch/arm/cpu/lh7a40x/Makefile
diff --git a/cpu/lh7a40x/config.mk b/arch/arm/cpu/lh7a40x/config.mk
index 47b2b7b722..47b2b7b722 100644
--- a/cpu/lh7a40x/config.mk
+++ b/arch/arm/cpu/lh7a40x/config.mk
diff --git a/cpu/lh7a40x/cpu.c b/arch/arm/cpu/lh7a40x/cpu.c
index b193189123..b193189123 100644
--- a/cpu/lh7a40x/cpu.c
+++ b/arch/arm/cpu/lh7a40x/cpu.c
diff --git a/cpu/lh7a40x/speed.c b/arch/arm/cpu/lh7a40x/speed.c
index 333ebb504a..333ebb504a 100644
--- a/cpu/lh7a40x/speed.c
+++ b/arch/arm/cpu/lh7a40x/speed.c
diff --git a/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S
index a1321b1d74..a1321b1d74 100644
--- a/cpu/lh7a40x/start.S
+++ b/arch/arm/cpu/lh7a40x/start.S
diff --git a/cpu/lh7a40x/timer.c b/arch/arm/cpu/lh7a40x/timer.c
index 2691315d84..2691315d84 100644
--- a/cpu/lh7a40x/timer.c
+++ b/arch/arm/cpu/lh7a40x/timer.c
diff --git a/cpu/arm_intcm/u-boot.lds b/arch/arm/cpu/lh7a40x/u-boot.lds
index 5eb87fbee7..5a8ccf5888 100644
--- a/cpu/arm_intcm/u-boot.lds
+++ b/arch/arm/cpu/lh7a40x/u-boot.lds
@@ -31,7 +31,7 @@ SECTIONS
 	. = ALIGN(4);
 	.text :
 	{
-		cpu/arm_intcm/start.o	(.text)
+		arch/arm/cpu/lh7a40x/start.o	(.text)
 		*(.text)
 	}
 
diff --git a/cpu/pxa/Makefile b/arch/arm/cpu/pxa/Makefile
index 07a151a170..07a151a170 100644
--- a/cpu/pxa/Makefile
+++ b/arch/arm/cpu/pxa/Makefile
diff --git a/cpu/pxa/config.mk b/arch/arm/cpu/pxa/config.mk
index a05d69ca27..a05d69ca27 100644
--- a/cpu/pxa/config.mk
+++ b/arch/arm/cpu/pxa/config.mk
diff --git a/cpu/pxa/cpu.c b/arch/arm/cpu/pxa/cpu.c
index 800d120e71..800d120e71 100644
--- a/cpu/pxa/cpu.c
+++ b/arch/arm/cpu/pxa/cpu.c
diff --git a/cpu/pxa/i2c.c b/arch/arm/cpu/pxa/i2c.c
index 6b72ba13a0..6b72ba13a0 100644
--- a/cpu/pxa/i2c.c
+++ b/arch/arm/cpu/pxa/i2c.c
diff --git a/cpu/pxa/pxafb.c b/arch/arm/cpu/pxa/pxafb.c
index d56c5f099f..d56c5f099f 100644
--- a/cpu/pxa/pxafb.c
+++ b/arch/arm/cpu/pxa/pxafb.c
diff --git a/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
index 63ab0c591a..63ab0c591a 100644
--- a/cpu/pxa/start.S
+++ b/arch/arm/cpu/pxa/start.S
diff --git a/cpu/pxa/timer.c b/arch/arm/cpu/pxa/timer.c
index 8d0f82679b..8d0f82679b 100644
--- a/cpu/pxa/timer.c
+++ b/arch/arm/cpu/pxa/timer.c
diff --git a/cpu/pxa/u-boot.lds b/arch/arm/cpu/pxa/u-boot.lds
index 77ab3c902b..d4e85ef550 100644
--- a/cpu/pxa/u-boot.lds
+++ b/arch/arm/cpu/pxa/u-boot.lds
@@ -31,7 +31,7 @@ SECTIONS
 	. = ALIGN(4);
 	.text :
 	{
-		cpu/pxa/start.o	(.text)
+		arch/arm/cpu/pxa/start.o	(.text)
 		*(.text)
 	}
 
diff --git a/cpu/pxa/usb.c b/arch/arm/cpu/pxa/usb.c
index bd718a6fff..bd718a6fff 100644
--- a/cpu/pxa/usb.c
+++ b/arch/arm/cpu/pxa/usb.c
diff --git a/cpu/s3c44b0/Makefile b/arch/arm/cpu/s3c44b0/Makefile
index 6da2016f66..6da2016f66 100644
--- a/cpu/s3c44b0/Makefile
+++ b/arch/arm/cpu/s3c44b0/Makefile
diff --git a/cpu/s3c44b0/cache.c b/arch/arm/cpu/s3c44b0/cache.c
index 66974f61a6..66974f61a6 100644
--- a/cpu/s3c44b0/cache.c
+++ b/arch/arm/cpu/s3c44b0/cache.c
diff --git a/cpu/s3c44b0/config.mk b/arch/arm/cpu/s3c44b0/config.mk
index 7454d728a5..7454d728a5 100644
--- a/cpu/s3c44b0/config.mk
+++ b/arch/arm/cpu/s3c44b0/config.mk
diff --git a/cpu/s3c44b0/cpu.c b/arch/arm/cpu/s3c44b0/cpu.c
index bca38f81d3..bca38f81d3 100644
--- a/cpu/s3c44b0/cpu.c
+++ b/arch/arm/cpu/s3c44b0/cpu.c
diff --git a/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S
index f5a3d3ac38..f5a3d3ac38 100644
--- a/cpu/s3c44b0/start.S
+++ b/arch/arm/cpu/s3c44b0/start.S
diff --git a/cpu/s3c44b0/timer.c b/arch/arm/cpu/s3c44b0/timer.c
index 6f1d8f677a..6f1d8f677a 100644
--- a/cpu/s3c44b0/timer.c
+++ b/arch/arm/cpu/s3c44b0/timer.c
diff --git a/cpu/s3c44b0/u-boot.lds b/arch/arm/cpu/s3c44b0/u-boot.lds
index 41ca3b4e8d..267d94c083 100644
--- a/cpu/s3c44b0/u-boot.lds
+++ b/arch/arm/cpu/s3c44b0/u-boot.lds
@@ -31,7 +31,7 @@ SECTIONS
 	. = ALIGN(4);
 	.text :
 	{
-		cpu/s3c44b0/start.o	(.text)
+		arch/arm/cpu/s3c44b0/start.o	(.text)
 		*(.text)
 	}
 
diff --git a/cpu/sa1100/Makefile b/arch/arm/cpu/sa1100/Makefile
index 28b668267c..28b668267c 100644
--- a/cpu/sa1100/Makefile
+++ b/arch/arm/cpu/sa1100/Makefile
diff --git a/cpu/sa1100/config.mk b/arch/arm/cpu/sa1100/config.mk
index 6f21f410be..6f21f410be 100644
--- a/cpu/sa1100/config.mk
+++ b/arch/arm/cpu/sa1100/config.mk
diff --git a/cpu/sa1100/cpu.c b/arch/arm/cpu/sa1100/cpu.c
index 58e90dc9f6..58e90dc9f6 100644
--- a/cpu/sa1100/cpu.c
+++ b/arch/arm/cpu/sa1100/cpu.c
diff --git a/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S
index 278c5008fb..278c5008fb 100644
--- a/cpu/sa1100/start.S
+++ b/arch/arm/cpu/sa1100/start.S
diff --git a/cpu/sa1100/timer.c b/arch/arm/cpu/sa1100/timer.c
index 020750125a..020750125a 100644
--- a/cpu/sa1100/timer.c
+++ b/arch/arm/cpu/sa1100/timer.c
diff --git a/cpu/sa1100/u-boot.lds b/arch/arm/cpu/sa1100/u-boot.lds
index 0c02e76e7a..f6197acd81 100644
--- a/cpu/sa1100/u-boot.lds
+++ b/arch/arm/cpu/sa1100/u-boot.lds
@@ -34,7 +34,7 @@ SECTIONS
 	. = ALIGN(4);
 	.text :
 	{
-		cpu/sa1100/start.o	(.text)
+		arch/arm/cpu/sa1100/start.o	(.text)
 		*(.text)
 	}
 
diff --git a/include/asm-arm/arch-a320/a320.h b/arch/arm/include/asm/arch-a320/a320.h
index fbd1583f50..fbd1583f50 100644
--- a/include/asm-arm/arch-a320/a320.h
+++ b/arch/arm/include/asm/arch-a320/a320.h
diff --git a/include/asm-arm/arch-a320/ftpmu010.h b/arch/arm/include/asm/arch-a320/ftpmu010.h
index 8ef7a37148..8ef7a37148 100644
--- a/include/asm-arm/arch-a320/ftpmu010.h
+++ b/arch/arm/include/asm/arch-a320/ftpmu010.h
diff --git a/include/asm-arm/arch-a320/ftsdmc020.h b/arch/arm/include/asm/arch-a320/ftsdmc020.h
index 069977200b..069977200b 100644
--- a/include/asm-arm/arch-a320/ftsdmc020.h
+++ b/arch/arm/include/asm/arch-a320/ftsdmc020.h
diff --git a/include/asm-arm/arch-a320/ftsmc020.h b/arch/arm/include/asm/arch-a320/ftsmc020.h
index 95d9500339..95d9500339 100644
--- a/include/asm-arm/arch-a320/ftsmc020.h
+++ b/arch/arm/include/asm/arch-a320/ftsmc020.h
diff --git a/include/asm-arm/arch-a320/fttmr010.h b/arch/arm/include/asm/arch-a320/fttmr010.h
index 72abcb365d..72abcb365d 100644
--- a/include/asm-arm/arch-a320/fttmr010.h
+++ b/arch/arm/include/asm/arch-a320/fttmr010.h
diff --git a/include/asm-arm/arch-arm720t/hardware.h b/arch/arm/include/asm/arch-arm720t/hardware.h
index ec053c9912..9bee19ffbb 100644
--- a/include/asm-arm/arch-arm720t/hardware.h
+++ b/arch/arm/include/asm/arch-arm720t/hardware.h
@@ -25,7 +25,7 @@
  */
 
 #if defined(CONFIG_NETARM)
-#include <asm-arm/arch-arm720t/netarm_registers.h>
+#include <asm/arch-arm720t/netarm_registers.h>
 #elif defined(CONFIG_IMPA7)
 /* include IMPA7 specific hardware file if there was one */
 #elif defined(CONFIG_EP7312)
diff --git a/include/asm-arm/arch-arm720t/netarm_dma_module.h b/arch/arm/include/asm/arch-arm720t/netarm_dma_module.h
index 328eaf0da9..328eaf0da9 100644
--- a/include/asm-arm/arch-arm720t/netarm_dma_module.h
+++ b/arch/arm/include/asm/arch-arm720t/netarm_dma_module.h
diff --git a/include/asm-arm/arch-arm720t/netarm_eni_module.h b/arch/arm/include/asm/arch-arm720t/netarm_eni_module.h
index 317b354513..317b354513 100644
--- a/include/asm-arm/arch-arm720t/netarm_eni_module.h
+++ b/arch/arm/include/asm/arch-arm720t/netarm_eni_module.h
diff --git a/include/asm-arm/arch-arm720t/netarm_eth_module.h b/arch/arm/include/asm/arch-arm720t/netarm_eth_module.h
index 8f2f36981a..8f2f36981a 100644
--- a/include/asm-arm/arch-arm720t/netarm_eth_module.h
+++ b/arch/arm/include/asm/arch-arm720t/netarm_eth_module.h
diff --git a/include/asm-arm/arch-arm720t/netarm_gen_module.h b/arch/arm/include/asm/arch-arm720t/netarm_gen_module.h
index 13656a3ad2..13656a3ad2 100644
--- a/include/asm-arm/arch-arm720t/netarm_gen_module.h
+++ b/arch/arm/include/asm/arch-arm720t/netarm_gen_module.h
diff --git a/include/asm-arm/arch-arm720t/netarm_mem_module.h b/arch/arm/include/asm/arch-arm720t/netarm_mem_module.h
index c650c3b004..c650c3b004 100644
--- a/include/asm-arm/arch-arm720t/netarm_mem_module.h
+++ b/arch/arm/include/asm/arch-arm720t/netarm_mem_module.h
diff --git a/include/asm-arm/arch-arm720t/netarm_registers.h b/arch/arm/include/asm/arch-arm720t/netarm_registers.h
index fa8812879a..fa8812879a 100644
--- a/include/asm-arm/arch-arm720t/netarm_registers.h
+++ b/arch/arm/include/asm/arch-arm720t/netarm_registers.h
diff --git a/include/asm-arm/arch-arm720t/netarm_ser_module.h b/arch/arm/include/asm/arch-arm720t/netarm_ser_module.h
index 6fbae11c8d..6fbae11c8d 100644
--- a/include/asm-arm/arch-arm720t/netarm_ser_module.h
+++ b/arch/arm/include/asm/arch-arm720t/netarm_ser_module.h
diff --git a/include/asm-arm/arch-arm925t/sizes.h b/arch/arm/include/asm/arch-arm925t/sizes.h
index 7319bd9227..7319bd9227 100644
--- a/include/asm-arm/arch-arm925t/sizes.h
+++ b/arch/arm/include/asm/arch-arm925t/sizes.h
diff --git a/include/asm-arm/arch-arm926ejs/sizes.h b/arch/arm/include/asm/arch-arm926ejs/sizes.h
index ef0b99b946..ef0b99b946 100644
--- a/include/asm-arm/arch-arm926ejs/sizes.h
+++ b/arch/arm/include/asm/arch-arm926ejs/sizes.h
diff --git a/include/asm-arm/arch-at91/at91_common.h b/arch/arm/include/asm/arch-at91/at91_common.h
index 01840eede4..01840eede4 100644
--- a/include/asm-arm/arch-at91/at91_common.h
+++ b/arch/arm/include/asm/arch-at91/at91_common.h
diff --git a/include/asm-arm/arch-at91/at91_emac.h b/arch/arm/include/asm/arch-at91/at91_emac.h
index 45ae33311e..45ae33311e 100644
--- a/include/asm-arm/arch-at91/at91_emac.h
+++ b/arch/arm/include/asm/arch-at91/at91_emac.h
diff --git a/include/asm-arm/arch-at91/at91_matrix.h b/arch/arm/include/asm/arch-at91/at91_matrix.h
index 981ec2029c..981ec2029c 100644
--- a/include/asm-arm/arch-at91/at91_matrix.h
+++ b/arch/arm/include/asm/arch-at91/at91_matrix.h
diff --git a/include/asm-arm/arch-at91/at91_mc.h b/arch/arm/include/asm/arch-at91/at91_mc.h
index acfbd10c5c..acfbd10c5c 100644
--- a/include/asm-arm/arch-at91/at91_mc.h
+++ b/arch/arm/include/asm/arch-at91/at91_mc.h
diff --git a/include/asm-arm/arch-at91/at91_pdc.h b/arch/arm/include/asm/arch-at91/at91_pdc.h
index 42f87caec1..42f87caec1 100644
--- a/include/asm-arm/arch-at91/at91_pdc.h
+++ b/arch/arm/include/asm/arch-at91/at91_pdc.h
diff --git a/include/asm-arm/arch-at91/at91_pio.h b/arch/arm/include/asm/arch-at91/at91_pio.h
index f7915a3322..f7915a3322 100644
--- a/include/asm-arm/arch-at91/at91_pio.h
+++ b/arch/arm/include/asm/arch-at91/at91_pio.h
diff --git a/include/asm-arm/arch-at91/at91_pit.h b/arch/arm/include/asm/arch-at91/at91_pit.h
index 5615a0206c..5615a0206c 100644
--- a/include/asm-arm/arch-at91/at91_pit.h
+++ b/arch/arm/include/asm/arch-at91/at91_pit.h
diff --git a/include/asm-arm/arch-at91/at91_pmc.h b/arch/arm/include/asm/arch-at91/at91_pmc.h
index 680fe33270..5b1a85d051 100644
--- a/include/asm-arm/arch-at91/at91_pmc.h
+++ b/arch/arm/include/asm/arch-at91/at91_pmc.h
@@ -108,11 +108,12 @@ typedef struct at91_pmc {
 #define AT91_PMC_IXR_PCKRDY3		0x00000800
 
 #ifdef CONFIG_AT91_LEGACY
-
 #define	AT91_PMC_SCER		(AT91_PMC + 0x00)	/* System Clock Enable Register */
 #define	AT91_PMC_SCDR		(AT91_PMC + 0x04)	/* System Clock Disable Register */
 
 #define	AT91_PMC_SCSR		(AT91_PMC + 0x08)	/* System Clock Status Register */
+#endif
+
 #define		AT91_PMC_PCK		(1 <<  0)		/* Processor Clock */
 #define		AT91RM9200_PMC_UDP	(1 <<  1)		/* USB Devcice Port Clock [AT91RM9200 only] */
 #define		AT91RM9200_PMC_MCKUDP	(1 <<  2)		/* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
@@ -128,27 +129,34 @@ typedef struct at91_pmc {
 #define		AT91_PMC_HCK0		(1 << 16)		/* AHB Clock (USB host) [AT91SAM9261 only] */
 #define		AT91_PMC_HCK1		(1 << 17)		/* AHB Clock (LCD) [AT91SAM9261 only] */
 
+#ifdef CONFIG_AT91_LEGACY
 #define	AT91_PMC_PCER		(AT91_PMC + 0x10)	/* Peripheral Clock Enable Register */
 #define	AT91_PMC_PCDR		(AT91_PMC + 0x14)	/* Peripheral Clock Disable Register */
 #define	AT91_PMC_PCSR		(AT91_PMC + 0x18)	/* Peripheral Clock Status Register */
 
 #define	AT91_CKGR_UCKR		(AT91_PMC + 0x1C)	/* UTMI Clock Register [SAM9RL, CAP9] */
+#endif
+
 #define		AT91_PMC_UPLLEN		(1   << 16)		/* UTMI PLL Enable */
 #define		AT91_PMC_UPLLCOUNT	(0xf << 20)		/* UTMI PLL Start-up Time */
 #define		AT91_PMC_BIASEN		(1   << 24)		/* UTMI BIAS Enable */
 #define		AT91_PMC_BIASCOUNT	(0xf << 28)		/* UTMI PLL Start-up Time */
 
+#ifdef CONFIG_AT91_LEGACY
 #define	AT91_CKGR_MOR		(AT91_PMC + 0x20)	/* Main Oscillator Register [not on SAM9RL] */
+#endif
 #define		AT91_PMC_MOSCEN		(1    << 0)		/* Main Oscillator Enable */
 #define		AT91_PMC_OSCBYPASS	(1    << 1)		/* Oscillator Bypass [SAM9x, CAP9] */
 #define		AT91_PMC_OSCOUNT	(0xff << 8)		/* Main Oscillator Start-up Time */
-
+#ifdef CONFIG_AT91_LEGACY
 #define	AT91_CKGR_MCFR		(AT91_PMC + 0x24)	/* Main Clock Frequency Register */
+#endif
 #define		AT91_PMC_MAINF		(0xffff <<  0)		/* Main Clock Frequency */
 #define		AT91_PMC_MAINRDY	(1	<< 16)		/* Main Clock Ready */
-
+#ifdef CONFIG_AT91_LEGACY
 #define	AT91_CKGR_PLLAR		(AT91_PMC + 0x28)	/* PLL A Register */
 #define	AT91_CKGR_PLLBR		(AT91_PMC + 0x2c)	/* PLL B Register */
+#endif
 #define		AT91_PMC_DIV		(0xff  <<  0)		/* Divider */
 #define		AT91_PMC_PLLCOUNT	(0x3f  <<  8)		/* PLL Counter */
 #define		AT91_PMC_OUT		(3     << 14)		/* PLL Clock Frequency Range */
@@ -160,7 +168,9 @@ typedef struct at91_pmc {
 #define		AT91_PMC_USB96M		(1     << 28)		/* Divider by 2 Enable (PLLB only) */
 #define		AT91_PMC_PLLA_WR_ERRATA	(1     << 29)		/* Bit 29 must always be set to 1 when programming the CKGR_PLLAR register */
 
+#ifdef CONFIG_AT91_LEGACY
 #define	AT91_PMC_MCKR		(AT91_PMC + 0x30)	/* Master Clock Register */
+#endif
 #define		AT91_PMC_CSS		(3 <<  0)		/* Master Clock Selection */
 #define			AT91_PMC_CSS_SLOW		(0 << 0)
 #define			AT91_PMC_CSS_MAIN		(1 << 0)
@@ -188,11 +198,13 @@ typedef struct at91_pmc {
 #define			AT91_PMC_PDIV_1			(0 << 12)
 #define			AT91_PMC_PDIV_2			(1 << 12)
 
+#ifdef CONFIG_AT91_LEGACY
 #define	AT91_PMC_PCKR(n)	(AT91_PMC + 0x40 + ((n) * 4))	/* Programmable Clock 0-3 Registers */
 
 #define	AT91_PMC_IER		(AT91_PMC + 0x60)	/* Interrupt Enable Register */
 #define	AT91_PMC_IDR		(AT91_PMC + 0x64)	/* Interrupt Disable Register */
 #define	AT91_PMC_SR		(AT91_PMC + 0x68)	/* Status Register */
+#endif
 #define		AT91_PMC_MOSCS		(1 <<  0)		/* MOSCS Flag */
 #define		AT91_PMC_LOCKA		(1 <<  1)		/* PLLA Lock */
 #define		AT91_PMC_LOCKB		(1 <<  2)		/* PLLB Lock */
@@ -203,12 +215,13 @@ typedef struct at91_pmc {
 #define		AT91_PMC_PCK1RDY	(1 <<  9)		/* Programmable Clock 1 */
 #define		AT91_PMC_PCK2RDY	(1 << 10)		/* Programmable Clock 2 */
 #define		AT91_PMC_PCK3RDY	(1 << 11)		/* Programmable Clock 3 */
+#ifdef CONFIG_AT91_LEGACY
 #define	AT91_PMC_IMR		(AT91_PMC + 0x6c)	/* Interrupt Mask Register */
 
 #define AT91_PMC_PROT		(AT91_PMC + 0xe4)	/* Protect Register [AT91CAP9 revC only] */
+#endif
 #define		AT91_PMC_PROTKEY	0x504d4301	/* Activation Code */
-
+#ifdef CONFIG_AT91_LEGACY
 #define AT91_PMC_VER		(AT91_PMC + 0xfc)	/* PMC Module Version [AT91CAP9 only] */
-
 #endif /* CONFIG_AT91_LEGACY */
 #endif
diff --git a/include/asm-arm/arch-at91/at91_rstc.h b/arch/arm/include/asm/arch-at91/at91_rstc.h
index 9ff2c5b7ac..9ff2c5b7ac 100644
--- a/include/asm-arm/arch-at91/at91_rstc.h
+++ b/arch/arm/include/asm/arch-at91/at91_rstc.h
diff --git a/include/asm-arm/arch-at91/at91_spi.h b/arch/arm/include/asm/arch-at91/at91_spi.h
index c520e89d2b..c520e89d2b 100644
--- a/include/asm-arm/arch-at91/at91_spi.h
+++ b/arch/arm/include/asm/arch-at91/at91_spi.h
diff --git a/include/asm-arm/arch-at91/at91_st.h b/arch/arm/include/asm/arch-at91/at91_st.h
index 53f932085b..53f932085b 100644
--- a/include/asm-arm/arch-at91/at91_st.h
+++ b/arch/arm/include/asm/arch-at91/at91_st.h
diff --git a/include/asm-arm/arch-at91/at91_tc.h b/arch/arm/include/asm/arch-at91/at91_tc.h
index 1e180adb3c..1e180adb3c 100644
--- a/include/asm-arm/arch-at91/at91_tc.h
+++ b/arch/arm/include/asm/arch-at91/at91_tc.h
diff --git a/include/asm-arm/arch-at91/at91_wdt.h b/arch/arm/include/asm/arch-at91/at91_wdt.h
index cf08dafdd8..cf08dafdd8 100644
--- a/include/asm-arm/arch-at91/at91_wdt.h
+++ b/arch/arm/include/asm/arch-at91/at91_wdt.h
diff --git a/include/asm-arm/arch-at91/at91cap9.h b/arch/arm/include/asm/arch-at91/at91cap9.h
index 5af6fdc251..5af6fdc251 100644
--- a/include/asm-arm/arch-at91/at91cap9.h
+++ b/arch/arm/include/asm/arch-at91/at91cap9.h
diff --git a/include/asm-arm/arch-at91/at91cap9_matrix.h b/arch/arm/include/asm/arch-at91/at91cap9_matrix.h
index 22b7e9b8f4..22b7e9b8f4 100644
--- a/include/asm-arm/arch-at91/at91cap9_matrix.h
+++ b/arch/arm/include/asm/arch-at91/at91cap9_matrix.h
diff --git a/include/asm-arm/arch-at91/at91rm9200.h b/arch/arm/include/asm/arch-at91/at91rm9200.h
index 1bee6f2b58..1bee6f2b58 100644
--- a/include/asm-arm/arch-at91/at91rm9200.h
+++ b/arch/arm/include/asm/arch-at91/at91rm9200.h
diff --git a/include/asm-arm/arch-at91/at91sam9260.h b/arch/arm/include/asm/arch-at91/at91sam9260.h
index a60a0811c0..ec04318036 100644
--- a/include/asm-arm/arch-at91/at91sam9260.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9260.h
@@ -56,8 +56,10 @@
 #define AT91_PIO_BASE		0xfffff400
 #define AT91_PMC_BASE		0xfffffc00
 #define AT91_RSTC_BASE		0xfffffd00
+#define AT91_RTT_BASE		0xfffffd20
 #define AT91_PIT_BASE		0xfffffd30
 #define AT91_WDT_BASE		0xfffffd40
+#define AT91_GPR_BASE		0xfffffd50
 
 #ifdef CONFIG_AT91_LEGACY
 
diff --git a/include/asm-arm/arch-at91/at91sam9260_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9260_matrix.h
index f8b023d932..f8b023d932 100644
--- a/include/asm-arm/arch-at91/at91sam9260_matrix.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9260_matrix.h
diff --git a/include/asm-arm/arch-at91/at91sam9261.h b/arch/arm/include/asm/arch-at91/at91sam9261.h
index 2952292c5d..7ca0283135 100644
--- a/include/asm-arm/arch-at91/at91sam9261.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9261.h
@@ -49,8 +49,10 @@
 #define AT91_PIO_BASE		0xfffff400
 #define AT91_PMC_BASE		0xfffffc00
 #define AT91_RSTC_BASE		0xfffffd00
+#define AT91_RTT_BASE		0xfffffd20
 #define AT91_PIT_BASE		0xfffffd30
 #define AT91_WDT_BASE		0xfffffd40
+#define AT91_GPBR_BASE		0xfffffd50
 
 #ifdef CONFIG_AT91_LEGACY
 
diff --git a/include/asm-arm/arch-at91/at91sam9261_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9261_matrix.h
index e2bfc4b0c9..e2bfc4b0c9 100644
--- a/include/asm-arm/arch-at91/at91sam9261_matrix.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9261_matrix.h
diff --git a/include/asm-arm/arch-at91/at91sam9263.h b/arch/arm/include/asm/arch-at91/at91sam9263.h
index c177bd059e..4ada1ceaf8 100644
--- a/include/asm-arm/arch-at91/at91sam9263.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9263.h
@@ -61,8 +61,11 @@
 #define AT91_PIO_BASE		0xfffff200
 #define AT91_PMC_BASE		0xfffffc00
 #define AT91_RSTC_BASE		0xfffffd00
+#define AT91_RTT0_BASE		0xfffffd20
 #define AT91_PIT_BASE		0xfffffd30
 #define AT91_WDT_BASE		0xfffffd40
+#define AT91_RTT1_BASE		0xfffffd50
+#define AT91_GPBR_BASE		0xfffffd60
 
 #ifdef CONFIG_AT91_LEGACY
 
diff --git a/include/asm-arm/arch-at91/at91sam9263_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9263_matrix.h
index 83aaaab773..83aaaab773 100644
--- a/include/asm-arm/arch-at91/at91sam9263_matrix.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9263_matrix.h
diff --git a/include/asm-arm/arch-at91/at91sam9_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9_matrix.h
index 6d97189d27..6d97189d27 100644
--- a/include/asm-arm/arch-at91/at91sam9_matrix.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9_matrix.h
diff --git a/include/asm-arm/arch-at91/at91sam9_sdramc.h b/arch/arm/include/asm/arch-at91/at91sam9_sdramc.h
index c3da3a6a35..c3da3a6a35 100644
--- a/include/asm-arm/arch-at91/at91sam9_sdramc.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9_sdramc.h
diff --git a/include/asm-arm/arch-at91/at91sam9_smc.h b/arch/arm/include/asm/arch-at91/at91sam9_smc.h
index d180c8af87..d180c8af87 100644
--- a/include/asm-arm/arch-at91/at91sam9_smc.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9_smc.h
diff --git a/include/asm-arm/arch-at91/at91sam9g45.h b/arch/arm/include/asm/arch-at91/at91sam9g45.h
index 445f4b2123..445f4b2123 100644
--- a/include/asm-arm/arch-at91/at91sam9g45.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9g45.h
diff --git a/include/asm-arm/arch-at91/at91sam9g45_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9g45_matrix.h
index 1620e1baff..1620e1baff 100644
--- a/include/asm-arm/arch-at91/at91sam9g45_matrix.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9g45_matrix.h
diff --git a/include/asm-arm/arch-at91/at91sam9rl.h b/arch/arm/include/asm/arch-at91/at91sam9rl.h
index 8eb0d4fa29..8eb0d4fa29 100644
--- a/include/asm-arm/arch-at91/at91sam9rl.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9rl.h
diff --git a/include/asm-arm/arch-at91/at91sam9rl_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9rl_matrix.h
index af8d914acc..af8d914acc 100644
--- a/include/asm-arm/arch-at91/at91sam9rl_matrix.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9rl_matrix.h
diff --git a/include/asm-arm/arch-at91/clk.h b/arch/arm/include/asm/arch-at91/clk.h
index f642dd9958..f642dd9958 100644
--- a/include/asm-arm/arch-at91/clk.h
+++ b/arch/arm/include/asm/arch-at91/clk.h
diff --git a/include/asm-arm/arch-at91/gpio.h b/arch/arm/include/asm/arch-at91/gpio.h
index 716f81fa3c..716f81fa3c 100644
--- a/include/asm-arm/arch-at91/gpio.h
+++ b/arch/arm/include/asm/arch-at91/gpio.h
diff --git a/include/asm-arm/arch-at91/hardware.h b/arch/arm/include/asm/arch-at91/hardware.h
index 4ddb3155d7..4ddb3155d7 100644
--- a/include/asm-arm/arch-at91/hardware.h
+++ b/arch/arm/include/asm/arch-at91/hardware.h
diff --git a/include/asm-arm/arch-at91/io.h b/arch/arm/include/asm/arch-at91/io.h
index 38d185eb7c..38d185eb7c 100644
--- a/include/asm-arm/arch-at91/io.h
+++ b/arch/arm/include/asm/arch-at91/io.h
diff --git a/include/asm-arm/arch-at91/memory-map.h b/arch/arm/include/asm/arch-at91/memory-map.h
index f605f37fd2..f605f37fd2 100644
--- a/include/asm-arm/arch-at91/memory-map.h
+++ b/arch/arm/include/asm/arch-at91/memory-map.h
diff --git a/include/asm-arm/arch-at91rm9200/AT91RM9200.h b/arch/arm/include/asm/arch-at91rm9200/AT91RM9200.h
index 00bae1c4d5..00bae1c4d5 100644
--- a/include/asm-arm/arch-at91rm9200/AT91RM9200.h
+++ b/arch/arm/include/asm/arch-at91rm9200/AT91RM9200.h
diff --git a/include/asm-arm/arch-at91rm9200/hardware.h b/arch/arm/include/asm/arch-at91rm9200/hardware.h
index b868e38a3e..b868e38a3e 100644
--- a/include/asm-arm/arch-at91rm9200/hardware.h
+++ b/arch/arm/include/asm/arch-at91rm9200/hardware.h
diff --git a/include/asm-arm/arch-davinci/emac_defs.h b/arch/arm/include/asm/arch-davinci/emac_defs.h
index b0ec8f5090..b0ec8f5090 100644
--- a/include/asm-arm/arch-davinci/emac_defs.h
+++ b/arch/arm/include/asm/arch-davinci/emac_defs.h
diff --git a/include/asm-arm/arch-davinci/emif_defs.h b/arch/arm/include/asm/arch-davinci/emif_defs.h
index aa57703c68..b48ec17e97 100644
--- a/include/asm-arm/arch-davinci/emif_defs.h
+++ b/arch/arm/include/asm/arch-davinci/emif_defs.h
@@ -24,47 +24,42 @@
 
 #include <asm/arch/hardware.h>
 
-typedef struct davinci_emif_regs {
-	dv_reg		ERCSR;
-	dv_reg		AWCCR;
-	dv_reg		SDBCR;
-	dv_reg		SDRCR;
-	dv_reg		AB1CR;
-	dv_reg		AB2CR;
-	dv_reg		AB3CR;
-	dv_reg		AB4CR;
-	dv_reg		SDTIMR;
-	dv_reg		DDRSR;
-	dv_reg		DDRPHYCR;
-	dv_reg		DDRPHYSR;
-	dv_reg		TOTAR;
-	dv_reg		TOTACTR;
-	dv_reg		DDRPHYID_REV;
-	dv_reg		SDSRETR;
-	dv_reg		EIRR;
-	dv_reg		EIMR;
-	dv_reg		EIMSR;
-	dv_reg		EIMCR;
-	dv_reg		IOCTRLR;
-	dv_reg		IOSTATR;
-	u_int8_t	RSVD0[8];
-	dv_reg		NANDFCR;
-	dv_reg		NANDFSR;
-	u_int8_t	RSVD1[8];
-	dv_reg		NANDFECC[4];
-	u_int8_t	RSVD2[60];
-	dv_reg		NAND4BITECCLOAD;
-	dv_reg		NAND4BITECC1;
-	dv_reg		NAND4BITECC2;
-	dv_reg		NAND4BITECC3;
-	dv_reg		NAND4BITECC4;
-	dv_reg		NANDERRADD1;
-	dv_reg		NANDERRADD2;
-	dv_reg		NANDERRVAL1;
-	dv_reg		NANDERRVAL2;
-} emif_registers;
-
-typedef emif_registers	*emifregs;
+struct davinci_emif_regs {
+	u_int32_t	ercsr;
+	u_int32_t	awccr;
+	u_int32_t	sdbcr;
+	u_int32_t	sdrcr;
+	u_int32_t	ab1cr;
+	u_int32_t	ab2cr;
+	u_int32_t	ab3cr;
+	u_int32_t	ab4cr;
+	u_int32_t	sdtimr;
+	u_int32_t	ddrsr;
+	u_int32_t	ddrphycr;
+	u_int32_t	ddrphysr;
+	u_int32_t	totar;
+	u_int32_t	totactr;
+	u_int32_t	ddrphyid_rev;
+	u_int32_t	sdsretr;
+	u_int32_t	eirr;
+	u_int32_t	eimr;
+	u_int32_t	eimsr;
+	u_int32_t	eimcr;
+	u_int32_t	ioctrlr;
+	u_int32_t	iostatr;
+	u_int8_t	rsvd0[8];
+	u_int32_t	nandfcr;
+	u_int32_t	nandfsr;
+	u_int8_t	rsvd1[8];
+	u_int32_t	nandfecc[4];
+	u_int8_t	rsvd2[60];
+	u_int32_t	nand4biteccload;
+	u_int32_t	nand4bitecc[4];
+	u_int32_t	nanderradd1;
+	u_int32_t	nanderradd2;
+	u_int32_t	nanderrval1;
+	u_int32_t	nanderrval2;
+};
 
 #define davinci_emif_regs \
 	((struct davinci_emif_regs *)DAVINCI_ASYNC_EMIF_CNTRL_BASE)
diff --git a/include/asm-arm/arch-davinci/gpio_defs.h b/arch/arm/include/asm/arch-davinci/gpio_defs.h
index 1be2ac2660..1be2ac2660 100644
--- a/include/asm-arm/arch-davinci/gpio_defs.h
+++ b/arch/arm/include/asm/arch-davinci/gpio_defs.h
diff --git a/include/asm-arm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h
index 81cc8ab157..81cc8ab157 100644
--- a/include/asm-arm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
diff --git a/include/asm-arm/arch-davinci/i2c_defs.h b/arch/arm/include/asm/arch-davinci/i2c_defs.h
index 24cd268b95..24cd268b95 100644
--- a/include/asm-arm/arch-davinci/i2c_defs.h
+++ b/arch/arm/include/asm/arch-davinci/i2c_defs.h
diff --git a/include/asm-arm/arch-davinci/nand_defs.h b/arch/arm/include/asm/arch-davinci/nand_defs.h
index 10f3a392ab..10f3a392ab 100644
--- a/include/asm-arm/arch-davinci/nand_defs.h
+++ b/arch/arm/include/asm/arch-davinci/nand_defs.h
diff --git a/include/asm-arm/arch-ep93xx/ep93xx.h b/arch/arm/include/asm/arch-ep93xx/ep93xx.h
index 806557a50e..806557a50e 100644
--- a/include/asm-arm/arch-ep93xx/ep93xx.h
+++ b/arch/arm/include/asm/arch-ep93xx/ep93xx.h
diff --git a/include/asm-arm/arch-imx/imx-regs.h b/arch/arm/include/asm/arch-imx/imx-regs.h
index ec94ba913f..ec94ba913f 100644
--- a/include/asm-arm/arch-imx/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx/imx-regs.h
diff --git a/include/asm-arm/arch-ixp/ixp425.h b/arch/arm/include/asm/arch-ixp/ixp425.h
index 2114437dc7..2114437dc7 100644
--- a/include/asm-arm/arch-ixp/ixp425.h
+++ b/arch/arm/include/asm/arch-ixp/ixp425.h
diff --git a/include/asm-arm/arch-ixp/ixp425pci.h b/arch/arm/include/asm/arch-ixp/ixp425pci.h
index 9ea3319d84..9ea3319d84 100644
--- a/include/asm-arm/arch-ixp/ixp425pci.h
+++ b/arch/arm/include/asm/arch-ixp/ixp425pci.h
diff --git a/include/asm-arm/arch-kirkwood/cpu.h b/arch/arm/include/asm/arch-kirkwood/cpu.h
index b3022a3780..b3022a3780 100644
--- a/include/asm-arm/arch-kirkwood/cpu.h
+++ b/arch/arm/include/asm/arch-kirkwood/cpu.h
diff --git a/include/asm-arm/arch-kirkwood/gpio.h b/arch/arm/include/asm/arch-kirkwood/gpio.h
index cd1bc008ee..cd1bc008ee 100644
--- a/include/asm-arm/arch-kirkwood/gpio.h
+++ b/arch/arm/include/asm/arch-kirkwood/gpio.h
diff --git a/include/asm-arm/arch-kirkwood/kirkwood.h b/arch/arm/include/asm/arch-kirkwood/kirkwood.h
index 2470efbd8c..2470efbd8c 100644
--- a/include/asm-arm/arch-kirkwood/kirkwood.h
+++ b/arch/arm/include/asm/arch-kirkwood/kirkwood.h
diff --git a/include/asm-arm/arch-kirkwood/kw88f6192.h b/arch/arm/include/asm/arch-kirkwood/kw88f6192.h
index bbb7ceebba..bbb7ceebba 100644
--- a/include/asm-arm/arch-kirkwood/kw88f6192.h
+++ b/arch/arm/include/asm/arch-kirkwood/kw88f6192.h
diff --git a/include/asm-arm/arch-kirkwood/kw88f6281.h b/arch/arm/include/asm/arch-kirkwood/kw88f6281.h
index 80723eac54..80723eac54 100644
--- a/include/asm-arm/arch-kirkwood/kw88f6281.h
+++ b/arch/arm/include/asm/arch-kirkwood/kw88f6281.h
diff --git a/include/asm-arm/arch-kirkwood/mpp.h b/arch/arm/include/asm/arch-kirkwood/mpp.h
index b3c090edcd..b3c090edcd 100644
--- a/include/asm-arm/arch-kirkwood/mpp.h
+++ b/arch/arm/include/asm/arch-kirkwood/mpp.h
diff --git a/include/asm-arm/arch-kirkwood/spi.h b/arch/arm/include/asm/arch-kirkwood/spi.h
index 1d5043f94f..1d5043f94f 100644
--- a/include/asm-arm/arch-kirkwood/spi.h
+++ b/arch/arm/include/asm/arch-kirkwood/spi.h
diff --git a/include/asm-arm/arch-ks8695/platform.h b/arch/arm/include/asm/arch-ks8695/platform.h
index de20015001..de20015001 100644
--- a/include/asm-arm/arch-ks8695/platform.h
+++ b/arch/arm/include/asm/arch-ks8695/platform.h
diff --git a/include/asm-arm/arch-lpc2292/hardware.h b/arch/arm/include/asm/arch-lpc2292/hardware.h
index fd2b464e37..5e227e367c 100644
--- a/include/asm-arm/arch-lpc2292/hardware.h
+++ b/arch/arm/include/asm/arch-lpc2292/hardware.h
@@ -25,7 +25,7 @@
  */
 
 #if defined(CONFIG_LPC2292)
-#include <asm-arm/arch-lpc2292/lpc2292_registers.h>
+#include <asm/arch-lpc2292/lpc2292_registers.h>
 #else
 #error No hardware file defined for this configuration
 #endif
diff --git a/include/asm-arm/arch-lpc2292/lpc2292_registers.h b/arch/arm/include/asm/arch-lpc2292/lpc2292_registers.h
index 5715f3ef74..5715f3ef74 100644
--- a/include/asm-arm/arch-lpc2292/lpc2292_registers.h
+++ b/arch/arm/include/asm/arch-lpc2292/lpc2292_registers.h
diff --git a/include/asm-arm/arch-lpc2292/spi.h b/arch/arm/include/asm/arch-lpc2292/spi.h
index 6ae66e8ba7..6ae66e8ba7 100644
--- a/include/asm-arm/arch-lpc2292/spi.h
+++ b/arch/arm/include/asm/arch-lpc2292/spi.h
diff --git a/include/asm-arm/arch-mx25/clock.h b/arch/arm/include/asm/arch-mx25/clock.h
index c59f588570..c59f588570 100644
--- a/include/asm-arm/arch-mx25/clock.h
+++ b/arch/arm/include/asm/arch-mx25/clock.h
diff --git a/include/asm-arm/arch-mx25/imx-regs.h b/arch/arm/include/asm/arch-mx25/imx-regs.h
index f709bd8e0e..f709bd8e0e 100644
--- a/include/asm-arm/arch-mx25/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx25/imx-regs.h
diff --git a/include/asm-arm/arch-mx25/imx25-pinmux.h b/arch/arm/include/asm/arch-mx25/imx25-pinmux.h
index a4c658b41b..a4c658b41b 100644
--- a/include/asm-arm/arch-mx25/imx25-pinmux.h
+++ b/arch/arm/include/asm/arch-mx25/imx25-pinmux.h
diff --git a/include/asm-arm/arch-mx27/asm-offsets.h b/arch/arm/include/asm/arch-mx27/asm-offsets.h
index 497afe5745..497afe5745 100644
--- a/include/asm-arm/arch-mx27/asm-offsets.h
+++ b/arch/arm/include/asm/arch-mx27/asm-offsets.h
diff --git a/include/asm-arm/arch-mx27/clock.h b/arch/arm/include/asm/arch-mx27/clock.h
index 7e9c7aabb0..7e9c7aabb0 100644
--- a/include/asm-arm/arch-mx27/clock.h
+++ b/arch/arm/include/asm/arch-mx27/clock.h
diff --git a/include/asm-arm/arch-mx27/imx-regs.h b/arch/arm/include/asm/arch-mx27/imx-regs.h
index d36a6da96d..6ecddaae85 100644
--- a/include/asm-arm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -37,6 +37,7 @@ extern void mx27_fec_init_pins(void);
 #endif /* CONFIG_FEC_MXC */
 
 #ifdef CONFIG_MXC_MMC
+extern void mx27_sd1_init_pins(void);
 extern void mx27_sd2_init_pins(void);
 #endif /* CONFIG_MXC_MMC */
 
diff --git a/include/asm-arm/arch-mx27/mxcmmc.h b/arch/arm/include/asm/arch-mx27/mxcmmc.h
index 4c83cc7cb7..4c83cc7cb7 100644
--- a/include/asm-arm/arch-mx27/mxcmmc.h
+++ b/arch/arm/include/asm/arch-mx27/mxcmmc.h
diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/arch/arm/include/asm/arch-mx31/mx31-regs.h
index 6f6e9a4048..6f6e9a4048 100644
--- a/include/asm-arm/arch-mx31/mx31-regs.h
+++ b/arch/arm/include/asm/arch-mx31/mx31-regs.h
diff --git a/include/asm-arm/arch-mx31/mx31.h b/arch/arm/include/asm/arch-mx31/mx31.h
index 3cc4b350b6..3cc4b350b6 100644
--- a/include/asm-arm/arch-mx31/mx31.h
+++ b/arch/arm/include/asm/arch-mx31/mx31.h
diff --git a/include/asm-arm/arch-mx51/asm-offsets.h b/arch/arm/include/asm/arch-mx51/asm-offsets.h
index 3a83fa07a1..fbba412aab 100644
--- a/include/asm-arm/arch-mx51/asm-offsets.h
+++ b/arch/arm/include/asm/arch-mx51/asm-offsets.h
@@ -1,5 +1,5 @@
 /*
- * needed for cpu/arm_cortexa8/mx51/lowlevel_init.S
+ * needed for arch/arm/cpu/arm_cortexa8/mx51/lowlevel_init.S
  *
  * These should be auto-generated
  */
diff --git a/include/asm-arm/arch-mx51/clock.h b/arch/arm/include/asm/arch-mx51/clock.h
index 1f8a537a56..1f8a537a56 100644
--- a/include/asm-arm/arch-mx51/clock.h
+++ b/arch/arm/include/asm/arch-mx51/clock.h
diff --git a/include/asm-arm/arch-mx51/crm_regs.h b/arch/arm/include/asm/arch-mx51/crm_regs.h
index 14aa231a5b..14aa231a5b 100644
--- a/include/asm-arm/arch-mx51/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx51/crm_regs.h
diff --git a/include/asm-arm/arch-mx51/imx-regs.h b/arch/arm/include/asm/arch-mx51/imx-regs.h
index 3887d3cec4..3887d3cec4 100644
--- a/include/asm-arm/arch-mx51/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx51/imx-regs.h
diff --git a/include/asm-arm/arch-mx51/iomux.h b/arch/arm/include/asm/arch-mx51/iomux.h
index a41c387c7c..a41c387c7c 100644
--- a/include/asm-arm/arch-mx51/iomux.h
+++ b/arch/arm/include/asm/arch-mx51/iomux.h
diff --git a/include/asm-arm/arch-mx51/mx51_pins.h b/arch/arm/include/asm/arch-mx51/mx51_pins.h
index ca26f4166b..ca26f4166b 100644
--- a/include/asm-arm/arch-mx51/mx51_pins.h
+++ b/arch/arm/include/asm/arch-mx51/mx51_pins.h
diff --git a/include/asm-arm/arch-mx51/sys_proto.h b/arch/arm/include/asm/arch-mx51/sys_proto.h
index bf500a8b32..bf500a8b32 100644
--- a/include/asm-arm/arch-mx51/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx51/sys_proto.h
diff --git a/include/asm-arm/arch-nomadik/gpio.h b/arch/arm/include/asm/arch-nomadik/gpio.h
index 1d3c9ce0ab..1d3c9ce0ab 100644
--- a/include/asm-arm/arch-nomadik/gpio.h
+++ b/arch/arm/include/asm/arch-nomadik/gpio.h
diff --git a/include/asm-arm/arch-nomadik/mtu.h b/arch/arm/include/asm/arch-nomadik/mtu.h
index a87be9ef4f..a87be9ef4f 100644
--- a/include/asm-arm/arch-nomadik/mtu.h
+++ b/arch/arm/include/asm/arch-nomadik/mtu.h
diff --git a/include/asm-arm/arch-omap/sizes.h b/arch/arm/include/asm/arch-omap/sizes.h
index f8d92ca120..f8d92ca120 100644
--- a/include/asm-arm/arch-omap/sizes.h
+++ b/arch/arm/include/asm/arch-omap/sizes.h
diff --git a/include/asm-arm/arch-omap24xx/bits.h b/arch/arm/include/asm/arch-omap24xx/bits.h
index 8522335bfc..8522335bfc 100644
--- a/include/asm-arm/arch-omap24xx/bits.h
+++ b/arch/arm/include/asm/arch-omap24xx/bits.h
diff --git a/include/asm-arm/arch-omap24xx/clocks.h b/arch/arm/include/asm/arch-omap24xx/clocks.h
index 2e92569a9c..2e92569a9c 100644
--- a/include/asm-arm/arch-omap24xx/clocks.h
+++ b/arch/arm/include/asm/arch-omap24xx/clocks.h
diff --git a/include/asm-arm/arch-omap24xx/i2c.h b/arch/arm/include/asm/arch-omap24xx/i2c.h
index 19046aaab4..19046aaab4 100644
--- a/include/asm-arm/arch-omap24xx/i2c.h
+++ b/arch/arm/include/asm/arch-omap24xx/i2c.h
diff --git a/include/asm-arm/arch-omap24xx/mem.h b/arch/arm/include/asm/arch-omap24xx/mem.h
index 42e8ab2bce..42e8ab2bce 100644
--- a/include/asm-arm/arch-omap24xx/mem.h
+++ b/arch/arm/include/asm/arch-omap24xx/mem.h
diff --git a/include/asm-arm/arch-omap24xx/mux.h b/arch/arm/include/asm/arch-omap24xx/mux.h
index 4fdb9c635f..4fdb9c635f 100644
--- a/include/asm-arm/arch-omap24xx/mux.h
+++ b/arch/arm/include/asm/arch-omap24xx/mux.h
diff --git a/include/asm-arm/arch-omap24xx/omap2420.h b/arch/arm/include/asm/arch-omap24xx/omap2420.h
index 0c11beccf6..0c11beccf6 100644
--- a/include/asm-arm/arch-omap24xx/omap2420.h
+++ b/arch/arm/include/asm/arch-omap24xx/omap2420.h
diff --git a/include/asm-arm/arch-omap24xx/sizes.h b/arch/arm/include/asm/arch-omap24xx/sizes.h
index aaba18f150..aaba18f150 100644
--- a/include/asm-arm/arch-omap24xx/sizes.h
+++ b/arch/arm/include/asm/arch-omap24xx/sizes.h
diff --git a/include/asm-arm/arch-omap24xx/sys_info.h b/arch/arm/include/asm/arch-omap24xx/sys_info.h
index 53c231a5e4..53c231a5e4 100644
--- a/include/asm-arm/arch-omap24xx/sys_info.h
+++ b/arch/arm/include/asm/arch-omap24xx/sys_info.h
diff --git a/include/asm-arm/arch-omap24xx/sys_proto.h b/arch/arm/include/asm/arch-omap24xx/sys_proto.h
index 9d8e5b2622..9d8e5b2622 100644
--- a/include/asm-arm/arch-omap24xx/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap24xx/sys_proto.h
diff --git a/include/asm-arm/arch-omap3/clocks.h b/arch/arm/include/asm/arch-omap3/clocks.h
index 71a0cb6ae4..71a0cb6ae4 100644
--- a/include/asm-arm/arch-omap3/clocks.h
+++ b/arch/arm/include/asm/arch-omap3/clocks.h
diff --git a/include/asm-arm/arch-omap3/clocks_omap3.h b/arch/arm/include/asm/arch-omap3/clocks_omap3.h
index 661407b564..661407b564 100644
--- a/include/asm-arm/arch-omap3/clocks_omap3.h
+++ b/arch/arm/include/asm/arch-omap3/clocks_omap3.h
diff --git a/include/asm-arm/arch-omap3/cpu.h b/arch/arm/include/asm/arch-omap3/cpu.h
index aa8de32450..aa8de32450 100644
--- a/include/asm-arm/arch-omap3/cpu.h
+++ b/arch/arm/include/asm/arch-omap3/cpu.h
diff --git a/include/asm-arm/arch-omap3/gpio.h b/arch/arm/include/asm/arch-omap3/gpio.h
index 30f633ce96..30f633ce96 100644
--- a/include/asm-arm/arch-omap3/gpio.h
+++ b/arch/arm/include/asm/arch-omap3/gpio.h
diff --git a/include/asm-arm/arch-omap3/i2c.h b/arch/arm/include/asm/arch-omap3/i2c.h
index 490e03bb65..490e03bb65 100644
--- a/include/asm-arm/arch-omap3/i2c.h
+++ b/arch/arm/include/asm/arch-omap3/i2c.h
diff --git a/include/asm-arm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h
index 9439758e4a..9439758e4a 100644
--- a/include/asm-arm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
diff --git a/include/asm-arm/arch-omap3/mmc.h b/arch/arm/include/asm/arch-omap3/mmc.h
index 196ffdcff6..196ffdcff6 100644
--- a/include/asm-arm/arch-omap3/mmc.h
+++ b/arch/arm/include/asm/arch-omap3/mmc.h
diff --git a/include/asm-arm/arch-omap3/mmc_host_def.h b/arch/arm/include/asm/arch-omap3/mmc_host_def.h
index aa751c9a34..aa751c9a34 100644
--- a/include/asm-arm/arch-omap3/mmc_host_def.h
+++ b/arch/arm/include/asm/arch-omap3/mmc_host_def.h
diff --git a/include/asm-arm/arch-omap3/mux.h b/arch/arm/include/asm/arch-omap3/mux.h
index 0c01c73165..0c01c73165 100644
--- a/include/asm-arm/arch-omap3/mux.h
+++ b/arch/arm/include/asm/arch-omap3/mux.h
diff --git a/include/asm-arm/arch-omap3/omap3.h b/arch/arm/include/asm/arch-omap3/omap3.h
index 12815f694f..12815f694f 100644
--- a/include/asm-arm/arch-omap3/omap3.h
+++ b/arch/arm/include/asm/arch-omap3/omap3.h
diff --git a/include/asm-arm/arch-omap3/omap_gpmc.h b/arch/arm/include/asm/arch-omap3/omap_gpmc.h
index bd22bce837..bd22bce837 100644
--- a/include/asm-arm/arch-omap3/omap_gpmc.h
+++ b/arch/arm/include/asm/arch-omap3/omap_gpmc.h
diff --git a/include/asm-arm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h
index 34bd515b05..34bd515b05 100644
--- a/include/asm-arm/arch-omap3/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
diff --git a/include/asm-arm/arch-pxa/bitfield.h b/arch/arm/include/asm/arch-pxa/bitfield.h
index 104a21c2e4..104a21c2e4 100644
--- a/include/asm-arm/arch-pxa/bitfield.h
+++ b/arch/arm/include/asm/arch-pxa/bitfield.h
diff --git a/include/asm-arm/arch-pxa/hardware.h b/arch/arm/include/asm/arch-pxa/hardware.h
index c8c479a186..c8c479a186 100644
--- a/include/asm-arm/arch-pxa/hardware.h
+++ b/arch/arm/include/asm/arch-pxa/hardware.h
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/arch/arm/include/asm/arch-pxa/pxa-regs.h
index a25d4c512a..a25d4c512a 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/arch/arm/include/asm/arch-pxa/pxa-regs.h
diff --git a/include/asm-arm/arch-s3c24x0/memory.h b/arch/arm/include/asm/arch-s3c24x0/memory.h
index 61d62707c7..61d62707c7 100644
--- a/include/asm-arm/arch-s3c24x0/memory.h
+++ b/arch/arm/include/asm/arch-s3c24x0/memory.h
diff --git a/include/asm-arm/arch-s3c24x0/s3c2400.h b/arch/arm/include/asm/arch-s3c24x0/s3c2400.h
index 2678be1548..2678be1548 100644
--- a/include/asm-arm/arch-s3c24x0/s3c2400.h
+++ b/arch/arm/include/asm/arch-s3c24x0/s3c2400.h
diff --git a/include/asm-arm/arch-s3c24x0/s3c2410.h b/arch/arm/include/asm/arch-s3c24x0/s3c2410.h
index 0543fe1565..0543fe1565 100644
--- a/include/asm-arm/arch-s3c24x0/s3c2410.h
+++ b/arch/arm/include/asm/arch-s3c24x0/s3c2410.h
diff --git a/include/asm-arm/arch-s3c24x0/s3c24x0.h b/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h
index 15f53dd35b..15f53dd35b 100644
--- a/include/asm-arm/arch-s3c24x0/s3c24x0.h
+++ b/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h
diff --git a/include/asm-arm/arch-s3c24x0/s3c24x0_cpu.h b/arch/arm/include/asm/arch-s3c24x0/s3c24x0_cpu.h
index c37d4a108d..c37d4a108d 100644
--- a/include/asm-arm/arch-s3c24x0/s3c24x0_cpu.h
+++ b/arch/arm/include/asm/arch-s3c24x0/s3c24x0_cpu.h
diff --git a/include/asm-arm/arch-s3c44b0/hardware.h b/arch/arm/include/asm/arch-s3c44b0/hardware.h
index 146e265d9a..146e265d9a 100644
--- a/include/asm-arm/arch-s3c44b0/hardware.h
+++ b/arch/arm/include/asm/arch-s3c44b0/hardware.h
diff --git a/include/asm-arm/arch-s3c4510b/hardware.h b/arch/arm/include/asm/arch-s3c4510b/hardware.h
index 6b8c8edd7a..6b8c8edd7a 100644
--- a/include/asm-arm/arch-s3c4510b/hardware.h
+++ b/arch/arm/include/asm/arch-s3c4510b/hardware.h
diff --git a/include/asm-arm/arch-s3c64xx/hardware.h b/arch/arm/include/asm/arch-s3c64xx/hardware.h
index 84d24c9384..84d24c9384 100644
--- a/include/asm-arm/arch-s3c64xx/hardware.h
+++ b/arch/arm/include/asm/arch-s3c64xx/hardware.h
diff --git a/include/asm-arm/arch-s3c64xx/s3c6400.h b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
index 10b33241e1..10b33241e1 100644
--- a/include/asm-arm/arch-s3c64xx/s3c6400.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
diff --git a/include/asm-arm/arch-s3c64xx/s3c64x0.h b/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
index 0bbf1d0c43..0bbf1d0c43 100644
--- a/include/asm-arm/arch-s3c64xx/s3c64x0.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
diff --git a/include/asm-arm/arch-s5pc1xx/clk.h b/arch/arm/include/asm/arch-s5pc1xx/clk.h
index 3e59abe78c..3e59abe78c 100644
--- a/include/asm-arm/arch-s5pc1xx/clk.h
+++ b/arch/arm/include/asm/arch-s5pc1xx/clk.h
diff --git a/include/asm-arm/arch-s5pc1xx/clock.h b/arch/arm/include/asm/arch-s5pc1xx/clock.h
index 7b4eb89905..7b4eb89905 100644
--- a/include/asm-arm/arch-s5pc1xx/clock.h
+++ b/arch/arm/include/asm/arch-s5pc1xx/clock.h
diff --git a/include/asm-arm/arch-s5pc1xx/cpu.h b/arch/arm/include/asm/arch-s5pc1xx/cpu.h
index 90485aaff2..90485aaff2 100644
--- a/include/asm-arm/arch-s5pc1xx/cpu.h
+++ b/arch/arm/include/asm/arch-s5pc1xx/cpu.h
diff --git a/include/asm-arm/arch-s5pc1xx/gpio.h b/arch/arm/include/asm/arch-s5pc1xx/gpio.h
index 9a7faed319..9a7faed319 100644
--- a/include/asm-arm/arch-s5pc1xx/gpio.h
+++ b/arch/arm/include/asm/arch-s5pc1xx/gpio.h
diff --git a/include/asm-arm/arch-s5pc1xx/power.h b/arch/arm/include/asm/arch-s5pc1xx/power.h
index 57e2a2ba19..57e2a2ba19 100644
--- a/include/asm-arm/arch-s5pc1xx/power.h
+++ b/arch/arm/include/asm/arch-s5pc1xx/power.h
diff --git a/include/asm-arm/arch-s5pc1xx/pwm.h b/arch/arm/include/asm/arch-s5pc1xx/pwm.h
index e02a8d8fb3..e02a8d8fb3 100644
--- a/include/asm-arm/arch-s5pc1xx/pwm.h
+++ b/arch/arm/include/asm/arch-s5pc1xx/pwm.h
diff --git a/include/asm-arm/arch-s5pc1xx/smc.h b/arch/arm/include/asm/arch-s5pc1xx/smc.h
index 88f4ffe33a..88f4ffe33a 100644
--- a/include/asm-arm/arch-s5pc1xx/smc.h
+++ b/arch/arm/include/asm/arch-s5pc1xx/smc.h
diff --git a/include/asm-arm/arch-s5pc1xx/sys_proto.h b/arch/arm/include/asm/arch-s5pc1xx/sys_proto.h
index 3078aafd7f..3078aafd7f 100644
--- a/include/asm-arm/arch-s5pc1xx/sys_proto.h
+++ b/arch/arm/include/asm/arch-s5pc1xx/sys_proto.h
diff --git a/include/asm-arm/arch-s5pc1xx/uart.h b/arch/arm/include/asm/arch-s5pc1xx/uart.h
index 2d7ad7ec98..2d7ad7ec98 100644
--- a/include/asm-arm/arch-s5pc1xx/uart.h
+++ b/arch/arm/include/asm/arch-s5pc1xx/uart.h
diff --git a/include/asm-arm/arch-sa1100/bitfield.h b/arch/arm/include/asm/arch-sa1100/bitfield.h
index 104a21c2e4..104a21c2e4 100644
--- a/include/asm-arm/arch-sa1100/bitfield.h
+++ b/arch/arm/include/asm/arch-sa1100/bitfield.h
diff --git a/include/asm-arm/arch-spear/hardware.h b/arch/arm/include/asm/arch-spear/hardware.h
index 818f36cc66..818f36cc66 100644
--- a/include/asm-arm/arch-spear/hardware.h
+++ b/arch/arm/include/asm/arch-spear/hardware.h
diff --git a/include/asm-arm/arch-spear/spr_defs.h b/arch/arm/include/asm/arch-spear/spr_defs.h
index fa8412ccfc..fa8412ccfc 100644
--- a/include/asm-arm/arch-spear/spr_defs.h
+++ b/arch/arm/include/asm/arch-spear/spr_defs.h
diff --git a/include/asm-arm/arch-spear/spr_emi.h b/arch/arm/include/asm/arch-spear/spr_emi.h
index c1f1c2aff1..c1f1c2aff1 100644
--- a/include/asm-arm/arch-spear/spr_emi.h
+++ b/arch/arm/include/asm/arch-spear/spr_emi.h
diff --git a/include/asm-arm/arch-spear/spr_gpt.h b/arch/arm/include/asm/arch-spear/spr_gpt.h
index 965b5abb9a..965b5abb9a 100644
--- a/include/asm-arm/arch-spear/spr_gpt.h
+++ b/arch/arm/include/asm/arch-spear/spr_gpt.h
diff --git a/include/asm-arm/arch-spear/spr_i2c.h b/arch/arm/include/asm/arch-spear/spr_i2c.h
index 7521ebc6cf..7521ebc6cf 100644
--- a/include/asm-arm/arch-spear/spr_i2c.h
+++ b/arch/arm/include/asm/arch-spear/spr_i2c.h
diff --git a/include/asm-arm/arch-spear/spr_misc.h b/arch/arm/include/asm/arch-spear/spr_misc.h
index 8b96d9b52a..8b96d9b52a 100644
--- a/include/asm-arm/arch-spear/spr_misc.h
+++ b/arch/arm/include/asm/arch-spear/spr_misc.h
diff --git a/include/asm-arm/arch-spear/spr_nand.h b/arch/arm/include/asm/arch-spear/spr_nand.h
index 2b63dc7e8e..2b63dc7e8e 100644
--- a/include/asm-arm/arch-spear/spr_nand.h
+++ b/arch/arm/include/asm/arch-spear/spr_nand.h
diff --git a/include/asm-arm/arch-spear/spr_smi.h b/arch/arm/include/asm/arch-spear/spr_smi.h
index 06df74557f..06df74557f 100644
--- a/include/asm-arm/arch-spear/spr_smi.h
+++ b/arch/arm/include/asm/arch-spear/spr_smi.h
diff --git a/include/asm-arm/arch-spear/spr_syscntl.h b/arch/arm/include/asm/arch-spear/spr_syscntl.h
index 3c92f094cf..3c92f094cf 100644
--- a/include/asm-arm/arch-spear/spr_syscntl.h
+++ b/arch/arm/include/asm/arch-spear/spr_syscntl.h
diff --git a/include/asm-arm/arch-spear/spr_xloader_table.h b/arch/arm/include/asm/arch-spear/spr_xloader_table.h
index 7e3da18578..7e3da18578 100644
--- a/include/asm-arm/arch-spear/spr_xloader_table.h
+++ b/arch/arm/include/asm/arch-spear/spr_xloader_table.h
diff --git a/include/asm-arm/atomic.h b/arch/arm/include/asm/atomic.h
index ba9e4b72d8..ba9e4b72d8 100644
--- a/include/asm-arm/atomic.h
+++ b/arch/arm/include/asm/atomic.h
diff --git a/include/asm-arm/bitops.h b/arch/arm/include/asm/bitops.h
index 270f163eee..270f163eee 100644
--- a/include/asm-arm/bitops.h
+++ b/arch/arm/include/asm/bitops.h
diff --git a/include/asm-arm/byteorder.h b/arch/arm/include/asm/byteorder.h
index c3489f1e1f..c3489f1e1f 100644
--- a/include/asm-arm/byteorder.h
+++ b/arch/arm/include/asm/byteorder.h
diff --git a/include/asm-arm/cache.h b/arch/arm/include/asm/cache.h
index d0518be28c..d0518be28c 100644
--- a/include/asm-arm/cache.h
+++ b/arch/arm/include/asm/cache.h
diff --git a/include/asm-arm/config.h b/arch/arm/include/asm/config.h
index b76fd8eb48..b76fd8eb48 100644
--- a/include/asm-arm/config.h
+++ b/arch/arm/include/asm/config.h
diff --git a/include/asm-arm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 501ce0e680..501ce0e680 100644
--- a/include/asm-arm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
diff --git a/include/asm-arm/errno.h b/arch/arm/include/asm/errno.h
index 4c82b503d9..4c82b503d9 100644
--- a/include/asm-arm/errno.h
+++ b/arch/arm/include/asm/errno.h
diff --git a/include/asm-arm/global_data.h b/arch/arm/include/asm/global_data.h
index 02cfe4584a..02cfe4584a 100644
--- a/include/asm-arm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
diff --git a/include/asm-arm/hardware.h b/arch/arm/include/asm/hardware.h
index 1fd1a5b650..1fd1a5b650 100644
--- a/include/asm-arm/hardware.h
+++ b/arch/arm/include/asm/hardware.h
diff --git a/include/asm-arm/io.h b/arch/arm/include/asm/io.h
index 0a4b5be715..0a4b5be715 100644
--- a/include/asm-arm/io.h
+++ b/arch/arm/include/asm/io.h
diff --git a/include/asm-arm/mach-types.h b/arch/arm/include/asm/mach-types.h
index 4622557b57..b33e97b5fa 100644
--- a/include/asm-arm/mach-types.h
+++ b/arch/arm/include/asm/mach-types.h
@@ -2659,7 +2659,7 @@ extern unsigned int __machine_arch_type;
 #define MACH_TYPE_AQUILA               2676
 #define MACH_TYPE_SPARK_SLS_HW2        2677
 #define MACH_TYPE_ESATA_SHEEVAPLUG     2678
-#define MACH_TYPE_SURF7X30             2679
+#define MACH_TYPE_MSM7X30_SURF         2679
 #define MACH_TYPE_MICRO2440            2680
 #define MACH_TYPE_AM2440               2681
 #define MACH_TYPE_TQ2440               2682
@@ -2693,12 +2693,86 @@ extern unsigned int __machine_arch_type;
 #define MACH_TYPE_QSD8X50_FFA          2710
 #define MACH_TYPE_QSD8X50A_SURF        2711
 #define MACH_TYPE_QSD8X50A_FFA         2712
-#define MACH_TYPE_XGCP10               2713
+#define MACH_TYPE_ADX_XGCP10           2713
 #define MACH_TYPE_MCGWUMTS2A           2714
 #define MACH_TYPE_MOBIKT               2715
 #define MACH_TYPE_MX53_EVK             2716
 #define MACH_TYPE_IGEP0030             2717
 #define MACH_TYPE_AXELL_H40_H50_CTRL   2718
+#define MACH_TYPE_DTCOMMOD             2719
+#define MACH_TYPE_GOULD                2720
+#define MACH_TYPE_SIBERIA              2721
+#define MACH_TYPE_SBC3530              2722
+#define MACH_TYPE_QARM                 2723
+#define MACH_TYPE_MIPS                 2724
+#define MACH_TYPE_MX27GRB              2725
+#define MACH_TYPE_SBC8100              2726
+#define MACH_TYPE_SAARB                2727
+#define MACH_TYPE_OMAP3MINI            2728
+#define MACH_TYPE_CNMBOOK7SE           2729
+#define MACH_TYPE_CATAN                2730
+#define MACH_TYPE_HARMONY              2731
+#define MACH_TYPE_TONGA                2732
+#define MACH_TYPE_CYBOOK_ORIZON        2733
+#define MACH_TYPE_HTCRHODIUMCDMA       2734
+#define MACH_TYPE_EPC_G45              2735
+#define MACH_TYPE_EPC_LPC3250          2736
+#define MACH_TYPE_MXC91341EVB          2737
+#define MACH_TYPE_RTW1000              2738
+#define MACH_TYPE_BOBCAT               2739
+#define MACH_TYPE_TRIZEPS6             2740
+#define MACH_TYPE_MSM7X30_FLUID        2741
+#define MACH_TYPE_NEDAP9263            2742
+#define MACH_TYPE_NETGEAR_MS2110       2743
+#define MACH_TYPE_BMX                  2744
+#define MACH_TYPE_NETSTREAM            2745
+#define MACH_TYPE_VPNEXT_RCU           2746
+#define MACH_TYPE_VPNEXT_MPU           2747
+#define MACH_TYPE_BCMRING_TABLET_V1    2748
+#define MACH_TYPE_SGARM10              2749
+#define MACH_TYPE_CM_T3517             2750
+#define MACH_TYPE_OMAP3_CPS            2751
+#define MACH_TYPE_AXAR1500_RECEIVER    2752
+#define MACH_TYPE_WBD222               2753
+#define MACH_TYPE_MT65XX               2754
+#define MACH_TYPE_MSM8X60_SURF         2755
+#define MACH_TYPE_MSM8X60_SIM          2756
+#define MACH_TYPE_VMC300               2757
+#define MACH_TYPE_TCC8000_SDK          2758
+#define MACH_TYPE_NANOS                2759
+#define MACH_TYPE_STAMP9G10            2760
+#define MACH_TYPE_STAMP9G45            2761
+#define MACH_TYPE_H6053                2762
+#define MACH_TYPE_SMINT01              2763
+#define MACH_TYPE_PRTLVT2              2764
+#define MACH_TYPE_AP420                2765
+#define MACH_TYPE_HTCSHIFT             2766
+#define MACH_TYPE_DAVINCI_DM365_FC     2767
+#define MACH_TYPE_MSM8X55_SURF         2768
+#define MACH_TYPE_MSM8X55_FFA          2769
+#define MACH_TYPE_ESL_VAMANA           2770
+#define MACH_TYPE_SBC35                2771
+#define MACH_TYPE_MPX6446              2772
+#define MACH_TYPE_OREO_CONTROLLER      2773
+#define MACH_TYPE_KOPIN_MODELS         2774
+#define MACH_TYPE_TTC_VISION2          2775
+#define MACH_TYPE_CNS3420VB            2776
+#define MACH_TYPE_LPC2                 2777
+#define MACH_TYPE_OLYMPUS              2778
+#define MACH_TYPE_VORTEX               2779
+#define MACH_TYPE_S5PC200              2780
+#define MACH_TYPE_ECUCORE_9263         2781
+#define MACH_TYPE_SMDKC200             2782
+#define MACH_TYPE_EMSISO_SX27          2783
+#define MACH_TYPE_APX_SOM9G45_EK       2784
+#define MACH_TYPE_SONGSHAN             2785
+#define MACH_TYPE_TIANSHAN             2786
+#define MACH_TYPE_VPX500               2787
+#define MACH_TYPE_AM3517SAM            2788
+#define MACH_TYPE_SKAT91_SIM508        2789
+#define MACH_TYPE_SKAT91_S3E           2790
+#define MACH_TYPE_OMAP4_PANDA          2791
+#define MACH_TYPE_DF7220               2792
 
 #ifdef CONFIG_ARCH_EBSA110
 # ifdef machine_arch_type
@@ -18343,9 +18417,9 @@ extern unsigned int __machine_arch_type;
 # else
 #  define machine_arch_type	MACH_TYPE_HYNET_INE
 # endif
-# define machine_is_hynet_ine()	(machine_arch_type == MACH_TYPE_HYNET_INE)
+# define machine_is_argonst_foundation()	(machine_arch_type == MACH_TYPE_HYNET_INE)
 #else
-# define machine_is_hynet_ine()	(0)
+# define machine_is_argonst_foundation()	(0)
 #endif
 
 #ifdef CONFIG_MACH_HYNET_APP
@@ -30211,9 +30285,9 @@ extern unsigned int __machine_arch_type;
 # else
 #  define machine_arch_type	MACH_TYPE_OREO
 # endif
-# define machine_is_oreo()	(machine_arch_type == MACH_TYPE_OREO)
+# define machine_is_oreo_camera()	(machine_arch_type == MACH_TYPE_OREO)
 #else
-# define machine_is_oreo()	(0)
+# define machine_is_oreo_camera()	(0)
 #endif
 
 #ifdef CONFIG_MACH_SMDK6442
@@ -34464,14 +34538,14 @@ extern unsigned int __machine_arch_type;
 # define machine_is_sheeva_esata()	(0)
 #endif
 
-#ifdef CONFIG_MACH_SURF7X30
+#ifdef CONFIG_MACH_MSM7X30_SURF
 # ifdef machine_arch_type
 #  undef machine_arch_type
 #  define machine_arch_type	__machine_arch_type
 # else
-#  define machine_arch_type	MACH_TYPE_SURF7X30
+#  define machine_arch_type	MACH_TYPE_MSM7X30_SURF
 # endif
-# define machine_is_msm7x30_surf()	(machine_arch_type == MACH_TYPE_SURF7X30)
+# define machine_is_msm7x30_surf()	(machine_arch_type == MACH_TYPE_MSM7X30_SURF)
 #else
 # define machine_is_msm7x30_surf()	(0)
 #endif
@@ -34872,14 +34946,14 @@ extern unsigned int __machine_arch_type;
 # define machine_is_qsd8x50a_ffa()	(0)
 #endif
 
-#ifdef CONFIG_MACH_XGCP10
+#ifdef CONFIG_MACH_ADX_XGCP10
 # ifdef machine_arch_type
 #  undef machine_arch_type
 #  define machine_arch_type	__machine_arch_type
 # else
-#  define machine_arch_type	MACH_TYPE_XGCP10
+#  define machine_arch_type	MACH_TYPE_ADX_XGCP10
 # endif
-# define machine_is_adx_xgcp10()	(machine_arch_type == MACH_TYPE_XGCP10)
+# define machine_is_adx_xgcp10()	(machine_arch_type == MACH_TYPE_ADX_XGCP10)
 #else
 # define machine_is_adx_xgcp10()	(0)
 #endif
@@ -34944,6 +35018,894 @@ extern unsigned int __machine_arch_type;
 # define machine_is_axell_h40_h50_ctrl()	(0)
 #endif
 
+#ifdef CONFIG_MACH_DTCOMMOD
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_DTCOMMOD
+# endif
+# define machine_is_dtcommod()	(machine_arch_type == MACH_TYPE_DTCOMMOD)
+#else
+# define machine_is_dtcommod()	(0)
+#endif
+
+#ifdef CONFIG_MACH_GOULD
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_GOULD
+# endif
+# define machine_is_gould()	(machine_arch_type == MACH_TYPE_GOULD)
+#else
+# define machine_is_gould()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SIBERIA
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SIBERIA
+# endif
+# define machine_is_siberia()	(machine_arch_type == MACH_TYPE_SIBERIA)
+#else
+# define machine_is_siberia()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SBC3530
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SBC3530
+# endif
+# define machine_is_sbc3530()	(machine_arch_type == MACH_TYPE_SBC3530)
+#else
+# define machine_is_sbc3530()	(0)
+#endif
+
+#ifdef CONFIG_MACH_QARM
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_QARM
+# endif
+# define machine_is_qarm()	(machine_arch_type == MACH_TYPE_QARM)
+#else
+# define machine_is_qarm()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MIPS
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MIPS
+# endif
+# define machine_is_mips()	(machine_arch_type == MACH_TYPE_MIPS)
+#else
+# define machine_is_mips()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MX27GRB
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MX27GRB
+# endif
+# define machine_is_mx27grb()	(machine_arch_type == MACH_TYPE_MX27GRB)
+#else
+# define machine_is_mx27grb()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SBC8100
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SBC8100
+# endif
+# define machine_is_sbc8100()	(machine_arch_type == MACH_TYPE_SBC8100)
+#else
+# define machine_is_sbc8100()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SAARB
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SAARB
+# endif
+# define machine_is_saarb()	(machine_arch_type == MACH_TYPE_SAARB)
+#else
+# define machine_is_saarb()	(0)
+#endif
+
+#ifdef CONFIG_MACH_OMAP3MINI
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_OMAP3MINI
+# endif
+# define machine_is_omap3mini()	(machine_arch_type == MACH_TYPE_OMAP3MINI)
+#else
+# define machine_is_omap3mini()	(0)
+#endif
+
+#ifdef CONFIG_MACH_CNMBOOK7SE
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_CNMBOOK7SE
+# endif
+# define machine_is_cnmbook7se()	(machine_arch_type == MACH_TYPE_CNMBOOK7SE)
+#else
+# define machine_is_cnmbook7se()	(0)
+#endif
+
+#ifdef CONFIG_MACH_CATAN
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_CATAN
+# endif
+# define machine_is_catan()	(machine_arch_type == MACH_TYPE_CATAN)
+#else
+# define machine_is_catan()	(0)
+#endif
+
+#ifdef CONFIG_MACH_HARMONY
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_HARMONY
+# endif
+# define machine_is_harmony()	(machine_arch_type == MACH_TYPE_HARMONY)
+#else
+# define machine_is_harmony()	(0)
+#endif
+
+#ifdef CONFIG_MACH_TONGA
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_TONGA
+# endif
+# define machine_is_tonga()	(machine_arch_type == MACH_TYPE_TONGA)
+#else
+# define machine_is_tonga()	(0)
+#endif
+
+#ifdef CONFIG_MACH_CYBOOK_ORIZON
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_CYBOOK_ORIZON
+# endif
+# define machine_is_cybook_orizon()	(machine_arch_type == MACH_TYPE_CYBOOK_ORIZON)
+#else
+# define machine_is_cybook_orizon()	(0)
+#endif
+
+#ifdef CONFIG_MACH_HTCRHODIUMCDMA
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_HTCRHODIUMCDMA
+# endif
+# define machine_is_htcrhodiumcdma()	(machine_arch_type == MACH_TYPE_HTCRHODIUMCDMA)
+#else
+# define machine_is_htcrhodiumcdma()	(0)
+#endif
+
+#ifdef CONFIG_MACH_EPC_G45
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_EPC_G45
+# endif
+# define machine_is_epc_g45()	(machine_arch_type == MACH_TYPE_EPC_G45)
+#else
+# define machine_is_epc_g45()	(0)
+#endif
+
+#ifdef CONFIG_MACH_EPC_LPC3250
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_EPC_LPC3250
+# endif
+# define machine_is_epc_lpc3250()	(machine_arch_type == MACH_TYPE_EPC_LPC3250)
+#else
+# define machine_is_epc_lpc3250()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MXC91341EVB
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MXC91341EVB
+# endif
+# define machine_is_mxc91341evb()	(machine_arch_type == MACH_TYPE_MXC91341EVB)
+#else
+# define machine_is_mxc91341evb()	(0)
+#endif
+
+#ifdef CONFIG_MACH_RTW1000
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_RTW1000
+# endif
+# define machine_is_rtw1000()	(machine_arch_type == MACH_TYPE_RTW1000)
+#else
+# define machine_is_rtw1000()	(0)
+#endif
+
+#ifdef CONFIG_MACH_BOBCAT
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_BOBCAT
+# endif
+# define machine_is_bobcat()	(machine_arch_type == MACH_TYPE_BOBCAT)
+#else
+# define machine_is_bobcat()	(0)
+#endif
+
+#ifdef CONFIG_MACH_TRIZEPS6
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_TRIZEPS6
+# endif
+# define machine_is_trizeps6()	(machine_arch_type == MACH_TYPE_TRIZEPS6)
+#else
+# define machine_is_trizeps6()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MSM7X30_FLUID
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MSM7X30_FLUID
+# endif
+# define machine_is_msm7x30_fluid()	(machine_arch_type == MACH_TYPE_MSM7X30_FLUID)
+#else
+# define machine_is_msm7x30_fluid()	(0)
+#endif
+
+#ifdef CONFIG_MACH_NEDAP9263
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_NEDAP9263
+# endif
+# define machine_is_nedap9263()	(machine_arch_type == MACH_TYPE_NEDAP9263)
+#else
+# define machine_is_nedap9263()	(0)
+#endif
+
+#ifdef CONFIG_MACH_NETGEAR_MS2110
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_NETGEAR_MS2110
+# endif
+# define machine_is_netgear_ms2110()	(machine_arch_type == MACH_TYPE_NETGEAR_MS2110)
+#else
+# define machine_is_netgear_ms2110()	(0)
+#endif
+
+#ifdef CONFIG_MACH_BMX
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_BMX
+# endif
+# define machine_is_bmx()	(machine_arch_type == MACH_TYPE_BMX)
+#else
+# define machine_is_bmx()	(0)
+#endif
+
+#ifdef CONFIG_MACH_NETSTREAM
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_NETSTREAM
+# endif
+# define machine_is_netstream()	(machine_arch_type == MACH_TYPE_NETSTREAM)
+#else
+# define machine_is_netstream()	(0)
+#endif
+
+#ifdef CONFIG_MACH_VPNEXT_RCU
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_VPNEXT_RCU
+# endif
+# define machine_is_vpnext_rcu()	(machine_arch_type == MACH_TYPE_VPNEXT_RCU)
+#else
+# define machine_is_vpnext_rcu()	(0)
+#endif
+
+#ifdef CONFIG_MACH_VPNEXT_MPU
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_VPNEXT_MPU
+# endif
+# define machine_is_vpnext_mpu()	(machine_arch_type == MACH_TYPE_VPNEXT_MPU)
+#else
+# define machine_is_vpnext_mpu()	(0)
+#endif
+
+#ifdef CONFIG_MACH_BCMRING_TABLET_V1
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_BCMRING_TABLET_V1
+# endif
+# define machine_is_bcmring_tablet_v1()	(machine_arch_type == MACH_TYPE_BCMRING_TABLET_V1)
+#else
+# define machine_is_bcmring_tablet_v1()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SGARM10
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SGARM10
+# endif
+# define machine_is_sgarm10()	(machine_arch_type == MACH_TYPE_SGARM10)
+#else
+# define machine_is_sgarm10()	(0)
+#endif
+
+#ifdef CONFIG_MACH_CM_T3517
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_CM_T3517
+# endif
+# define machine_is_cm_t3517()	(machine_arch_type == MACH_TYPE_CM_T3517)
+#else
+# define machine_is_cm_t3517()	(0)
+#endif
+
+#ifdef CONFIG_MACH_OMAP3_CPS
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_OMAP3_CPS
+# endif
+# define machine_is_omap3_cps()	(machine_arch_type == MACH_TYPE_OMAP3_CPS)
+#else
+# define machine_is_omap3_cps()	(0)
+#endif
+
+#ifdef CONFIG_MACH_AXAR1500_RECEIVER
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_AXAR1500_RECEIVER
+# endif
+# define machine_is_axar1500_receiver()	(machine_arch_type == MACH_TYPE_AXAR1500_RECEIVER)
+#else
+# define machine_is_axar1500_receiver()	(0)
+#endif
+
+#ifdef CONFIG_MACH_WBD222
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_WBD222
+# endif
+# define machine_is_wbd222()	(machine_arch_type == MACH_TYPE_WBD222)
+#else
+# define machine_is_wbd222()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MT65XX
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MT65XX
+# endif
+# define machine_is_mt65xx()	(machine_arch_type == MACH_TYPE_MT65XX)
+#else
+# define machine_is_mt65xx()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MSM8X60_SURF
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MSM8X60_SURF
+# endif
+# define machine_is_msm8x60_surf()	(machine_arch_type == MACH_TYPE_MSM8X60_SURF)
+#else
+# define machine_is_msm8x60_surf()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MSM8X60_SIM
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MSM8X60_SIM
+# endif
+# define machine_is_msm8x60_sim()	(machine_arch_type == MACH_TYPE_MSM8X60_SIM)
+#else
+# define machine_is_msm8x60_sim()	(0)
+#endif
+
+#ifdef CONFIG_MACH_VMC300
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_VMC300
+# endif
+# define machine_is_vmc300()	(machine_arch_type == MACH_TYPE_VMC300)
+#else
+# define machine_is_vmc300()	(0)
+#endif
+
+#ifdef CONFIG_MACH_TCC8000_SDK
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_TCC8000_SDK
+# endif
+# define machine_is_tcc8000_sdk()	(machine_arch_type == MACH_TYPE_TCC8000_SDK)
+#else
+# define machine_is_tcc8000_sdk()	(0)
+#endif
+
+#ifdef CONFIG_MACH_NANOS
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_NANOS
+# endif
+# define machine_is_nanos()	(machine_arch_type == MACH_TYPE_NANOS)
+#else
+# define machine_is_nanos()	(0)
+#endif
+
+#ifdef CONFIG_MACH_STAMP9G10
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_STAMP9G10
+# endif
+# define machine_is_stamp9g10()	(machine_arch_type == MACH_TYPE_STAMP9G10)
+#else
+# define machine_is_stamp9g10()	(0)
+#endif
+
+#ifdef CONFIG_MACH_STAMP9G45
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_STAMP9G45
+# endif
+# define machine_is_stamp9g45()	(machine_arch_type == MACH_TYPE_STAMP9G45)
+#else
+# define machine_is_stamp9g45()	(0)
+#endif
+
+#ifdef CONFIG_MACH_H6053
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_H6053
+# endif
+# define machine_is_h6053()	(machine_arch_type == MACH_TYPE_H6053)
+#else
+# define machine_is_h6053()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SMINT01
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SMINT01
+# endif
+# define machine_is_smint01()	(machine_arch_type == MACH_TYPE_SMINT01)
+#else
+# define machine_is_smint01()	(0)
+#endif
+
+#ifdef CONFIG_MACH_PRTLVT2
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_PRTLVT2
+# endif
+# define machine_is_prtlvt2()	(machine_arch_type == MACH_TYPE_PRTLVT2)
+#else
+# define machine_is_prtlvt2()	(0)
+#endif
+
+#ifdef CONFIG_MACH_AP420
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_AP420
+# endif
+# define machine_is_ap420()	(machine_arch_type == MACH_TYPE_AP420)
+#else
+# define machine_is_ap420()	(0)
+#endif
+
+#ifdef CONFIG_MACH_HTCSHIFT
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_HTCSHIFT
+# endif
+# define machine_is_htcclio()	(machine_arch_type == MACH_TYPE_HTCSHIFT)
+#else
+# define machine_is_htcclio()	(0)
+#endif
+
+#ifdef CONFIG_MACH_DAVINCI_DM365_FC
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_DAVINCI_DM365_FC
+# endif
+# define machine_is_davinci_dm365_fc()	(machine_arch_type == MACH_TYPE_DAVINCI_DM365_FC)
+#else
+# define machine_is_davinci_dm365_fc()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MSM8X55_SURF
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MSM8X55_SURF
+# endif
+# define machine_is_msm8x55_surf()	(machine_arch_type == MACH_TYPE_MSM8X55_SURF)
+#else
+# define machine_is_msm8x55_surf()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MSM8X55_FFA
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MSM8X55_FFA
+# endif
+# define machine_is_msm8x55_ffa()	(machine_arch_type == MACH_TYPE_MSM8X55_FFA)
+#else
+# define machine_is_msm8x55_ffa()	(0)
+#endif
+
+#ifdef CONFIG_MACH_ESL_VAMANA
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_ESL_VAMANA
+# endif
+# define machine_is_esl_vamana()	(machine_arch_type == MACH_TYPE_ESL_VAMANA)
+#else
+# define machine_is_esl_vamana()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SBC35
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SBC35
+# endif
+# define machine_is_sbc35()	(machine_arch_type == MACH_TYPE_SBC35)
+#else
+# define machine_is_sbc35()	(0)
+#endif
+
+#ifdef CONFIG_MACH_MPX6446
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_MPX6446
+# endif
+# define machine_is_mpx6446()	(machine_arch_type == MACH_TYPE_MPX6446)
+#else
+# define machine_is_mpx6446()	(0)
+#endif
+
+#ifdef CONFIG_MACH_OREO_CONTROLLER
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_OREO_CONTROLLER
+# endif
+# define machine_is_oreo_controller()	(machine_arch_type == MACH_TYPE_OREO_CONTROLLER)
+#else
+# define machine_is_oreo_controller()	(0)
+#endif
+
+#ifdef CONFIG_MACH_KOPIN_MODELS
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_KOPIN_MODELS
+# endif
+# define machine_is_kopin_models()	(machine_arch_type == MACH_TYPE_KOPIN_MODELS)
+#else
+# define machine_is_kopin_models()	(0)
+#endif
+
+#ifdef CONFIG_MACH_TTC_VISION2
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_TTC_VISION2
+# endif
+# define machine_is_ttc_vision2()	(machine_arch_type == MACH_TYPE_TTC_VISION2)
+#else
+# define machine_is_ttc_vision2()	(0)
+#endif
+
+#ifdef CONFIG_MACH_CNS3420VB
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_CNS3420VB
+# endif
+# define machine_is_cns3420vb()	(machine_arch_type == MACH_TYPE_CNS3420VB)
+#else
+# define machine_is_cns3420vb()	(0)
+#endif
+
+#ifdef CONFIG_MACH_LPC2
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_LPC2
+# endif
+# define machine_is_lpc2()	(machine_arch_type == MACH_TYPE_LPC2)
+#else
+# define machine_is_lpc2()	(0)
+#endif
+
+#ifdef CONFIG_MACH_OLYMPUS
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_OLYMPUS
+# endif
+# define machine_is_olympus()	(machine_arch_type == MACH_TYPE_OLYMPUS)
+#else
+# define machine_is_olympus()	(0)
+#endif
+
+#ifdef CONFIG_MACH_VORTEX
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_VORTEX
+# endif
+# define machine_is_vortex()	(machine_arch_type == MACH_TYPE_VORTEX)
+#else
+# define machine_is_vortex()	(0)
+#endif
+
+#ifdef CONFIG_MACH_S5PC200
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_S5PC200
+# endif
+# define machine_is_s5pc200()	(machine_arch_type == MACH_TYPE_S5PC200)
+#else
+# define machine_is_s5pc200()	(0)
+#endif
+
+#ifdef CONFIG_MACH_ECUCORE_9263
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_ECUCORE_9263
+# endif
+# define machine_is_ecucore_9263()	(machine_arch_type == MACH_TYPE_ECUCORE_9263)
+#else
+# define machine_is_ecucore_9263()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SMDKC200
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SMDKC200
+# endif
+# define machine_is_smdkc200()	(machine_arch_type == MACH_TYPE_SMDKC200)
+#else
+# define machine_is_smdkc200()	(0)
+#endif
+
+#ifdef CONFIG_MACH_EMSISO_SX27
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_EMSISO_SX27
+# endif
+# define machine_is_emsiso_sx27()	(machine_arch_type == MACH_TYPE_EMSISO_SX27)
+#else
+# define machine_is_emsiso_sx27()	(0)
+#endif
+
+#ifdef CONFIG_MACH_APX_SOM9G45_EK
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_APX_SOM9G45_EK
+# endif
+# define machine_is_apx_som9g45_ek()	(machine_arch_type == MACH_TYPE_APX_SOM9G45_EK)
+#else
+# define machine_is_apx_som9g45_ek()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SONGSHAN
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SONGSHAN
+# endif
+# define machine_is_songshan()	(machine_arch_type == MACH_TYPE_SONGSHAN)
+#else
+# define machine_is_songshan()	(0)
+#endif
+
+#ifdef CONFIG_MACH_TIANSHAN
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_TIANSHAN
+# endif
+# define machine_is_tianshan()	(machine_arch_type == MACH_TYPE_TIANSHAN)
+#else
+# define machine_is_tianshan()	(0)
+#endif
+
+#ifdef CONFIG_MACH_VPX500
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_VPX500
+# endif
+# define machine_is_vpx500()	(machine_arch_type == MACH_TYPE_VPX500)
+#else
+# define machine_is_vpx500()	(0)
+#endif
+
+#ifdef CONFIG_MACH_AM3517SAM
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_AM3517SAM
+# endif
+# define machine_is_am3517sam()	(machine_arch_type == MACH_TYPE_AM3517SAM)
+#else
+# define machine_is_am3517sam()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SKAT91_SIM508
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SKAT91_SIM508
+# endif
+# define machine_is_skat91_sim508()	(machine_arch_type == MACH_TYPE_SKAT91_SIM508)
+#else
+# define machine_is_skat91_sim508()	(0)
+#endif
+
+#ifdef CONFIG_MACH_SKAT91_S3E
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_SKAT91_S3E
+# endif
+# define machine_is_skat91_s3e()	(machine_arch_type == MACH_TYPE_SKAT91_S3E)
+#else
+# define machine_is_skat91_s3e()	(0)
+#endif
+
+#ifdef CONFIG_MACH_OMAP4_PANDA
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_OMAP4_PANDA
+# endif
+# define machine_is_omap4_panda()	(machine_arch_type == MACH_TYPE_OMAP4_PANDA)
+#else
+# define machine_is_omap4_panda()	(0)
+#endif
+
+#ifdef CONFIG_MACH_DF7220
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type	__machine_arch_type
+# else
+#  define machine_arch_type	MACH_TYPE_DF7220
+# endif
+# define machine_is_df7220()	(machine_arch_type == MACH_TYPE_DF7220)
+#else
+# define machine_is_df7220()	(0)
+#endif
+
 /*
  * These have not yet been registered
  */
diff --git a/include/asm-arm/macro.h b/arch/arm/include/asm/macro.h
index 57b5260658..57b5260658 100644
--- a/include/asm-arm/macro.h
+++ b/arch/arm/include/asm/macro.h
diff --git a/include/asm-arm/memory.h b/arch/arm/include/asm/memory.h
index c3b2afd907..c3b2afd907 100644
--- a/include/asm-arm/memory.h
+++ b/arch/arm/include/asm/memory.h
diff --git a/include/asm-arm/posix_types.h b/arch/arm/include/asm/posix_types.h
index c412486db5..c412486db5 100644
--- a/include/asm-arm/posix_types.h
+++ b/arch/arm/include/asm/posix_types.h
diff --git a/include/asm-arm/proc-armv/domain.h b/arch/arm/include/asm/proc-armv/domain.h
index aadc83187d..aadc83187d 100644
--- a/include/asm-arm/proc-armv/domain.h
+++ b/arch/arm/include/asm/proc-armv/domain.h
diff --git a/include/asm-arm/proc-armv/processor.h b/arch/arm/include/asm/proc-armv/processor.h
index 5bfab7fb90..5bfab7fb90 100644
--- a/include/asm-arm/proc-armv/processor.h
+++ b/arch/arm/include/asm/proc-armv/processor.h
diff --git a/include/asm-arm/proc-armv/ptrace.h b/arch/arm/include/asm/proc-armv/ptrace.h
index 79cc6443f4..79cc6443f4 100644
--- a/include/asm-arm/proc-armv/ptrace.h
+++ b/arch/arm/include/asm/proc-armv/ptrace.h
diff --git a/include/asm-arm/proc-armv/system.h b/arch/arm/include/asm/proc-armv/system.h
index b4cfa68ca3..b4cfa68ca3 100644
--- a/include/asm-arm/proc-armv/system.h
+++ b/arch/arm/include/asm/proc-armv/system.h
diff --git a/include/asm-arm/processor.h b/arch/arm/include/asm/processor.h
index 445d4495be..445d4495be 100644
--- a/include/asm-arm/processor.h
+++ b/arch/arm/include/asm/processor.h
diff --git a/include/asm-arm/ptrace.h b/arch/arm/include/asm/ptrace.h
index 73c9087b50..73c9087b50 100644
--- a/include/asm-arm/ptrace.h
+++ b/arch/arm/include/asm/ptrace.h
diff --git a/include/asm-arm/setup.h b/arch/arm/include/asm/setup.h
index 89df4dc708..89df4dc708 100644
--- a/include/asm-arm/setup.h
+++ b/arch/arm/include/asm/setup.h
diff --git a/include/asm-arm/sizes.h b/arch/arm/include/asm/sizes.h
index f8d92ca120..f8d92ca120 100644
--- a/include/asm-arm/sizes.h
+++ b/arch/arm/include/asm/sizes.h
diff --git a/include/asm-arm/string.h b/arch/arm/include/asm/string.h
index c3ea582cab..c3ea582cab 100644
--- a/include/asm-arm/string.h
+++ b/arch/arm/include/asm/string.h
diff --git a/include/asm-arm/system.h b/arch/arm/include/asm/system.h
index 2b28a261ba..2b28a261ba 100644
--- a/include/asm-arm/system.h
+++ b/arch/arm/include/asm/system.h
diff --git a/include/asm-arm/types.h b/arch/arm/include/asm/types.h
index 71dc049da6..71dc049da6 100644
--- a/include/asm-arm/types.h
+++ b/arch/arm/include/asm/types.h
diff --git a/include/asm-arm/u-boot-arm.h b/arch/arm/include/asm/u-boot-arm.h
index 6d2f8bccb5..6d2f8bccb5 100644
--- a/include/asm-arm/u-boot-arm.h
+++ b/arch/arm/include/asm/u-boot-arm.h
diff --git a/include/asm-arm/u-boot.h b/arch/arm/include/asm/u-boot.h
index cfd5a9ba45..cfd5a9ba45 100644
--- a/include/asm-arm/u-boot.h
+++ b/arch/arm/include/asm/u-boot.h
diff --git a/include/asm-arm/unaligned.h b/arch/arm/include/asm/unaligned.h
index 44593a8949..44593a8949 100644
--- a/include/asm-arm/unaligned.h
+++ b/arch/arm/include/asm/unaligned.h
diff --git a/lib_arm/Makefile b/arch/arm/lib/Makefile
index 02933485cd..02933485cd 100644
--- a/lib_arm/Makefile
+++ b/arch/arm/lib/Makefile
diff --git a/lib_arm/_ashldi3.S b/arch/arm/lib/_ashldi3.S
index 834ddc2542..834ddc2542 100644
--- a/lib_arm/_ashldi3.S
+++ b/arch/arm/lib/_ashldi3.S
diff --git a/lib_arm/_ashrdi3.S b/arch/arm/lib/_ashrdi3.S
index 671ac87a2b..671ac87a2b 100644
--- a/lib_arm/_ashrdi3.S
+++ b/arch/arm/lib/_ashrdi3.S
diff --git a/lib_arm/_divsi3.S b/arch/arm/lib/_divsi3.S
index cfbadb2ab9..cfbadb2ab9 100644
--- a/lib_arm/_divsi3.S
+++ b/arch/arm/lib/_divsi3.S
diff --git a/lib_arm/_lshrdi3.S b/arch/arm/lib/_lshrdi3.S
index e7fa799387..e7fa799387 100644
--- a/lib_arm/_lshrdi3.S
+++ b/arch/arm/lib/_lshrdi3.S
diff --git a/lib_arm/_modsi3.S b/arch/arm/lib/_modsi3.S
index 539c584997..539c584997 100644
--- a/lib_arm/_modsi3.S
+++ b/arch/arm/lib/_modsi3.S
diff --git a/lib_arm/_udivsi3.S b/arch/arm/lib/_udivsi3.S
index 1309802610..1309802610 100644
--- a/lib_arm/_udivsi3.S
+++ b/arch/arm/lib/_udivsi3.S
diff --git a/lib_arm/_umodsi3.S b/arch/arm/lib/_umodsi3.S
index 8465ef09d2..8465ef09d2 100644
--- a/lib_arm/_umodsi3.S
+++ b/arch/arm/lib/_umodsi3.S
diff --git a/lib_arm/board.c b/arch/arm/lib/board.c
index f5660a985b..f5660a985b 100644
--- a/lib_arm/board.c
+++ b/arch/arm/lib/board.c
diff --git a/lib_arm/bootm.c b/arch/arm/lib/bootm.c
index 128b7e313c..128b7e313c 100644
--- a/lib_arm/bootm.c
+++ b/arch/arm/lib/bootm.c
diff --git a/lib_arm/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 62ed54fb4d..62ed54fb4d 100644
--- a/lib_arm/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
diff --git a/lib_arm/cache.c b/arch/arm/lib/cache.c
index 61ee9d3b13..61ee9d3b13 100644
--- a/lib_arm/cache.c
+++ b/arch/arm/lib/cache.c
diff --git a/lib_arm/div0.c b/arch/arm/lib/div0.c
index 6267bf16a5..6267bf16a5 100644
--- a/lib_arm/div0.c
+++ b/arch/arm/lib/div0.c
diff --git a/lib_arm/eabi_compat.c b/arch/arm/lib/eabi_compat.c
index 86eacf1b0e..86eacf1b0e 100644
--- a/lib_arm/eabi_compat.c
+++ b/arch/arm/lib/eabi_compat.c
diff --git a/lib_arm/interrupts.c b/arch/arm/lib/interrupts.c
index 1f2b815611..1f2b815611 100644
--- a/lib_arm/interrupts.c
+++ b/arch/arm/lib/interrupts.c
diff --git a/lib_arm/reset.c b/arch/arm/lib/reset.c
index 4fcedfa150..4fcedfa150 100644
--- a/lib_arm/reset.c
+++ b/arch/arm/lib/reset.c
diff --git a/lib_avr32/config.mk b/arch/avr32/config.mk
index 1121ca1cc2..1121ca1cc2 100644
--- a/lib_avr32/config.mk
+++ b/arch/avr32/config.mk
diff --git a/cpu/at32ap/Makefile b/arch/avr32/cpu/Makefile
index 60899c79ea..60899c79ea 100644
--- a/cpu/at32ap/Makefile
+++ b/arch/avr32/cpu/Makefile
diff --git a/cpu/at32ap/at32ap700x/Makefile b/arch/avr32/cpu/at32ap700x/Makefile
index 46e6ef661a..46e6ef661a 100644
--- a/cpu/at32ap/at32ap700x/Makefile
+++ b/arch/avr32/cpu/at32ap700x/Makefile
diff --git a/cpu/at32ap/at32ap700x/clk.c b/arch/avr32/cpu/at32ap700x/clk.c
index 742bc6b5a2..742bc6b5a2 100644
--- a/cpu/at32ap/at32ap700x/clk.c
+++ b/arch/avr32/cpu/at32ap700x/clk.c
diff --git a/cpu/at32ap/at32ap700x/portmux.c b/arch/avr32/cpu/at32ap700x/portmux.c
index b1f2c6f1ff..b1f2c6f1ff 100644
--- a/cpu/at32ap/at32ap700x/portmux.c
+++ b/arch/avr32/cpu/at32ap700x/portmux.c
diff --git a/cpu/at32ap/at32ap700x/sm.h b/arch/avr32/cpu/at32ap700x/sm.h
index b6e4409b22..b6e4409b22 100644
--- a/cpu/at32ap/at32ap700x/sm.h
+++ b/arch/avr32/cpu/at32ap700x/sm.h
diff --git a/cpu/at32ap/cache.c b/arch/avr32/cpu/cache.c
index 28b945669a..28b945669a 100644
--- a/cpu/at32ap/cache.c
+++ b/arch/avr32/cpu/cache.c
diff --git a/cpu/at32ap/config.mk b/arch/avr32/cpu/config.mk
index 1c12169221..1c12169221 100644
--- a/cpu/at32ap/config.mk
+++ b/arch/avr32/cpu/config.mk
diff --git a/cpu/at32ap/cpu.c b/arch/avr32/cpu/cpu.c
index 904bfb227e..904bfb227e 100644
--- a/cpu/at32ap/cpu.c
+++ b/arch/avr32/cpu/cpu.c
diff --git a/cpu/at32ap/exception.c b/arch/avr32/cpu/exception.c
index dc9c3002a4..dc9c3002a4 100644
--- a/cpu/at32ap/exception.c
+++ b/arch/avr32/cpu/exception.c
diff --git a/cpu/at32ap/hsdramc.c b/arch/avr32/cpu/hsdramc.c
index b6eae667c2..b6eae667c2 100644
--- a/cpu/at32ap/hsdramc.c
+++ b/arch/avr32/cpu/hsdramc.c
diff --git a/cpu/at32ap/hsdramc1.h b/arch/avr32/cpu/hsdramc1.h
index 305d2cb5d3..305d2cb5d3 100644
--- a/cpu/at32ap/hsdramc1.h
+++ b/arch/avr32/cpu/hsdramc1.h
diff --git a/cpu/at32ap/hsmc3.h b/arch/avr32/cpu/hsmc3.h
index ca533b922e..ca533b922e 100644
--- a/cpu/at32ap/hsmc3.h
+++ b/arch/avr32/cpu/hsmc3.h
diff --git a/cpu/at32ap/interrupts.c b/arch/avr32/cpu/interrupts.c
index c6d8d16e39..c6d8d16e39 100644
--- a/cpu/at32ap/interrupts.c
+++ b/arch/avr32/cpu/interrupts.c
diff --git a/cpu/at32ap/pio2.h b/arch/avr32/cpu/pio2.h
index 9719ea8c43..9719ea8c43 100644
--- a/cpu/at32ap/pio2.h
+++ b/arch/avr32/cpu/pio2.h
diff --git a/cpu/at32ap/portmux-gpio.c b/arch/avr32/cpu/portmux-gpio.c
index 9acd040d1b..9acd040d1b 100644
--- a/cpu/at32ap/portmux-gpio.c
+++ b/arch/avr32/cpu/portmux-gpio.c
diff --git a/cpu/at32ap/portmux-pio.c b/arch/avr32/cpu/portmux-pio.c
index a29f94e3ba..a29f94e3ba 100644
--- a/cpu/at32ap/portmux-pio.c
+++ b/arch/avr32/cpu/portmux-pio.c
diff --git a/cpu/at32ap/start.S b/arch/avr32/cpu/start.S
index d37a46eb18..d37a46eb18 100644
--- a/cpu/at32ap/start.S
+++ b/arch/avr32/cpu/start.S
diff --git a/include/asm-avr32/arch-at32ap700x/addrspace.h b/arch/avr32/include/asm/arch-at32ap700x/addrspace.h
index 409eee3536..409eee3536 100644
--- a/include/asm-avr32/arch-at32ap700x/addrspace.h
+++ b/arch/avr32/include/asm/arch-at32ap700x/addrspace.h
diff --git a/include/asm-avr32/arch-at32ap700x/cacheflush.h b/arch/avr32/include/asm/arch-at32ap700x/cacheflush.h
index 929f68e1a0..929f68e1a0 100644
--- a/include/asm-avr32/arch-at32ap700x/cacheflush.h
+++ b/arch/avr32/include/asm/arch-at32ap700x/cacheflush.h
diff --git a/include/asm-avr32/arch-at32ap700x/chip-features.h b/arch/avr32/include/asm/arch-at32ap700x/chip-features.h
index 40a2476c9a..40a2476c9a 100644
--- a/include/asm-avr32/arch-at32ap700x/chip-features.h
+++ b/arch/avr32/include/asm/arch-at32ap700x/chip-features.h
diff --git a/include/asm-avr32/arch-at32ap700x/clk.h b/arch/avr32/include/asm/arch-at32ap700x/clk.h
index 7a0b6559e0..7a0b6559e0 100644
--- a/include/asm-avr32/arch-at32ap700x/clk.h
+++ b/arch/avr32/include/asm/arch-at32ap700x/clk.h
diff --git a/include/asm-avr32/arch-at32ap700x/gpio-impl.h b/arch/avr32/include/asm/arch-at32ap700x/gpio-impl.h
index 8801bd006c..8801bd006c 100644
--- a/include/asm-avr32/arch-at32ap700x/gpio-impl.h
+++ b/arch/avr32/include/asm/arch-at32ap700x/gpio-impl.h
diff --git a/include/asm-avr32/arch-at32ap700x/gpio.h b/arch/avr32/include/asm/arch-at32ap700x/gpio.h
index 303e35313a..303e35313a 100644
--- a/include/asm-avr32/arch-at32ap700x/gpio.h
+++ b/arch/avr32/include/asm/arch-at32ap700x/gpio.h
diff --git a/include/asm-avr32/arch-at32ap700x/hmatrix.h b/arch/avr32/include/asm/arch-at32ap700x/hmatrix.h
index d6b626328d..d6b626328d 100644
--- a/include/asm-avr32/arch-at32ap700x/hmatrix.h
+++ b/arch/avr32/include/asm/arch-at32ap700x/hmatrix.h
diff --git a/include/asm-avr32/arch-at32ap700x/memory-map.h b/arch/avr32/include/asm/arch-at32ap700x/memory-map.h
index 6592c039fa..6592c039fa 100644
--- a/include/asm-avr32/arch-at32ap700x/memory-map.h
+++ b/arch/avr32/include/asm/arch-at32ap700x/memory-map.h
diff --git a/include/asm-avr32/arch-at32ap700x/portmux.h b/arch/avr32/include/asm/arch-at32ap700x/portmux.h
index 1ba52e5ddb..1ba52e5ddb 100644
--- a/include/asm-avr32/arch-at32ap700x/portmux.h
+++ b/arch/avr32/include/asm/arch-at32ap700x/portmux.h
diff --git a/include/asm-avr32/arch-common/portmux-gpio.h b/arch/avr32/include/asm/arch-common/portmux-gpio.h
index 1306cbe5dc..1306cbe5dc 100644
--- a/include/asm-avr32/arch-common/portmux-gpio.h
+++ b/arch/avr32/include/asm/arch-common/portmux-gpio.h
diff --git a/include/asm-avr32/arch-common/portmux-pio.h b/arch/avr32/include/asm/arch-common/portmux-pio.h
index 1abe5be25f..1abe5be25f 100644
--- a/include/asm-avr32/arch-common/portmux-pio.h
+++ b/arch/avr32/include/asm/arch-common/portmux-pio.h
diff --git a/include/asm-avr32/bitops.h b/arch/avr32/include/asm/bitops.h
index f15fd4647e..f15fd4647e 100644
--- a/include/asm-avr32/bitops.h
+++ b/arch/avr32/include/asm/bitops.h
diff --git a/include/asm-avr32/byteorder.h b/arch/avr32/include/asm/byteorder.h
index 2fe867e978..2fe867e978 100644
--- a/include/asm-avr32/byteorder.h
+++ b/arch/avr32/include/asm/byteorder.h
diff --git a/include/asm-avr32/config.h b/arch/avr32/include/asm/config.h
index 049c44eaf8..049c44eaf8 100644
--- a/include/asm-avr32/config.h
+++ b/arch/avr32/include/asm/config.h
diff --git a/include/asm-avr32/dma-mapping.h b/arch/avr32/include/asm/dma-mapping.h
index 0be7804da3..0be7804da3 100644
--- a/include/asm-avr32/dma-mapping.h
+++ b/arch/avr32/include/asm/dma-mapping.h
diff --git a/include/asm-avr32/errno.h b/arch/avr32/include/asm/errno.h
index 4c82b503d9..4c82b503d9 100644
--- a/include/asm-avr32/errno.h
+++ b/arch/avr32/include/asm/errno.h
diff --git a/include/asm-avr32/global_data.h b/arch/avr32/include/asm/global_data.h
index efbdda9ba4..efbdda9ba4 100644
--- a/include/asm-avr32/global_data.h
+++ b/arch/avr32/include/asm/global_data.h
diff --git a/include/asm-avr32/hmatrix-common.h b/arch/avr32/include/asm/hmatrix-common.h
index 4b7e6105dd..4b7e6105dd 100644
--- a/include/asm-avr32/hmatrix-common.h
+++ b/arch/avr32/include/asm/hmatrix-common.h
diff --git a/include/asm-avr32/initcalls.h b/arch/avr32/include/asm/initcalls.h
index 57a278b6a1..57a278b6a1 100644
--- a/include/asm-avr32/initcalls.h
+++ b/arch/avr32/include/asm/initcalls.h
diff --git a/include/asm-avr32/io.h b/arch/avr32/include/asm/io.h
index 1cb17ead3f..1cb17ead3f 100644
--- a/include/asm-avr32/io.h
+++ b/arch/avr32/include/asm/io.h
diff --git a/include/asm-avr32/posix_types.h b/arch/avr32/include/asm/posix_types.h
index edf1bc14d2..edf1bc14d2 100644
--- a/include/asm-avr32/posix_types.h
+++ b/arch/avr32/include/asm/posix_types.h
diff --git a/include/asm-avr32/processor.h b/arch/avr32/include/asm/processor.h
index cc59dfad56..cc59dfad56 100644
--- a/include/asm-avr32/processor.h
+++ b/arch/avr32/include/asm/processor.h
diff --git a/include/asm-avr32/ptrace.h b/arch/avr32/include/asm/ptrace.h
index c770ba02c3..c770ba02c3 100644
--- a/include/asm-avr32/ptrace.h
+++ b/arch/avr32/include/asm/ptrace.h
diff --git a/include/asm-avr32/sdram.h b/arch/avr32/include/asm/sdram.h
index 762acfa078..762acfa078 100644
--- a/include/asm-avr32/sdram.h
+++ b/arch/avr32/include/asm/sdram.h
diff --git a/include/asm-avr32/sections.h b/arch/avr32/include/asm/sections.h
index fe819b2db6..fe819b2db6 100644
--- a/include/asm-avr32/sections.h
+++ b/arch/avr32/include/asm/sections.h
diff --git a/include/asm-avr32/setup.h b/arch/avr32/include/asm/setup.h
index e6ef8d6b50..e6ef8d6b50 100644
--- a/include/asm-avr32/setup.h
+++ b/arch/avr32/include/asm/setup.h
diff --git a/include/asm-avr32/string.h b/arch/avr32/include/asm/string.h
index 58582a3115..58582a3115 100644
--- a/include/asm-avr32/string.h
+++ b/arch/avr32/include/asm/string.h
diff --git a/include/asm-avr32/sysreg.h b/arch/avr32/include/asm/sysreg.h
index 4f6970448b..4f6970448b 100644
--- a/include/asm-avr32/sysreg.h
+++ b/arch/avr32/include/asm/sysreg.h
diff --git a/include/asm-avr32/types.h b/arch/avr32/include/asm/types.h
index c303e3c891..c303e3c891 100644
--- a/include/asm-avr32/types.h
+++ b/arch/avr32/include/asm/types.h
diff --git a/include/asm-avr32/u-boot.h b/arch/avr32/include/asm/u-boot.h
index 7e4001fc5d..7e4001fc5d 100644
--- a/include/asm-avr32/u-boot.h
+++ b/arch/avr32/include/asm/u-boot.h
diff --git a/lib_avr32/Makefile b/arch/avr32/lib/Makefile
index 37b80514f3..37b80514f3 100644
--- a/lib_avr32/Makefile
+++ b/arch/avr32/lib/Makefile
diff --git a/lib_avr32/board.c b/arch/avr32/lib/board.c
index 917ed6ce75..917ed6ce75 100644
--- a/lib_avr32/board.c
+++ b/arch/avr32/lib/board.c
diff --git a/lib_avr32/bootm.c b/arch/avr32/lib/bootm.c
index 6a3172a9a0..6a3172a9a0 100644
--- a/lib_avr32/bootm.c
+++ b/arch/avr32/lib/bootm.c
diff --git a/lib_avr32/interrupts.c b/arch/avr32/lib/interrupts.c
index bbbc490db2..bbbc490db2 100644
--- a/lib_avr32/interrupts.c
+++ b/arch/avr32/lib/interrupts.c
diff --git a/lib_avr32/memset.S b/arch/avr32/lib/memset.S
index 79e3c675a9..79e3c675a9 100644
--- a/lib_avr32/memset.S
+++ b/arch/avr32/lib/memset.S
diff --git a/lib_blackfin/config.mk b/arch/blackfin/config.mk
index 323d28f068..137834e7ee 100644
--- a/lib_blackfin/config.mk
+++ b/arch/blackfin/config.mk
@@ -23,7 +23,7 @@
 
 CROSS_COMPILE ?= bfin-uclinux-
 
-STANDALONE_LOAD_ADDR = 0x1000
+STANDALONE_LOAD_ADDR = 0x1000 -m elf32bfin
 
 CONFIG_BFIN_CPU := $(strip $(subst ",,$(CONFIG_BFIN_CPU)))
 CONFIG_BFIN_BOOT_MODE := $(strip $(subst ",,$(CONFIG_BFIN_BOOT_MODE)))
@@ -33,7 +33,7 @@ CONFIG_ENV_SIZE := $(strip $(subst ",,$(CONFIG_ENV_SIZE)))
 PLATFORM_RELFLAGS += -ffixed-P3 -fomit-frame-pointer -mno-fdpic
 PLATFORM_CPPFLAGS += -DCONFIG_BLACKFIN
 
-LDFLAGS += --gc-sections
+LDFLAGS += --gc-sections -m elf32bfin
 PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
 
 ifneq (,$(CONFIG_BFIN_CPU))
@@ -56,7 +56,7 @@ LDR_FLAGS-$(CONFIG_BFIN_BOOTROM_USES_EVT1) += -J
 
 LDR_FLAGS += --bmode $(subst BFIN_BOOT_,,$(CONFIG_BFIN_BOOT_MODE))
 LDR_FLAGS += --use-vmas
-LDR_FLAGS += --initcode $(obj)cpu/$(CPU)/initcode.o
+LDR_FLAGS += --initcode $(obj)$(CPUDIR)/initcode.o
 ifneq ($(CONFIG_BFIN_BOOT_MODE),BFIN_BOOT_UART)
 LDR_FLAGS-$(CONFIG_ENV_IS_EMBEDDED_IN_LDR) += \
 	--punchit $$(($(CONFIG_ENV_OFFSET))):$$(($(CONFIG_ENV_SIZE))):$(obj)env-ldr.o
@@ -68,5 +68,5 @@ endif
 LDR_FLAGS += $(LDR_FLAGS-y)
 
 ifeq ($(wildcard $(TOPDIR)/board/$(BOARD)/u-boot.lds*),)
-LDSCRIPT = $(obj)lib_$(ARCH)/u-boot.lds.S
+LDSCRIPT = $(obj)arch/$(ARCH)/lib/u-boot.lds.S
 endif
diff --git a/cpu/blackfin/.gitignore b/arch/blackfin/cpu/.gitignore
index 0ec9d5672e..0ec9d5672e 100644
--- a/cpu/blackfin/.gitignore
+++ b/arch/blackfin/cpu/.gitignore
diff --git a/cpu/blackfin/Makefile b/arch/blackfin/cpu/Makefile
index 211b8d5450..211b8d5450 100644
--- a/cpu/blackfin/Makefile
+++ b/arch/blackfin/cpu/Makefile
diff --git a/cpu/blackfin/bootrom-asm-offsets.awk b/arch/blackfin/cpu/bootrom-asm-offsets.awk
index 1d61824254..1d61824254 100755
--- a/cpu/blackfin/bootrom-asm-offsets.awk
+++ b/arch/blackfin/cpu/bootrom-asm-offsets.awk
diff --git a/cpu/blackfin/bootrom-asm-offsets.c.in b/arch/blackfin/cpu/bootrom-asm-offsets.c.in
index 3146e46674..3146e46674 100644
--- a/cpu/blackfin/bootrom-asm-offsets.c.in
+++ b/arch/blackfin/cpu/bootrom-asm-offsets.c.in
diff --git a/cpu/blackfin/cache.S b/arch/blackfin/cpu/cache.S
index 6ed655a674..6ed655a674 100644
--- a/cpu/blackfin/cache.S
+++ b/arch/blackfin/cpu/cache.S
diff --git a/cpu/blackfin/cpu.c b/arch/blackfin/cpu/cpu.c
index 2c8fd86b86..2c8fd86b86 100644
--- a/cpu/blackfin/cpu.c
+++ b/arch/blackfin/cpu/cpu.c
diff --git a/cpu/blackfin/cpu.h b/arch/blackfin/cpu/cpu.h
index 0a13c285e0..0a13c285e0 100644
--- a/cpu/blackfin/cpu.h
+++ b/arch/blackfin/cpu/cpu.h
diff --git a/cpu/blackfin/initcode.c b/arch/blackfin/cpu/initcode.c
index 5f80ad615e..5f80ad615e 100644
--- a/cpu/blackfin/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
diff --git a/cpu/blackfin/interrupt.S b/arch/blackfin/cpu/interrupt.S
index 69bba3f5ee..69bba3f5ee 100644
--- a/cpu/blackfin/interrupt.S
+++ b/arch/blackfin/cpu/interrupt.S
diff --git a/cpu/blackfin/interrupts.c b/arch/blackfin/cpu/interrupts.c
index 54a67b4971..54a67b4971 100644
--- a/cpu/blackfin/interrupts.c
+++ b/arch/blackfin/cpu/interrupts.c
diff --git a/cpu/blackfin/jtag-console.c b/arch/blackfin/cpu/jtag-console.c
index 1cd619f10b..1cd619f10b 100644
--- a/cpu/blackfin/jtag-console.c
+++ b/arch/blackfin/cpu/jtag-console.c
diff --git a/cpu/blackfin/os_log.c b/arch/blackfin/cpu/os_log.c
index e1c8e2948d..e1c8e2948d 100644
--- a/cpu/blackfin/os_log.c
+++ b/arch/blackfin/cpu/os_log.c
diff --git a/cpu/blackfin/reset.c b/arch/blackfin/cpu/reset.c
index e3be740711..e3be740711 100644
--- a/cpu/blackfin/reset.c
+++ b/arch/blackfin/cpu/reset.c
diff --git a/cpu/blackfin/serial.c b/arch/blackfin/cpu/serial.c
index 901cb97a1c..901cb97a1c 100644
--- a/cpu/blackfin/serial.c
+++ b/arch/blackfin/cpu/serial.c
diff --git a/cpu/blackfin/serial.h b/arch/blackfin/cpu/serial.h
index 5f9be8622d..5f9be8622d 100644
--- a/cpu/blackfin/serial.h
+++ b/arch/blackfin/cpu/serial.h
diff --git a/cpu/blackfin/start.S b/arch/blackfin/cpu/start.S
index 7a3abba21c..7a3abba21c 100644
--- a/cpu/blackfin/start.S
+++ b/arch/blackfin/cpu/start.S
diff --git a/cpu/blackfin/traps.c b/arch/blackfin/cpu/traps.c
index caaea94106..caaea94106 100644
--- a/cpu/blackfin/traps.c
+++ b/arch/blackfin/cpu/traps.c
diff --git a/cpu/blackfin/watchdog.c b/arch/blackfin/cpu/watchdog.c
index 1886bda0ae..1886bda0ae 100644
--- a/cpu/blackfin/watchdog.c
+++ b/arch/blackfin/cpu/watchdog.c
diff --git a/include/asm-blackfin/bfin_logo_230x230.h b/arch/blackfin/include/asm/bfin_logo_230x230.h
index 3a79631fcd..3a79631fcd 100644
--- a/include/asm-blackfin/bfin_logo_230x230.h
+++ b/arch/blackfin/include/asm/bfin_logo_230x230.h
diff --git a/include/asm-blackfin/bfin_logo_rgb565_230x230.h b/arch/blackfin/include/asm/bfin_logo_rgb565_230x230.h
index c5b0be96f1..c5b0be96f1 100644
--- a/include/asm-blackfin/bfin_logo_rgb565_230x230.h
+++ b/arch/blackfin/include/asm/bfin_logo_rgb565_230x230.h
diff --git a/include/asm-blackfin/bitops.h b/arch/blackfin/include/asm/bitops.h
index ab1fea55c8..ab1fea55c8 100644
--- a/include/asm-blackfin/bitops.h
+++ b/arch/blackfin/include/asm/bitops.h
diff --git a/include/asm-blackfin/blackfin.h b/arch/blackfin/include/asm/blackfin.h
index 204d02b5f3..204d02b5f3 100644
--- a/include/asm-blackfin/blackfin.h
+++ b/arch/blackfin/include/asm/blackfin.h
diff --git a/include/asm-blackfin/blackfin_cdef.h b/arch/blackfin/include/asm/blackfin_cdef.h
index aa03f2ce4d..aa03f2ce4d 100644
--- a/include/asm-blackfin/blackfin_cdef.h
+++ b/arch/blackfin/include/asm/blackfin_cdef.h
diff --git a/include/asm-blackfin/blackfin_def.h b/arch/blackfin/include/asm/blackfin_def.h
index 18372f6a8a..18372f6a8a 100644
--- a/include/asm-blackfin/blackfin_def.h
+++ b/arch/blackfin/include/asm/blackfin_def.h
diff --git a/include/asm-blackfin/blackfin_local.h b/arch/blackfin/include/asm/blackfin_local.h
index 3fd34b33fe..3fd34b33fe 100644
--- a/include/asm-blackfin/blackfin_local.h
+++ b/arch/blackfin/include/asm/blackfin_local.h
diff --git a/include/asm-blackfin/byteorder.h b/arch/blackfin/include/asm/byteorder.h
index a1a52a5c1a..a1a52a5c1a 100644
--- a/include/asm-blackfin/byteorder.h
+++ b/arch/blackfin/include/asm/byteorder.h
diff --git a/include/asm-blackfin/config-pre.h b/arch/blackfin/include/asm/config-pre.h
index 1170a2a904..4531519d91 100644
--- a/include/asm-blackfin/config-pre.h
+++ b/arch/blackfin/include/asm/config-pre.h
@@ -71,6 +71,9 @@ static inline const char *get_bfin_boot_mode(int bfin_boot)
 # define BFIN_BOOT_SPI_SSEL 1
 #endif
 
+/* There is no Blackfin/NetBSD port */
+#undef CONFIG_BOOTM_NETBSD
+
 /* We rarely use interrupts, so favor throughput over latency */
 #define CONFIG_BFIN_INS_LOWOVERHEAD
 
diff --git a/include/asm-blackfin/config.h b/arch/blackfin/include/asm/config.h
index 7455685057..7455685057 100644
--- a/include/asm-blackfin/config.h
+++ b/arch/blackfin/include/asm/config.h
diff --git a/include/asm-blackfin/cplb.h b/arch/blackfin/include/asm/cplb.h
index cc21e93a18..cc21e93a18 100644
--- a/include/asm-blackfin/cplb.h
+++ b/arch/blackfin/include/asm/cplb.h
diff --git a/include/asm-blackfin/deferred.h b/arch/blackfin/include/asm/deferred.h
index 82ceda3e4d..82ceda3e4d 100644
--- a/include/asm-blackfin/deferred.h
+++ b/arch/blackfin/include/asm/deferred.h
diff --git a/include/asm-blackfin/delay.h b/arch/blackfin/include/asm/delay.h
index 3af6ad3e71..3af6ad3e71 100644
--- a/include/asm-blackfin/delay.h
+++ b/arch/blackfin/include/asm/delay.h
diff --git a/include/asm-blackfin/entry.h b/arch/blackfin/include/asm/entry.h
index 404144f4f8..404144f4f8 100644
--- a/include/asm-blackfin/entry.h
+++ b/arch/blackfin/include/asm/entry.h
diff --git a/include/asm-blackfin/errno.h b/arch/blackfin/include/asm/errno.h
index 4c82b503d9..4c82b503d9 100644
--- a/include/asm-blackfin/errno.h
+++ b/arch/blackfin/include/asm/errno.h
diff --git a/include/asm-blackfin/global_data.h b/arch/blackfin/include/asm/global_data.h
index c7099e6dac..c7099e6dac 100644
--- a/include/asm-blackfin/global_data.h
+++ b/arch/blackfin/include/asm/global_data.h
diff --git a/include/asm-blackfin/io.h b/arch/blackfin/include/asm/io.h
index 75244a0731..75244a0731 100644
--- a/include/asm-blackfin/io.h
+++ b/arch/blackfin/include/asm/io.h
diff --git a/include/asm-blackfin/linkage.h b/arch/blackfin/include/asm/linkage.h
index fbb497c7bd..fbb497c7bd 100644
--- a/include/asm-blackfin/linkage.h
+++ b/arch/blackfin/include/asm/linkage.h
diff --git a/include/asm-blackfin/mach-bf527/ADSP-EDN-BF52x-extended_cdef.h b/arch/blackfin/include/asm/mach-bf527/ADSP-EDN-BF52x-extended_cdef.h
index f65b439c17..f65b439c17 100644
--- a/include/asm-blackfin/mach-bf527/ADSP-EDN-BF52x-extended_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf527/ADSP-EDN-BF52x-extended_cdef.h
diff --git a/include/asm-blackfin/mach-bf527/ADSP-EDN-BF52x-extended_def.h b/arch/blackfin/include/asm/mach-bf527/ADSP-EDN-BF52x-extended_def.h
index 0b384808ec..0b384808ec 100644
--- a/include/asm-blackfin/mach-bf527/ADSP-EDN-BF52x-extended_def.h
+++ b/arch/blackfin/include/asm/mach-bf527/ADSP-EDN-BF52x-extended_def.h
diff --git a/include/asm-blackfin/mach-bf527/BF522_cdef.h b/arch/blackfin/include/asm/mach-bf527/BF522_cdef.h
index 987cc862ce..987cc862ce 100644
--- a/include/asm-blackfin/mach-bf527/BF522_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf527/BF522_cdef.h
diff --git a/include/asm-blackfin/mach-bf527/BF522_def.h b/arch/blackfin/include/asm/mach-bf527/BF522_def.h
index bc05029aac..bc05029aac 100644
--- a/include/asm-blackfin/mach-bf527/BF522_def.h
+++ b/arch/blackfin/include/asm/mach-bf527/BF522_def.h
diff --git a/include/asm-blackfin/mach-bf527/BF523_cdef.h b/arch/blackfin/include/asm/mach-bf527/BF523_cdef.h
index 390f3dc16e..390f3dc16e 100644
--- a/include/asm-blackfin/mach-bf527/BF523_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf527/BF523_cdef.h
diff --git a/include/asm-blackfin/mach-bf527/BF523_def.h b/arch/blackfin/include/asm/mach-bf527/BF523_def.h
index c27fd646b5..c27fd646b5 100644
--- a/include/asm-blackfin/mach-bf527/BF523_def.h
+++ b/arch/blackfin/include/asm/mach-bf527/BF523_def.h
diff --git a/include/asm-blackfin/mach-bf527/BF524_cdef.h b/arch/blackfin/include/asm/mach-bf527/BF524_cdef.h
index 9ec89c66ae..9ec89c66ae 100644
--- a/include/asm-blackfin/mach-bf527/BF524_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf527/BF524_cdef.h
diff --git a/include/asm-blackfin/mach-bf527/BF524_def.h b/arch/blackfin/include/asm/mach-bf527/BF524_def.h
index bd6aa8fdb6..bd6aa8fdb6 100644
--- a/include/asm-blackfin/mach-bf527/BF524_def.h
+++ b/arch/blackfin/include/asm/mach-bf527/BF524_def.h
diff --git a/include/asm-blackfin/mach-bf527/BF525_cdef.h b/arch/blackfin/include/asm/mach-bf527/BF525_cdef.h
index 8fe29db07a..8fe29db07a 100644
--- a/include/asm-blackfin/mach-bf527/BF525_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf527/BF525_cdef.h
diff --git a/include/asm-blackfin/mach-bf527/BF525_def.h b/arch/blackfin/include/asm/mach-bf527/BF525_def.h
index 5e88b3b468..5e88b3b468 100644
--- a/include/asm-blackfin/mach-bf527/BF525_def.h
+++ b/arch/blackfin/include/asm/mach-bf527/BF525_def.h
diff --git a/include/asm-blackfin/mach-bf527/BF526_cdef.h b/arch/blackfin/include/asm/mach-bf527/BF526_cdef.h
index 943886210b..943886210b 100644
--- a/include/asm-blackfin/mach-bf527/BF526_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf527/BF526_cdef.h
diff --git a/include/asm-blackfin/mach-bf527/BF526_def.h b/arch/blackfin/include/asm/mach-bf527/BF526_def.h
index 2644abf197..2644abf197 100644
--- a/include/asm-blackfin/mach-bf527/BF526_def.h
+++ b/arch/blackfin/include/asm/mach-bf527/BF526_def.h
diff --git a/include/asm-blackfin/mach-bf527/BF527_cdef.h b/arch/blackfin/include/asm/mach-bf527/BF527_cdef.h
index fb9b30793d..fb9b30793d 100644
--- a/include/asm-blackfin/mach-bf527/BF527_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf527/BF527_cdef.h
diff --git a/include/asm-blackfin/mach-bf527/BF527_def.h b/arch/blackfin/include/asm/mach-bf527/BF527_def.h
index c46c2b0ee8..c46c2b0ee8 100644
--- a/include/asm-blackfin/mach-bf527/BF527_def.h
+++ b/arch/blackfin/include/asm/mach-bf527/BF527_def.h
diff --git a/include/asm-blackfin/mach-bf527/anomaly.h b/arch/blackfin/include/asm/mach-bf527/anomaly.h
index 0fd7e31710..0fd7e31710 100644
--- a/include/asm-blackfin/mach-bf527/anomaly.h
+++ b/arch/blackfin/include/asm/mach-bf527/anomaly.h
diff --git a/include/asm-blackfin/mach-bf527/def_local.h b/arch/blackfin/include/asm/mach-bf527/def_local.h
index 81eca83bce..81eca83bce 100644
--- a/include/asm-blackfin/mach-bf527/def_local.h
+++ b/arch/blackfin/include/asm/mach-bf527/def_local.h
diff --git a/include/asm-blackfin/mach-bf527/mem_map.h b/arch/blackfin/include/asm/mach-bf527/mem_map.h
index 8386b4b266..8386b4b266 100644
--- a/include/asm-blackfin/mach-bf527/mem_map.h
+++ b/arch/blackfin/include/asm/mach-bf527/mem_map.h
diff --git a/include/asm-blackfin/mach-bf527/ports.h b/arch/blackfin/include/asm/mach-bf527/ports.h
index e6b1df8708..e6b1df8708 100644
--- a/include/asm-blackfin/mach-bf527/ports.h
+++ b/arch/blackfin/include/asm/mach-bf527/ports.h
diff --git a/include/asm-blackfin/mach-bf533/BF531_cdef.h b/arch/blackfin/include/asm/mach-bf533/BF531_cdef.h
index 49a2b2e1ab..49a2b2e1ab 100644
--- a/include/asm-blackfin/mach-bf533/BF531_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf533/BF531_cdef.h
diff --git a/include/asm-blackfin/mach-bf533/BF531_def.h b/arch/blackfin/include/asm/mach-bf533/BF531_def.h
index d7278e56ec..d7278e56ec 100644
--- a/include/asm-blackfin/mach-bf533/BF531_def.h
+++ b/arch/blackfin/include/asm/mach-bf533/BF531_def.h
diff --git a/include/asm-blackfin/mach-bf533/BF532_cdef.h b/arch/blackfin/include/asm/mach-bf533/BF532_cdef.h
index 47b48acf15..47b48acf15 100644
--- a/include/asm-blackfin/mach-bf533/BF532_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf533/BF532_cdef.h
diff --git a/include/asm-blackfin/mach-bf533/BF532_def.h b/arch/blackfin/include/asm/mach-bf533/BF532_def.h
index 86944d07ee..86944d07ee 100644
--- a/include/asm-blackfin/mach-bf533/BF532_def.h
+++ b/arch/blackfin/include/asm/mach-bf533/BF532_def.h
diff --git a/include/asm-blackfin/mach-bf533/BF533_cdef.h b/arch/blackfin/include/asm/mach-bf533/BF533_cdef.h
index f270d0188e..f270d0188e 100644
--- a/include/asm-blackfin/mach-bf533/BF533_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf533/BF533_cdef.h
diff --git a/include/asm-blackfin/mach-bf533/BF533_def.h b/arch/blackfin/include/asm/mach-bf533/BF533_def.h
index 17b5d7f1c4..17b5d7f1c4 100644
--- a/include/asm-blackfin/mach-bf533/BF533_def.h
+++ b/arch/blackfin/include/asm/mach-bf533/BF533_def.h
diff --git a/include/asm-blackfin/mach-bf533/anomaly.h b/arch/blackfin/include/asm/mach-bf533/anomaly.h
index c98747f6fa..c98747f6fa 100644
--- a/include/asm-blackfin/mach-bf533/anomaly.h
+++ b/arch/blackfin/include/asm/mach-bf533/anomaly.h
diff --git a/include/asm-blackfin/mach-bf533/def_local.h b/arch/blackfin/include/asm/mach-bf533/def_local.h
index 14c111f712..14c111f712 100644
--- a/include/asm-blackfin/mach-bf533/def_local.h
+++ b/arch/blackfin/include/asm/mach-bf533/def_local.h
diff --git a/include/asm-blackfin/mach-bf533/ports.h b/arch/blackfin/include/asm/mach-bf533/ports.h
index 512d6df025..512d6df025 100644
--- a/include/asm-blackfin/mach-bf533/ports.h
+++ b/arch/blackfin/include/asm/mach-bf533/ports.h
diff --git a/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_cdef.h b/arch/blackfin/include/asm/mach-bf537/ADSP-EDN-BF534-extended_cdef.h
index 07008755f0..07008755f0 100644
--- a/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf537/ADSP-EDN-BF534-extended_cdef.h
diff --git a/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_def.h b/arch/blackfin/include/asm/mach-bf537/ADSP-EDN-BF534-extended_def.h
index 61ffa148e8..61ffa148e8 100644
--- a/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_def.h
+++ b/arch/blackfin/include/asm/mach-bf537/ADSP-EDN-BF534-extended_def.h
diff --git a/include/asm-blackfin/mach-bf537/BF534_cdef.h b/arch/blackfin/include/asm/mach-bf537/BF534_cdef.h
index 27842cc954..27842cc954 100644
--- a/include/asm-blackfin/mach-bf537/BF534_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf537/BF534_cdef.h
diff --git a/include/asm-blackfin/mach-bf537/BF534_def.h b/arch/blackfin/include/asm/mach-bf537/BF534_def.h
index 5f0437b090..5f0437b090 100644
--- a/include/asm-blackfin/mach-bf537/BF534_def.h
+++ b/arch/blackfin/include/asm/mach-bf537/BF534_def.h
diff --git a/include/asm-blackfin/mach-bf537/BF536_cdef.h b/arch/blackfin/include/asm/mach-bf537/BF536_cdef.h
index d753b5e248..d753b5e248 100644
--- a/include/asm-blackfin/mach-bf537/BF536_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf537/BF536_cdef.h
diff --git a/include/asm-blackfin/mach-bf537/BF536_def.h b/arch/blackfin/include/asm/mach-bf537/BF536_def.h
index 810fe91400..810fe91400 100644
--- a/include/asm-blackfin/mach-bf537/BF536_def.h
+++ b/arch/blackfin/include/asm/mach-bf537/BF536_def.h
diff --git a/include/asm-blackfin/mach-bf537/BF537_cdef.h b/arch/blackfin/include/asm/mach-bf537/BF537_cdef.h
index 5eff57d22d..5eff57d22d 100644
--- a/include/asm-blackfin/mach-bf537/BF537_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf537/BF537_cdef.h
diff --git a/include/asm-blackfin/mach-bf537/BF537_def.h b/arch/blackfin/include/asm/mach-bf537/BF537_def.h
index 030fa6461a..030fa6461a 100644
--- a/include/asm-blackfin/mach-bf537/BF537_def.h
+++ b/arch/blackfin/include/asm/mach-bf537/BF537_def.h
diff --git a/include/asm-blackfin/mach-bf537/anomaly.h b/arch/blackfin/include/asm/mach-bf537/anomaly.h
index b7f1a3f301..b7f1a3f301 100644
--- a/include/asm-blackfin/mach-bf537/anomaly.h
+++ b/arch/blackfin/include/asm/mach-bf537/anomaly.h
diff --git a/include/asm-blackfin/mach-bf537/def_local.h b/arch/blackfin/include/asm/mach-bf537/def_local.h
index 14c111f712..14c111f712 100644
--- a/include/asm-blackfin/mach-bf537/def_local.h
+++ b/arch/blackfin/include/asm/mach-bf537/def_local.h
diff --git a/include/asm-blackfin/mach-bf537/ports.h b/arch/blackfin/include/asm/mach-bf537/ports.h
index 2f6293409f..2f6293409f 100644
--- a/include/asm-blackfin/mach-bf537/ports.h
+++ b/arch/blackfin/include/asm/mach-bf537/ports.h
diff --git a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF542-extended_cdef.h b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h
index 51d9cf240a..51d9cf240a 100644
--- a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF542-extended_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_cdef.h
diff --git a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF542-extended_def.h b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h
index f294a850ab..f294a850ab 100644
--- a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF542-extended_def.h
+++ b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF542-extended_def.h
diff --git a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF544-extended_cdef.h b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h
index 4c0fdf52bf..4c0fdf52bf 100644
--- a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF544-extended_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_cdef.h
diff --git a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF544-extended_def.h b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h
index 3c14d22d56..3c14d22d56 100644
--- a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF544-extended_def.h
+++ b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF544-extended_def.h
diff --git a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF547-extended_cdef.h b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h
index e0f76ae1ef..e0f76ae1ef 100644
--- a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF547-extended_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_cdef.h
diff --git a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF547-extended_def.h b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h
index 0e482792cf..0e482792cf 100644
--- a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF547-extended_def.h
+++ b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF547-extended_def.h
diff --git a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF548-extended_cdef.h b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h
index caf2f6fb6d..caf2f6fb6d 100644
--- a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF548-extended_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_cdef.h
diff --git a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF548-extended_def.h b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h
index a92479bc67..a92479bc67 100644
--- a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF548-extended_def.h
+++ b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF548-extended_def.h
diff --git a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF549-extended_cdef.h b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h
index af90e4c62e..af90e4c62e 100644
--- a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF549-extended_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_cdef.h
diff --git a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF549-extended_def.h b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h
index 6163eb276f..6163eb276f 100644
--- a/include/asm-blackfin/mach-bf548/ADSP-EDN-BF549-extended_def.h
+++ b/arch/blackfin/include/asm/mach-bf548/ADSP-EDN-BF549-extended_def.h
diff --git a/include/asm-blackfin/mach-bf548/BF541_cdef.h b/arch/blackfin/include/asm/mach-bf548/BF541_cdef.h
index 1b8c79b59d..1b8c79b59d 100644
--- a/include/asm-blackfin/mach-bf548/BF541_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf548/BF541_cdef.h
diff --git a/include/asm-blackfin/mach-bf548/BF541_def.h b/arch/blackfin/include/asm/mach-bf548/BF541_def.h
index 1469ac2db7..1469ac2db7 100644
--- a/include/asm-blackfin/mach-bf548/BF541_def.h
+++ b/arch/blackfin/include/asm/mach-bf548/BF541_def.h
diff --git a/include/asm-blackfin/mach-bf548/BF542_cdef.h b/arch/blackfin/include/asm/mach-bf548/BF542_cdef.h
index 306b5f117f..306b5f117f 100644
--- a/include/asm-blackfin/mach-bf548/BF542_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf548/BF542_cdef.h
diff --git a/include/asm-blackfin/mach-bf548/BF542_def.h b/arch/blackfin/include/asm/mach-bf548/BF542_def.h
index 1324a136fd..1324a136fd 100644
--- a/include/asm-blackfin/mach-bf548/BF542_def.h
+++ b/arch/blackfin/include/asm/mach-bf548/BF542_def.h
diff --git a/include/asm-blackfin/mach-bf548/BF544_cdef.h b/arch/blackfin/include/asm/mach-bf548/BF544_cdef.h
index 47ef6e17b5..47ef6e17b5 100644
--- a/include/asm-blackfin/mach-bf548/BF544_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf548/BF544_cdef.h
diff --git a/include/asm-blackfin/mach-bf548/BF544_def.h b/arch/blackfin/include/asm/mach-bf548/BF544_def.h
index aef6e4858d..aef6e4858d 100644
--- a/include/asm-blackfin/mach-bf548/BF544_def.h
+++ b/arch/blackfin/include/asm/mach-bf548/BF544_def.h
diff --git a/include/asm-blackfin/mach-bf548/BF547_cdef.h b/arch/blackfin/include/asm/mach-bf548/BF547_cdef.h
index 42d041a741..42d041a741 100644
--- a/include/asm-blackfin/mach-bf548/BF547_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf548/BF547_cdef.h
diff --git a/include/asm-blackfin/mach-bf548/BF547_def.h b/arch/blackfin/include/asm/mach-bf548/BF547_def.h
index ce7c8804c0..ce7c8804c0 100644
--- a/include/asm-blackfin/mach-bf548/BF547_def.h
+++ b/arch/blackfin/include/asm/mach-bf548/BF547_def.h
diff --git a/include/asm-blackfin/mach-bf548/BF548_cdef.h b/arch/blackfin/include/asm/mach-bf548/BF548_cdef.h
index cf02834e98..cf02834e98 100644
--- a/include/asm-blackfin/mach-bf548/BF548_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf548/BF548_cdef.h
diff --git a/include/asm-blackfin/mach-bf548/BF548_def.h b/arch/blackfin/include/asm/mach-bf548/BF548_def.h
index e02e843e57..e02e843e57 100644
--- a/include/asm-blackfin/mach-bf548/BF548_def.h
+++ b/arch/blackfin/include/asm/mach-bf548/BF548_def.h
diff --git a/include/asm-blackfin/mach-bf548/BF549_cdef.h b/arch/blackfin/include/asm/mach-bf548/BF549_cdef.h
index 3514ceff4d..3514ceff4d 100644
--- a/include/asm-blackfin/mach-bf548/BF549_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf548/BF549_cdef.h
diff --git a/include/asm-blackfin/mach-bf548/BF549_def.h b/arch/blackfin/include/asm/mach-bf548/BF549_def.h
index a16ff5aaf6..a16ff5aaf6 100644
--- a/include/asm-blackfin/mach-bf548/BF549_def.h
+++ b/arch/blackfin/include/asm/mach-bf548/BF549_def.h
diff --git a/include/asm-blackfin/mach-bf548/anomaly.h b/arch/blackfin/include/asm/mach-bf548/anomaly.h
index 192dd67c23..192dd67c23 100644
--- a/include/asm-blackfin/mach-bf548/anomaly.h
+++ b/arch/blackfin/include/asm/mach-bf548/anomaly.h
diff --git a/include/asm-blackfin/mach-bf548/def_local.h b/arch/blackfin/include/asm/mach-bf548/def_local.h
index 81eca83bce..81eca83bce 100644
--- a/include/asm-blackfin/mach-bf548/def_local.h
+++ b/arch/blackfin/include/asm/mach-bf548/def_local.h
diff --git a/include/asm-blackfin/mach-bf548/mem_map.h b/arch/blackfin/include/asm/mach-bf548/mem_map.h
index 4f943977f5..4f943977f5 100644
--- a/include/asm-blackfin/mach-bf548/mem_map.h
+++ b/arch/blackfin/include/asm/mach-bf548/mem_map.h
diff --git a/include/asm-blackfin/mach-bf548/ports.h b/arch/blackfin/include/asm/mach-bf548/ports.h
index 50054f3f19..50054f3f19 100644
--- a/include/asm-blackfin/mach-bf548/ports.h
+++ b/arch/blackfin/include/asm/mach-bf548/ports.h
diff --git a/include/asm-blackfin/mach-bf561/BF561_cdef.h b/arch/blackfin/include/asm/mach-bf561/BF561_cdef.h
index e2c165ace3..e2c165ace3 100644
--- a/include/asm-blackfin/mach-bf561/BF561_cdef.h
+++ b/arch/blackfin/include/asm/mach-bf561/BF561_cdef.h
diff --git a/include/asm-blackfin/mach-bf561/BF561_def.h b/arch/blackfin/include/asm/mach-bf561/BF561_def.h
index 8534962326..8534962326 100644
--- a/include/asm-blackfin/mach-bf561/BF561_def.h
+++ b/arch/blackfin/include/asm/mach-bf561/BF561_def.h
diff --git a/include/asm-blackfin/mach-bf561/anomaly.h b/arch/blackfin/include/asm/mach-bf561/anomaly.h
index e4aa20c525..e4aa20c525 100644
--- a/include/asm-blackfin/mach-bf561/anomaly.h
+++ b/arch/blackfin/include/asm/mach-bf561/anomaly.h
diff --git a/include/asm-blackfin/mach-bf561/def_local.h b/arch/blackfin/include/asm/mach-bf561/def_local.h
index 597dcecd8f..597dcecd8f 100644
--- a/include/asm-blackfin/mach-bf561/def_local.h
+++ b/arch/blackfin/include/asm/mach-bf561/def_local.h
diff --git a/include/asm-blackfin/mach-bf561/ports.h b/arch/blackfin/include/asm/mach-bf561/ports.h
index 194d4a3eb1..194d4a3eb1 100644
--- a/include/asm-blackfin/mach-bf561/ports.h
+++ b/arch/blackfin/include/asm/mach-bf561/ports.h
diff --git a/include/asm-blackfin/mach-common/ADSP-EDN-DUAL-CORE-extended_cdef.h b/arch/blackfin/include/asm/mach-common/ADSP-EDN-DUAL-CORE-extended_cdef.h
index 43f385021d..43f385021d 100644
--- a/include/asm-blackfin/mach-common/ADSP-EDN-DUAL-CORE-extended_cdef.h
+++ b/arch/blackfin/include/asm/mach-common/ADSP-EDN-DUAL-CORE-extended_cdef.h
diff --git a/include/asm-blackfin/mach-common/ADSP-EDN-DUAL-CORE-extended_def.h b/arch/blackfin/include/asm/mach-common/ADSP-EDN-DUAL-CORE-extended_def.h
index b4857c3b02..b4857c3b02 100644
--- a/include/asm-blackfin/mach-common/ADSP-EDN-DUAL-CORE-extended_def.h
+++ b/arch/blackfin/include/asm/mach-common/ADSP-EDN-DUAL-CORE-extended_def.h
diff --git a/include/asm-blackfin/mach-common/ADSP-EDN-core_cdef.h b/arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h
index af17813db8..af17813db8 100644
--- a/include/asm-blackfin/mach-common/ADSP-EDN-core_cdef.h
+++ b/arch/blackfin/include/asm/mach-common/ADSP-EDN-core_cdef.h
diff --git a/include/asm-blackfin/mach-common/ADSP-EDN-core_def.h b/arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h
index 74f5d309c0..74f5d309c0 100644
--- a/include/asm-blackfin/mach-common/ADSP-EDN-core_def.h
+++ b/arch/blackfin/include/asm/mach-common/ADSP-EDN-core_def.h
diff --git a/include/asm-blackfin/mach-common/ADSP-EDN-extended_cdef.h b/arch/blackfin/include/asm/mach-common/ADSP-EDN-extended_cdef.h
index 2e61b5faae..2e61b5faae 100644
--- a/include/asm-blackfin/mach-common/ADSP-EDN-extended_cdef.h
+++ b/arch/blackfin/include/asm/mach-common/ADSP-EDN-extended_cdef.h
diff --git a/include/asm-blackfin/mach-common/ADSP-EDN-extended_def.h b/arch/blackfin/include/asm/mach-common/ADSP-EDN-extended_def.h
index 24b56b3876..24b56b3876 100644
--- a/include/asm-blackfin/mach-common/ADSP-EDN-extended_def.h
+++ b/arch/blackfin/include/asm/mach-common/ADSP-EDN-extended_def.h
diff --git a/include/asm-blackfin/mach-common/bits/bootrom.h b/arch/blackfin/include/asm/mach-common/bits/bootrom.h
index f537e93f70..f537e93f70 100644
--- a/include/asm-blackfin/mach-common/bits/bootrom.h
+++ b/arch/blackfin/include/asm/mach-common/bits/bootrom.h
diff --git a/include/asm-blackfin/mach-common/bits/core.h b/arch/blackfin/include/asm/mach-common/bits/core.h
index 6db4f81826..6db4f81826 100644
--- a/include/asm-blackfin/mach-common/bits/core.h
+++ b/arch/blackfin/include/asm/mach-common/bits/core.h
diff --git a/include/asm-blackfin/mach-common/bits/dma.h b/arch/blackfin/include/asm/mach-common/bits/dma.h
index 136313e613..136313e613 100644
--- a/include/asm-blackfin/mach-common/bits/dma.h
+++ b/arch/blackfin/include/asm/mach-common/bits/dma.h
diff --git a/include/asm-blackfin/mach-common/bits/ebiu.h b/arch/blackfin/include/asm/mach-common/bits/ebiu.h
index 7c0c569acf..7c0c569acf 100644
--- a/include/asm-blackfin/mach-common/bits/ebiu.h
+++ b/arch/blackfin/include/asm/mach-common/bits/ebiu.h
diff --git a/include/asm-blackfin/mach-common/bits/emac.h b/arch/blackfin/include/asm/mach-common/bits/emac.h
index 7a43bbb1a3..7a43bbb1a3 100644
--- a/include/asm-blackfin/mach-common/bits/emac.h
+++ b/arch/blackfin/include/asm/mach-common/bits/emac.h
diff --git a/include/asm-blackfin/mach-common/bits/eppi.h b/arch/blackfin/include/asm/mach-common/bits/eppi.h
index fb1456fc0e..fb1456fc0e 100644
--- a/include/asm-blackfin/mach-common/bits/eppi.h
+++ b/arch/blackfin/include/asm/mach-common/bits/eppi.h
diff --git a/include/asm-blackfin/mach-common/bits/lockbox.h b/arch/blackfin/include/asm/mach-common/bits/lockbox.h
index 77f849e8f2..77f849e8f2 100644
--- a/include/asm-blackfin/mach-common/bits/lockbox.h
+++ b/arch/blackfin/include/asm/mach-common/bits/lockbox.h
diff --git a/include/asm-blackfin/mach-common/bits/mpu.h b/arch/blackfin/include/asm/mach-common/bits/mpu.h
index 39998f82aa..39998f82aa 100644
--- a/include/asm-blackfin/mach-common/bits/mpu.h
+++ b/arch/blackfin/include/asm/mach-common/bits/mpu.h
diff --git a/include/asm-blackfin/mach-common/bits/otp.h b/arch/blackfin/include/asm/mach-common/bits/otp.h
index 4e3f1afcfa..4e3f1afcfa 100644
--- a/include/asm-blackfin/mach-common/bits/otp.h
+++ b/arch/blackfin/include/asm/mach-common/bits/otp.h
diff --git a/include/asm-blackfin/mach-common/bits/pata.h b/arch/blackfin/include/asm/mach-common/bits/pata.h
index 9b61824f18..9b61824f18 100644
--- a/include/asm-blackfin/mach-common/bits/pata.h
+++ b/arch/blackfin/include/asm/mach-common/bits/pata.h
diff --git a/include/asm-blackfin/mach-common/bits/pll.h b/arch/blackfin/include/asm/mach-common/bits/pll.h
index 9009f26401..9009f26401 100644
--- a/include/asm-blackfin/mach-common/bits/pll.h
+++ b/arch/blackfin/include/asm/mach-common/bits/pll.h
diff --git a/include/asm-blackfin/mach-common/bits/ports-a.h b/arch/blackfin/include/asm/mach-common/bits/ports-a.h
index 9f78a761c4..9f78a761c4 100644
--- a/include/asm-blackfin/mach-common/bits/ports-a.h
+++ b/arch/blackfin/include/asm/mach-common/bits/ports-a.h
diff --git a/include/asm-blackfin/mach-common/bits/ports-b.h b/arch/blackfin/include/asm/mach-common/bits/ports-b.h
index b81702f09e..b81702f09e 100644
--- a/include/asm-blackfin/mach-common/bits/ports-b.h
+++ b/arch/blackfin/include/asm/mach-common/bits/ports-b.h
diff --git a/include/asm-blackfin/mach-common/bits/ports-c.h b/arch/blackfin/include/asm/mach-common/bits/ports-c.h
index 3cc665e0ba..3cc665e0ba 100644
--- a/include/asm-blackfin/mach-common/bits/ports-c.h
+++ b/arch/blackfin/include/asm/mach-common/bits/ports-c.h
diff --git a/include/asm-blackfin/mach-common/bits/ports-d.h b/arch/blackfin/include/asm/mach-common/bits/ports-d.h
index 868c6a01f1..868c6a01f1 100644
--- a/include/asm-blackfin/mach-common/bits/ports-d.h
+++ b/arch/blackfin/include/asm/mach-common/bits/ports-d.h
diff --git a/include/asm-blackfin/mach-common/bits/ports-e.h b/arch/blackfin/include/asm/mach-common/bits/ports-e.h
index c88b0d0dd4..c88b0d0dd4 100644
--- a/include/asm-blackfin/mach-common/bits/ports-e.h
+++ b/arch/blackfin/include/asm/mach-common/bits/ports-e.h
diff --git a/include/asm-blackfin/mach-common/bits/ports-f.h b/arch/blackfin/include/asm/mach-common/bits/ports-f.h
index d6af206332..d6af206332 100644
--- a/include/asm-blackfin/mach-common/bits/ports-f.h
+++ b/arch/blackfin/include/asm/mach-common/bits/ports-f.h
diff --git a/include/asm-blackfin/mach-common/bits/ports-g.h b/arch/blackfin/include/asm/mach-common/bits/ports-g.h
index 09355d333c..09355d333c 100644
--- a/include/asm-blackfin/mach-common/bits/ports-g.h
+++ b/arch/blackfin/include/asm/mach-common/bits/ports-g.h
diff --git a/include/asm-blackfin/mach-common/bits/ports-h.h b/arch/blackfin/include/asm/mach-common/bits/ports-h.h
index fa3910c6fb..fa3910c6fb 100644
--- a/include/asm-blackfin/mach-common/bits/ports-h.h
+++ b/arch/blackfin/include/asm/mach-common/bits/ports-h.h
diff --git a/include/asm-blackfin/mach-common/bits/ports-i.h b/arch/blackfin/include/asm/mach-common/bits/ports-i.h
index f176f08af6..f176f08af6 100644
--- a/include/asm-blackfin/mach-common/bits/ports-i.h
+++ b/arch/blackfin/include/asm/mach-common/bits/ports-i.h
diff --git a/include/asm-blackfin/mach-common/bits/ports-j.h b/arch/blackfin/include/asm/mach-common/bits/ports-j.h
index 924123ecec..924123ecec 100644
--- a/include/asm-blackfin/mach-common/bits/ports-j.h
+++ b/arch/blackfin/include/asm/mach-common/bits/ports-j.h
diff --git a/include/asm-blackfin/mach-common/bits/ppi.h b/arch/blackfin/include/asm/mach-common/bits/ppi.h
index 523f2388e4..523f2388e4 100644
--- a/include/asm-blackfin/mach-common/bits/ppi.h
+++ b/arch/blackfin/include/asm/mach-common/bits/ppi.h
diff --git a/include/asm-blackfin/mach-common/bits/rtc.h b/arch/blackfin/include/asm/mach-common/bits/rtc.h
index f5a0cdb9d2..f5a0cdb9d2 100644
--- a/include/asm-blackfin/mach-common/bits/rtc.h
+++ b/arch/blackfin/include/asm/mach-common/bits/rtc.h
diff --git a/include/asm-blackfin/mach-common/bits/sdh.h b/arch/blackfin/include/asm/mach-common/bits/sdh.h
index 8c5dd33f5c..8c5dd33f5c 100644
--- a/include/asm-blackfin/mach-common/bits/sdh.h
+++ b/arch/blackfin/include/asm/mach-common/bits/sdh.h
diff --git a/include/asm-blackfin/mach-common/bits/spi.h b/arch/blackfin/include/asm/mach-common/bits/spi.h
index 869dcb08f5..869dcb08f5 100644
--- a/include/asm-blackfin/mach-common/bits/spi.h
+++ b/arch/blackfin/include/asm/mach-common/bits/spi.h
diff --git a/include/asm-blackfin/mach-common/bits/sport.h b/arch/blackfin/include/asm/mach-common/bits/sport.h
index 88e7a5d324..88e7a5d324 100644
--- a/include/asm-blackfin/mach-common/bits/sport.h
+++ b/arch/blackfin/include/asm/mach-common/bits/sport.h
diff --git a/include/asm-blackfin/mach-common/bits/timer.h b/arch/blackfin/include/asm/mach-common/bits/timer.h
index 9513f80c05..9513f80c05 100644
--- a/include/asm-blackfin/mach-common/bits/timer.h
+++ b/arch/blackfin/include/asm/mach-common/bits/timer.h
diff --git a/include/asm-blackfin/mach-common/bits/trace.h b/arch/blackfin/include/asm/mach-common/bits/trace.h
index 13e2134ab3..13e2134ab3 100644
--- a/include/asm-blackfin/mach-common/bits/trace.h
+++ b/arch/blackfin/include/asm/mach-common/bits/trace.h
diff --git a/include/asm-blackfin/mach-common/bits/twi.h b/arch/blackfin/include/asm/mach-common/bits/twi.h
index 8fa7d9f3b5..8fa7d9f3b5 100644
--- a/include/asm-blackfin/mach-common/bits/twi.h
+++ b/arch/blackfin/include/asm/mach-common/bits/twi.h
diff --git a/include/asm-blackfin/mach-common/bits/uart.h b/arch/blackfin/include/asm/mach-common/bits/uart.h
index ac1ba11f5a..ac1ba11f5a 100644
--- a/include/asm-blackfin/mach-common/bits/uart.h
+++ b/arch/blackfin/include/asm/mach-common/bits/uart.h
diff --git a/include/asm-blackfin/mach-common/bits/usb.h b/arch/blackfin/include/asm/mach-common/bits/usb.h
index c6390589bc..c6390589bc 100644
--- a/include/asm-blackfin/mach-common/bits/usb.h
+++ b/arch/blackfin/include/asm/mach-common/bits/usb.h
diff --git a/include/asm-blackfin/mach-common/bits/watchdog.h b/arch/blackfin/include/asm/mach-common/bits/watchdog.h
index 75924f92f9..75924f92f9 100644
--- a/include/asm-blackfin/mach-common/bits/watchdog.h
+++ b/arch/blackfin/include/asm/mach-common/bits/watchdog.h
diff --git a/include/asm-blackfin/mem_map.h b/arch/blackfin/include/asm/mem_map.h
index 3e361d614a..3e361d614a 100644
--- a/include/asm-blackfin/mem_map.h
+++ b/arch/blackfin/include/asm/mem_map.h
diff --git a/include/asm-blackfin/net.h b/arch/blackfin/include/asm/net.h
index 97cb46691e..97cb46691e 100644
--- a/include/asm-blackfin/net.h
+++ b/arch/blackfin/include/asm/net.h
diff --git a/include/asm-blackfin/posix_types.h b/arch/blackfin/include/asm/posix_types.h
index 000ffe52ca..000ffe52ca 100644
--- a/include/asm-blackfin/posix_types.h
+++ b/arch/blackfin/include/asm/posix_types.h
diff --git a/include/asm-blackfin/processor.h b/arch/blackfin/include/asm/processor.h
index d700ccef2f..d700ccef2f 100644
--- a/include/asm-blackfin/processor.h
+++ b/arch/blackfin/include/asm/processor.h
diff --git a/arch/blackfin/include/asm/ptrace.h b/arch/blackfin/include/asm/ptrace.h
new file mode 100644
index 0000000000..251d5e60c8
--- /dev/null
+++ b/arch/blackfin/include/asm/ptrace.h
@@ -0,0 +1,198 @@
+/*
+ * Copyright 2004-2008 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef _BFIN_PTRACE_H
+#define _BFIN_PTRACE_H
+
+/*
+ * GCC defines register number like this:
+ * -----------------------------
+ *       0 - 7 are data registers R0-R7
+ *       8 - 15 are address registers P0-P7
+ *      16 - 31 dsp registers I/B/L0 -- I/B/L3 & M0--M3
+ *      32 - 33 A registers A0 & A1
+ *      34 -    status register
+ * -----------------------------
+ *
+ * We follows above, except:
+ *      32-33 --- Low 32-bit of A0&1
+ *      34-35 --- High 8-bit of A0&1
+ */
+
+#ifndef __ASSEMBLY__
+
+struct task_struct;
+
+/* this struct defines the way the registers are stored on the
+   stack during a system call. */
+
+struct pt_regs {
+	long orig_pc;
+	long ipend;
+	long seqstat;
+	long rete;
+	long retn;
+	long retx;
+	long pc;		/* PC == RETI */
+	long rets;
+	long reserved;		/* Used as scratch during system calls */
+	long astat;
+	long lb1;
+	long lb0;
+	long lt1;
+	long lt0;
+	long lc1;
+	long lc0;
+	long a1w;
+	long a1x;
+	long a0w;
+	long a0x;
+	long b3;
+	long b2;
+	long b1;
+	long b0;
+	long l3;
+	long l2;
+	long l1;
+	long l0;
+	long m3;
+	long m2;
+	long m1;
+	long m0;
+	long i3;
+	long i2;
+	long i1;
+	long i0;
+	long usp;
+	long fp;
+	long p5;
+	long p4;
+	long p3;
+	long p2;
+	long p1;
+	long p0;
+	long r7;
+	long r6;
+	long r5;
+	long r4;
+	long r3;
+	long r2;
+	long r1;
+	long r0;
+	long orig_r0;
+	long orig_p0;
+	long syscfg;
+};
+
+/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
+#define PTRACE_GETREGS            12
+#define PTRACE_SETREGS            13	/* ptrace signal  */
+
+#define PTRACE_GETFDPIC           31	/* get the ELF fdpic loadmap address */
+#define PTRACE_GETFDPIC_EXEC       0	/* [addr] request the executable loadmap */
+#define PTRACE_GETFDPIC_INTERP     1	/* [addr] request the interpreter loadmap */
+
+#define PS_S  (0x0002)
+
+#ifdef __KERNEL__
+
+/* user_mode returns true if only one bit is set in IPEND, other than the
+   master interrupt enable.  */
+#define user_mode(regs) (!(((regs)->ipend & ~0x10) & (((regs)->ipend & ~0x10) - 1)))
+#define instruction_pointer(regs) ((regs)->pc)
+#define user_stack_pointer(regs)  ((regs)->usp)
+#define profile_pc(regs) instruction_pointer(regs)
+extern void show_regs(struct pt_regs *);
+
+#define arch_has_single_step()	(1)
+extern void user_enable_single_step(struct task_struct *);
+/* see arch/blackfin/kernel/ptrace.c about this redirect */
+#define user_disable_single_step(child) ptrace_disable(child)
+
+/*
+ * Get the address of the live pt_regs for the specified task.
+ * These are saved onto the top kernel stack when the process
+ * is not running.
+ *
+ * Note: if a user thread is execve'd from kernel space, the
+ * kernel stack will not be empty on entry to the kernel, so
+ * ptracing these tasks will fail.
+ */
+#define task_pt_regs(task) \
+	(struct pt_regs *) \
+	    ((unsigned long)task_stack_page(task) + \
+	     (THREAD_SIZE - sizeof(struct pt_regs)))
+
+#endif  /*  __KERNEL__  */
+
+#endif				/* __ASSEMBLY__ */
+
+/*
+ * Offsets used by 'ptrace' system call interface.
+ */
+
+#define PT_R0 204
+#define PT_R1 200
+#define PT_R2 196
+#define PT_R3 192
+#define PT_R4 188
+#define PT_R5 184
+#define PT_R6 180
+#define PT_R7 176
+#define PT_P0 172
+#define PT_P1 168
+#define PT_P2 164
+#define PT_P3 160
+#define PT_P4 156
+#define PT_P5 152
+#define PT_FP 148
+#define PT_USP 144
+#define PT_I0 140
+#define PT_I1 136
+#define PT_I2 132
+#define PT_I3 128
+#define PT_M0 124
+#define PT_M1 120
+#define PT_M2 116
+#define PT_M3 112
+#define PT_L0 108
+#define PT_L1 104
+#define PT_L2 100
+#define PT_L3 96
+#define PT_B0 92
+#define PT_B1 88
+#define PT_B2 84
+#define PT_B3 80
+#define PT_A0X 76
+#define PT_A0W 72
+#define PT_A1X 68
+#define PT_A1W 64
+#define PT_LC0 60
+#define PT_LC1 56
+#define PT_LT0 52
+#define PT_LT1 48
+#define PT_LB0 44
+#define PT_LB1 40
+#define PT_ASTAT 36
+#define PT_RESERVED 32
+#define PT_RETS 28
+#define PT_PC 24
+#define PT_RETX 20
+#define PT_RETN 16
+#define PT_RETE 12
+#define PT_SEQSTAT 8
+#define PT_IPEND 4
+
+#define PT_ORIG_R0 208
+#define PT_ORIG_P0 212
+#define PT_SYSCFG 216
+#define PT_TEXT_ADDR 220
+#define PT_TEXT_END_ADDR 224
+#define PT_DATA_ADDR 228
+#define PT_FDPIC_EXEC 232
+#define PT_FDPIC_INTERP 236
+
+#endif				/* _BFIN_PTRACE_H */
diff --git a/include/asm-blackfin/sdh.h b/arch/blackfin/include/asm/sdh.h
index 2c2f63ed55..2c2f63ed55 100644
--- a/include/asm-blackfin/sdh.h
+++ b/arch/blackfin/include/asm/sdh.h
diff --git a/include/asm-blackfin/shared_resources.h b/arch/blackfin/include/asm/shared_resources.h
index 2ac8990693..2ac8990693 100644
--- a/include/asm-blackfin/shared_resources.h
+++ b/arch/blackfin/include/asm/shared_resources.h
diff --git a/include/asm-blackfin/signal.h b/arch/blackfin/include/asm/signal.h
index 7b1573ce19..7b1573ce19 100644
--- a/include/asm-blackfin/signal.h
+++ b/arch/blackfin/include/asm/signal.h
diff --git a/include/asm-blackfin/string.h b/arch/blackfin/include/asm/string.h
index 117f44c4d3..117f44c4d3 100644
--- a/include/asm-blackfin/string.h
+++ b/arch/blackfin/include/asm/string.h
diff --git a/include/asm-blackfin/system.h b/arch/blackfin/include/asm/system.h
index 6bc7208cad..6bc7208cad 100644
--- a/include/asm-blackfin/system.h
+++ b/arch/blackfin/include/asm/system.h
diff --git a/arch/blackfin/include/asm/traps.h b/arch/blackfin/include/asm/traps.h
new file mode 100644
index 0000000000..7422d3d1be
--- /dev/null
+++ b/arch/blackfin/include/asm/traps.h
@@ -0,0 +1,50 @@
+/*
+ *  Copyright 2004-2009 Analog Devices Inc.
+ *                 2001 Lineo, Inc
+ *                        Tony Kou
+ *                 1993 Hamish Macdonald
+ *
+ * Licensed under the GPL-2
+ */
+
+#ifndef _BFIN_TRAPS_H
+#define _BFIN_TRAPS_H
+
+#define VEC_SYS		(0)
+#define VEC_EXCPT01	(1)
+#define VEC_EXCPT02	(2)
+#define VEC_EXCPT03	(3)
+#define VEC_EXCPT04	(4)
+#define VEC_EXCPT05	(5)
+#define VEC_EXCPT06	(6)
+#define VEC_EXCPT07	(7)
+#define VEC_EXCPT08	(8)
+#define VEC_EXCPT09	(9)
+#define VEC_EXCPT10	(10)
+#define VEC_EXCPT11	(11)
+#define VEC_EXCPT12	(12)
+#define VEC_EXCPT13	(13)
+#define VEC_EXCPT14	(14)
+#define VEC_EXCPT15	(15)
+#define VEC_STEP	(16)
+#define VEC_OVFLOW	(17)
+#define VEC_UNDEF_I	(33)
+#define VEC_ILGAL_I	(34)
+#define VEC_CPLB_VL	(35)
+#define VEC_MISALI_D	(36)
+#define VEC_UNCOV	(37)
+#define VEC_CPLB_M	(38)
+#define VEC_CPLB_MHIT	(39)
+#define VEC_WATCH	(40)
+#define VEC_ISTRU_VL	(41)	/*ADSP-BF535 only (MH) */
+#define VEC_MISALI_I	(42)
+#define VEC_CPLB_I_VL	(43)
+#define VEC_CPLB_I_M	(44)
+#define VEC_CPLB_I_MHIT	(45)
+#define VEC_ILL_RES	(46)	/* including unvalid supervisor mode insn */
+/* The hardware reserves (63) for future use - we use it to tell our
+ * normal exception handling code we have a hardware error
+ */
+#define VEC_HWERR	(63)
+
+#endif				/* _BFIN_TRAPS_H */
diff --git a/include/asm-blackfin/types.h b/arch/blackfin/include/asm/types.h
index 2160ba0d02..2160ba0d02 100644
--- a/include/asm-blackfin/types.h
+++ b/arch/blackfin/include/asm/types.h
diff --git a/include/asm-blackfin/u-boot.h b/arch/blackfin/include/asm/u-boot.h
index a6e6cf0f54..a6e6cf0f54 100644
--- a/include/asm-blackfin/u-boot.h
+++ b/arch/blackfin/include/asm/u-boot.h
diff --git a/include/asm-blackfin/unaligned.h b/arch/blackfin/include/asm/unaligned.h
index 6cecbbb211..6cecbbb211 100644
--- a/include/asm-blackfin/unaligned.h
+++ b/arch/blackfin/include/asm/unaligned.h
diff --git a/lib_blackfin/.gitignore b/arch/blackfin/lib/.gitignore
index 09f1be04eb..09f1be04eb 100644
--- a/lib_blackfin/.gitignore
+++ b/arch/blackfin/lib/.gitignore
diff --git a/lib_blackfin/Makefile b/arch/blackfin/lib/Makefile
index 3bdba754db..3bdba754db 100644
--- a/lib_blackfin/Makefile
+++ b/arch/blackfin/lib/Makefile
diff --git a/lib_blackfin/__kgdb.S b/arch/blackfin/lib/__kgdb.S
index cba4179d3e..cba4179d3e 100644
--- a/lib_blackfin/__kgdb.S
+++ b/arch/blackfin/lib/__kgdb.S
diff --git a/lib_blackfin/board.c b/arch/blackfin/lib/board.c
index 21fff334a0..4e9bb19226 100644
--- a/lib_blackfin/board.c
+++ b/arch/blackfin/lib/board.c
@@ -73,8 +73,12 @@ static int init_baudrate(void)
 
 static void display_global_data(void)
 {
-#ifdef CONFIG_DEBUG_EARLY_SERIAL
 	bd_t *bd;
+
+#ifndef CONFIG_DEBUG_EARLY_SERIAL
+	return;
+#endif
+
 	bd = gd->bd;
 	printf(" gd: %p\n", gd);
 	printf(" |-flags: %lx\n", gd->flags);
@@ -82,7 +86,6 @@ static void display_global_data(void)
 	printf(" |-baudrate: %lu\n", gd->baudrate);
 	printf(" |-have_console: %lx\n", gd->have_console);
 	printf(" |-ram_size: %lx\n", gd->ram_size);
-	printf(" |-reloc_off: %lx\n", gd->reloc_off);
 	printf(" |-env_addr: %lx\n", gd->env_addr);
 	printf(" |-env_valid: %lx\n", gd->env_valid);
 	printf(" |-jt(%p): %p\n", gd->jt, *(gd->jt));
@@ -95,7 +98,6 @@ static void display_global_data(void)
 	printf("   |-bi_flashstart: %lx\n", bd->bi_flashstart);
 	printf("   |-bi_flashsize: %lx\n", bd->bi_flashsize);
 	printf("   \\-bi_flashoffset: %lx\n", bd->bi_flashoffset);
-#endif
 }
 
 #define CPLB_PAGE_SIZE (4 * 1024 * 1024)
@@ -197,6 +199,7 @@ void init_cplbtables(void)
  * "continue" and != 0 means "fatal error, hang the system".
  */
 
+extern int watchdog_init(void);
 extern int exception_init(void);
 extern int irq_init(void);
 extern int timer_init(void);
@@ -227,6 +230,11 @@ void board_init_f(ulong bootflag)
 	dcache_enable();
 #endif
 
+#ifdef CONFIG_WATCHDOG
+	serial_early_puts("Setting up external watchdog\n");
+	watchdog_init();
+#endif
+
 #ifdef DEBUG
 	if (CONFIG_SYS_GBL_DATA_SIZE < sizeof(*gd))
 		hang();
diff --git a/lib_blackfin/boot.c b/arch/blackfin/lib/boot.c
index 951d5b0d02..951d5b0d02 100644
--- a/lib_blackfin/boot.c
+++ b/arch/blackfin/lib/boot.c
diff --git a/lib_blackfin/cache.c b/arch/blackfin/lib/cache.c
index 0a321a448f..0a321a448f 100644
--- a/lib_blackfin/cache.c
+++ b/arch/blackfin/lib/cache.c
diff --git a/lib_blackfin/clocks.c b/arch/blackfin/lib/clocks.c
index 0be395bb30..0be395bb30 100644
--- a/lib_blackfin/clocks.c
+++ b/arch/blackfin/lib/clocks.c
diff --git a/lib_blackfin/cmd_cache_dump.c b/arch/blackfin/lib/cmd_cache_dump.c
index de5840e4cc..de5840e4cc 100644
--- a/lib_blackfin/cmd_cache_dump.c
+++ b/arch/blackfin/lib/cmd_cache_dump.c
diff --git a/lib_blackfin/ins.S b/arch/blackfin/lib/ins.S
index 4519596420..4519596420 100644
--- a/lib_blackfin/ins.S
+++ b/arch/blackfin/lib/ins.S
diff --git a/lib_blackfin/kgdb.c b/arch/blackfin/lib/kgdb.c
index bd62d71058..bd62d71058 100644
--- a/lib_blackfin/kgdb.c
+++ b/arch/blackfin/lib/kgdb.c
diff --git a/lib_blackfin/kgdb.h b/arch/blackfin/lib/kgdb.h
index 18f1f493cc..18f1f493cc 100644
--- a/lib_blackfin/kgdb.h
+++ b/arch/blackfin/lib/kgdb.h
diff --git a/lib_blackfin/memcmp.S b/arch/blackfin/lib/memcmp.S
index 6c834a7e85..6c834a7e85 100644
--- a/lib_blackfin/memcmp.S
+++ b/arch/blackfin/lib/memcmp.S
diff --git a/lib_blackfin/memcpy.S b/arch/blackfin/lib/memcpy.S
index e6b359a344..e6b359a344 100644
--- a/lib_blackfin/memcpy.S
+++ b/arch/blackfin/lib/memcpy.S
diff --git a/lib_blackfin/memmove.S b/arch/blackfin/lib/memmove.S
index e385c4f6f5..e385c4f6f5 100644
--- a/lib_blackfin/memmove.S
+++ b/arch/blackfin/lib/memmove.S
diff --git a/lib_blackfin/memset.S b/arch/blackfin/lib/memset.S
index 26f63cdc94..26f63cdc94 100644
--- a/lib_blackfin/memset.S
+++ b/arch/blackfin/lib/memset.S
diff --git a/lib_blackfin/muldi3.c b/arch/blackfin/lib/muldi3.c
index bf1ca535fa..bf1ca535fa 100644
--- a/lib_blackfin/muldi3.c
+++ b/arch/blackfin/lib/muldi3.c
diff --git a/lib_blackfin/outs.S b/arch/blackfin/lib/outs.S
index 90c6033c9e..90c6033c9e 100644
--- a/lib_blackfin/outs.S
+++ b/arch/blackfin/lib/outs.S
diff --git a/lib_blackfin/post.c b/arch/blackfin/lib/post.c
index faf6b96ba2..faf6b96ba2 100644
--- a/lib_blackfin/post.c
+++ b/arch/blackfin/lib/post.c
diff --git a/lib_blackfin/string.c b/arch/blackfin/lib/string.c
index e344d3b94b..e344d3b94b 100644
--- a/lib_blackfin/string.c
+++ b/arch/blackfin/lib/string.c
diff --git a/lib_blackfin/tests.c b/arch/blackfin/lib/tests.c
index bf7fba00c1..bf7fba00c1 100644
--- a/lib_blackfin/tests.c
+++ b/arch/blackfin/lib/tests.c
diff --git a/lib_blackfin/u-boot.lds.S b/arch/blackfin/lib/u-boot.lds.S
index 3be341fad0..9163d20c29 100644
--- a/lib_blackfin/u-boot.lds.S
+++ b/arch/blackfin/lib/u-boot.lds.S
@@ -1,7 +1,7 @@
 /*
  * U-boot - u-boot.lds.S
  *
- * Copyright (c) 2005-2008 Analog Device Inc.
+ * Copyright (c) 2005-2010 Analog Device Inc.
  *
  * (C) Copyright 2000-2004
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
@@ -29,7 +29,6 @@
 #include <asm/blackfin.h>
 #undef ALIGN
 #undef ENTRY
-#undef bfin
 
 #ifndef LDS_BOARD_TEXT
 # define LDS_BOARD_TEXT
@@ -74,14 +73,14 @@ SECTIONS
 {
 	.text.pre :
 	{
-		cpu/blackfin/start.o (.text .text.*)
+		arch/blackfin/cpu/start.o (.text .text.*)
 
 		LDS_BOARD_TEXT
 	} >ram_code
 
 	.text.init :
 	{
-		cpu/blackfin/initcode.o (.text .text.*)
+		arch/blackfin/cpu/initcode.o (.text .text.*)
 	} >ram_code
 	__initcode_lma = LOADADDR(.text.init);
 	__initcode_len = SIZEOF(.text.init);
@@ -100,7 +99,7 @@ SECTIONS
 
 	.data :
 	{
-		. = ALIGN(256);
+		. = ALIGN(4);
 		*(.data .data.*)
 		*(.data1)
 		*(.sdata)
diff --git a/lib_i386/config.mk b/arch/i386/config.mk
index 4b990e04ef..4b990e04ef 100644
--- a/lib_i386/config.mk
+++ b/arch/i386/config.mk
diff --git a/cpu/i386/Makefile b/arch/i386/cpu/Makefile
index c658c6e459..c658c6e459 100644
--- a/cpu/i386/Makefile
+++ b/arch/i386/cpu/Makefile
diff --git a/cpu/i386/config.mk b/arch/i386/cpu/config.mk
index 16a160d2f3..16a160d2f3 100644
--- a/cpu/i386/config.mk
+++ b/arch/i386/cpu/config.mk
diff --git a/cpu/i386/cpu.c b/arch/i386/cpu/cpu.c
index 3010519e74..3010519e74 100644
--- a/cpu/i386/cpu.c
+++ b/arch/i386/cpu/cpu.c
diff --git a/cpu/i386/interrupts.c b/arch/i386/cpu/interrupts.c
index 4b57437193..4b57437193 100644
--- a/cpu/i386/interrupts.c
+++ b/arch/i386/cpu/interrupts.c
diff --git a/cpu/i386/resetvec.S b/arch/i386/cpu/resetvec.S
index d9222dd2fc..d9222dd2fc 100644
--- a/cpu/i386/resetvec.S
+++ b/arch/i386/cpu/resetvec.S
diff --git a/cpu/i386/sc520/Makefile b/arch/i386/cpu/sc520/Makefile
index 87835b2c20..87835b2c20 100644
--- a/cpu/i386/sc520/Makefile
+++ b/arch/i386/cpu/sc520/Makefile
diff --git a/cpu/i386/sc520/sc520.c b/arch/i386/cpu/sc520/sc520.c
index 4b566a75cc..4b566a75cc 100644
--- a/cpu/i386/sc520/sc520.c
+++ b/arch/i386/cpu/sc520/sc520.c
diff --git a/cpu/i386/sc520/sc520_asm.S b/arch/i386/cpu/sc520/sc520_asm.S
index 2042d9bfcf..2042d9bfcf 100644
--- a/cpu/i386/sc520/sc520_asm.S
+++ b/arch/i386/cpu/sc520/sc520_asm.S
diff --git a/cpu/i386/sc520/sc520_pci.c b/arch/i386/cpu/sc520/sc520_pci.c
index f446c6d592..f446c6d592 100644
--- a/cpu/i386/sc520/sc520_pci.c
+++ b/arch/i386/cpu/sc520/sc520_pci.c
diff --git a/cpu/i386/sc520/sc520_ssi.c b/arch/i386/cpu/sc520/sc520_ssi.c
index 8dbe17aa60..8dbe17aa60 100644
--- a/cpu/i386/sc520/sc520_ssi.c
+++ b/arch/i386/cpu/sc520/sc520_ssi.c
diff --git a/cpu/i386/sc520/sc520_timer.c b/arch/i386/cpu/sc520/sc520_timer.c
index 93b5b555c3..93b5b555c3 100644
--- a/cpu/i386/sc520/sc520_timer.c
+++ b/arch/i386/cpu/sc520/sc520_timer.c
diff --git a/cpu/i386/serial.c b/arch/i386/cpu/serial.c
index e7025a3cdc..e7025a3cdc 100644
--- a/cpu/i386/serial.c
+++ b/arch/i386/cpu/serial.c
diff --git a/cpu/i386/start.S b/arch/i386/cpu/start.S
index 25d32e658e..25d32e658e 100644
--- a/cpu/i386/start.S
+++ b/arch/i386/cpu/start.S
diff --git a/cpu/i386/start16.S b/arch/i386/cpu/start16.S
index 1ebb6bc8b6..1ebb6bc8b6 100644
--- a/cpu/i386/start16.S
+++ b/arch/i386/cpu/start16.S
diff --git a/include/asm-i386/bitops.h b/arch/i386/include/asm/bitops.h
index c7a38f237a..c7a38f237a 100644
--- a/include/asm-i386/bitops.h
+++ b/arch/i386/include/asm/bitops.h
diff --git a/include/asm-i386/byteorder.h b/arch/i386/include/asm/byteorder.h
index 7dfeb8bbed..7dfeb8bbed 100644
--- a/include/asm-i386/byteorder.h
+++ b/arch/i386/include/asm/byteorder.h
diff --git a/include/asm-i386/config.h b/arch/i386/include/asm/config.h
index 049c44eaf8..049c44eaf8 100644
--- a/include/asm-i386/config.h
+++ b/arch/i386/include/asm/config.h
diff --git a/include/asm-i386/errno.h b/arch/i386/include/asm/errno.h
index 4c82b503d9..4c82b503d9 100644
--- a/include/asm-i386/errno.h
+++ b/arch/i386/include/asm/errno.h
diff --git a/include/asm-i386/global_data.h b/arch/i386/include/asm/global_data.h
index 3abbf1dba2..3abbf1dba2 100644
--- a/include/asm-i386/global_data.h
+++ b/arch/i386/include/asm/global_data.h
diff --git a/include/asm-i386/i8254.h b/arch/i386/include/asm/i8254.h
index aafdfb8060..aafdfb8060 100644
--- a/include/asm-i386/i8254.h
+++ b/arch/i386/include/asm/i8254.h
diff --git a/include/asm-i386/i8259.h b/arch/i386/include/asm/i8259.h
index 774d7a31e7..774d7a31e7 100644
--- a/include/asm-i386/i8259.h
+++ b/arch/i386/include/asm/i8259.h
diff --git a/include/asm-i386/ibmpc.h b/arch/i386/include/asm/ibmpc.h
index e35cbd887a..e35cbd887a 100644
--- a/include/asm-i386/ibmpc.h
+++ b/arch/i386/include/asm/ibmpc.h
diff --git a/include/asm-i386/ic/pci.h b/arch/i386/include/asm/ic/pci.h
index bcccdbef82..bcccdbef82 100644
--- a/include/asm-i386/ic/pci.h
+++ b/arch/i386/include/asm/ic/pci.h
diff --git a/include/asm-i386/ic/sc520.h b/arch/i386/include/asm/ic/sc520.h
index 57c9904422..57c9904422 100644
--- a/include/asm-i386/ic/sc520.h
+++ b/arch/i386/include/asm/ic/sc520.h
diff --git a/include/asm-i386/ic/ssi.h b/arch/i386/include/asm/ic/ssi.h
index bd48eab161..bd48eab161 100644
--- a/include/asm-i386/ic/ssi.h
+++ b/arch/i386/include/asm/ic/ssi.h
diff --git a/include/asm-i386/interrupt.h b/arch/i386/include/asm/interrupt.h
index 3e2674af68..07426fe6a7 100644
--- a/include/asm-i386/interrupt.h
+++ b/arch/i386/include/asm/interrupt.h
@@ -27,10 +27,10 @@
 #ifndef __ASM_INTERRUPT_H_
 #define __ASM_INTERRUPT_H_ 1
 
-/* cpu/i386/interrupts.c */
+/* arch/i386/cpu/interrupts.c */
 void set_vector(u8 intnum, void *routine);
 
-/* lib_i386/interupts.c */
+/* arch/i386/lib/interupts.c */
 void disable_irq(int irq);
 void enable_irq(int irq);
 
diff --git a/include/asm-i386/io.h b/arch/i386/include/asm/io.h
index 9b757d489e..9b757d489e 100644
--- a/include/asm-i386/io.h
+++ b/arch/i386/include/asm/io.h
diff --git a/include/asm-i386/pci.h b/arch/i386/include/asm/pci.h
index 050a2bb868..050a2bb868 100644
--- a/include/asm-i386/pci.h
+++ b/arch/i386/include/asm/pci.h
diff --git a/include/asm-i386/posix_types.h b/arch/i386/include/asm/posix_types.h
index 5529f32702..5529f32702 100644
--- a/include/asm-i386/posix_types.h
+++ b/arch/i386/include/asm/posix_types.h
diff --git a/include/asm-i386/processor.h b/arch/i386/include/asm/processor.h
index 5dedba82ca..5dedba82ca 100644
--- a/include/asm-i386/processor.h
+++ b/arch/i386/include/asm/processor.h
diff --git a/include/asm-i386/ptrace.h b/arch/i386/include/asm/ptrace.h
index 750e40d030..750e40d030 100644
--- a/include/asm-i386/ptrace.h
+++ b/arch/i386/include/asm/ptrace.h
diff --git a/include/asm-i386/realmode.h b/arch/i386/include/asm/realmode.h
index 9177e4ec0d..9177e4ec0d 100644
--- a/include/asm-i386/realmode.h
+++ b/arch/i386/include/asm/realmode.h
diff --git a/include/asm-i386/string.h b/arch/i386/include/asm/string.h
index 3643a79fdf..3643a79fdf 100644
--- a/include/asm-i386/string.h
+++ b/arch/i386/include/asm/string.h
diff --git a/include/asm-i386/types.h b/arch/i386/include/asm/types.h
index 9a40e383eb..9a40e383eb 100644
--- a/include/asm-i386/types.h
+++ b/arch/i386/include/asm/types.h
diff --git a/include/asm-i386/u-boot-i386.h b/arch/i386/include/asm/u-boot-i386.h
index 7c99c8c57d..521fd352bb 100644
--- a/include/asm-i386/u-boot-i386.h
+++ b/arch/i386/include/asm/u-boot-i386.h
@@ -33,7 +33,7 @@ void timer_isr(void *);
 typedef void (timer_fnc_t) (void);
 int register_timer_isr (timer_fnc_t *isr_func);
 
-/* Architecture specific - can be in cpu/i386/, lib_i386/, or $(BOARD)/ */
+/* Architecture specific - can be in arch/i386/cpu/, arch/i386/lib/, or $(BOARD)/ */
 int timer_init(void);
 
 /* cpu/.../interrupts.c */
@@ -46,7 +46,7 @@ int dram_init(void);
 void isa_unmap_rom(u32 addr);
 u32 isa_map_rom(u32 bus_addr, int size);
 
-/* lib_i386/... */
+/* arch/i386/lib/... */
 int video_bios_init(void);
 int video_init(void);
 
diff --git a/include/asm-i386/u-boot.h b/arch/i386/include/asm/u-boot.h
index 9a1eec0cd5..9a1eec0cd5 100644
--- a/include/asm-i386/u-boot.h
+++ b/arch/i386/include/asm/u-boot.h
diff --git a/include/asm-i386/zimage.h b/arch/i386/include/asm/zimage.h
index b6266e456a..b6266e456a 100644
--- a/include/asm-i386/zimage.h
+++ b/arch/i386/include/asm/zimage.h
diff --git a/lib_i386/Makefile b/arch/i386/lib/Makefile
index 9838506689..9838506689 100644
--- a/lib_i386/Makefile
+++ b/arch/i386/lib/Makefile
diff --git a/lib_i386/bios.S b/arch/i386/lib/bios.S
index 48f1b81122..48f1b81122 100644
--- a/lib_i386/bios.S
+++ b/arch/i386/lib/bios.S
diff --git a/lib_i386/bios.h b/arch/i386/lib/bios.h
index 4901f8917a..4901f8917a 100644
--- a/lib_i386/bios.h
+++ b/arch/i386/lib/bios.h
diff --git a/lib_i386/bios_pci.S b/arch/i386/lib/bios_pci.S
index 9e412e5e4c..9e412e5e4c 100644
--- a/lib_i386/bios_pci.S
+++ b/arch/i386/lib/bios_pci.S
diff --git a/lib_i386/bios_setup.c b/arch/i386/lib/bios_setup.c
index 6491e522ec..6491e522ec 100644
--- a/lib_i386/bios_setup.c
+++ b/arch/i386/lib/bios_setup.c
diff --git a/lib_i386/board.c b/arch/i386/lib/board.c
index f3b6348551..f3b6348551 100644
--- a/lib_i386/board.c
+++ b/arch/i386/lib/board.c
diff --git a/lib_i386/bootm.c b/arch/i386/lib/bootm.c
index f96d7bd6da..f96d7bd6da 100644
--- a/lib_i386/bootm.c
+++ b/arch/i386/lib/bootm.c
diff --git a/lib_i386/interrupts.c b/arch/i386/lib/interrupts.c
index 51def59954..51def59954 100644
--- a/lib_i386/interrupts.c
+++ b/arch/i386/lib/interrupts.c
diff --git a/lib_i386/pcat_interrupts.c b/arch/i386/lib/pcat_interrupts.c
index 67e6e97e35..67e6e97e35 100644
--- a/lib_i386/pcat_interrupts.c
+++ b/arch/i386/lib/pcat_interrupts.c
diff --git a/lib_i386/pcat_timer.c b/arch/i386/lib/pcat_timer.c
index 1373fd125c..1373fd125c 100644
--- a/lib_i386/pcat_timer.c
+++ b/arch/i386/lib/pcat_timer.c
diff --git a/lib_i386/pci.c b/arch/i386/lib/pci.c
index 9020e7ce76..9020e7ce76 100644
--- a/lib_i386/pci.c
+++ b/arch/i386/lib/pci.c
diff --git a/lib_i386/pci_type1.c b/arch/i386/lib/pci_type1.c
index 225ae4a990..225ae4a990 100644
--- a/lib_i386/pci_type1.c
+++ b/arch/i386/lib/pci_type1.c
diff --git a/lib_i386/realmode.c b/arch/i386/lib/realmode.c
index 3c3c1fc961..3c3c1fc961 100644
--- a/lib_i386/realmode.c
+++ b/arch/i386/lib/realmode.c
diff --git a/lib_i386/realmode_switch.S b/arch/i386/lib/realmode_switch.S
index d6c74ecd79..d6c74ecd79 100644
--- a/lib_i386/realmode_switch.S
+++ b/arch/i386/lib/realmode_switch.S
diff --git a/lib_i386/timer.c b/arch/i386/lib/timer.c
index 5cb1f54fb5..5cb1f54fb5 100644
--- a/lib_i386/timer.c
+++ b/arch/i386/lib/timer.c
diff --git a/lib_i386/video.c b/arch/i386/lib/video.c
index c58ed104cc..c58ed104cc 100644
--- a/lib_i386/video.c
+++ b/arch/i386/lib/video.c
diff --git a/lib_i386/video_bios.c b/arch/i386/lib/video_bios.c
index c8060e60a7..c8060e60a7 100644
--- a/lib_i386/video_bios.c
+++ b/arch/i386/lib/video_bios.c
diff --git a/lib_i386/zimage.c b/arch/i386/lib/zimage.c
index c3b4e597aa..c3b4e597aa 100644
--- a/lib_i386/zimage.c
+++ b/arch/i386/lib/zimage.c
diff --git a/lib_m68k/config.mk b/arch/m68k/config.mk
index 749c38968a..749c38968a 100644
--- a/lib_m68k/config.mk
+++ b/arch/m68k/config.mk
diff --git a/cpu/mcf5227x/Makefile b/arch/m68k/cpu/mcf5227x/Makefile
index d0e9b4550f..d0e9b4550f 100644
--- a/cpu/mcf5227x/Makefile
+++ b/arch/m68k/cpu/mcf5227x/Makefile
diff --git a/cpu/mcf5227x/config.mk b/arch/m68k/cpu/mcf5227x/config.mk
index 8eab49dff9..8eab49dff9 100644
--- a/cpu/mcf5227x/config.mk
+++ b/arch/m68k/cpu/mcf5227x/config.mk
diff --git a/cpu/mcf5227x/cpu.c b/arch/m68k/cpu/mcf5227x/cpu.c
index d9f5f43c3c..d9f5f43c3c 100644
--- a/cpu/mcf5227x/cpu.c
+++ b/arch/m68k/cpu/mcf5227x/cpu.c
diff --git a/cpu/mcf5227x/cpu_init.c b/arch/m68k/cpu/mcf5227x/cpu_init.c
index e160ee1aff..beb78f5839 100644
--- a/cpu/mcf5227x/cpu_init.c
+++ b/arch/m68k/cpu/mcf5227x/cpu_init.c
@@ -125,27 +125,27 @@ int cpu_init_r(void)
 	return (0);
 }
 
-void uart_port_conf(void)
+void uart_port_conf(int port)
 {
 	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
 
 	/* Setup Ports: */
-	switch (CONFIG_SYS_UART_PORT) {
+	switch (port) {
 	case 0:
 		gpio->par_uart &=
-		    (GPIO_PAR_UART_U0TXD_MASK & GPIO_PAR_UART_U0RXD_MASK);
+		    (GPIO_PAR_UART_U0TXD_UNMASK & GPIO_PAR_UART_U0RXD_UNMASK);
 		gpio->par_uart |=
 		    (GPIO_PAR_UART_U0TXD_U0TXD | GPIO_PAR_UART_U0RXD_U0RXD);
 		break;
 	case 1:
 		gpio->par_uart &=
-		    (GPIO_PAR_UART_U1TXD_MASK & GPIO_PAR_UART_U1RXD_MASK);
+		    (GPIO_PAR_UART_U1TXD_UNMASK & GPIO_PAR_UART_U1RXD_UNMASK);
 		gpio->par_uart |=
 		    (GPIO_PAR_UART_U1TXD_U1TXD | GPIO_PAR_UART_U1RXD_U1RXD);
 		break;
 	case 2:
 		gpio->par_dspi &=
-		    (GPIO_PAR_DSPI_SIN_MASK & GPIO_PAR_DSPI_SOUT_MASK);
+		    (GPIO_PAR_DSPI_SIN_UNMASK & GPIO_PAR_DSPI_SOUT_UNMASK);
 		gpio->par_dspi =
 		    (GPIO_PAR_DSPI_SIN_U2RXD | GPIO_PAR_DSPI_SOUT_U2TXD);
 		break;
@@ -175,11 +175,11 @@ int cfspi_claim_bus(uint bus, uint cs)
 
 	switch (cs) {
 	case 0:
-		gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS0_MASK;
+		gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS0_UNMASK;
 		gpio->par_dspi |= GPIO_PAR_DSPI_PCS0_PCS0;
 		break;
 	case 2:
-		gpio->par_timer &= GPIO_PAR_TIMER_T2IN_MASK;
+		gpio->par_timer &= GPIO_PAR_TIMER_T2IN_UNMASK;
 		gpio->par_timer |= GPIO_PAR_TIMER_T2IN_DSPIPCS2;
 		break;
 	}
@@ -199,7 +199,7 @@ void cfspi_release_bus(uint bus, uint cs)
 		gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS0_PCS0;
 		break;
 	case 2:
-		gpio->par_timer &= GPIO_PAR_TIMER_T2IN_MASK;
+		gpio->par_timer &= GPIO_PAR_TIMER_T2IN_UNMASK;
 		break;
 	}
 }
diff --git a/cpu/mcf5227x/interrupts.c b/arch/m68k/cpu/mcf5227x/interrupts.c
index 85828a67b5..85828a67b5 100644
--- a/cpu/mcf5227x/interrupts.c
+++ b/arch/m68k/cpu/mcf5227x/interrupts.c
diff --git a/cpu/mcf5227x/speed.c b/arch/m68k/cpu/mcf5227x/speed.c
index 7e385d3998..7e385d3998 100644
--- a/cpu/mcf5227x/speed.c
+++ b/arch/m68k/cpu/mcf5227x/speed.c
diff --git a/cpu/mcf5227x/start.S b/arch/m68k/cpu/mcf5227x/start.S
index 0c9c89c402..30428f15d8 100644
--- a/cpu/mcf5227x/start.S
+++ b/arch/m68k/cpu/mcf5227x/start.S
@@ -24,16 +24,12 @@
 #include <config.h>
 #include <timestamp.h>
 #include "version.h"
+#include <asm/cache.h>
 
 #ifndef	 CONFIG_IDENT_STRING
 #define	 CONFIG_IDENT_STRING ""
 #endif
 
-/* last three long word reserved for cache status */
-#define ICACHE_STATUS	(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 4)
-#define DCACHE_STATUS	(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 8)
-#define CACR_STATUS	(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-12)
-
 #define _START	_start
 #define _FAULT	_fault
 
@@ -378,21 +374,19 @@ _start:
 	movec	%d0, %RAMBAR1
 #endif
 
+	/* invalidate and disable cache */
+	move.l	#CF_CACR_CINV, %d0	/* Invalidate cache cmd */
+	movec	%d0, %CACR		/* Invalidate cache */
+	move.l	#0, %d0
+	movec	%d0, %ACR0
+	movec	%d0, %ACR1
+
 	/* initialize general use internal ram */
 	move.l #0, %d0
 	move.l #(ICACHE_STATUS), %a1	/* icache */
 	move.l #(DCACHE_STATUS), %a2	/* icache */
-	move.l #(CACR_STATUS), %a3	/* CACR */
 	move.l %d0, (%a1)
 	move.l %d0, (%a2)
-	move.l %d0, (%a3)
-
-	/* invalidate and disable cache */
-	move.l	#0x01000000, %d0	/* Invalidate cache cmd */
-	movec	%d0, %CACR		/* Invalidate cache */
-	move.l	#0, %d0
-	movec	%d0, %ACR0
-	movec	%d0, %ACR1
 
 	/* set stackpointer to end of internal ram to get some stackspace for
 	   the first c-code */
@@ -510,84 +504,6 @@ _int_handler:
 	RESTORE_ALL
 
 /*------------------------------------------------------------------------------*/
-/* cache functions */
-	.globl	icache_enable
-icache_enable:
-	move.l	#0x01200000, %d0	/* Invalid cache */
-	movec	%d0, %CACR
-
-	move.l	#(CONFIG_SYS_SDRAM_BASE + 0x1c000), %d0
-	movec	%d0, %ACR0
-
-	move.l	#0x81600610, %d0	/* Enable cache */
-	movec	%d0, %CACR
-
-	move.l	#(ICACHE_STATUS), %a1
-	moveq	#1, %d0
-	move.l	%d0, (%a1)
-	rts
-
-	.globl	icache_disable
-icache_disable:
-	move.l	#0x01F00000, %d0	/* Setup cache mask */
-	movec	%d0, %CACR		/* Invalidate icache */
-	clr.l	%d0
-	movec	%d0, %ACR0
-	movec	%d0, %ACR1
-
-	move.l	#(ICACHE_STATUS), %a1
-	moveq	#0, %d0
-	move.l	%d0, (%a1)
-	rts
-
-	.globl	icache_status
-icache_status:
-	move.l	#(ICACHE_STATUS), %a1
-	move.l	(%a1), %d0
-	rts
-
-	.globl	icache_invalid
-icache_invalid:
-	move.l	#0x80600610, %d0	/* Invalidate icache */
-	movec	%d0, %CACR		/* Enable and invalidate cache */
-	rts
-
-	.globl	dcache_enable
-dcache_enable:
-	move.l	#0x01200000, %d0	/* Invalid cache */
-	movec	%d0, %CACR
-
-	move.l	#0x81300610, %d0
-	movec	%d0, %CACR
-
-	move.l	#(DCACHE_STATUS), %a1
-	moveq	#1, %d0
-	move.l	%d0, (%a1)
-	rts
-
-	.globl	dcache_disable
-dcache_disable:
-	move.l	#0x81600610, %d0	/* Setup cache mask */
-	movec	%d0, %CACR		/* Invalidate icache */
-
-	move.l	#(DCACHE_STATUS), %a1
-	moveq	#0, %d0
-	move.l	%d0, (%a1)
-	rts
-
-	.globl	dcache_invalid
-dcache_invalid:
-	move.l	#0x81100610, %d0	/* Setup cache mask */
-	movec	%d0, %CACR		/* Enable and invalidate cache */
-	rts
-
-	.globl	dcache_status
-dcache_status:
-	move.l	#(DCACHE_STATUS), %a1
-	move.l	(%a1), %d0
-	rts
-
-/*------------------------------------------------------------------------------*/
 
 	.globl	version_string
 version_string:
diff --git a/cpu/mcf523x/Makefile b/arch/m68k/cpu/mcf523x/Makefile
index d0e9b4550f..d0e9b4550f 100644
--- a/cpu/mcf523x/Makefile
+++ b/arch/m68k/cpu/mcf523x/Makefile
diff --git a/cpu/mcf523x/config.mk b/arch/m68k/cpu/mcf523x/config.mk
index fc7945451f..fc7945451f 100644
--- a/cpu/mcf523x/config.mk
+++ b/arch/m68k/cpu/mcf523x/config.mk
diff --git a/cpu/mcf523x/cpu.c b/arch/m68k/cpu/mcf523x/cpu.c
index a1a51336c2..a1a51336c2 100644
--- a/cpu/mcf523x/cpu.c
+++ b/arch/m68k/cpu/mcf523x/cpu.c
diff --git a/cpu/mcf523x/cpu_init.c b/arch/m68k/cpu/mcf523x/cpu_init.c
index 3c04fd4134..0f299f0c3c 100644
--- a/cpu/mcf523x/cpu_init.c
+++ b/arch/m68k/cpu/mcf523x/cpu_init.c
@@ -130,21 +130,32 @@ int cpu_init_r(void)
 	return (0);
 }
 
-void uart_port_conf(void)
+void uart_port_conf(int port)
 {
 	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
 
 	/* Setup Ports: */
-	switch (CONFIG_SYS_UART_PORT) {
+	switch (port) {
 	case 0:
-		gpio->par_uart = (GPIO_PAR_UART_U0RXD | GPIO_PAR_UART_U0TXD);
+		gpio->par_uart &= ~(GPIO_PAR_UART_U0RXD | GPIO_PAR_UART_U0TXD);
+		gpio->par_uart |= (GPIO_PAR_UART_U0RXD | GPIO_PAR_UART_U0TXD);
 		break;
 	case 1:
-		gpio->par_uart =
-			(GPIO_PAR_UART_U1RXD_U1RXD | GPIO_PAR_UART_U1TXD_U1TXD);
+		gpio->par_uart &=
+		    ~(GPIO_PAR_UART_U1RXD_MASK | GPIO_PAR_UART_U1TXD_MASK);
+		gpio->par_uart |=
+		    (GPIO_PAR_UART_U1RXD_U1RXD | GPIO_PAR_UART_U1TXD_U1TXD);
 		break;
 	case 2:
-		gpio->par_timer = (GPIO_PAR_UART_U2RXD | GPIO_PAR_UART_U2TXD);
+#ifdef CONFIG_SYS_UART2_PRI_GPIO
+		gpio->par_uart &= ~(GPIO_PAR_UART_U2RXD | GPIO_PAR_UART_U2TXD);
+		gpio->par_uart |= (GPIO_PAR_UART_U2RXD | GPIO_PAR_UART_U2TXD);
+#elif defined(CONFIG_SYS_UART2_ALT1_GPIO)
+		gpio->feci2c &=
+		    ~(GPIO_PAR_FECI2C_EMDC_MASK | GPIO_PAR_FECI2C_EMDIO_MASK);
+		gpio->feci2c |=
+		    (GPIO_PAR_FECI2C_EMDC_U2TXD | GPIO_PAR_FECI2C_EMDIO_U2RXD);
+#endif
 		break;
 	}
 }
@@ -156,7 +167,8 @@ int fecpin_setclear(struct eth_device *dev, int setclear)
 
 	if (setclear) {
 		gpio->par_feci2c |=
-		    (GPIO_PAR_FECI2C_EMDC_FECEMDC | GPIO_PAR_FECI2C_EMDIO_FECEMDIO);
+		    (GPIO_PAR_FECI2C_EMDC_FECEMDC |
+		     GPIO_PAR_FECI2C_EMDIO_FECEMDIO);
 	} else {
 		gpio->par_feci2c &=
 		    ~(GPIO_PAR_FECI2C_EMDC_MASK | GPIO_PAR_FECI2C_EMDIO_MASK);
diff --git a/cpu/mcf523x/interrupts.c b/arch/m68k/cpu/mcf523x/interrupts.c
index db5ccdf6d3..db5ccdf6d3 100644
--- a/cpu/mcf523x/interrupts.c
+++ b/arch/m68k/cpu/mcf523x/interrupts.c
diff --git a/cpu/mcf523x/speed.c b/arch/m68k/cpu/mcf523x/speed.c
index 6096ba4144..6096ba4144 100644
--- a/cpu/mcf523x/speed.c
+++ b/arch/m68k/cpu/mcf523x/speed.c
diff --git a/cpu/mcf523x/start.S b/arch/m68k/cpu/mcf523x/start.S
index d44da37ec7..20b50e7579 100644
--- a/cpu/mcf523x/start.S
+++ b/arch/m68k/cpu/mcf523x/start.S
@@ -24,6 +24,7 @@
 #include <config.h>
 #include <timestamp.h>
 #include "version.h"
+#include <asm/cache.h>
 
 #ifndef	 CONFIG_IDENT_STRING
 #define	 CONFIG_IDENT_STRING ""
@@ -135,7 +136,7 @@ _start:
 	movec	%d0, %RAMBAR1
 
 	/* invalidate and disable cache */
-	move.l	#0x01000000, %d0		/* Invalidate cache cmd */
+	move.l	#CF_CACR_CINV, %d0		/* Invalidate cache cmd */
 	movec	%d0, %CACR			/* Invalidate cache */
 	nop
 	move.l	#0, %d0
@@ -144,8 +145,8 @@ _start:
 
 	/* initialize general use internal ram */
 	move.l #0, %d0
-	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
-	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a2
+	move.l #(ICACHE_STATUS), %a1	/* icache */
+	move.l #(DCACHE_STATUS), %a2	/* icache */
 	move.l %d0, (%a1)
 	move.l %d0, (%a2)
 
@@ -265,74 +266,6 @@ _int_handler:
 	RESTORE_ALL
 
 /*------------------------------------------------------------------------------*/
-/* cache functions */
-	.globl	icache_enable
-icache_enable:
-	move.l	#0x01000000, %d0		/* Invalidate cache cmd */
-	movec	%d0, %CACR			/* Invalidate cache */
-	nop
-	move.l	#(CONFIG_SYS_SDRAM_BASE + 0xc000), %d0	/* Setup cache mask */
-	movec	%d0, %ACR0			/* Enable cache */
-	move.l	#(CONFIG_SYS_FLASH_BASE + 0xc000), %d0	/* Setup cache mask */
-	movec	%d0, %ACR1			/* Enable cache */
-
-	move.l	#0x80400100, %d0		/* Setup cache mask */
-	movec	%d0, %CACR			/* Enable cache */
-	nop
-
-	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
-	moveq	#1, %d0
-	move.l	%d0, (%a1)
-	rts
-
-	.globl	icache_disable
-icache_disable:
-	move.l	#0x00000100, %d0		/* Setup cache mask */
-	movec	%d0, %CACR			/* Disable cache */
-	clr.l	%d0				/* Setup cache mask */
-	movec	%d0, %ACR0
-	movec	%d0, %ACR1
-
-	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
-	moveq	#0, %d0
-	move.l	%d0, (%a1)
-	rts
-
-	.globl	icache_status
-icache_status:
-	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
-	move.l	(%a1), %d0
-	rts
-
-	.globl	icache_invalid
-icache_invalid:
-	move.l	#0x80600100, %d0		/* Setup cache mask */
-	movec	%d0, %CACR			/* Enable cache */
-	nop
-	rts
-
-	.globl	dcache_enable
-dcache_enable:
-	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
-	moveq	#1, %d0
-	move.l	%d0, (%a1)
-	rts
-
-    /* No dcache, just a dummy function */
-	.globl	dcache_disable
-dcache_disable:
-	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
-	moveq	#0, %d0
-	move.l	%d0, (%a1)
-	rts
-
-	.globl	dcache_status
-dcache_status:
-	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
-	move.l	(%a1), %d0
-	rts
-
-/*------------------------------------------------------------------------------*/
 
 	.globl	version_string
 version_string:
diff --git a/cpu/mcf52x2/Makefile b/arch/m68k/cpu/mcf52x2/Makefile
index 937cdd0584..937cdd0584 100644
--- a/cpu/mcf52x2/Makefile
+++ b/arch/m68k/cpu/mcf52x2/Makefile
diff --git a/cpu/mcf52x2/config.mk b/arch/m68k/cpu/mcf52x2/config.mk
index 52751be3e4..52751be3e4 100644
--- a/cpu/mcf52x2/config.mk
+++ b/arch/m68k/cpu/mcf52x2/config.mk
diff --git a/cpu/mcf52x2/cpu.c b/arch/m68k/cpu/mcf52x2/cpu.c
index c4c5d50604..c4c5d50604 100644
--- a/cpu/mcf52x2/cpu.c
+++ b/arch/m68k/cpu/mcf52x2/cpu.c
diff --git a/cpu/mcf52x2/cpu.h b/arch/m68k/cpu/mcf52x2/cpu.h
index c1227eb1ce..c1227eb1ce 100644
--- a/cpu/mcf52x2/cpu.h
+++ b/arch/m68k/cpu/mcf52x2/cpu.h
diff --git a/cpu/mcf52x2/cpu_init.c b/arch/m68k/cpu/mcf52x2/cpu_init.c
index 7cea6558fd..170bbfc356 100644
--- a/cpu/mcf52x2/cpu_init.c
+++ b/arch/m68k/cpu/mcf52x2/cpu_init.c
@@ -5,6 +5,8 @@
  * MCF5282 additionals
  * (C) Copyright 2005
  * BuS Elektronik GmbH & Co. KG <esw@bus-elektronik.de>
+ * (c) Copyright 2010
+ * Arcturus Networks Inc. <www.arcturusnetworks.com>
  *
  * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
@@ -133,36 +135,36 @@ int cpu_init_r(void)
 	return (0);
 }
 
-void uart_port_conf(void)
+void uart_port_conf(int port)
 {
 	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
 
 	/* Setup Ports: */
-	switch (CONFIG_SYS_UART_PORT) {
+	switch (port) {
 	case 0:
-		gpio->par_uart &= GPIO_PAR_UART0_MASK;
+		gpio->par_uart &= GPIO_PAR_UART0_UNMASK;
 		gpio->par_uart |= (GPIO_PAR_UART_U0TXD | GPIO_PAR_UART_U0RXD);
 		break;
 	case 1:
-		gpio->par_uart &= GPIO_PAR_UART0_MASK;
+		gpio->par_uart &= GPIO_PAR_UART0_UNMASK;
 		gpio->par_uart |= (GPIO_PAR_UART_U1TXD | GPIO_PAR_UART_U1RXD);
 		break;
 	case 2:
 #ifdef CONFIG_SYS_UART2_PRI_GPIO
 		gpio->par_timer &=
-		    (GPIO_PAR_TMR_TIN0_MASK | GPIO_PAR_TMR_TIN1_MASK);
+		    (GPIO_PAR_TMR_TIN0_UNMASK | GPIO_PAR_TMR_TIN1_UNMASK);
 		gpio->par_timer |=
 		    (GPIO_PAR_TMR_TIN0_U2TXD | GPIO_PAR_TMR_TIN1_U2RXD);
 #endif
 #ifdef CONFIG_SYS_UART2_ALT1_GPIO
 		gpio->par_feci2c &=
-		    (GPIO_PAR_FECI2C_MDC_MASK | GPIO_PAR_FECI2C_MDIO_MASK);
+		    (GPIO_PAR_FECI2C_MDC_UNMASK | GPIO_PAR_FECI2C_MDIO_UNMASK);
 		gpio->par_feci2c |=
 		    (GPIO_PAR_FECI2C_MDC_U2TXD | GPIO_PAR_FECI2C_MDIO_U2RXD);
 #endif
 #ifdef CONFIG_SYS_UART2_ALT1_GPIO
 		gpio->par_feci2c &=
-		    (GPIO_PAR_FECI2C_SDA_MASK | GPIO_PAR_FECI2C_SCL_MASK);
+		    (GPIO_PAR_FECI2C_SDA_UNMASK | GPIO_PAR_FECI2C_SCL_UNMASK);
 		gpio->par_feci2c |=
 		    (GPIO_PAR_FECI2C_SDA_U2TXD | GPIO_PAR_FECI2C_SCL_U2RXD);
 #endif
@@ -182,8 +184,8 @@ int fecpin_setclear(struct eth_device *dev, int setclear)
 		    GPIO_PAR_FECI2C_MDC_MDC | GPIO_PAR_FECI2C_MDIO_MDIO;
 	} else {
 		gpio->par_fec &=
-		    (GPIO_PAR_FEC_7W_MASK & GPIO_PAR_FEC_MII_MASK);
-		gpio->par_feci2c &= GPIO_PAR_FECI2C_RMII_MASK;
+		    (GPIO_PAR_FEC_7W_UNMASK & GPIO_PAR_FEC_MII_UNMASK);
+		gpio->par_feci2c &= GPIO_PAR_FECI2C_RMII_UNMASK;
 	}
 	return 0;
 }
@@ -245,15 +247,19 @@ int cpu_init_r(void)
 	return (0);
 }
 
-void uart_port_conf(void)
+void uart_port_conf(int port)
 {
+	volatile u32 *par = (u32 *) MMAP_PAR;
+
 	/* Setup Ports: */
-	switch (CONFIG_SYS_UART_PORT) {
-	case 0:
-		break;
+	switch (port) {
 	case 1:
+		*par &= 0xFFE7FFFF;
+		*par |= 0x00180000;
 		break;
 	case 2:
+		*par &= 0xFFFFFFFC;
+		*par &= 0x00000003;
 		break;
 	}
 }
@@ -289,21 +295,26 @@ int cpu_init_r(void)
 	return (0);
 }
 
-void uart_port_conf(void)
+void uart_port_conf(int port)
 {
+	u16 temp;
+
 	/* Setup Ports: */
-	switch (CONFIG_SYS_UART_PORT) {
+	switch (port) {
 	case 0:
-		mbar_writeShort(MCF_GPIO_PAR_UART, MCF_GPIO_PAR_UART_U0TXD |
-				MCF_GPIO_PAR_UART_U0RXD);
+		temp = mbar_readShort(MCF_GPIO_PAR_UART) & 0xFFF3;
+		temp |= (MCF_GPIO_PAR_UART_U0TXD | MCF_GPIO_PAR_UART_U0RXD);
+		mbar_writeShort(MCF_GPIO_PAR_UART, temp);
 		break;
 	case 1:
-		mbar_writeShort(MCF_GPIO_PAR_UART,
-				MCF_GPIO_PAR_UART_U1RXD_UART1 |
-				MCF_GPIO_PAR_UART_U1TXD_UART1);
+		temp = mbar_readShort(MCF_GPIO_PAR_UART) & 0xF0FF;
+		temp |= (MCF_GPIO_PAR_UART_U1RXD_UART1 | MCF_GPIO_PAR_UART_U1TXD_UART1);
+		mbar_writeShort(MCF_GPIO_PAR_UART, temp);
 		break;
 	case 2:
-		mbar_writeShort(MCF_GPIO_PAR_UART, 0x3000);
+		temp = mbar_readShort(MCF_GPIO_PAR_UART) & 0xCFFF;
+		temp |= (0x3000);
+		mbar_writeShort(MCF_GPIO_PAR_UART, temp);
 		break;
 	}
 }
@@ -407,12 +418,12 @@ int cpu_init_r(void)
 	return (0);
 }
 
-void uart_port_conf(void)
+void uart_port_conf(int port)
 {
 	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
 
 	/* Setup Ports: */
-	switch (CONFIG_SYS_UART_PORT) {
+	switch (port) {
 	case 0:
 		gpio->gpio_pbcnt &= ~(GPIO_PBCNT_PB0MSK | GPIO_PBCNT_PB1MSK);
 		gpio->gpio_pbcnt |= (GPIO_PBCNT_URT0_TXD | GPIO_PBCNT_URT0_RXD);
@@ -485,19 +496,22 @@ int cpu_init_r(void)
 	return (0);
 }
 
-void uart_port_conf(void)
+void uart_port_conf(int port)
 {
 	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
 
 	/* Setup Ports: */
-	switch (CONFIG_SYS_UART_PORT) {
+	switch (port) {
 	case 0:
+		gpio->par_uart &= ~UART0_ENABLE_MASK;
 		gpio->par_uart |= UART0_ENABLE_MASK;
 		break;
 	case 1:
+		gpio->par_uart &= ~UART1_ENABLE_MASK;
 		gpio->par_uart |= UART1_ENABLE_MASK;
 		break;
 	case 2:
+		gpio->par_uart &= ~UART2_ENABLE_MASK;
 		gpio->par_uart |= UART2_ENABLE_MASK;
 		break;
 	}
@@ -582,6 +596,12 @@ void cpu_init_f(void)
 #ifdef CONFIG_SYS_PTCPAR
 	MCFGPIO_PTCPAR = CONFIG_SYS_PTCPAR;
 #endif
+#if defined(CONFIG_SYS_PORTTC)
+	MCFGPIO_PORTTC = CONFIG_SYS_PORTTC;
+#endif
+#if defined(CONFIG_SYS_DDRTC)
+	MCFGPIO_DDRTC  = CONFIG_SYS_DDRTC;
+#endif
 #ifdef CONFIG_SYS_PTDPAR
 	MCFGPIO_PTDPAR = CONFIG_SYS_PTDPAR;
 #endif
@@ -589,6 +609,9 @@ void cpu_init_f(void)
 	MCFGPIO_PUAPAR = CONFIG_SYS_PUAPAR;
 #endif
 
+#if defined(CONFIG_SYS_DDRD)
+	MCFGPIO_DDRD = CONFIG_SYS_DDRD;
+#endif
 #ifdef CONFIG_SYS_DDRUA
 	MCFGPIO_DDRUA = CONFIG_SYS_DDRUA;
 #endif
@@ -610,10 +633,10 @@ int cpu_init_r(void)
 	return (0);
 }
 
-void uart_port_conf(void)
+void uart_port_conf(int port)
 {
 	/* Setup Ports: */
-	switch (CONFIG_SYS_UART_PORT) {
+	switch (port) {
 	case 0:
 		MCFGPIO_PUAPAR &= 0xFc;
 		MCFGPIO_PUAPAR |= 0x03;
@@ -718,14 +741,7 @@ int cpu_init_r(void)
 	return (0);
 }
 
-void uart_port_conf(void)
+void uart_port_conf(int port)
 {
-	/* Setup Ports: */
-	switch (CONFIG_SYS_UART_PORT) {
-	case 0:
-		break;
-	case 1:
-		break;
-	}
 }
 #endif				/* #if defined(CONFIG_M5249) */
diff --git a/cpu/mcf52x2/interrupts.c b/arch/m68k/cpu/mcf52x2/interrupts.c
index dff8c6aa88..dff8c6aa88 100644
--- a/cpu/mcf52x2/interrupts.c
+++ b/arch/m68k/cpu/mcf52x2/interrupts.c
diff --git a/cpu/mcf52x2/speed.c b/arch/m68k/cpu/mcf52x2/speed.c
index b485e1cccc..b485e1cccc 100644
--- a/cpu/mcf52x2/speed.c
+++ b/arch/m68k/cpu/mcf52x2/speed.c
diff --git a/cpu/mcf52x2/start.S b/arch/m68k/cpu/mcf52x2/start.S
index 0dd4de5160..9ef206aa0f 100644
--- a/cpu/mcf52x2/start.S
+++ b/arch/m68k/cpu/mcf52x2/start.S
@@ -24,12 +24,12 @@
 #include <config.h>
 #include <timestamp.h>
 #include "version.h"
+#include <asm/cache.h>
 
 #ifndef	 CONFIG_IDENT_STRING
 #define	 CONFIG_IDENT_STRING ""
 #endif
 
-
 #define _START	_start
 #define _FAULT	_fault
 
@@ -201,6 +201,13 @@ _after_flashbar_copy:
 	movec	%d0, %RAMBAR1
 #endif
 
+	/* initialize general use internal ram */
+	move.l #0, %d0
+	move.l #(ICACHE_STATUS), %a1	/* icache */
+	move.l #(DCACHE_STATUS), %a2	/* icache */
+	move.l %d0, (%a1)
+	move.l %d0, (%a2)
+
 	/* set stackpointer to end of internal ram to get some stackspace for the first c-code */
 	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
 	clr.l %sp@-
@@ -283,23 +290,6 @@ clear_bss:
 	cmp.l	%a2, %a1
 	bne	7b
 
-#if defined(CONFIG_M5281) || defined(CONFIG_M5282)
-	/* patch the 3 accesspoints to 3 ichache_state */
-	/* quick and dirty */
-
-	move.l	%a0,%d1
-	add.l	#(icache_state - CONFIG_SYS_MONITOR_BASE),%d1
-	move.l	%a0,%a1
-	add.l	#(icache_state_access_1+2 - CONFIG_SYS_MONITOR_BASE),%a1
-	move.l  %d1,(%a1)
-	move.l	%a0,%a1
-	add.l	#(icache_state_access_2+2 - CONFIG_SYS_MONITOR_BASE),%a1
-	move.l  %d1,(%a1)
-	move.l	%a0,%a1
-	add.l	#(icache_state_access_3+2 - CONFIG_SYS_MONITOR_BASE),%a1
-	move.l  %d1,(%a1)
-#endif
-
 	/* calculate relative jump to board_init_r in ram */
 	move.l %a0, %a1
 	add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
@@ -336,156 +326,6 @@ _int_handler:
 	RESTORE_ALL
 
 /*------------------------------------------------------------------------------*/
-/* cache functions */
-#ifdef	CONFIG_M5208
-	.globl	icache_enable
-icache_enable:
-	move.l	#0x01000000, %d0		/* Invalidate cache cmd */
-	movec	%d0, %CACR			/* Invalidate cache */
-	move.l	#(CONFIG_SYS_SDRAM_BASE + 0xC000), %d0	/* Setup cache mask */
-	movec	%d0, %ACR0			/* Enable cache */
-
-	move.l	#0x80000200, %d0		/* Setup cache mask */
-	movec	%d0, %CACR			/* Enable cache */
-	nop
-
-	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
-	moveq	#1, %d0
-	move.l	%d0, (%a1)
-	rts
-#endif
-
-#ifdef	CONFIG_M5271
-	.globl	icache_enable
-icache_enable:
-	move.l	#0x01000000, %d0		/* Invalidate cache cmd */
-	movec	%d0, %CACR			/* Invalidate cache */
-	move.l	#(CONFIG_SYS_SDRAM_BASE + 0xc000), %d0	/* Setup cache mask */
-	movec	%d0, %ACR0			/* Enable cache */
-
-	move.l	#0x80000200, %d0		/* Setup cache mask */
-	movec	%d0, %CACR			/* Enable cache */
-	nop
-
-	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
-	moveq	#1, %d0
-	move.l	%d0, (%a1)
-	rts
-#endif
-
-#ifdef	CONFIG_M5272
-	.globl	icache_enable
-icache_enable:
-	move.l	#0x01000000, %d0		/* Invalidate cache cmd */
-	movec	%d0, %CACR			/* Invalidate cache */
-	move.l	#0x0000c000, %d0		/* Setup cache mask */
-	movec	%d0, %ACR0			/* Enable cache */
-	move.l	#0xff00c000, %d0		/* Setup cache mask */
-	movec	%d0, %ACR1			/* Enable cache */
-	move.l	#0x80000100, %d0		/* Setup cache mask */
-	movec	%d0, %CACR			/* Enable cache */
-	moveq	#1, %d0
-	move.l	%d0, icache_state
-	rts
-#endif
-
-#if  defined(CONFIG_M5275)
-/*
- * Instruction cache only
- */
-	.globl	icache_enable
-icache_enable:
-	move.l	#0x01400000, %d0		/* Invalidate cache cmd */
-	movec	%d0, %CACR			/* Invalidate cache */
-	move.l	#0x0000c000, %d0		/* Setup SDRAM caching */
-	movec	%d0, %ACR0			/* Enable cache */
-	move.l	#0x00000000, %d0		/* No other caching */
-	movec	%d0, %ACR1			/* Enable cache */
-	move.l	#0x80400100, %d0		/* Setup cache mask */
-	movec	%d0, %CACR			/* Enable cache */
-	moveq	#1, %d0
-	move.l	%d0, icache_state
-	rts
-#endif
-
-#ifdef CONFIG_M5282
-	.globl	icache_enable
-icache_enable:
-	move.l	#0x01000000, %d0		/* Invalidate cache cmd */
-	movec	%d0, %CACR			/* Invalidate cache */
-	move.l	#0x0000c000, %d0		/* Setup cache mask */
-	movec	%d0, %ACR0			/* Enable cache */
-	move.l	#0xff00c000, %d0		/* Setup cache mask */
-	movec	%d0, %ACR1			/* Enable cache */
-	move.l	#0x80400100, %d0		/* Setup cache mask, data cache disabel*/
-	movec	%d0, %CACR			/* Enable cache */
-	moveq	#1, %d0
-icache_state_access_1:
-	move.l	%d0, icache_state
-	rts
-#endif
-
-#if defined(CONFIG_M5249) || defined(CONFIG_M5253)
-	.globl	icache_enable
-icache_enable:
-	/*
-	 *  Note: The 5249 Documentation doesn't give a bit position for CINV!
-	 *  From the 5272 and the 5307 documentation, I have deduced that it is
-	 *  probably CACR[24]. Should someone say something to Motorola?
-	 *	~Jeremy
-	 */
-	move.l	#0x01000000, %d0		/* Invalidate whole cache */
-	move.c	%d0,%CACR
-	move.l	#0xff00c000, %d0		/* Set FLASH cachable: always match (SM=0b10) */
-	move.c	%d0, %ACR0
-	move.l	#0x0000c000, %d0		/* Set SDRAM cachable: always match (SM=0b10) */
-	move.c	%d0, %ACR1
-	move.l	#0x90000200, %d0		/* Set cache enable cmd */
-	move.c	%d0,%CACR
-	moveq	#1, %d0
-	move.l	%d0, icache_state
-	rts
-#endif
-
-	.globl	icache_disable
-icache_disable:
-	move.l	#0x00000100, %d0		/* Setup cache mask */
-	movec	%d0, %CACR			/* Enable cache */
-	clr.l	%d0				/* Setup cache mask */
-	movec	%d0, %ACR0			/* Enable cache */
-	movec	%d0, %ACR1			/* Enable cache */
-	moveq	#0, %d0
-icache_state_access_2:
-	move.l	%d0, icache_state
-	rts
-
-	.globl	icache_status
-icache_status:
-icache_state_access_3:
-	move.l	#(icache_state), %a0
-	move.l	(%a0), %d0
-	rts
-
-	.data
-icache_state:
-	.long	0	/* cache is diabled on inirialization */
-
-	.globl	dcache_enable
-dcache_enable:
-	/* dummy function */
-	rts
-
-	.globl	dcache_disable
-dcache_disable:
-	/* dummy function */
-	rts
-
-	.globl	dcache_status
-dcache_status:
-	/* dummy function */
-	rts
-
-/*------------------------------------------------------------------------------*/
 
 	.globl	version_string
 version_string:
diff --git a/cpu/mcf532x/Makefile b/arch/m68k/cpu/mcf532x/Makefile
index 6790d90f27..6790d90f27 100644
--- a/cpu/mcf532x/Makefile
+++ b/arch/m68k/cpu/mcf532x/Makefile
diff --git a/cpu/mcf532x/config.mk b/arch/m68k/cpu/mcf532x/config.mk
index 0cb90ac4e2..b783444ae8 100644
--- a/cpu/mcf532x/config.mk
+++ b/arch/m68k/cpu/mcf532x/config.mk
@@ -24,8 +24,20 @@
 #
 
 PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
+
+cfg=$(shell grep configs $(OBJTREE)/include/config.h | sed 's/.*<\(configs.*\)>/\1/')
+is5301x:=$(shell grep CONFIG_MCF5301x $(TOPDIR)/include/$(cfg))
+is532x:=$(shell grep CONFIG_MCF532x $(TOPDIR)/include/$(cfg))
+
 ifneq ($(findstring 4.1,$(shell $(CC) --version)),4.1)
+
+ifneq (,$(findstring CONFIG_MCF5301x,$(is5301x)))
+PLATFORM_CPPFLAGS += -mcpu=53015 -fPIC
+endif
+ifneq (,$(findstring CONFIG_MCF532x,$(is532x)))
 PLATFORM_CPPFLAGS += -mcpu=5329 -fPIC
+endif
+
 else
 PLATFORM_CPPFLAGS += -m5307 -fPIC
 endif
diff --git a/cpu/mcf532x/cpu.c b/arch/m68k/cpu/mcf532x/cpu.c
index 331cc15da4..331cc15da4 100644
--- a/cpu/mcf532x/cpu.c
+++ b/arch/m68k/cpu/mcf532x/cpu.c
diff --git a/cpu/mcf532x/cpu_init.c b/arch/m68k/cpu/mcf532x/cpu_init.c
index 4f1695cef8..6f551b60c9 100644
--- a/cpu/mcf532x/cpu_init.c
+++ b/arch/m68k/cpu/mcf532x/cpu_init.c
@@ -133,24 +133,26 @@ int cpu_init_r(void)
 	return (0);
 }
 
-void uart_port_conf(void)
+void uart_port_conf(int port)
 {
 	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
 
 	/* Setup Ports: */
-	switch (CONFIG_SYS_UART_PORT) {
+	switch (port) {
 	case 0:
-		gpio->par_uart = (GPIO_PAR_UART_U0TXD | GPIO_PAR_UART_U0RXD);
+		gpio->par_uart &= ~(GPIO_PAR_UART_U0TXD | GPIO_PAR_UART_U0RXD);
+		gpio->par_uart |= (GPIO_PAR_UART_U0TXD | GPIO_PAR_UART_U0RXD);
 		break;
 	case 1:
 #ifdef CONFIG_SYS_UART1_ALT1_GPIO
 		gpio->par_simp1h &=
-		    ~(GPIO_PAR_SIMP1H_DATA1_MASK | GPIO_PAR_SIMP1H_VEN1_MASK);
+		    ~(GPIO_PAR_SIMP1H_DATA1_UNMASK |
+		      GPIO_PAR_SIMP1H_VEN1_UNMASK);
 		gpio->par_simp1h |=
 		    (GPIO_PAR_SIMP1H_DATA1_U1TXD | GPIO_PAR_SIMP1H_VEN1_U1RXD);
 #elif defined(CONFIG_SYS_UART1_ALT2_GPIO)
 		gpio->par_ssih &=
-		    ~(GPIO_PAR_SSIH_RXD_MASK | GPIO_PAR_SSIH_TXD_MASK);
+		    ~(GPIO_PAR_SSIH_RXD_UNMASK | GPIO_PAR_SSIH_TXD_UNMASK);
 		gpio->par_ssih |=
 		    (GPIO_PAR_SSIH_RXD_U1RXD | GPIO_PAR_SSIH_TXD_U1TXD);
 #endif
@@ -160,12 +162,12 @@ void uart_port_conf(void)
 		gpio->par_uart |= (GPIO_PAR_UART_U2TXD | GPIO_PAR_UART_U2RXD);
 #elif defined(CONFIG_SYS_UART2_ALT1_GPIO)
 		gpio->par_dspih &=
-		    ~(GPIO_PAR_DSPIH_SIN_MASK | GPIO_PAR_DSPIH_SOUT_MASK);
+		    ~(GPIO_PAR_DSPIH_SIN_UNMASK | GPIO_PAR_DSPIH_SOUT_UNMASK);
 		gpio->par_dspih |=
 		    (GPIO_PAR_DSPIH_SIN_U2RXD | GPIO_PAR_DSPIH_SOUT_U2TXD);
 #elif defined(CONFIG_SYS_UART2_ALT2_GPIO)
 		gpio->par_feci2c &=
-		    ~(GPIO_PAR_FECI2C_SDA_MASK | GPIO_PAR_FECI2C_SCL_MASK);
+		    ~(GPIO_PAR_FECI2C_SDA_UNMASK | GPIO_PAR_FECI2C_SCL_UNMASK);
 		gpio->par_feci2c |=
 		    (GPIO_PAR_FECI2C_SDA_U2TXD | GPIO_PAR_FECI2C_SCL_U2RXD);
 #endif
@@ -195,11 +197,11 @@ int fecpin_setclear(struct eth_device *dev, int setclear)
 		if (info->iobase == CONFIG_SYS_FEC0_IOBASE) {
 			gpio->par_fec &=
 			    ~(GPIO_PAR_FEC0_7W_FEC | GPIO_PAR_FEC0_RMII_FEC);
-			gpio->par_feci2c &= GPIO_PAR_FECI2C_RMII0_MASK;
+			gpio->par_feci2c &= GPIO_PAR_FECI2C_RMII0_UNMASK;
 		} else {
 			gpio->par_fec &=
 			    ~(GPIO_PAR_FEC1_7W_FEC | GPIO_PAR_FEC1_RMII_FEC);
-			gpio->par_feci2c &= GPIO_PAR_FECI2C_RMII1_MASK;
+			gpio->par_feci2c &= GPIO_PAR_FECI2C_RMII1_UNMASK;
 		}
 	}
 	return 0;
@@ -297,22 +299,33 @@ int cpu_init_r(void)
 	return (0);
 }
 
-void uart_port_conf(void)
+void uart_port_conf(int port)
 {
 	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
 
 	/* Setup Ports: */
-	switch (CONFIG_SYS_UART_PORT) {
+	switch (port) {
 	case 0:
-		gpio->par_uart = (GPIO_PAR_UART_TXD0 | GPIO_PAR_UART_RXD0);
+		gpio->par_uart &= ~(GPIO_PAR_UART_TXD0 | GPIO_PAR_UART_RXD0);
+		gpio->par_uart |= (GPIO_PAR_UART_TXD0 | GPIO_PAR_UART_RXD0);
 		break;
 	case 1:
-		gpio->par_uart =
+		gpio->par_uart &=
+		    ~(GPIO_PAR_UART_TXD1(3) | GPIO_PAR_UART_RXD1(3));
+		gpio->par_uart |=
 		    (GPIO_PAR_UART_TXD1(3) | GPIO_PAR_UART_RXD1(3));
 		break;
 	case 2:
+#ifdef CONFIG_SYS_UART2_ALT1_GPIO
 		gpio->par_timer &= 0x0F;
 		gpio->par_timer |= (GPIO_PAR_TIN3_URXD2 | GPIO_PAR_TIN2_UTXD2);
+#elif defined(CONFIG_SYS_UART2_ALT2_GPIO)
+		gpio->par_feci2c &= 0xFF00;
+		gpio->par_feci2c |= (GPIO_PAR_FECI2C_SCL_UTXD2 | GPIO_PAR_FECI2C_SDA_URXD2);
+#elif defined(CONFIG_SYS_UART2_ALT3_GPIO)
+		gpio->par_ssi &= 0xF0FF;
+		gpio->par_ssi |= (GPIO_PAR_SSI_RXD(2) | GPIO_PAR_SSI_TXD(2));
+#endif
 		break;
 	}
 }
diff --git a/cpu/mcf532x/interrupts.c b/arch/m68k/cpu/mcf532x/interrupts.c
index d6c8205454..d6c8205454 100644
--- a/cpu/mcf532x/interrupts.c
+++ b/arch/m68k/cpu/mcf532x/interrupts.c
diff --git a/cpu/mcf532x/speed.c b/arch/m68k/cpu/mcf532x/speed.c
index 67f08c7602..5a29e2567a 100644
--- a/cpu/mcf532x/speed.c
+++ b/arch/m68k/cpu/mcf532x/speed.c
@@ -229,7 +229,7 @@ int clock_pll(int fsys, int flags)
 	    PLL_PDR_OUTDIV3((BUSDIV / 2) - 1)	|
 	    PLL_PDR_OUTDIV4(USBDIV - 1);
 
-	pll->pcr &= PLL_PCR_FBDIV_MASK;
+	pll->pcr &= PLL_PCR_FBDIV_UNMASK;
 	pll->pcr |= PLL_PCR_FBDIV(mfd - 1);
 #endif
 #ifdef CONFIG_MCF532x
diff --git a/cpu/mcf532x/start.S b/arch/m68k/cpu/mcf532x/start.S
index 5b134aa47c..a80b0a9946 100644
--- a/cpu/mcf532x/start.S
+++ b/arch/m68k/cpu/mcf532x/start.S
@@ -27,6 +27,7 @@
 #include <config.h>
 #include <timestamp.h>
 #include "version.h"
+#include <asm/cache.h>
 
 #ifndef	 CONFIG_IDENT_STRING
 #define	 CONFIG_IDENT_STRING ""
@@ -142,7 +143,7 @@ _start:
 	movec	%d0, %RAMBAR1
 
 	/* invalidate and disable cache */
-	move.l	#0x01000000, %d0		/* Invalidate cache cmd */
+	move.l	#CF_CACR_CINVA, %d0		/* Invalidate cache cmd */
 	movec	%d0, %CACR			/* Invalidate cache */
 	move.l	#0, %d0
 	movec	%d0, %ACR0
@@ -158,8 +159,8 @@ _start:
 
 	/* initialize general use internal ram */
 	move.l #0, %d0
-	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
-	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a2
+	move.l #(ICACHE_STATUS), %a1	/* icache */
+	move.l #(DCACHE_STATUS), %a2	/* icache */
 	move.l %d0, (%a1)
 	move.l %d0, (%a2)
 
@@ -279,71 +280,6 @@ _int_handler:
 	RESTORE_ALL
 
 /*------------------------------------------------------------------------------*/
-/* cache functions */
-	.globl	icache_enable
-icache_enable:
-	move.l	#0x01000000, %d0		/* Invalidate cache cmd */
-	movec	%d0, %CACR			/* Invalidate cache */
-	move.l  #(CONFIG_SYS_SDRAM_BASE + 0xc000 + ((CONFIG_SYS_SDRAM_SIZE & 0x1fe0) << 11)), %d0
-	movec	%d0, %ACR0			/* Enable cache */
-
-	move.l	#0x80000200, %d0		/* Setup cache mask */
-	movec	%d0, %CACR			/* Enable cache */
-	nop
-
-	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
-	moveq	#1, %d0
-	move.l	%d0, (%a1)
-	rts
-
-	.globl	icache_disable
-icache_disable:
-	move.l	#0x01000000, %d0		/* Setup cache mask */
-	movec	%d0, %CACR			/* Disable cache */
-	clr.l	%d0				/* Setup cache mask */
-	movec	%d0, %ACR0
-	movec	%d0, %ACR1
-
-	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
-	moveq	#0, %d0
-	move.l	%d0, (%a1)
-	rts
-
-	.globl	icache_status
-icache_status:
-	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
-	move.l	(%a1), %d0
-	rts
-
-	.globl	icache_invalid
-icache_invalid:
-	move.l	#0x81000200, %d0		/* Setup cache mask */
-	movec	%d0, %CACR			/* Enable cache */
-	rts
-
-	.globl	dcache_enable
-dcache_enable:
-	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
-	moveq	#1, %d0
-	move.l	%d0, (%a1)
-	rts
-
-    /* No dcache, just a dummy function */
-	.globl	dcache_disable
-dcache_disable:
-	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
-	moveq	#0, %d0
-	move.l	%d0, (%a1)
-	rts
-
-	.globl	dcache_status
-dcache_status:
-	move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
-	move.l	(%a1), %d0
-	rts
-
-/*------------------------------------------------------------------------------*/
-
 	.globl	version_string
 version_string:
 	.ascii U_BOOT_VERSION
diff --git a/cpu/mcf5445x/Makefile b/arch/m68k/cpu/mcf5445x/Makefile
index 26ec29895e..26ec29895e 100644
--- a/cpu/mcf5445x/Makefile
+++ b/arch/m68k/cpu/mcf5445x/Makefile
diff --git a/cpu/mcf5445x/config.mk b/arch/m68k/cpu/mcf5445x/config.mk
index b0b49f7b26..b0b49f7b26 100644
--- a/cpu/mcf5445x/config.mk
+++ b/arch/m68k/cpu/mcf5445x/config.mk
diff --git a/cpu/mcf5445x/cpu.c b/arch/m68k/cpu/mcf5445x/cpu.c
index 6238bc020f..6238bc020f 100644
--- a/cpu/mcf5445x/cpu.c
+++ b/arch/m68k/cpu/mcf5445x/cpu.c
diff --git a/cpu/mcf5445x/cpu_init.c b/arch/m68k/cpu/mcf5445x/cpu_init.c
index 48b37dfe7d..8d51d35d68 100644
--- a/cpu/mcf5445x/cpu_init.c
+++ b/arch/m68k/cpu/mcf5445x/cpu_init.c
@@ -28,6 +28,7 @@
 #include <common.h>
 #include <watchdog.h>
 #include <asm/immap.h>
+#include <asm/processor.h>
 #include <asm/rtc.h>
 
 #if defined(CONFIG_CMD_NET)
@@ -105,6 +106,14 @@ void cpu_init_f(void)
 	fbcs->csmr5 = CONFIG_SYS_CS5_MASK;
 #endif
 
+	/*
+	 * now the flash base address is no longer at 0 (Newer ColdFire family
+	 * boot at address 0 instead of 0xFFnn_nnnn). The vector table must
+	 * also move to the new location.
+	 */
+	if (CONFIG_SYS_CS0_BASE != 0)
+		setvbr(CONFIG_SYS_CS0_BASE);
+
 #ifdef CONFIG_FSL_I2C
 	gpio->par_feci2c = GPIO_PAR_FECI2C_SCL_SCL | GPIO_PAR_FECI2C_SDA_SDA;
 #endif
@@ -128,19 +137,43 @@ int cpu_init_r(void)
 	return (0);
 }
 
-void uart_port_conf(void)
+void uart_port_conf(int port)
 {
 	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
 
 	/* Setup Ports: */
-	switch (CONFIG_SYS_UART_PORT) {
+	switch (port) {
 	case 0:
-		gpio->par_uart =
+		gpio->par_uart &=
+		    ~(GPIO_PAR_UART_U0TXD_U0TXD | GPIO_PAR_UART_U0RXD_U0RXD);
+		gpio->par_uart |=
 		    (GPIO_PAR_UART_U0TXD_U0TXD | GPIO_PAR_UART_U0RXD_U0RXD);
 		break;
 	case 1:
-		gpio->par_uart =
+#ifdef CONFIG_SYS_UART1_PRI_GPIO
+		gpio->par_uart &=
+		    ~(GPIO_PAR_UART_U1TXD_U1TXD | GPIO_PAR_UART_U1RXD_U1RXD);
+		gpio->par_uart |=
 		    (GPIO_PAR_UART_U1TXD_U1TXD | GPIO_PAR_UART_U1RXD_U1RXD);
+#elif defined(CONFIG_SYS_UART1_ALT1_GPIO)
+		gpio->par_ssi &=
+		    (GPIO_PAR_SSI_SRXD_UNMASK | GPIO_PAR_SSI_STXD_UNMASK);
+		gpio->par_ssi |=
+		    (GPIO_PAR_SSI_SRXD_U1RXD | GPIO_PAR_SSI_STXD_U1TXD);
+#endif
+		break;
+	case 2:
+#if defined(CONFIG_SYS_UART2_ALT1_GPIO)
+		gpio->par_timer &=
+		    (GPIO_PAR_TIMER_T3IN_UNMASK | GPIO_PAR_TIMER_T2IN_UNMASK);
+		gpio->par_timer |=
+		    (GPIO_PAR_TIMER_T3IN_U2RXD | GPIO_PAR_TIMER_T2IN_U2TXD);
+#elif defined(CONFIG_SYS_UART2_ALT2_GPIO)
+		gpio->par_timer &=
+		    (GPIO_PAR_FECI2C_SCL_UNMASK | GPIO_PAR_FECI2C_SDA_UNMASK);
+		gpio->par_timer |=
+		    (GPIO_PAR_FECI2C_SCL_U2TXD | GPIO_PAR_FECI2C_SDA_U2RXD);
+#endif
 		break;
 	}
 }
@@ -164,9 +197,9 @@ int fecpin_setclear(struct eth_device *dev, int setclear)
 		    ~(GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0);
 
 		if (info->iobase == CONFIG_SYS_FEC0_IOBASE)
-			gpio->par_fec &= GPIO_PAR_FEC_FEC0_MASK;
+			gpio->par_fec &= GPIO_PAR_FEC_FEC0_UNMASK;
 		else
-			gpio->par_fec &= GPIO_PAR_FEC_FEC1_MASK;
+			gpio->par_fec &= GPIO_PAR_FEC_FEC1_UNMASK;
 	}
 	return 0;
 }
diff --git a/cpu/mcf5445x/interrupts.c b/arch/m68k/cpu/mcf5445x/interrupts.c
index 85828a67b5..85828a67b5 100644
--- a/cpu/mcf5445x/interrupts.c
+++ b/arch/m68k/cpu/mcf5445x/interrupts.c
diff --git a/cpu/mcf5445x/pci.c b/arch/m68k/cpu/mcf5445x/pci.c
index 7f9784c3cb..7f9784c3cb 100644
--- a/cpu/mcf5445x/pci.c
+++ b/arch/m68k/cpu/mcf5445x/pci.c
diff --git a/cpu/mcf5445x/speed.c b/arch/m68k/cpu/mcf5445x/speed.c
index 9c0c07733b..9c0c07733b 100644
--- a/cpu/mcf5445x/speed.c
+++ b/arch/m68k/cpu/mcf5445x/speed.c
diff --git a/cpu/mcf5445x/start.S b/arch/m68k/cpu/mcf5445x/start.S
index d2d4439151..738e4a7110 100644
--- a/cpu/mcf5445x/start.S
+++ b/arch/m68k/cpu/mcf5445x/start.S
@@ -24,16 +24,12 @@
 #include <config.h>
 #include <timestamp.h>
 #include "version.h"
+#include <asm/cache.h>
 
 #ifndef	 CONFIG_IDENT_STRING
 #define	 CONFIG_IDENT_STRING ""
 #endif
 
-/* last three long word reserved for cache status */
-#define CACR_STATUS	(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-12)
-#define ICACHE_STATUS	(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 8)
-#define DCACHE_STATUS	(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 4)
-
 #define _START	_start
 #define _FAULT	_fault
 
@@ -160,15 +156,13 @@ asm_dram_init:
 
 	/* initialize general use internal ram */
 	move.l #0, %d0
-	move.l #(CACR_STATUS), %a1	/* CACR */
-	move.l #(ICACHE_STATUS), %a2	/* icache */
-	move.l #(DCACHE_STATUS), %a3	/* dcache */
+	move.l #(ICACHE_STATUS), %a1	/* icache */
+	move.l #(DCACHE_STATUS), %a2	/* dcache */
 	move.l %d0, (%a1)
 	move.l %d0, (%a2)
-	move.l %d0, (%a3)
 
 	/* invalidate and disable cache */
-	move.l	#0x01004100, %d0	/* Invalidate cache cmd */
+	move.l	#(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
 	movec	%d0, %CACR		/* Invalidate cache */
 	move.l	#0, %d0
 	movec	%d0, %ACR0
@@ -411,15 +405,13 @@ _start:
 
 	/* initialize general use internal ram */
 	move.l #0, %d0
-	move.l #(CACR_STATUS), %a1	/* CACR */
-	move.l #(ICACHE_STATUS), %a2	/* icache */
-	move.l #(DCACHE_STATUS), %a3	/* dcache */
+	move.l #(ICACHE_STATUS), %a1	/* icache */
+	move.l #(DCACHE_STATUS), %a2	/* dcache */
 	move.l %d0, (%a1)
 	move.l %d0, (%a2)
-	move.l %d0, (%a3)
 
 	/* invalidate and disable cache */
-	move.l	#0x01004100, %d0	/* Invalidate cache cmd */
+	move.l	#(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
 	movec	%d0, %CACR		/* Invalidate cache */
 	move.l	#0, %d0
 	movec	%d0, %ACR0
@@ -544,107 +536,6 @@ _int_handler:
 	RESTORE_ALL
 
 /*------------------------------------------------------------------------------*/
-/* cache functions */
-	.globl	icache_enable
-icache_enable:
-	move.l #(CACR_STATUS), %a1	/* read CACR Status */
-	move.l	(%a1), %d1
-
-	move.l	#0x00040100, %d0	/* Invalidate icache */
-	movec	%d0, %CACR
-
-	move.l	#(CONFIG_SYS_SDRAM_BASE + 0xC000), %d0	/* Setup icache */
-	movec	%d0, %ACR2
-
-	move.l	#0x04088020, %d0	/* Enable bcache and icache */
-	movec	%d0, %CACR
-
-	move.l #(ICACHE_STATUS), %a1
-	moveq	#1, %d0
-	move.l	%d0, (%a1)
-	rts
-
-	.globl	icache_disable
-icache_disable:
-	move.l #(CACR_STATUS), %a1	/* read CACR Status */
-	move.l	(%a1), %d0
-
-	move.l	#0xFFF77BFF, %d0
-	or.l	#0x00040100, %d0	/* Setup cache mask */
-	movec	%d0, %CACR		/* Invalidate icache */
-	clr.l	%d0
-	movec	%d0, %ACR2
-	movec	%d0, %ACR3
-
-	move.l #(ICACHE_STATUS), %a1
-	moveq	#0, %d0
-	move.l	%d0, (%a1)
-	rts
-
-	.globl	icache_status
-icache_status:
-	move.l #(ICACHE_STATUS), %a1
-	move.l	(%a1), %d0
-	rts
-
-	.globl	icache_invalid
-icache_invalid:
-	move.l #(CACR_STATUS), %a1	/* read CACR Status */
-	move.l	(%a1), %d0
-
-	move.l	#0x00040100, %d0	/* Invalidate icache */
-	movec	%d0, %CACR		/* Enable and invalidate cache */
-	rts
-
-	.globl	dcache_enable
-dcache_enable:
-	move.l #(CACR_STATUS), %a1	/* read CACR Status */
-	move.l	(%a1), %d1
-
-	move.l	#0x01040100, %d0
-	movec	%d0, %CACR		/* Invalidate dcache */
-
-	move.l	#0x80088020, %d0	/* Enable bcache and icache */
-	movec	%d0, %CACR
-
-	move.l #(DCACHE_STATUS), %a1
-	moveq	#1, %d0
-	move.l	%d0, (%a1)
-	rts
-
-	.globl	dcache_disable
-dcache_disable:
-	move.l #(CACR_STATUS), %a1	/* read CACR Status */
-	move.l	(%a1), %d0
-
-	and.l	#0x7FFFFFFF, %d0
-	or.l	#0x01000000, %d0	/* Setup cache mask */
-	movec	%d0, %CACR		/* Disable dcache */
-	clr.l	%d0
-	movec	%d0, %ACR0
-	movec	%d0, %ACR1
-
-	move.l #(DCACHE_STATUS), %a1
-	moveq	#0, %d0
-	move.l	%d0, (%a1)
-	rts
-
-	.globl	dcache_invalid
-dcache_invalid:
-	move.l #(CACR_STATUS), %a1	/* read CACR Status */
-	move.l	(%a1), %d0
-
-	move.l	#0x81088020, %d0	/* Setup cache mask */
-	movec	%d0, %CACR		/* Enable and invalidate cache */
-	rts
-
-	.globl	dcache_status
-dcache_status:
-	move.l #(DCACHE_STATUS), %a1
-	move.l	(%a1), %d0
-	rts
-
-/*------------------------------------------------------------------------------*/
 
 	.globl	version_string
 version_string:
diff --git a/cpu/mcf547x_8x/Makefile b/arch/m68k/cpu/mcf547x_8x/Makefile
index e12bef12c9..e12bef12c9 100644
--- a/cpu/mcf547x_8x/Makefile
+++ b/arch/m68k/cpu/mcf547x_8x/Makefile
diff --git a/cpu/mcf547x_8x/config.mk b/arch/m68k/cpu/mcf547x_8x/config.mk
index 83102abbbb..83102abbbb 100644
--- a/cpu/mcf547x_8x/config.mk
+++ b/arch/m68k/cpu/mcf547x_8x/config.mk
diff --git a/cpu/mcf547x_8x/cpu.c b/arch/m68k/cpu/mcf547x_8x/cpu.c
index 3912a74d5f..3912a74d5f 100644
--- a/cpu/mcf547x_8x/cpu.c
+++ b/arch/m68k/cpu/mcf547x_8x/cpu.c
diff --git a/cpu/mcf547x_8x/cpu_init.c b/arch/m68k/cpu/mcf547x_8x/cpu_init.c
index 96a3132b78..60c91267a7 100644
--- a/cpu/mcf547x_8x/cpu_init.c
+++ b/arch/m68k/cpu/mcf547x_8x/cpu_init.c
@@ -113,13 +113,13 @@ int cpu_init_r(void)
 	return (0);
 }
 
-void uart_port_conf(void)
+void uart_port_conf(int port)
 {
 	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
 	volatile u8 *pscsicr = (u8 *) (CONFIG_SYS_UART_BASE + 0x40);
 
 	/* Setup Ports: */
-	switch (CONFIG_SYS_UART_PORT) {
+	switch (port) {
 	case 0:
 		gpio->par_psc0 = (GPIO_PAR_PSC0_TXD0 | GPIO_PAR_PSC0_RXD0);
 		break;
diff --git a/cpu/mcf547x_8x/interrupts.c b/arch/m68k/cpu/mcf547x_8x/interrupts.c
index 76be876aa0..76be876aa0 100644
--- a/cpu/mcf547x_8x/interrupts.c
+++ b/arch/m68k/cpu/mcf547x_8x/interrupts.c
diff --git a/cpu/mcf547x_8x/pci.c b/arch/m68k/cpu/mcf547x_8x/pci.c
index f867dc1279..f867dc1279 100644
--- a/cpu/mcf547x_8x/pci.c
+++ b/arch/m68k/cpu/mcf547x_8x/pci.c
diff --git a/cpu/mcf547x_8x/slicetimer.c b/arch/m68k/cpu/mcf547x_8x/slicetimer.c
index 8dc010a352..8dc010a352 100644
--- a/cpu/mcf547x_8x/slicetimer.c
+++ b/arch/m68k/cpu/mcf547x_8x/slicetimer.c
diff --git a/cpu/mcf547x_8x/speed.c b/arch/m68k/cpu/mcf547x_8x/speed.c
index 2cee4887ac..2cee4887ac 100644
--- a/cpu/mcf547x_8x/speed.c
+++ b/arch/m68k/cpu/mcf547x_8x/speed.c
diff --git a/cpu/mcf547x_8x/start.S b/arch/m68k/cpu/mcf547x_8x/start.S
index 94ef14bf3d..84118629e2 100644
--- a/cpu/mcf547x_8x/start.S
+++ b/arch/m68k/cpu/mcf547x_8x/start.S
@@ -24,16 +24,12 @@
 #include <config.h>
 #include <timestamp.h>
 #include "version.h"
+#include <asm/cache.h>
 
 #ifndef	 CONFIG_IDENT_STRING
 #define	 CONFIG_IDENT_STRING ""
 #endif
 
-/* last three long word reserved for cache status */
-#define ICACHE_STATUS	(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 4)
-#define DCACHE_STATUS	(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END- 8)
-#define CACR_STATUS	(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-12)
-
 #define _START	_start
 #define _FAULT	_fault
 
@@ -158,10 +154,8 @@ _start:
 	move.l #0, %d0
 	move.l #(ICACHE_STATUS), %a1	/* icache */
 	move.l #(DCACHE_STATUS), %a2	/* icache */
-	move.l #(CACR_STATUS), %a3	/* CACR */
 	move.l %d0, (%a1)
 	move.l %d0, (%a2)
-	move.l %d0, (%a3)
 
 	/* set stackpointer to end of internal ram to get some stackspace for the
 	   first c-code */
@@ -279,81 +273,6 @@ _int_handler:
 	RESTORE_ALL
 
 /*------------------------------------------------------------------------------*/
-/* cache functions */
-	.globl	icache_enable
-icache_enable:
-	move.l	#(CONFIG_SYS_SDRAM_BASE + 0x1c000), %d0
-	movec	%d0, %ACR2			/* Enable cache */
-
-	move.l	#0x020C8100, %d0		/* Setup cache mask */
-	movec	%d0, %CACR			/* Enable cache */
-	nop
-
-	move.l #(ICACHE_STATUS), %a1
-	moveq	#1, %d0
-	move.l	%d0, (%a1)
-	rts
-
-	.globl	icache_disable
-icache_disable:
-	move.l	#0x000C8100, %d0		/* Setup cache mask */
-	movec	%d0, %CACR			/* Disable cache */
-	clr.l	%d0				/* Setup cache mask */
-	movec	%d0, %ACR2
-	movec	%d0, %ACR3
-
-	move.l #(ICACHE_STATUS), %a1
-	moveq	#0, %d0
-	move.l	%d0, (%a1)
-	rts
-
-	.globl	icache_invalid
-icache_invalid:
-	move.l	#0x000C8100, %d0		/* Setup cache mask */
-	movec	%d0, %CACR			/* Enable cache */
-	rts
-
-	.globl	icache_status
-icache_status:
-	move.l #(ICACHE_STATUS), %a1
-	move.l	(%a1), %d0
-	rts
-
-	.globl	dcache_enable
-dcache_enable:
-	bsr	icache_disable
-
-	move.l	#(CONFIG_SYS_SDRAM_BASE + 0xc000), %d0
-	movec	%d0, %ACR0			/* Enable cache */
-
-	move.l	#0xA30C8100, %d0		/* Invalidate cache cmd */
-	movec	%d0, %CACR			/* Invalidate cache */
-
-	move.l #(DCACHE_STATUS), %a1
-	moveq	#1, %d0
-	move.l	%d0, (%a1)
-	rts
-
-	.globl	dcache_disable
-dcache_disable:
-	move.l	#0xA30C8100, %d0		/* Setup cache mask */
-	movec	%d0, %CACR			/* Disable cache */
-	clr.l	%d0				/* Setup cache mask */
-	movec	%d0, %ACR0
-	movec	%d0, %ACR1
-
-	move.l #(DCACHE_STATUS), %a1
-	moveq	#0, %d0
-	move.l	%d0, (%a1)
-	rts
-
-	.globl	dcache_status
-dcache_status:
-	move.l #(DCACHE_STATUS), %a1
-	move.l	(%a1), %d0
-	rts
-
-/*------------------------------------------------------------------------------*/
 
 	.globl	version_string
 version_string:
diff --git a/include/asm-m68k/bitops.h b/arch/m68k/include/asm/bitops.h
index ad971b4f31..ad971b4f31 100644
--- a/include/asm-m68k/bitops.h
+++ b/arch/m68k/include/asm/bitops.h
diff --git a/include/asm-m68k/byteorder.h b/arch/m68k/include/asm/byteorder.h
index 0e2a0ed8cb..0e2a0ed8cb 100644
--- a/include/asm-m68k/byteorder.h
+++ b/arch/m68k/include/asm/byteorder.h
diff --git a/arch/m68k/include/asm/cache.h b/arch/m68k/include/asm/cache.h
new file mode 100644
index 0000000000..7c84e48471
--- /dev/null
+++ b/arch/m68k/include/asm/cache.h
@@ -0,0 +1,210 @@
+/*
+ * ColdFire cache
+ *
+ * Copyright (C) 2004-2010 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CACHE_H
+#define __CACHE_H
+
+#if defined(CONFIG_MCF520x) || defined(CONFIG_MCF523x) || \
+    defined(CONFIG_MCF52x2) || defined(CONFIG_MCF5227x)
+#define CONFIG_CF_V2
+#endif
+
+#if defined(CONFIG_MCF532x) || defined(CONFIG_MCF5301x)
+#define CONFIG_CF_V3
+#endif
+
+#if defined(CONFIG_MCF547x_8x) || defined(CONFIG_MCF5445x)
+#define CONFIG_CF_V4
+#if defined(CONFIG_MCF5441x)
+#define CONFIG_CF_V4E		/* Four Extra ACRn */
+#endif
+#endif
+
+/* ***** CACR ***** */
+/* V2 Core */
+#ifdef CONFIG_CF_V2
+
+#define CF_CACR_CENB		(1 << 31)
+#define CF_CACR_CPD		(1 << 28)
+#define CF_CACR_CFRZ		(1 << 27)
+#define CF_CACR_CEIB		(1 << 10)
+#define CF_CACR_DCM		(1 << 9)
+#define CF_CACR_DBWE		(1 << 8)
+
+#if defined(CONFIG_MCF5249) || defined(CONFIG_MCF5253)
+#define CF_CACR_DWP		(1 << 6)
+#else
+#define CF_CACR_CINV		(1 << 24)
+#define CF_CACR_DISI		(1 << 23)
+#define CF_CACR_DISD		(1 << 22)
+#define CF_CACR_INVI		(1 << 21)
+#define CF_CACR_INVD		(1 << 20)
+#define CF_CACR_DWP		(1 << 5)
+#define CF_CACR_EUSP		(1 << 4)
+#endif				/* CONFIG_MCF5249 || CONFIG_MCF5253 */
+
+#endif				/* CONFIG_CF_V2 */
+
+/* V3 Core */
+#ifdef CONFIG_CF_V3
+
+#define CF_CACR_EC		(1 << 31)
+#define CF_CACR_ESB		(1 << 29)
+#define CF_CACR_DPI		(1 << 28)
+#define CF_CACR_HLCK		(1 << 27)
+#define CF_CACR_CINVA		(1 << 24)
+#define CF_CACR_DNFB		(1 << 10)
+#define CF_CACR_DCM_UNMASK	0xFFFFFCFF
+#define CF_CACR_DCM_WT		(0 << 8)
+#define CF_CACR_DCM_CB		(1 << 8)
+#define CF_CACR_DCM_P		(2 << 8)
+#define CF_CACR_DCM_IP		(3 << 8)
+#define CF_CACR_DW		(1 << 5)
+#define CF_CACR_EUSP		(1 << 4)
+
+#endif				/* CONFIG_CF_V3 */
+
+/* V4 Core */
+#ifdef CONFIG_CF_V4
+
+#define CF_CACR_DEC		(1 << 31)
+#define CF_CACR_DW		(1 << 30)
+#define CF_CACR_DESB		(1 << 29)
+#define CF_CACR_DDPI		(1 << 28)
+#define CF_CACR_DHLCK		(1 << 27)
+#define CF_CACR_DDCM_UNMASK	(0xF9FFFFFF)
+#define CF_CACR_DDCM_WT		(0 << 25)
+#define CF_CACR_DDCM_CB		(1 << 25)
+#define CF_CACR_DDCM_P		(2 << 25)
+#define CF_CACR_DDCM_IP		(3 << 25)
+#define CF_CACR_DCINVA		(1 << 24)
+
+#define CF_CACR_DDSP		(1 << 23)
+#define CF_CACR_BEC		(1 << 19)
+#define CF_CACR_BCINVA		(1 << 18)
+#define CF_CACR_IEC		(1 << 15)
+#define CF_CACR_DNFB		(1 << 13)
+#define CF_CACR_IDPI		(1 << 12)
+#define CF_CACR_IHLCK		(1 << 11)
+#define CF_CACR_IDCM		(1 << 10)
+#define CF_CACR_ICINVA		(1 << 8)
+#define CF_CACR_IDSP		(1 << 7)
+#define CF_CACR_EUSP		(1 << 5)
+
+#ifdef CONFIG_MCF5445x
+#define CF_CACR_IVO		(1 << 20)
+#define CF_CACR_SPA		(1 << 14)
+#else
+#define CF_CACR_DF		(1 << 4)
+#endif
+
+#endif				/* CONFIG_CF_V4 */
+
+/* ***** ACR ***** */
+#define CF_ACR_ADR_UNMASK	(0x00FFFFFF)
+#define CF_ACR_ADR(x)		((x & 0xFF) << 24)
+#define CF_ACR_ADRMSK_UNMASK	(0xFF00FFFF)
+#define CF_ACR_ADRMSK(x)	((x & 0xFF) << 16)
+#define CF_ACR_EN		(1 << 15)
+#define CF_ACR_SM_UNMASK	(0xFFFF9FFF)
+#define CF_ACR_SM_UM		(0 << 13)
+#define CF_ACR_SM_SM		(1 << 13)
+#define CF_ACR_SM_ALL		(3 << 13)
+#define CF_ACR_WP		(1 << 2)
+
+/* V2 Core */
+#ifdef CONFIG_CF_V2
+#define CF_ACR_CM		(1 << 6)
+#define CF_ACR_BWE		(1 << 5)
+#else
+/* V3 & V4 */
+#define CF_ACR_CM_UNMASK	(0xFFFFFF9F)
+#define CF_ACR_CM_WT		(0 << 5)
+#define CF_ACR_CM_CB		(1 << 5)
+#define CF_ACR_CM_P		(2 << 5)
+#define CF_ACR_CM_IP		(3 << 5)
+#endif				/* CONFIG_CF_V2 */
+
+/* V4 Core */
+#ifdef CONFIG_CF_V4
+#define CF_ACR_AMM		(1 << 10)
+#define CF_ACR_SP		(1 << 3)
+#endif				/* CONFIG_CF_V4 */
+
+
+#ifndef CONFIG_SYS_CACHE_ICACR
+#define CONFIG_SYS_CACHE_ICACR	0
+#endif
+
+#ifndef CONFIG_SYS_CACHE_DCACR
+#ifdef CONFIG_SYS_CACHE_ICACR
+#define CONFIG_SYS_CACHE_DCACR	CONFIG_SYS_CACHE_ICACR
+#else
+#define CONFIG_SYS_CACHE_DCACR	0
+#endif
+#endif
+
+#ifndef CONFIG_SYS_CACHE_ACR0
+#define CONFIG_SYS_CACHE_ACR0	0
+#endif
+
+#ifndef CONFIG_SYS_CACHE_ACR1
+#define CONFIG_SYS_CACHE_ACR1	0
+#endif
+
+#ifndef CONFIG_SYS_CACHE_ACR2
+#define CONFIG_SYS_CACHE_ACR2	0
+#endif
+
+#ifndef CONFIG_SYS_CACHE_ACR3
+#define CONFIG_SYS_CACHE_ACR3	0
+#endif
+
+#ifndef CONFIG_SYS_CACHE_ACR4
+#define CONFIG_SYS_CACHE_ACR4	0
+#endif
+
+#ifndef CONFIG_SYS_CACHE_ACR5
+#define CONFIG_SYS_CACHE_ACR5	0
+#endif
+
+#ifndef CONFIG_SYS_CACHE_ACR6
+#define CONFIG_SYS_CACHE_ACR6	0
+#endif
+
+#ifndef CONFIG_SYS_CACHE_ACR7
+#define CONFIG_SYS_CACHE_ACR7	0
+#endif
+
+#define CF_ADDRMASK(x)		(((x > 0x10) ? ((x >> 4) - 1) : (x)) << 16)
+
+#ifndef __ASSEMBLY__		/* put C only stuff in this section */
+
+void icache_invalid(void);
+void dcache_invalid(void);
+
+#endif
+
+#endif				/* __CACHE_H */
diff --git a/include/asm-m68k/coldfire/ata.h b/arch/m68k/include/asm/coldfire/ata.h
index 3efd03a62a..3efd03a62a 100644
--- a/include/asm-m68k/coldfire/ata.h
+++ b/arch/m68k/include/asm/coldfire/ata.h
diff --git a/include/asm-m68k/coldfire/crossbar.h b/arch/m68k/include/asm/coldfire/crossbar.h
index a9c724ce4b..a9c724ce4b 100644
--- a/include/asm-m68k/coldfire/crossbar.h
+++ b/arch/m68k/include/asm/coldfire/crossbar.h
diff --git a/include/asm-m68k/coldfire/dspi.h b/arch/m68k/include/asm/coldfire/dspi.h
index 02d1409610..02d1409610 100644
--- a/include/asm-m68k/coldfire/dspi.h
+++ b/arch/m68k/include/asm/coldfire/dspi.h
diff --git a/include/asm-m68k/coldfire/edma.h b/arch/m68k/include/asm/coldfire/edma.h
index c88aea6cee..c88aea6cee 100644
--- a/include/asm-m68k/coldfire/edma.h
+++ b/arch/m68k/include/asm/coldfire/edma.h
diff --git a/include/asm-m68k/coldfire/eport.h b/arch/m68k/include/asm/coldfire/eport.h
index 1d1bf63310..1d1bf63310 100644
--- a/include/asm-m68k/coldfire/eport.h
+++ b/arch/m68k/include/asm/coldfire/eport.h
diff --git a/include/asm-m68k/coldfire/flexbus.h b/arch/m68k/include/asm/coldfire/flexbus.h
index 51cbbd8b2b..51cbbd8b2b 100644
--- a/include/asm-m68k/coldfire/flexbus.h
+++ b/arch/m68k/include/asm/coldfire/flexbus.h
diff --git a/include/asm-m68k/coldfire/flexcan.h b/arch/m68k/include/asm/coldfire/flexcan.h
index cafd44ff49..cafd44ff49 100644
--- a/include/asm-m68k/coldfire/flexcan.h
+++ b/arch/m68k/include/asm/coldfire/flexcan.h
diff --git a/include/asm-m68k/coldfire/intctrl.h b/arch/m68k/include/asm/coldfire/intctrl.h
index ae82b292b1..ae82b292b1 100644
--- a/include/asm-m68k/coldfire/intctrl.h
+++ b/arch/m68k/include/asm/coldfire/intctrl.h
diff --git a/include/asm-m68k/coldfire/lcd.h b/arch/m68k/include/asm/coldfire/lcd.h
index 66b95b3823..66b95b3823 100644
--- a/include/asm-m68k/coldfire/lcd.h
+++ b/arch/m68k/include/asm/coldfire/lcd.h
diff --git a/include/asm-m68k/coldfire/mdha.h b/arch/m68k/include/asm/coldfire/mdha.h
index b698136371..b698136371 100644
--- a/include/asm-m68k/coldfire/mdha.h
+++ b/arch/m68k/include/asm/coldfire/mdha.h
diff --git a/include/asm-m68k/coldfire/pwm.h b/arch/m68k/include/asm/coldfire/pwm.h
index f737d98c1f..f737d98c1f 100644
--- a/include/asm-m68k/coldfire/pwm.h
+++ b/arch/m68k/include/asm/coldfire/pwm.h
diff --git a/include/asm-m68k/coldfire/qspi.h b/arch/m68k/include/asm/coldfire/qspi.h
index 8bcd2e4db1..8bcd2e4db1 100644
--- a/include/asm-m68k/coldfire/qspi.h
+++ b/arch/m68k/include/asm/coldfire/qspi.h
diff --git a/include/asm-m68k/coldfire/rng.h b/arch/m68k/include/asm/coldfire/rng.h
index 1eefc56bd4..1eefc56bd4 100644
--- a/include/asm-m68k/coldfire/rng.h
+++ b/arch/m68k/include/asm/coldfire/rng.h
diff --git a/include/asm-m68k/coldfire/skha.h b/arch/m68k/include/asm/coldfire/skha.h
index bd6b5af04b..bd6b5af04b 100644
--- a/include/asm-m68k/coldfire/skha.h
+++ b/arch/m68k/include/asm/coldfire/skha.h
diff --git a/include/asm-m68k/coldfire/ssi.h b/arch/m68k/include/asm/coldfire/ssi.h
index b3dfbfab6b..b3dfbfab6b 100644
--- a/include/asm-m68k/coldfire/ssi.h
+++ b/arch/m68k/include/asm/coldfire/ssi.h
diff --git a/include/asm-m68k/config.h b/arch/m68k/include/asm/config.h
index 36438be112..36438be112 100644
--- a/include/asm-m68k/config.h
+++ b/arch/m68k/include/asm/config.h
diff --git a/include/asm-m68k/errno.h b/arch/m68k/include/asm/errno.h
index 4c82b503d9..4c82b503d9 100644
--- a/include/asm-m68k/errno.h
+++ b/arch/m68k/include/asm/errno.h
diff --git a/include/asm-m68k/fec.h b/arch/m68k/include/asm/fec.h
index 49311e596f..49311e596f 100644
--- a/include/asm-m68k/fec.h
+++ b/arch/m68k/include/asm/fec.h
diff --git a/include/asm-m68k/fsl_i2c.h b/arch/m68k/include/asm/fsl_i2c.h
index 2bc9bf434e..2bc9bf434e 100644
--- a/include/asm-m68k/fsl_i2c.h
+++ b/arch/m68k/include/asm/fsl_i2c.h
diff --git a/include/asm-m68k/fsl_mcdmafec.h b/arch/m68k/include/asm/fsl_mcdmafec.h
index 7e540567aa..7e540567aa 100644
--- a/include/asm-m68k/fsl_mcdmafec.h
+++ b/arch/m68k/include/asm/fsl_mcdmafec.h
diff --git a/include/asm-m68k/global_data.h b/arch/m68k/include/asm/global_data.h
index 413c200023..413c200023 100644
--- a/include/asm-m68k/global_data.h
+++ b/arch/m68k/include/asm/global_data.h
diff --git a/include/asm-m68k/immap.h b/arch/m68k/include/asm/immap.h
index e83ce08d57..e83ce08d57 100644
--- a/include/asm-m68k/immap.h
+++ b/arch/m68k/include/asm/immap.h
diff --git a/include/asm-m68k/immap_520x.h b/arch/m68k/include/asm/immap_520x.h
index 08bc1090ce..08bc1090ce 100644
--- a/include/asm-m68k/immap_520x.h
+++ b/arch/m68k/include/asm/immap_520x.h
diff --git a/include/asm-m68k/immap_5227x.h b/arch/m68k/include/asm/immap_5227x.h
index 6f65f50307..6f65f50307 100644
--- a/include/asm-m68k/immap_5227x.h
+++ b/arch/m68k/include/asm/immap_5227x.h
diff --git a/include/asm-m68k/immap_5235.h b/arch/m68k/include/asm/immap_5235.h
index f7f35fcb9f..f7f35fcb9f 100644
--- a/include/asm-m68k/immap_5235.h
+++ b/arch/m68k/include/asm/immap_5235.h
diff --git a/include/asm-m68k/immap_5249.h b/arch/m68k/include/asm/immap_5249.h
index 02420869e8..02420869e8 100644
--- a/include/asm-m68k/immap_5249.h
+++ b/arch/m68k/include/asm/immap_5249.h
diff --git a/include/asm-m68k/immap_5253.h b/arch/m68k/include/asm/immap_5253.h
index b5a4cb54a7..28cd107a82 100644
--- a/include/asm-m68k/immap_5253.h
+++ b/arch/m68k/include/asm/immap_5253.h
@@ -37,6 +37,7 @@
 #define MMAP_CAN0		(CONFIG_SYS_MBAR + 0x00010000)
 #define MMAP_CAN1		(CONFIG_SYS_MBAR + 0x00011000)
 
+#define MMAP_PAR		(CONFIG_SYS_MBAR2 + 0x0000019C)
 #define MMAP_I2C1		(CONFIG_SYS_MBAR2 + 0x00000440)
 #define MMAP_UART2		(CONFIG_SYS_MBAR2 + 0x00000C00)
 
diff --git a/include/asm-m68k/immap_5271.h b/arch/m68k/include/asm/immap_5271.h
index 8ddec5c566..8ddec5c566 100644
--- a/include/asm-m68k/immap_5271.h
+++ b/arch/m68k/include/asm/immap_5271.h
diff --git a/include/asm-m68k/immap_5272.h b/arch/m68k/include/asm/immap_5272.h
index 8d4254bcdb..8d4254bcdb 100644
--- a/include/asm-m68k/immap_5272.h
+++ b/arch/m68k/include/asm/immap_5272.h
diff --git a/include/asm-m68k/immap_5275.h b/arch/m68k/include/asm/immap_5275.h
index 46426a33d6..46426a33d6 100644
--- a/include/asm-m68k/immap_5275.h
+++ b/arch/m68k/include/asm/immap_5275.h
diff --git a/include/asm-m68k/immap_5282.h b/arch/m68k/include/asm/immap_5282.h
index dd526a1198..dd526a1198 100644
--- a/include/asm-m68k/immap_5282.h
+++ b/arch/m68k/include/asm/immap_5282.h
diff --git a/include/asm-m68k/immap_5301x.h b/arch/m68k/include/asm/immap_5301x.h
index 87ac770cf8..87ac770cf8 100644
--- a/include/asm-m68k/immap_5301x.h
+++ b/arch/m68k/include/asm/immap_5301x.h
diff --git a/include/asm-m68k/immap_5329.h b/arch/m68k/include/asm/immap_5329.h
index 4f255c6a30..4f255c6a30 100644
--- a/include/asm-m68k/immap_5329.h
+++ b/arch/m68k/include/asm/immap_5329.h
diff --git a/include/asm-m68k/immap_5445x.h b/arch/m68k/include/asm/immap_5445x.h
index 57cf3ec7da..57cf3ec7da 100644
--- a/include/asm-m68k/immap_5445x.h
+++ b/arch/m68k/include/asm/immap_5445x.h
diff --git a/include/asm-m68k/immap_547x_8x.h b/arch/m68k/include/asm/immap_547x_8x.h
index 50f8b05d98..50f8b05d98 100644
--- a/include/asm-m68k/immap_547x_8x.h
+++ b/arch/m68k/include/asm/immap_547x_8x.h
diff --git a/include/asm-m68k/io.h b/arch/m68k/include/asm/io.h
index 531f420336..531f420336 100644
--- a/include/asm-m68k/io.h
+++ b/arch/m68k/include/asm/io.h
diff --git a/include/asm-m68k/m520x.h b/arch/m68k/include/asm/m520x.h
index 267bfd994a..71f147e751 100644
--- a/include/asm-m68k/m520x.h
+++ b/arch/m68k/include/asm/m520x.h
@@ -70,7 +70,6 @@
 #define PACR_TP	1
 
 #define SCM_BMT_BME			(0x00000008)
-#define SCM_BMT_BMT_MASK		(0x07)
 #define SCM_BMT_BMT(x)			((x) & 0x07)
 #define SCM_BMT_BMT1024			(0x0000)
 #define SCM_BMT_BMT512			(0x0001)
@@ -179,7 +178,7 @@
 #define CCM_CCR_PLL_MODE		(0x0002)
 #define CCM_CCR_RESERVED		(0x0001)
 
-#define CCM_CIR_PIN(x)			(((x) & 0x03FF) << 6)
+#define CCM_CIR_PIN(x)			(((x) & 0xFFC0) >> 6)
 #define CCM_CIR_PRN(x)			((x) & 0x003F)
 
 /* *** General Purpose I/O (GPIO) *** */
@@ -196,7 +195,7 @@
 #define GPIO_PAR_FBCTL_OE		(0x10)
 #define GPIO_PAR_FBCTL_TA		(0x08)
 #define GPIO_PAR_FBCTL_RWB		(0x04)
-#define GPIO_PAR_FBCTL_TS_MASK		(0xFC)
+#define GPIO_PAR_FBCTL_TS_UNMASK	(0xFC)
 #define GPIO_PAR_FBCTL_TS_TS		(0x03)
 #define GPIO_PAR_FBCTL_TS_DMA		(0x02)
 
@@ -207,39 +206,39 @@
 
 #define GPIO_PAR_CS3			(0x08)
 #define GPIO_PAR_CS2			(0x04)
-#define GPIO_PAR_CS1_MASK		(0xFC)
+#define GPIO_PAR_CS1_UNMASK		(0xFC)
 #define GPIO_PAR_CS1_CS1		(0x03)
 #define GPIO_PAR_CS1_SDCS1		(0x02)
 
-#define GPIO_PAR_FECI2C_RMII_MASK	(0x0F)
-#define GPIO_PAR_FECI2C_MDC_MASK	(0x3F)
+#define GPIO_PAR_FECI2C_RMII_UNMASK	(0x0F)
+#define GPIO_PAR_FECI2C_MDC_UNMASK	(0x3F)
 #define GPIO_PAR_FECI2C_MDC_MDC		(0xC0)
 #define GPIO_PAR_FECI2C_MDC_SCL		(0x80)
 #define GPIO_PAR_FECI2C_MDC_U2TXD	(0x40)
-#define GPIO_PAR_FECI2C_MDIO_MASK	(0xCF)
+#define GPIO_PAR_FECI2C_MDIO_UNMASK	(0xCF)
 #define GPIO_PAR_FECI2C_MDIO_MDIO	(0x30)
 #define GPIO_PAR_FECI2C_MDIO_SDA	(0x20)
 #define GPIO_PAR_FECI2C_MDIO_U2RXD	(0x10)
-#define GPIO_PAR_FECI2C_I2C_MASK	(0xF0)
-#define GPIO_PAR_FECI2C_SCL_MASK	(0xF3)
+#define GPIO_PAR_FECI2C_I2C_UNMASK	(0xF0)
+#define GPIO_PAR_FECI2C_SCL_UNMASK	(0xF3)
 #define GPIO_PAR_FECI2C_SCL_SCL		(0x0C)
 #define GPIO_PAR_FECI2C_SCL_U2RXD	(0x04)
-#define GPIO_PAR_FECI2C_SDA_MASK	(0xFC)
+#define GPIO_PAR_FECI2C_SDA_UNMASK	(0xFC)
 #define GPIO_PAR_FECI2C_SDA_SDA		(0x03)
 #define GPIO_PAR_FECI2C_SDA_U2TXD	(0x01)
 
-#define GPIO_PAR_QSPI_PCS2_MASK		(0x3F)
+#define GPIO_PAR_QSPI_PCS2_UNMASK	(0x3F)
 #define GPIO_PAR_QSPI_PCS2_PCS2		(0xC0)
 #define GPIO_PAR_QSPI_PCS2_DACK0	(0x80)
 #define GPIO_PAR_QSPI_PCS2_U2RTS	(0x40)
-#define GPIO_PAR_QSPI_DIN_MASK		(0xCF)
+#define GPIO_PAR_QSPI_DIN_UNMASK	(0xCF)
 #define GPIO_PAR_QSPI_DIN_DIN		(0x30)
 #define GPIO_PAR_QSPI_DIN_DREQ0		(0x20)
 #define GPIO_PAR_QSPI_DIN_U2CTS		(0x10)
-#define GPIO_PAR_QSPI_DOUT_MASK		(0xF3)
+#define GPIO_PAR_QSPI_DOUT_UNMASK	(0xF3)
 #define GPIO_PAR_QSPI_DOUT_DOUT		(0x0C)
 #define GPIO_PAR_QSPI_DOUT_SDA		(0x08)
-#define GPIO_PAR_QSPI_SCK_MASK		(0xFC)
+#define GPIO_PAR_QSPI_SCK_UNMASK	(0xFC)
 #define GPIO_PAR_QSPI_SCK_SCK		(0x03)
 #define GPIO_PAR_QSPI_SCK_SCL		(0x02)
 
@@ -247,50 +246,50 @@
 #define GPIO_PAR_TMR_TIN2(x)		(((x) & 0x03) << 4)
 #define GPIO_PAR_TMR_TIN1(x)		(((x) & 0x03) << 2)
 #define GPIO_PAR_TMR_TIN0(x)		((x) & 0x03)
-#define GPIO_PAR_TMR_TIN3_MASK		(0x3F)
+#define GPIO_PAR_TMR_TIN3_UNMASK	(0x3F)
 #define GPIO_PAR_TMR_TIN3_TIN3		(0xC0)
 #define GPIO_PAR_TMR_TIN3_TOUT3		(0x80)
 #define GPIO_PAR_TMR_TIN3_U2CTS		(0x40)
-#define GPIO_PAR_TMR_TIN2_MASK		(0xCF)
+#define GPIO_PAR_TMR_TIN2_UNMASK	(0xCF)
 #define GPIO_PAR_TMR_TIN2_TIN2		(0x30)
 #define GPIO_PAR_TMR_TIN2_TOUT2		(0x20)
 #define GPIO_PAR_TMR_TIN2_U2RTS		(0x10)
-#define GPIO_PAR_TMR_TIN1_MASK		(0xF3)
+#define GPIO_PAR_TMR_TIN1_UNMASK	(0xF3)
 #define GPIO_PAR_TMR_TIN1_TIN1		(0x0C)
 #define GPIO_PAR_TMR_TIN1_TOUT1		(0x08)
 #define GPIO_PAR_TMR_TIN1_U2RXD		(0x04)
-#define GPIO_PAR_TMR_TIN0_MASK		(0xFC)
+#define GPIO_PAR_TMR_TIN0_UNMASK	(0xFC)
 #define GPIO_PAR_TMR_TIN0_TIN0		(0x03)
 #define GPIO_PAR_TMR_TIN0_TOUT0		(0x02)
 #define GPIO_PAR_TMR_TIN0_U2TXD		(0x01)
 
-#define GPIO_PAR_UART1_MASK		(0xF03F)
-#define GPIO_PAR_UART0_MASK		(0xFFC0)
-#define GPIO_PAR_UART_U1CTS_MASK	(0xF3FF)
+#define GPIO_PAR_UART1_UNMASK		(0xF03F)
+#define GPIO_PAR_UART0_UNMASK		(0xFFC0)
+#define GPIO_PAR_UART_U1CTS_UNMASK	(0xF3FF)
 #define GPIO_PAR_UART_U1CTS_U1CTS	(0x0C00)
 #define GPIO_PAR_UART_U1CTS_TIN1	(0x0800)
 #define GPIO_PAR_UART_U1CTS_PCS1	(0x0400)
-#define GPIO_PAR_UART_U1RTS_MASK	(0xFCFF)
+#define GPIO_PAR_UART_U1RTS_UNMASK	(0xFCFF)
 #define GPIO_PAR_UART_U1RTS_U1RTS	(0x0300)
 #define GPIO_PAR_UART_U1RTS_TOUT1	(0x0200)
 #define GPIO_PAR_UART_U1RTS_PCS1	(0x0100)
 #define GPIO_PAR_UART_U1TXD		(0x0080)
 #define GPIO_PAR_UART_U1RXD		(0x0040)
-#define GPIO_PAR_UART_U0CTS_MASK	(0xFFCF)
+#define GPIO_PAR_UART_U0CTS_UNMASK	(0xFFCF)
 #define GPIO_PAR_UART_U0CTS_U0CTS	(0x0030)
 #define GPIO_PAR_UART_U0CTS_TIN0	(0x0020)
 #define GPIO_PAR_UART_U0CTS_PCS0	(0x0010)
-#define GPIO_PAR_UART_U0RTS_MASK	(0xFFF3)
+#define GPIO_PAR_UART_U0RTS_UNMASK	(0xFFF3)
 #define GPIO_PAR_UART_U0RTS_U0RTS	(0x000C)
 #define GPIO_PAR_UART_U0RTS_TOUT0	(0x0008)
 #define GPIO_PAR_UART_U0RTS_PCS0	(0x0004)
 #define GPIO_PAR_UART_U0TXD		(0x0002)
 #define GPIO_PAR_UART_U0RXD		(0x0001)
 
-#define GPIO_PAR_FEC_7W_MASK		(0xF3)
+#define GPIO_PAR_FEC_7W_UNMASK		(0xF3)
 #define GPIO_PAR_FEC_7W_FEC		(0x0C)
 #define GPIO_PAR_FEC_7W_U1RTS		(0x04)
-#define GPIO_PAR_FEC_MII_MASK		(0xFC)
+#define GPIO_PAR_FEC_MII_UNMASK		(0xFC)
 #define GPIO_PAR_FEC_MII_FEC		(0x03)
 #define GPIO_PAR_FEC_MII_UnCTS		(0x01)
 
@@ -300,17 +299,17 @@
 #define GPIO_MSCR_FB_DUP(x)		(((x) & 0x03) << 4)
 #define GPIO_MSCR_FB_DLO(x)		(((x) & 0x03) << 2)
 #define GPIO_MSCR_FB_ADRCTL(x)		((x) & 0x03)
-#define GPIO_MSCR_FB_FBCLK_MASK		(0x3F)
-#define GPIO_MSCR_FB_DUP_MASK		(0xCF)
-#define GPIO_MSCR_FB_DLO_MASK		(0xF3)
-#define GPIO_MSCR_FB_ADRCTL_MASK	(0xFC)
+#define GPIO_MSCR_FB_FBCLK_UNMASK	(0x3F)
+#define GPIO_MSCR_FB_DUP_UNMASK		(0xCF)
+#define GPIO_MSCR_FB_DLO_UNMASK		(0xF3)
+#define GPIO_MSCR_FB_ADRCTL_UNMASK	(0xFC)
 
 #define GPIO_MSCR_SDR_SDCLKB(x)		(((x) & 0x03) << 4)
 #define GPIO_MSCR_SDR_SDCLK(x)		(((x) & 0x03) << 2)
 #define GPIO_MSCR_SDR_SDRAM(x)		((x) & 0x03)
-#define GPIO_MSCR_SDR_SDCLKB_MASK	(0xCF)
-#define GPIO_MSCR_SDR_SDCLK_MASK	(0xF3)
-#define GPIO_MSCR_SDR_SDRAM_MASK	(0xFC)
+#define GPIO_MSCR_SDR_SDCLKB_UNMASK	(0xCF)
+#define GPIO_MSCR_SDR_SDCLK_UNMASK	(0xF3)
+#define GPIO_MSCR_SDR_SDRAM_UNMASK	(0xFC)
 
 #define MSCR_25VDDR			(0x03)
 #define MSCR_18VDDR_FULL		(0x02)
@@ -318,27 +317,27 @@
 #define MSCR_18VDDR_HALF		(0x00)
 
 #define GPIO_DSCR_I2C(x)		((x) & 0x03)
-#define GPIO_DSCR_I2C_MASK		(0xFC)
+#define GPIO_DSCR_I2C_UNMASK		(0xFC)
 
 #define GPIO_DSCR_MISC_DBG(x)		(((x) & 0x03) << 4)
-#define GPIO_DSCR_MISC_DBG_MASK		(0xCF)
+#define GPIO_DSCR_MISC_DBG_UNMASK	(0xCF)
 #define GPIO_DSCR_MISC_RSTOUT(x)	(((x) & 0x03) << 2)
-#define GPIO_DSCR_MISC_RSTOUT_MASK	(0xF3)
+#define GPIO_DSCR_MISC_RSTOUT_UNMASK	(0xF3)
 #define GPIO_DSCR_MISC_TIMER(x)		((x) & 0x03)
-#define GPIO_DSCR_MISC_TIMER_MASK	(0xFC)
+#define GPIO_DSCR_MISC_TIMER_UNMASK	(0xFC)
 
 #define GPIO_DSCR_FEC(x)		((x) & 0x03)
-#define GPIO_DSCR_FEC_MASK		(0xFC)
+#define GPIO_DSCR_FEC_UNMASK		(0xFC)
 
 #define GPIO_DSCR_UART_UART1(x)		(((x) & 0x03) << 4)
-#define GPIO_DSCR_UART_UART1_MASK	(0xCF)
+#define GPIO_DSCR_UART_UART1_UNMASK	(0xCF)
 #define GPIO_DSCR_UART_UART0(x)		(((x) & 0x03) << 2)
-#define GPIO_DSCR_UART_UART0_MASK	(0xF3)
+#define GPIO_DSCR_UART_UART0_UNMASK	(0xF3)
 #define GPIO_DSCR_UART_IRQ(x)		((x) & 0x03)
-#define GPIO_DSCR_UART_IRQ_MASK		(0xFC)
+#define GPIO_DSCR_UART_IRQ_UNMASK	(0xFC)
 
 #define GPIO_DSCR_QSPI(x)		((x) & 0x03)
-#define GPIO_DSCR_QSPI_MASK		(0xFC)
+#define GPIO_DSCR_QSPI_UNMASK		(0xFC)
 
 #define DSCR_50PF			(0x03)
 #define DSCR_30PF			(0x02)
@@ -347,12 +346,12 @@
 
 /* *** Phase Locked Loop (PLL) *** */
 #define PLL_PODR_CPUDIV(x)		(((x) & 0x0F) << 4)
-#define PLL_PODR_CPUDIV_MASK		(0x0F)
+#define PLL_PODR_CPUDIV_UNMASK		(0x0F)
 #define PLL_PODR_BUSDIV(x)		((x) & 0x0F)
-#define PLL_PODR_BUSDIV_MASK		(0xF0)
+#define PLL_PODR_BUSDIV_UNMASK		(0xF0)
 
 #define PLL_PCR_DITHEN			(0x80)
 #define PLL_PCR_DITHDEV(x)		((x) & 0x07)
-#define PLL_PCR_DITHDEV_MASK		(0xF8)
+#define PLL_PCR_DITHDEV_UNMASK		(0xF8)
 
 #endif				/* __M520X__ */
diff --git a/include/asm-m68k/m5227x.h b/arch/m68k/include/asm/m5227x.h
index 824d333114..c77d5dd657 100644
--- a/include/asm-m68k/m5227x.h
+++ b/arch/m68k/include/asm/m5227x.h
@@ -117,36 +117,34 @@
 
 /* Bit definitions and macros for CCR */
 #define CCM_CCR_DRAMSEL			(0x0100)
-#define CCM_CCR_CSC_MASK		(0xFF3F)
+#define CCM_CCR_CSC_UNMASK		(0xFF3F)
 #define CCM_CCR_CSC_FBCS5_CS4		(0x00C0)
 #define CCM_CCR_CSC_FBCS5_A22		(0x0080)
 #define CCM_CCR_CSC_FB_A23_A22		(0x0040)
 #define CCM_CCR_LIMP			(0x0020)
 #define CCM_CCR_LOAD			(0x0010)
-#define CCM_CCR_BOOTPS_MASK		(0xFFF3)
+#define CCM_CCR_BOOTPS_UNMASK		(0xFFF3)
 #define CCM_CCR_BOOTPS_PS16		(0x0008)
 #define CCM_CCR_BOOTPS_PS8		(0x0004)
 #define CCM_CCR_BOOTPS_PS32		(0x0000)
 #define CCM_CCR_OSCMODE_OSCBYPASS	(0x0002)
 
 /* Bit definitions and macros for RCON */
-#define CCM_RCON_CSC_MASK		(0xFF3F)
+#define CCM_RCON_CSC_UNMASK		(0xFF3F)
 #define CCM_RCON_CSC_FBCS5_CS4		(0x00C0)
 #define CCM_RCON_CSC_FBCS5_A22		(0x0080)
 #define CCM_RCON_CSC_FB_A23_A22		(0x0040)
 #define CCM_RCON_LIMP			(0x0020)
 #define CCM_RCON_LOAD			(0x0010)
-#define CCM_RCON_BOOTPS_MASK		(0xFFF3)
+#define CCM_RCON_BOOTPS_UNMASK		(0xFFF3)
 #define CCM_RCON_BOOTPS_PS16		(0x0008)
 #define CCM_RCON_BOOTPS_PS8		(0x0004)
 #define CCM_RCON_BOOTPS_PS32		(0x0000)
 #define CCM_RCON_OSCMODE_OSCBYPASS	(0x0002)
 
 /* Bit definitions and macros for CIR */
-#define CCM_CIR_PRN(x)			(((x)&0x003F))	/* Part revision number */
-#define CCM_CIR_PIN(x)			(((x)&0x03FF)<<6)	/* Part identification number */
-#define CCM_CIR_PIN_MASK		(0xFFC0)
-#define CCM_CIR_PRN_MASK		(0x003F)
+#define CCM_CIR_PIN(x)			(((x) & 0xFFC0) >> 6)
+#define CCM_CIR_PRN(x)			((x) & 0x003F)
 #define CCM_CIR_PIN_MCF52277		(0x0000)
 
 /* Bit definitions and macros for MISCCR */
@@ -195,7 +193,7 @@
 * General Purpose I/O Module (GPIO)
 *********************************************************************/
 /* Bit definitions and macros for PAR_BE */
-#define GPIO_PAR_BE_MASK		(0x0F)
+#define GPIO_PAR_BE_UNMASK		(0x0F)
 #define GPIO_PAR_BE_BE3_BE3		(0x08)
 #define GPIO_PAR_BE_BE3_GPIO		(0x00)
 #define GPIO_PAR_BE_BE2_BE2		(0x04)
@@ -217,111 +215,111 @@
 #define GPIO_PAR_FBCTL_OE		(0x80)
 #define GPIO_PAR_FBCTL_TA		(0x40)
 #define GPIO_PAR_FBCTL_RW		(0x20)
-#define GPIO_PAR_FBCTL_TS_MASK		(0xE7)
+#define GPIO_PAR_FBCTL_TS_UNMASK	(0xE7)
 #define GPIO_PAR_FBCTL_TS_FBTS		(0x18)
 #define GPIO_PAR_FBCTL_TS_DMAACK	(0x10)
 #define GPIO_PAR_FBCTL_TS_GPIO		(0x00)
 
 /* Bit definitions and macros for PAR_FECI2C */
-#define GPIO_PAR_I2C_SCL_MASK		(0xF3)
+#define GPIO_PAR_I2C_SCL_UNMASK		(0xF3)
 #define GPIO_PAR_I2C_SCL_SCL		(0x0C)
 #define GPIO_PAR_I2C_SCL_CANTXD		(0x08)
 #define GPIO_PAR_I2C_SCL_U2TXD		(0x04)
 #define GPIO_PAR_I2C_SCL_GPIO		(0x00)
 
-#define GPIO_PAR_I2C_SDA_MASK		(0xFC)
+#define GPIO_PAR_I2C_SDA_UNMASK		(0xFC)
 #define GPIO_PAR_I2C_SDA_SDA		(0x03)
 #define GPIO_PAR_I2C_SDA_CANRXD		(0x02)
 #define GPIO_PAR_I2C_SDA_U2RXD		(0x01)
 #define GPIO_PAR_I2C_SDA_GPIO		(0x00)
 
 /* Bit definitions and macros for PAR_UART */
-#define GPIO_PAR_UART_U1CTS_MASK	(0x3FFF)
+#define GPIO_PAR_UART_U1CTS_UNMASK	(0x3FFF)
 #define GPIO_PAR_UART_U1CTS_U1CTS	(0xC000)
 #define GPIO_PAR_UART_U1CTS_SSIBCLK	(0x8000)
 #define GPIO_PAR_UART_U1CTS_LCDCLS	(0x4000)
 #define GPIO_PAR_UART_U1CTS_GPIO	(0x0000)
 
-#define GPIO_PAR_UART_U1RTS_MASK	(0xCFFF)
+#define GPIO_PAR_UART_U1RTS_UNMASK	(0xCFFF)
 #define GPIO_PAR_UART_U1RTS_U1RTS	(0x3000)
 #define GPIO_PAR_UART_U1RTS_SSIFS	(0x2000)
 #define GPIO_PAR_UART_U1RTS_LCDPS	(0x1000)
 #define GPIO_PAR_UART_U1RTS_GPIO	(0x0000)
 
-#define GPIO_PAR_UART_U1RXD_MASK	(0xF3FF)
+#define GPIO_PAR_UART_U1RXD_UNMASK	(0xF3FF)
 #define GPIO_PAR_UART_U1RXD_U1RXD	(0x0C00)
 #define GPIO_PAR_UART_U1RXD_SSIRXD	(0x0800)
 #define GPIO_PAR_UART_U1RXD_GPIO	(0x0000)
 
-#define GPIO_PAR_UART_U1TXD_MASK	(0xFCFF)
+#define GPIO_PAR_UART_U1TXD_UNMASK	(0xFCFF)
 #define GPIO_PAR_UART_U1TXD_U1TXD	(0x0300)
 #define GPIO_PAR_UART_U1TXD_SSITXD	(0x0200)
 #define GPIO_PAR_UART_U1TXD_GPIO	(0x0000)
 
-#define GPIO_PAR_UART_U0CTS_MASK	(0xFF3F)
+#define GPIO_PAR_UART_U0CTS_UNMASK	(0xFF3F)
 #define GPIO_PAR_UART_U0CTS_U0CTS	(0x00C0)
 #define GPIO_PAR_UART_U0CTS_T1OUT	(0x0080)
 #define GPIO_PAR_UART_U0CTS_USBVBUSEN	(0x0040)
 #define GPIO_PAR_UART_U0CTS_GPIO	(0x0000)
 
-#define GPIO_PAR_UART_U0RTS_MASK	(0xFFCF)
+#define GPIO_PAR_UART_U0RTS_UNMASK	(0xFFCF)
 #define GPIO_PAR_UART_U0RTS_U0RTS	(0x0030)
 #define GPIO_PAR_UART_U0RTS_T1IN	(0x0020)
 #define GPIO_PAR_UART_U0RTS_USBVBUSOC	(0x0010)
 #define GPIO_PAR_UART_U0RTS_GPIO	(0x0000)
 
-#define GPIO_PAR_UART_U0RXD_MASK	(0xFFF3)
+#define GPIO_PAR_UART_U0RXD_UNMASK	(0xFFF3)
 #define GPIO_PAR_UART_U0RXD_U0RXD	(0x000C)
 #define GPIO_PAR_UART_U0RXD_CANRX	(0x0008)
 #define GPIO_PAR_UART_U0RXD_GPIO	(0x0000)
 
-#define GPIO_PAR_UART_U0TXD_MASK	(0xFFFC)
+#define GPIO_PAR_UART_U0TXD_UNMASK	(0xFFFC)
 #define GPIO_PAR_UART_U0TXD_U0TXD	(0x0003)
 #define GPIO_PAR_UART_U0TXD_CANTX	(0x0002)
 #define GPIO_PAR_UART_U0TXD_GPIO	(0x0000)
 
 /* Bit definitions and macros for PAR_DSPI */
-#define GPIO_PAR_DSPI_PCS0_MASK		(0x3F)
+#define GPIO_PAR_DSPI_PCS0_UNMASK	(0x3F)
 #define GPIO_PAR_DSPI_PCS0_PCS0		(0xC0)
 #define GPIO_PAR_DSPI_PCS0_U2RTS	(0x80)
 #define GPIO_PAR_DSPI_PCS0_GPIO		(0x00)
-#define GPIO_PAR_DSPI_SIN_MASK		(0xCF)
+#define GPIO_PAR_DSPI_SIN_UNMASK	(0xCF)
 #define GPIO_PAR_DSPI_SIN_SIN		(0x30)
 #define GPIO_PAR_DSPI_SIN_U2RXD		(0x20)
 #define GPIO_PAR_DSPI_SIN_GPIO		(0x00)
-#define GPIO_PAR_DSPI_SOUT_MASK		(0xF3)
+#define GPIO_PAR_DSPI_SOUT_UNMASK	(0xF3)
 #define GPIO_PAR_DSPI_SOUT_SOUT		(0x0C)
 #define GPIO_PAR_DSPI_SOUT_U2TXD	(0x08)
 #define GPIO_PAR_DSPI_SOUT_GPIO		(0x00)
-#define GPIO_PAR_DSPI_SCK_MASK		(0xFC)
+#define GPIO_PAR_DSPI_SCK_UNMASK	(0xFC)
 #define GPIO_PAR_DSPI_SCK_SCK		(0x03)
 #define GPIO_PAR_DSPI_SCK_U2CTS		(0x02)
 #define GPIO_PAR_DSPI_SCK_GPIO		(0x00)
 
 /* Bit definitions and macros for PAR_TIMER */
-#define GPIO_PAR_TIMER_T3IN_MASK	(0x3F)
+#define GPIO_PAR_TIMER_T3IN_UNMASK	(0x3F)
 #define GPIO_PAR_TIMER_T3IN_T3IN	(0xC0)
 #define GPIO_PAR_TIMER_T3IN_T3OUT	(0x80)
 #define GPIO_PAR_TIMER_T3IN_SSIMCLK	(0x40)
 #define GPIO_PAR_TIMER_T3IN_GPIO	(0x00)
-#define GPIO_PAR_TIMER_T2IN_MASK	(0xCF)
+#define GPIO_PAR_TIMER_T2IN_UNMASK	(0xCF)
 #define GPIO_PAR_TIMER_T2IN_T2IN	(0x30)
 #define GPIO_PAR_TIMER_T2IN_T2OUT	(0x20)
 #define GPIO_PAR_TIMER_T2IN_DSPIPCS2	(0x10)
 #define GPIO_PAR_TIMER_T2IN_GPIO	(0x00)
-#define GPIO_PAR_TIMER_T1IN_MASK	(0xF3)
+#define GPIO_PAR_TIMER_T1IN_UNMASK	(0xF3)
 #define GPIO_PAR_TIMER_T1IN_T1IN	(0x0C)
 #define GPIO_PAR_TIMER_T1IN_T1OUT	(0x08)
 #define GPIO_PAR_TIMER_T1IN_LCDCONTRAST	(0x04)
 #define GPIO_PAR_TIMER_T1IN_GPIO	(0x00)
-#define GPIO_PAR_TIMER_T0IN_MASK	(0xFC)
+#define GPIO_PAR_TIMER_T0IN_UNMASK	(0xFC)
 #define GPIO_PAR_TIMER_T0IN_T0IN	(0x03)
 #define GPIO_PAR_TIMER_T0IN_T0OUT	(0x02)
 #define GPIO_PAR_TIMER_T0IN_LCDREV	(0x01)
 #define GPIO_PAR_TIMER_T0IN_GPIO	(0x00)
 
 /* Bit definitions and macros for GPIO_PAR_LCDCTL */
-#define GPIO_PAR_LCDCTL_ACDOE_MASK	(0xE7)
+#define GPIO_PAR_LCDCTL_ACDOE_UNMASK	(0xE7)
 #define GPIO_PAR_LCDCTL_ACDOE_ACDOE	(0x18)
 #define GPIO_PAR_LCDCTL_ACDOE_SPLSPR	(0x10)
 #define GPIO_PAR_LCDCTL_ACDOE_GPIO	(0x00)
@@ -330,141 +328,141 @@
 #define GPIO_PAR_LCDCTL_LSCLK		(0x01)
 
 /* Bit definitions and macros for PAR_IRQ */
-#define GPIO_PAR_IRQ_IRQ4_MASK		(0xF3)
+#define GPIO_PAR_IRQ_IRQ4_UNMASK	(0xF3)
 #define GPIO_PAR_IRQ_IRQ4_SSIINPCLK	(0x0C)
 #define GPIO_PAR_IRQ_IRQ4_DMAREQ0	(0x08)
 #define GPIO_PAR_IRQ_IRQ4_GPIO		(0x00)
-#define GPIO_PAR_IRQ_IRQ1_MASK		(0xFC)
+#define GPIO_PAR_IRQ_IRQ1_UNMASK	(0xFC)
 #define GPIO_PAR_IRQ_IRQ1_PCIINT	(0x03)
 #define GPIO_PAR_IRQ_IRQ1_USBCLKIN	(0x02)
 #define GPIO_PAR_IRQ_IRQ1_SSICLKIN	(0x01)
 #define GPIO_PAR_IRQ_IRQ1_GPIO		(0x00)
 
 /* Bit definitions and macros for GPIO_PAR_LCDH */
-#define GPIO_PAR_LCDH_LD17_MASK		(0xFFFFF3FF)
+#define GPIO_PAR_LCDH_LD17_UNMASK	(0xFFFFF3FF)
 #define GPIO_PAR_LCDH_LD17_LD17		(0x00000C00)
 #define GPIO_PAR_LCDH_LD17_LD11		(0x00000800)
 #define GPIO_PAR_LCDH_LD17_GPIO		(0x00000000)
 
-#define GPIO_PAR_LCDH_LD16_MASK		(0xFFFFFCFF)
+#define GPIO_PAR_LCDH_LD16_UNMASK	(0xFFFFFCFF)
 #define GPIO_PAR_LCDH_LD16_LD16		(0x00000300)
 #define GPIO_PAR_LCDH_LD16_LD10		(0x00000200)
 #define GPIO_PAR_LCDH_LD16_GPIO		(0x00000000)
 
-#define GPIO_PAR_LCDH_LD15_MASK		(0xFFFFFF3F)
+#define GPIO_PAR_LCDH_LD15_UNMASK	(0xFFFFFF3F)
 #define GPIO_PAR_LCDH_LD15_LD15		(0x000000C0)
 #define GPIO_PAR_LCDH_LD15_LD9		(0x00000080)
 #define GPIO_PAR_LCDH_LD15_GPIO		(0x00000000)
 
-#define GPIO_PAR_LCDH_LD14_MASK		(0xFFFFFFCF)
+#define GPIO_PAR_LCDH_LD14_UNMASK	(0xFFFFFFCF)
 #define GPIO_PAR_LCDH_LD14_LD14		(0x00000030)
 #define GPIO_PAR_LCDH_LD14_LD8		(0x00000020)
 #define GPIO_PAR_LCDH_LD14_GPIO		(0x00000000)
 
-#define GPIO_PAR_LCDH_LD13_MASK		(0xFFFFFFF3)
+#define GPIO_PAR_LCDH_LD13_UNMASK	(0xFFFFFFF3)
 #define GPIO_PAR_LCDH_LD13_LD13		(0x0000000C)
 #define GPIO_PAR_LCDH_LD13_CANTX	(0x00000008)
 #define GPIO_PAR_LCDH_LD13_GPIO		(0x00000000)
 
-#define GPIO_PAR_LCDH_LD12_MASK		(0xFFFFFFFC)
+#define GPIO_PAR_LCDH_LD12_UNMASK	(0xFFFFFFFC)
 #define GPIO_PAR_LCDH_LD12_LD12		(0x00000003)
 #define GPIO_PAR_LCDH_LD12_CANRX	(0x00000002)
 #define GPIO_PAR_LCDH_LD12_GPIO		(0x00000000)
 
 /* Bit definitions and macros for GPIO_PAR_LCDL */
-#define GPIO_PAR_LCDL_LD11_MASK		(0x3FFFFFFF)
+#define GPIO_PAR_LCDL_LD11_UNMASK	(0x3FFFFFFF)
 #define GPIO_PAR_LCDL_LD11_LD11		(0xC0000000)
 #define GPIO_PAR_LCDL_LD11_LD7		(0x80000000)
 #define GPIO_PAR_LCDL_LD11_GPIO		(0x00000000)
 
-#define GPIO_PAR_LCDL_LD10_MASK		(0xCFFFFFFF)
+#define GPIO_PAR_LCDL_LD10_UNMASK	(0xCFFFFFFF)
 #define GPIO_PAR_LCDL_LD10_LD10		(0x30000000)
 #define GPIO_PAR_LCDL_LD10_LD6		(0x20000000)
 #define GPIO_PAR_LCDL_LD10_GPIO		(0x00000000)
 
-#define GPIO_PAR_LCDL_LD9_MASK		(0xF3FFFFFF)
+#define GPIO_PAR_LCDL_LD9_UNMASK	(0xF3FFFFFF)
 #define GPIO_PAR_LCDL_LD9_LD9		(0x0C000000)
 #define GPIO_PAR_LCDL_LD9_LD5		(0x08000000)
 #define GPIO_PAR_LCDL_LD9_GPIO		(0x00000000)
 
-#define GPIO_PAR_LCDL_LD8_MASK		(0xFCFFFFFF)
+#define GPIO_PAR_LCDL_LD8_UNMASK	(0xFCFFFFFF)
 #define GPIO_PAR_LCDL_LD8_LD8		(0x03000000)
 #define GPIO_PAR_LCDL_LD8_LD4		(0x02000000)
 #define GPIO_PAR_LCDL_LD8_GPIO		(0x00000000)
 
-#define GPIO_PAR_LCDL_LD7_MASK		(0xFF3FFFFF)
+#define GPIO_PAR_LCDL_LD7_UNMASK	(0xFF3FFFFF)
 #define GPIO_PAR_LCDL_LD7_LD7		(0x00C00000)
 #define GPIO_PAR_LCDL_LD7_PWM7		(0x00800000)
 #define GPIO_PAR_LCDL_LD7_GPIO		(0x00000000)
 
-#define GPIO_PAR_LCDL_LD6_MASK		(0xFFCFFFFF)
+#define GPIO_PAR_LCDL_LD6_UNMASK	(0xFFCFFFFF)
 #define GPIO_PAR_LCDL_LD6_LD6		(0x00300000)
 #define GPIO_PAR_LCDL_LD6_PWM5		(0x00200000)
 #define GPIO_PAR_LCDL_LD6_GPIO		(0x00000000)
 
-#define GPIO_PAR_LCDL_LD5_MASK		(0xFFF3FFFF)
+#define GPIO_PAR_LCDL_LD5_UNMASK	(0xFFF3FFFF)
 #define GPIO_PAR_LCDL_LD5_LD5		(0x000C0000)
 #define GPIO_PAR_LCDL_LD5_LD3		(0x00080000)
 #define GPIO_PAR_LCDL_LD5_GPIO		(0x00000000)
 
-#define GPIO_PAR_LCDL_LD4_MASK		(0xFFFCFFFF)
+#define GPIO_PAR_LCDL_LD4_UNMASK	(0xFFFCFFFF)
 #define GPIO_PAR_LCDL_LD4_LD4		(0x00030000)
 #define GPIO_PAR_LCDL_LD4_LD2		(0x00020000)
 #define GPIO_PAR_LCDL_LD4_GPIO		(0x00000000)
 
-#define GPIO_PAR_LCDL_LD3_MASK		(0xFFFF3FFF)
+#define GPIO_PAR_LCDL_LD3_UNMASK	(0xFFFF3FFF)
 #define GPIO_PAR_LCDL_LD3_LD3		(0x0000C000)
 #define GPIO_PAR_LCDL_LD3_LD1		(0x00008000)
 #define GPIO_PAR_LCDL_LD3_GPIO		(0x00000000)
 
-#define GPIO_PAR_LCDL_LD2_MASK		(0xFFFFCFFF)
+#define GPIO_PAR_LCDL_LD2_UNMASK	(0xFFFFCFFF)
 #define GPIO_PAR_LCDL_LD2_LD2		(0x00003000)
 #define GPIO_PAR_LCDL_LD2_LD0		(0x00002000)
 #define GPIO_PAR_LCDL_LD2_GPIO		(0x00000000)
 
-#define GPIO_PAR_LCDL_LD1_MASK		(0xFFFFF3FF)
+#define GPIO_PAR_LCDL_LD1_UNMASK	(0xFFFFF3FF)
 #define GPIO_PAR_LCDL_LD1_LD1		(0x00000C00)
 #define GPIO_PAR_LCDL_LD1_PWM3		(0x00000800)
 #define GPIO_PAR_LCDL_LD1_GPIO		(0x00000000)
 
-#define GPIO_PAR_LCDL_LD0_MASK		(0xFFFFFCFF)
+#define GPIO_PAR_LCDL_LD0_UNMASK	(0xFFFFFCFF)
 #define GPIO_PAR_LCDL_LD0_LD0		(0x00000300)
 #define GPIO_PAR_LCDL_LD0_PWM1		(0x00000200)
 #define GPIO_PAR_LCDL_LD0_GPIO		(0x00000000)
 
 /* Bit definitions and macros for MSCR_FB */
-#define GPIO_MSCR_FB_DUPPER_MASK	(0xCF)
+#define GPIO_MSCR_FB_DUPPER_UNMASK	(0xCF)
 #define GPIO_MSCR_FB_DUPPER_25V_33V	(0x30)
 #define GPIO_MSCR_FB_DUPPER_FULL_18V	(0x20)
 #define GPIO_MSCR_FB_DUPPER_OD		(0x10)
 #define GPIO_MSCR_FB_DUPPER_HALF_18V	(0x00)
 
-#define GPIO_MSCR_FB_DLOWER_MASK	(0xF3)
+#define GPIO_MSCR_FB_DLOWER_UNMASK	(0xF3)
 #define GPIO_MSCR_FB_DLOWER_25V_33V	(0x0C)
 #define GPIO_MSCR_FB_DLOWER_FULL_18V	(0x08)
 #define GPIO_MSCR_FB_DLOWER_OD		(0x04)
 #define GPIO_MSCR_FB_DLOWER_HALF_18V	(0x00)
 
-#define GPIO_MSCR_FB_ADDRCTL_MASK	(0xFC)
+#define GPIO_MSCR_FB_ADDRCTL_UNMASK	(0xFC)
 #define GPIO_MSCR_FB_ADDRCTL_25V_33V	(0x03)
 #define GPIO_MSCR_FB_ADDRCTL_FULL_18V	(0x02)
 #define GPIO_MSCR_FB_ADDRCTL_OD		(0x01)
 #define GPIO_MSCR_FB_ADDRCTL_HALF_18V	(0x00)
 
 /* Bit definitions and macros for MSCR_SDRAM */
-#define GPIO_MSCR_SDRAM_SDCLKB_MASK	(0xCF)
+#define GPIO_MSCR_SDRAM_SDCLKB_UNMASK	(0xCF)
 #define GPIO_MSCR_SDRAM_SDCLKB_25V_33V	(0x30)
 #define GPIO_MSCR_SDRAM_SDCLKB_FULL_18V	(0x20)
 #define GPIO_MSCR_SDRAM_SDCLKB_OD	(0x10)
 #define GPIO_MSCR_SDRAM_SDCLKB_HALF_18V	(0x00)
 
-#define GPIO_MSCR_SDRAM_SDCLK_MASK	(0xF3)
+#define GPIO_MSCR_SDRAM_SDCLK_UNMASK	(0xF3)
 #define GPIO_MSCR_SDRAM_SDCLK_25V_33V	(0x0C)
 #define GPIO_MSCR_SDRAM_SDCLK_FULL_18V	(0x08)
 #define GPIO_MSCR_SDRAM_SDCLK_OPD	(0x04)
 #define GPIO_MSCR_SDRAM_SDCLK_HALF_18V	(0x00)
 
-#define GPIO_MSCR_SDRAM_SDCTL_MASK	(0xFC)
+#define GPIO_MSCR_SDRAM_SDCTL_UNMASK	(0xFC)
 #define GPIO_MSCR_SDRAM_SDCTL_25V_33V	(0x03)
 #define GPIO_MSCR_SDRAM_SDCTL_FULL_18V	(0x02)
 #define GPIO_MSCR_SDRAM_SDCTL_OPD	(0x01)
diff --git a/include/asm-m68k/m5235.h b/arch/m68k/include/asm/m5235.h
index 22987ac778..71a40d33d2 100644
--- a/include/asm-m68k/m5235.h
+++ b/arch/m68k/include/asm/m5235.h
@@ -557,8 +557,8 @@
 #define CCM_RCON_MODE			(0x0001)
 
 /* Bit definitions and macros for CCM_CIR */
-#define CCM_CIR_PIN(x)			(((x)&0x03FF)<<6)
-#define CCM_CIR_PRN(x)			((x)&0x003F)
+#define CCM_CIR_PIN(x)			(((x) & 0xFFC0) >> 6)
+#define CCM_CIR_PRN(x)			((x) & 0x003F)
 
 /*********************************************************************
 * PLL Clock Module
diff --git a/include/asm-m68k/m5249.h b/arch/m68k/include/asm/m5249.h
index fa0cb14dae..fa0cb14dae 100644
--- a/include/asm-m68k/m5249.h
+++ b/arch/m68k/include/asm/m5249.h
diff --git a/include/asm-m68k/m5253.h b/arch/m68k/include/asm/m5253.h
index eda3472738..eda3472738 100644
--- a/include/asm-m68k/m5253.h
+++ b/arch/m68k/include/asm/m5253.h
diff --git a/include/asm-m68k/m5271.h b/arch/m68k/include/asm/m5271.h
index d25261bcd1..d25261bcd1 100644
--- a/include/asm-m68k/m5271.h
+++ b/arch/m68k/include/asm/m5271.h
diff --git a/include/asm-m68k/m5272.h b/arch/m68k/include/asm/m5272.h
index 895f89df74..895f89df74 100644
--- a/include/asm-m68k/m5272.h
+++ b/arch/m68k/include/asm/m5272.h
diff --git a/include/asm-m68k/m5275.h b/arch/m68k/include/asm/m5275.h
index 24dbae2533..24dbae2533 100644
--- a/include/asm-m68k/m5275.h
+++ b/arch/m68k/include/asm/m5275.h
diff --git a/include/asm-m68k/m5282.h b/arch/m68k/include/asm/m5282.h
index d59a8b2c31..d59a8b2c31 100644
--- a/include/asm-m68k/m5282.h
+++ b/arch/m68k/include/asm/m5282.h
diff --git a/include/asm-m68k/m5301x.h b/arch/m68k/include/asm/m5301x.h
index 80cefc40aa..0920a0dc2a 100644
--- a/include/asm-m68k/m5301x.h
+++ b/arch/m68k/include/asm/m5301x.h
@@ -254,7 +254,7 @@
 #define CCM_MISCCR_PLL_LOCK		(0x2000)
 #define CCM_MISCCR_LIMP			(0x1000)
 #define CCM_MISCCR_BME			(0x8000)
-#define CCM_MISCCR_BMT_MASK		(0xF8FF)
+#define CCM_MISCCR_BMT_UNMASK		(0xF8FF)
 #define CCM_MISCCR_BMT(x)		(((x) & 0x0007) << 8)
 #define CCM_MISCCR_BMT_512		(0x0700)
 #define CCM_MISCCR_BMT_1024		(0x0600)
@@ -330,32 +330,32 @@
 
 #define GPIO_PAR_CS5			(0x40)
 #define GPIO_PAR_CS4			(0x10)
-#define GPIO_PAR_CS1_MASK		(0xF3)
+#define GPIO_PAR_CS1_UNMASK		(0xF3)
 #define GPIO_PAR_CS1_CS1		(0x0C)
 #define GPIO_PAR_CS1_SDCS1		(0x08)
-#define GPIO_PAR_CS0_MASK		(0xFC)
+#define GPIO_PAR_CS0_UNMASK		(0xFC)
 #define GPIO_PAR_CS0_CS0		(0x03)
 #define GPIO_PAR_CS0_CS4		(0x02)
 
-#define GPIO_PAR_DSPIH_SIN_MASK		(0x3F)
+#define GPIO_PAR_DSPIH_SIN_UNMASK	(0x3F)
 #define GPIO_PAR_DSPIH_SIN		(0xC0)
 #define GPIO_PAR_DSPIH_SIN_U2RXD	(0x80)
-#define GPIO_PAR_DSPIH_SOUT_MASK	(0xCF)
+#define GPIO_PAR_DSPIH_SOUT_UNMASK	(0xCF)
 #define GPIO_PAR_DSPIH_SOUT		(0x30)
 #define GPIO_PAR_DSPIH_SOUT_U2TXD	(0x20)
-#define GPIO_PAR_DSPIH_SCK_MASK		(0xF3)
+#define GPIO_PAR_DSPIH_SCK_UNMASK	(0xF3)
 #define GPIO_PAR_DSPIH_SCK		(0x0C)
 #define GPIO_PAR_DSPIH_SCK_U2CTS	(0x08)
-#define GPIO_PAR_DSPIH_PCS0_MASK	(0xFC)
+#define GPIO_PAR_DSPIH_PCS0_UNMASK	(0xFC)
 #define GPIO_PAR_DSPIH_PCS0		(0x03)
 #define GPIO_PAR_DSPIH_PCS0_U2RTS	(0x02)
 
-#define GPIO_PAR_DSPIL_PCS1_MASK	(0x3F)
+#define GPIO_PAR_DSPIL_PCS1_UNMASK	(0x3F)
 #define GPIO_PAR_DSPIL_PCS1		(0xC0)
-#define GPIO_PAR_DSPIL_PCS2_MASK	(0xCF)
+#define GPIO_PAR_DSPIL_PCS2_UNMASK	(0xCF)
 #define GPIO_PAR_DSPIL_PCS2		(0x30)
 #define GPIO_PAR_DSPIL_PCS2_USBH_OC	(0x20)
-#define GPIO_PAR_DSPIL_PCS3_MASK	(0xF3)
+#define GPIO_PAR_DSPIL_PCS3_UNMASK	(0xF3)
 #define GPIO_PAR_DSPIL_PCS3		(0x0C)
 #define GPIO_PAR_DSPIL_PCS3_USBH_EN	(0x08)
 
@@ -365,30 +365,30 @@
 #define GPIO_PAR_FEC0_RMII_FEC		(0x01)
 
 /* GPIO_PAR_FECI2C */
-#define GPIO_PAR_FECI2C_RMII0_MASK	(0x3F)
+#define GPIO_PAR_FECI2C_RMII0_UNMASK	(0x3F)
 #define GPIO_PAR_FECI2C_MDC0		(0x80)
 #define GPIO_PAR_FECI2C_MDIO0		(0x40)
-#define GPIO_PAR_FECI2C_RMII1_MASK	(0xCF)
+#define GPIO_PAR_FECI2C_RMII1_UNMASK	(0xCF)
 #define GPIO_PAR_FECI2C_MDC1		(0x20)
 #define GPIO_PAR_FECI2C_MDIO1		(0x10)
-#define GPIO_PAR_FECI2C_SDA_MASK	(0xF3)
+#define GPIO_PAR_FECI2C_SDA_UNMASK	(0xF3)
 #define GPIO_PAR_FECI2C_SDA(x)		(((x) & 0x03) << 2)
 #define GPIO_PAR_FECI2C_SDA_SDA		(0x0C)
 #define GPIO_PAR_FECI2C_SDA_U2TXD	(0x08)
 #define GPIO_PAR_FECI2C_SDA_MDIO1	(0x04)
-#define GPIO_PAR_FECI2C_SCL_MASK	(0xFC)
+#define GPIO_PAR_FECI2C_SCL_UNMASK	(0xFC)
 #define GPIO_PAR_FECI2C_SCL(x)		((x) & 0x03)
 #define GPIO_PAR_FECI2C_SCL_SCL		(0x03)
 #define GPIO_PAR_FECI2C_SCL_U2RXD	(0x02)
 #define GPIO_PAR_FECI2C_SCL_MDC1	(0x01)
 
-#define GPIO_PAR_IRQ0H_IRQ07_MASK	(0x3F)
-#define GPIO_PAR_IRQ0H_IRQ06_MASK	(0xCF)
+#define GPIO_PAR_IRQ0H_IRQ07_UNMASK	(0x3F)
+#define GPIO_PAR_IRQ0H_IRQ06_UNMASK	(0xCF)
 #define GPIO_PAR_IRQ0H_IRQ06_USBCLKIN	(0x10)
-#define GPIO_PAR_IRQ0H_IRQ04_MASK	(0xFC)
+#define GPIO_PAR_IRQ0H_IRQ04_UNMASK	(0xFC)
 #define GPIO_PAR_IRQ0H_IRQ04_DREQ0	(0x02)
 
-#define GPIO_PAR_IRQ0L_IRQ01_MASK	(0xF3)
+#define GPIO_PAR_IRQ0L_IRQ01_UNMASK	(0xF3)
 #define GPIO_PAR_IRQ0L_IRQ01_DREQ1	(0x08)
 
 #define GPIO_PAR_IRQ1H_IRQ17_DDATA3	(0x40)
@@ -401,24 +401,24 @@
 #define GPIO_PAR_IRQ1L_IRQ11_PST1	(0x04)
 #define GPIO_PAR_IRQ1L_IRQ10_PST0	(0x01)
 
-#define GPIO_PAR_SIMP1H_DATA1_MASK	(0x3F)
+#define GPIO_PAR_SIMP1H_DATA1_UNMASK	(0x3F)
 #define GPIO_PAR_SIMP1H_DATA1_SIMDATA1	(0xC0)
 #define GPIO_PAR_SIMP1H_DATA1_SSITXD	(0x80)
 #define GPIO_PAR_SIMP1H_DATA1_U1TXD	(0x40)
-#define GPIO_PAR_SIMP1H_VEN1_MASK	(0xCF)
+#define GPIO_PAR_SIMP1H_VEN1_UNMASK	(0xCF)
 #define GPIO_PAR_SIMP1H_VEN1_SIMVEN1	(0x30)
 #define GPIO_PAR_SIMP1H_VEN1_SSIRXD	(0x20)
 #define GPIO_PAR_SIMP1H_VEN1_U1RXD	(0x10)
-#define GPIO_PAR_SIMP1H_RST1_MASK	(0xF3)
+#define GPIO_PAR_SIMP1H_RST1_UNMASK	(0xF3)
 #define GPIO_PAR_SIMP1H_RST1_SIMRST1	(0x0C)
 #define GPIO_PAR_SIMP1H_RST1_SSIFS	(0x08)
 #define GPIO_PAR_SIMP1H_RST1_U1RTS	(0x04)
-#define GPIO_PAR_SIMP1H_PD1_MASK	(0xFC)
+#define GPIO_PAR_SIMP1H_PD1_UNMASK	(0xFC)
 #define GPIO_PAR_SIMP1H_PD1_SIMPD1	(0x03)
 #define GPIO_PAR_SIMP1H_PD1_SSIBCLK	(0x02)
 #define GPIO_PAR_SIMP1H_PD1_U1CTS	(0x01)
 
-#define GPIO_PAR_SIMP1L_CLK_MASK	(0x3F)
+#define GPIO_PAR_SIMP1L_CLK_UNMASK	(0x3F)
 #define GPIO_PAR_SIMP1L_CLK_CLK1	(0xC0)
 #define GPIO_PAR_SIMP1L_CLK_SSIMCLK	(0x80)
 
@@ -432,19 +432,19 @@
 #define GPIO_PAR_TIN2(x)		(((x) & 0x03) << 4)
 #define GPIO_PAR_TIN1(x)		(((x) & 0x03) << 2)
 #define GPIO_PAR_TIN0(x)		((x) & 0x03)
-#define GPIO_PAR_TIN3_MASK		(0x3F)
+#define GPIO_PAR_TIN3_UNMASK		(0x3F)
 #define GPIO_PAR_TIN3_TIN3		(0xC0)
 #define GPIO_PAR_TIN3_TOUT3		(0x80)
 #define GPIO_PAR_TIN3_IRQ03		(0x40)
-#define GPIO_PAR_TIN2_MASK		(0xCF)
+#define GPIO_PAR_TIN2_UNMASK		(0xCF)
 #define GPIO_PAR_TIN2_TIN2		(0x30)
 #define GPIO_PAR_TIN2_TOUT2		(0x20)
 #define GPIO_PAR_TIN2_IRQ02		(0x10)
-#define GPIO_PAR_TIN1_MASK		(0xF3)
+#define GPIO_PAR_TIN1_UNMASK		(0xF3)
 #define GPIO_PAR_TIN1_TIN1		(0x0C)
 #define GPIO_PAR_TIN1_TOUT1		(0x08)
 #define GPIO_PAR_TIN1_DACK1		(0x04)
-#define GPIO_PAR_TIN0_MASK		(0xFC)
+#define GPIO_PAR_TIN0_UNMASK		(0xFC)
 #define GPIO_PAR_TIN0_TIN0		(0x03)
 #define GPIO_PAR_TIN0_TOUT0		(0x02)
 #define GPIO_PAR_TIN0_CODEC_ALTCLK	(0x01)
@@ -455,10 +455,10 @@
 #define GPIO_PAR_UART_U0RXD		(0x10)
 #define GPIO_PAR_UART_RTS0(x)		(((x) & 0x03) << 2)
 #define GPIO_PAR_UART_CTS0(x)		((x) & 0x03)
-#define GPIO_PAR_UART_RTS0_MASK		(0xF3)
+#define GPIO_PAR_UART_RTS0_UNMASK	(0xF3)
 #define GPIO_PAR_UART_RTS0_U0RTS	(0x0C)
 #define GPIO_PAR_UART_RTS0_USBO_VBOC	(0x08)
-#define GPIO_PAR_UART_CTS0_MASK		(0xFC)
+#define GPIO_PAR_UART_CTS0_UNMASK	(0xFC)
 #define GPIO_PAR_UART_CTS0_U0CTS	(0x03)
 #define GPIO_PAR_UART_CTS0_USB0_VBEN	(0x02)
 #define GPIO_PAR_UART_CTS0_USB_PULLUP	(0x01)
@@ -476,20 +476,20 @@
 #define GPIO_PAR_SSIH_TXD(x)		(((x) & 0x03) << 4)
 #define GPIO_PAR_SSIH_FS(x)		(((x) & 0x03) << 2)
 #define GPIO_PAR_SSIH_MCLK(x)		((x) & 0x03)
-#define GPIO_PAR_SSIH_RXD_MASK		(0x3F)
+#define GPIO_PAR_SSIH_RXD_UNMASK	(0x3F)
 #define GPIO_PAR_SSIH_RXD_SSIRXD	(0xC0)
 #define GPIO_PAR_SSIH_RXD_U1RXD		(0x40)
-#define GPIO_PAR_SSIH_TXD_MASK		(0xCF)
+#define GPIO_PAR_SSIH_TXD_UNMASK	(0xCF)
 #define GPIO_PAR_SSIH_TXD_SSIRXD	(0x30)
 #define GPIO_PAR_SSIH_TXD_U1TXD		(0x10)
-#define GPIO_PAR_SSIH_FS_MASK		(0xF3)
+#define GPIO_PAR_SSIH_FS_UNMASK		(0xF3)
 #define GPIO_PAR_SSIH_FS_SSIFS		(0x0C)
 #define GPIO_PAR_SSIH_FS_U1RTS		(0x04)
-#define GPIO_PAR_SSIH_MCLK_MASK		(0xFC)
+#define GPIO_PAR_SSIH_MCLK_UNMASK	(0xFC)
 #define GPIO_PAR_SSIH_MCLK_SSIMCLK	(0x03)
 #define GPIO_PAR_SSIH_MCLK_SSICLKIN	(0x01)
 
-#define GPIO_PAR_SSIL_MASK		(0x3F)
+#define GPIO_PAR_SSIL_UNMASK		(0x3F)
 #define GPIO_PAR_SSIL_BCLK		(0xC0)
 #define GPIO_PAR_SSIL_U1CTS		(0x40)
 
@@ -497,40 +497,40 @@
 #define GPIO_MSCR_MSCR2(x)		(((x) & 0x07) << 5)
 #define GPIO_MSCR_MSCR3(x)		(((x) & 0x07) << 5)
 #define GPIO_MSCR_MSCR4(x)		(((x) & 0x07) << 5)
-#define GPIO_MSCR_MSCRn_MASK		(0x1F)
+#define GPIO_MSCR_MSCRn_UNMASK		(0x1F)
 #define GPIO_MSCR_MSCRn_SDR		(0xE0)
 #define GPIO_MSCR_MSCRn_25VDDR		(0x60)
 #define GPIO_MSCR_MSCRn_18VDDR_FULL	(0x20)
 #define GPIO_MSCR_MSCRn_18VDDR_HALF	(0x00)
 
 #define GPIO_MSCR_MSCR5(x)		(((x) & 0x07) << 2)
-#define GPIO_MSCR_MSCR5_MASK		(0xE3)
+#define GPIO_MSCR_MSCR5_UNMASK		(0xE3)
 #define GPIO_MSCR_MSCR5_SDR		(0x1C)
 #define GPIO_MSCR_MSCR5_25VDDR		(0x0C)
 #define GPIO_MSCR_MSCR5_18VDDR_FULL	(0x04)
 #define GPIO_MSCR_MSCR5_18VDDR_HALF	(0x00)
 
-#define GPIO_SRCR_DSPI_MASK		(0xFC)
+#define GPIO_SRCR_DSPI_UNMASK		(0xFC)
 #define GPIO_SRCR_DSPI(x)		((x) & 0x03)
-#define GPIO_SRCR_I2C_MASK		(0xFC)
+#define GPIO_SRCR_I2C_UNMASK		(0xFC)
 #define GPIO_SRCR_I2C(x)		((x) & 0x03)
-#define GPIO_SRCR_IRQ_IRQ0_MASK		(0xF3)
+#define GPIO_SRCR_IRQ_IRQ0_UNMASK	(0xF3)
 #define GPIO_SRCR_IRQ_IRQ0(x)		(((x) & 0x03) << 2)
-#define GPIO_SRCR_IRQ_IRQ1DBG_MASK	(0xFC)
+#define GPIO_SRCR_IRQ_IRQ1DBG_UNMASK	(0xFC)
 #define GPIO_SRCR_IRQ_IRQ1DBG(x)	((x) & 0x03)
-#define GPIO_SRCR_SIM_SIMP0_MASK	(0xF3)
+#define GPIO_SRCR_SIM_SIMP0_UNMASK	(0xF3)
 #define GPIO_SRCR_SIM_SIMP0(x)		(((x) & 0x03) << 2)
-#define GPIO_SRCR_SIM_SIMP1_MASK	(0xFC)
+#define GPIO_SRCR_SIM_SIMP1_UNMASK	(0xFC)
 #define GPIO_SRCR_SIM_SIMP1(x)		((x) & 0x03)
-#define GPIO_SRCR_TIMER_MASK		(0xFC)
+#define GPIO_SRCR_TIMER_UNMASK		(0xFC)
 #define GPIO_SRCR_TIMER(x)		((x) & 0x03)
-#define GPIO_SRCR_UART2_MASK		(0xF3)
+#define GPIO_SRCR_UART2_UNMASK		(0xF3)
 #define GPIO_SRCR_UART2(x)		(((x) & 0x03) << 2)
-#define GPIO_SRCR_UART0_MASK		(0xFC)
+#define GPIO_SRCR_UART0_UNMASK		(0xFC)
 #define GPIO_SRCR_UART0(x)		((x) & 0x03)
-#define GPIO_SRCR_SDHC_MASK		(0xFC)
+#define GPIO_SRCR_SDHC_UNMASK		(0xFC)
 #define GPIO_SRCR_SDHC(x)		((x) & 0x03)
-#define GPIO_SRCR_SSI_MASK		(0xFC)
+#define GPIO_SRCR_SSI_UNMASK		(0xFC)
 #define GPIO_SRCR_SSI(x)		((x) & 0x03)
 
 #define SRCR_HIGHEST			(0x03)
@@ -538,11 +538,11 @@
 #define SRCR_LOW			(0x01)
 #define SRCR_LOWEST			(0x00)
 
-#define GPIO_DSCR_FEC_RMIICLK_MASK	(0xCF)
+#define GPIO_DSCR_FEC_RMIICLK_UNMASK	(0xCF)
 #define GPIO_DSCR_FEC_RMIICLK(x)	(((x) & 0x03) << 4)
-#define GPIO_DSCR_FEC_RMII0_MASK	(0xF3)
+#define GPIO_DSCR_FEC_RMII0_UNMASK	(0xF3)
 #define GPIO_DSCR_FEC_RMII0(x)		(((x) & 0x03) << 2)
-#define GPIO_DSCR_FEC_RMII1_MASK	(0xFC)
+#define GPIO_DSCR_FEC_RMII1_UNMASK	(0xFC)
 #define GPIO_DSCR_FEC_RMII1(x)		((x) & 0x03)
 
 #define DSCR_50PF			(0x03)
@@ -572,18 +572,18 @@
 #define PLL_PCR_LOL_IRQ			(0x00004000)
 #define PLL_PCR_LOL_RE			(0x00002000)
 #define PLL_PCR_LOL_EN			(0x00001000)
-#define PLL_PCR_REFDIV_MASK		(0xFFFFF8FF)
+#define PLL_PCR_REFDIV_UNMASK		(0xFFFFF8FF)
 #define PLL_PCR_REFDIV(x)		(((x) & 0x07) << 8)
-#define PLL_PCR_FBDIV_MASK		(0xFFFFFFC0)
+#define PLL_PCR_FBDIV_UNMASK		(0xFFFFFFC0)
 #define PLL_PCR_FBDIV(x)		((x) & 0x3F)
 
-#define PLL_PDR_OUTDIV4_MASK		(0x0FFF)
+#define PLL_PDR_OUTDIV4_UNMASK		(0x0FFF)
 #define PLL_PDR_OUTDIV4(x)		(((x) & 0x0000000F) << 12)
-#define PLL_PDR_OUTDIV3_MASK		(0xF0FF)
+#define PLL_PDR_OUTDIV3_UNMASK		(0xF0FF)
 #define PLL_PDR_OUTDIV3(x)		(((x) & 0x0000000F) << 8)
-#define PLL_PDR_OUTDIV2_MASK		(0xFF0F)
+#define PLL_PDR_OUTDIV2_UNMASK		(0xFF0F)
 #define PLL_PDR_OUTDIV2(x)		(((x) & 0x0000000F) << 4)
-#define PLL_PDR_OUTDIV1_MASK		(0xFFF0)
+#define PLL_PDR_OUTDIV1_UNMASK		(0xFFF0)
 #define PLL_PDR_OUTDIV1(x)		((x) & 0x0000000F)
 #define PLL_PDR_USB(x)			PLL_PDR_OUTDIV4(x)
 #define PLL_PDR_SDRAM(x)		PLL_PDR_OUTDIV3(x)
diff --git a/include/asm-m68k/m5329.h b/arch/m68k/include/asm/m5329.h
index c7ebed1375..c7ebed1375 100644
--- a/include/asm-m68k/m5329.h
+++ b/arch/m68k/include/asm/m5329.h
diff --git a/include/asm-m68k/m5445x.h b/arch/m68k/include/asm/m5445x.h
index 596662191c..dfddde62ad 100644
--- a/include/asm-m68k/m5445x.h
+++ b/arch/m68k/include/asm/m5445x.h
@@ -286,13 +286,13 @@
 /* Bit definitions and macros for PAR_FEC */
 #define GPIO_PAR_FEC_FEC0(x)		(((x)&0x07))
 #define GPIO_PAR_FEC_FEC1(x)		(((x)&0x07)<<4)
-#define GPIO_PAR_FEC_FEC1_MASK		(0x8F)
+#define GPIO_PAR_FEC_FEC1_UNMASK	(0x8F)
 #define GPIO_PAR_FEC_FEC1_MII		(0x70)
 #define GPIO_PAR_FEC_FEC1_RMII_GPIO	(0x30)
 #define GPIO_PAR_FEC_FEC1_RMII_ATA	(0x20)
 #define GPIO_PAR_FEC_FEC1_ATA		(0x10)
 #define GPIO_PAR_FEC_FEC1_GPIO		(0x00)
-#define GPIO_PAR_FEC_FEC0_MASK		(0xF8)
+#define GPIO_PAR_FEC_FEC0_UNMASK	(0xF8)
 #define GPIO_PAR_FEC_FEC0_MII		(0x07)
 #define GPIO_PAR_FEC_FEC0_RMII_GPIO	(0x03)
 #define GPIO_PAR_FEC_FEC0_RMII_ULPI	(0x02)
@@ -304,15 +304,15 @@
 #define GPIO_PAR_DMA_DACK0(x)		(((x)&0x03)<<2)
 #define GPIO_PAR_DMA_DREQ1(x)		(((x)&0x03)<<4)
 #define GPIO_PAR_DMA_DACK1(x)		(((x)&0x03)<<6)
-#define GPIO_PAR_DMA_DACK1_MASK		(0x3F)
+#define GPIO_PAR_DMA_DACK1_UNMASK	(0x3F)
 #define GPIO_PAR_DMA_DACK1_DACK1	(0xC0)
 #define GPIO_PAR_DMA_DACK1_ULPI_DIR	(0x40)
 #define GPIO_PAR_DMA_DACK1_GPIO		(0x00)
-#define GPIO_PAR_DMA_DREQ1_MASK		(0xCF)
+#define GPIO_PAR_DMA_DREQ1_UNMASK	(0xCF)
 #define GPIO_PAR_DMA_DREQ1_DREQ1	(0x30)
 #define GPIO_PAR_DMA_DREQ1_USB_CLKIN	(0x10)
 #define GPIO_PAR_DMA_DREQ1_GPIO		(0x00)
-#define GPIO_PAR_DMA_DACK0_MASK		(0xF3)
+#define GPIO_PAR_DMA_DACK0_UNMASK	(0xF3)
 #define GPIO_PAR_DMA_DACK0_DACK1	(0x0C)
 #define GPIO_PAR_DMA_DACK0_ULPI_DIR	(0x04)
 #define GPIO_PAR_DMA_DACK0_GPIO		(0x00)
@@ -330,7 +330,7 @@
 #define GPIO_PAR_FBCTL_TA_GPIO		(0x00)
 #define GPIO_PAR_FBCTL_RW_RW		(0x20)
 #define GPIO_PAR_FBCTL_RW_GPIO		(0x00)
-#define GPIO_PAR_FBCTL_TS_MASK		(0xE7)
+#define GPIO_PAR_FBCTL_TS_UNMASK	(0xE7)
 #define GPIO_PAR_FBCTL_TS_TS		(0x18)
 #define GPIO_PAR_FBCTL_TS_ALE		(0x10)
 #define GPIO_PAR_FBCTL_TS_TBST		(0x08)
@@ -364,11 +364,11 @@
 #define GPIO_PAR_BE_BS1			(0x04)
 #define GPIO_PAR_BE_BS2(x)		(((x)&0x03)<<4)
 #define GPIO_PAR_BE_BS3(x)		(((x)&0x03)<<6)
-#define GPIO_PAR_BE_BE3_MASK		(0x3F)
+#define GPIO_PAR_BE_BE3_UNMASK		(0x3F)
 #define GPIO_PAR_BE_BE3_BE3		(0xC0)
 #define GPIO_PAR_BE_BE3_TSIZ1		(0x80)
 #define GPIO_PAR_BE_BE3_GPIO		(0x00)
-#define GPIO_PAR_BE_BE2_MASK		(0xCF)
+#define GPIO_PAR_BE_BE2_UNMASK		(0xCF)
 #define GPIO_PAR_BE_BE2_BE2		(0x30)
 #define GPIO_PAR_BE_BE2_TSIZ0		(0x20)
 #define GPIO_PAR_BE_BE2_GPIO		(0x00)
@@ -393,22 +393,22 @@
 #define GPIO_PAR_TIMER_T1IN(x)		(((x)&0x03)<<2)
 #define GPIO_PAR_TIMER_T2IN(x)		(((x)&0x03)<<4)
 #define GPIO_PAR_TIMER_T3IN(x)		(((x)&0x03)<<6)
-#define GPIO_PAR_TIMER_T3IN_MASK	(0x3F)
+#define GPIO_PAR_TIMER_T3IN_UNMASK	(0x3F)
 #define GPIO_PAR_TIMER_T3IN_T3IN	(0xC0)
 #define GPIO_PAR_TIMER_T3IN_T3OUT	(0x80)
 #define GPIO_PAR_TIMER_T3IN_U2RXD	(0x40)
 #define GPIO_PAR_TIMER_T3IN_GPIO	(0x00)
-#define GPIO_PAR_TIMER_T2IN_MASK	(0xCF)
+#define GPIO_PAR_TIMER_T2IN_UNMASK	(0xCF)
 #define GPIO_PAR_TIMER_T2IN_T2IN	(0x30)
 #define GPIO_PAR_TIMER_T2IN_T2OUT	(0x20)
 #define GPIO_PAR_TIMER_T2IN_U2TXD	(0x10)
 #define GPIO_PAR_TIMER_T2IN_GPIO	(0x00)
-#define GPIO_PAR_TIMER_T1IN_MASK	(0xF3)
+#define GPIO_PAR_TIMER_T1IN_UNMASK	(0xF3)
 #define GPIO_PAR_TIMER_T1IN_T1IN	(0x0C)
 #define GPIO_PAR_TIMER_T1IN_T1OUT	(0x08)
 #define GPIO_PAR_TIMER_T1IN_U2CTS	(0x04)
 #define GPIO_PAR_TIMER_T1IN_GPIO	(0x00)
-#define GPIO_PAR_TIMER_T0IN_MASK	(0xFC)
+#define GPIO_PAR_TIMER_T0IN_UNMASK	(0xFC)
 #define GPIO_PAR_TIMER_T0IN_T0IN	(0x03)
 #define GPIO_PAR_TIMER_T0IN_T0OUT	(0x02)
 #define GPIO_PAR_TIMER_T0IN_U2RTS	(0x01)
@@ -417,12 +417,12 @@
 /* Bit definitions and macros for PAR_USB */
 #define GPIO_PAR_USB_VBUSOC(x)		(((x)&0x03))
 #define GPIO_PAR_USB_VBUSEN(x)		(((x)&0x03)<<2)
-#define GPIO_PAR_USB_VBUSEN_MASK	(0xF3)
+#define GPIO_PAR_USB_VBUSEN_UNMASK	(0xF3)
 #define GPIO_PAR_USB_VBUSEN_VBUSEN	(0x0C)
 #define GPIO_PAR_USB_VBUSEN_USBPULLUP	(0x08)
 #define GPIO_PAR_USB_VBUSEN_ULPI_NXT	(0x04)
 #define GPIO_PAR_USB_VBUSEN_GPIO	(0x00)
-#define GPIO_PAR_USB_VBUSOC_MASK	(0xFC)
+#define GPIO_PAR_USB_VBUSOC_UNMASK	(0xFC)
 #define GPIO_PAR_USB_VBUSOC_VBUSOC	(0x03)
 #define GPIO_PAR_USB_VBUSOC_ULPI_STP	(0x01)
 #define GPIO_PAR_USB_VBUSOC_GPIO	(0x00)
@@ -460,11 +460,11 @@
 #define GPIO_PAR_FECI2C_MDC0		(0x0040)
 #define GPIO_PAR_FECI2C_MDIO1(x)	(((x)&0x0003)<<8)
 #define GPIO_PAR_FECI2C_MDC1(x)		(((x)&0x0003)<<10)
-#define GPIO_PAR_FECI2C_MDC1_MASK	(0xF3FF)
+#define GPIO_PAR_FECI2C_MDC1_UNMASK	(0xF3FF)
 #define GPIO_PAR_FECI2C_MDC1_MDC1	(0x0C00)
 #define GPIO_PAR_FECI2C_MDC1_ATA_DIOR	(0x0800)
 #define GPIO_PAR_FECI2C_MDC1_GPIO	(0x0000)
-#define GPIO_PAR_FECI2C_MDIO1_MASK	(0xFCFF)
+#define GPIO_PAR_FECI2C_MDIO1_UNMASK	(0xFCFF)
 #define GPIO_PAR_FECI2C_MDIO1_MDIO1	(0x0300)
 #define GPIO_PAR_FECI2C_MDIO1_ATA_DIOW	(0x0200)
 #define GPIO_PAR_FECI2C_MDIO1_GPIO	(0x0000)
@@ -472,11 +472,11 @@
 #define GPIO_PAR_FECI2C_MDC0_GPIO	(0x0000)
 #define GPIO_PAR_FECI2C_MDIO0_MDIO0	(0x0010)
 #define GPIO_PAR_FECI2C_MDIO0_GPIO	(0x0000)
-#define GPIO_PAR_FECI2C_SCL_MASK	(0xFFF3)
+#define GPIO_PAR_FECI2C_SCL_UNMASK	(0xFFF3)
 #define GPIO_PAR_FECI2C_SCL_SCL		(0x000C)
 #define GPIO_PAR_FECI2C_SCL_U2TXD	(0x0004)
 #define GPIO_PAR_FECI2C_SCL_GPIO	(0x0000)
-#define GPIO_PAR_FECI2C_SDA_MASK	(0xFFFC)
+#define GPIO_PAR_FECI2C_SDA_UNMASK	(0xFFFC)
 #define GPIO_PAR_FECI2C_SDA_SDA		(0x0003)
 #define GPIO_PAR_FECI2C_SDA_U2RXD	(0x0001)
 #define GPIO_PAR_FECI2C_SDA_GPIO	(0x0000)
@@ -487,19 +487,19 @@
 #define GPIO_PAR_SSI_SRXD(x)		(((x)&0x0003)<<4)
 #define GPIO_PAR_SSI_FS(x)		(((x)&0x0003)<<6)
 #define GPIO_PAR_SSI_BCLK(x)		(((x)&0x0003)<<8)
-#define GPIO_PAR_SSI_BCLK_MASK		(0xFCFF)
+#define GPIO_PAR_SSI_BCLK_UNMASK	(0xFCFF)
 #define GPIO_PAR_SSI_BCLK_BCLK		(0x0300)
 #define GPIO_PAR_SSI_BCLK_U1CTS		(0x0200)
 #define GPIO_PAR_SSI_BCLK_GPIO		(0x0000)
-#define GPIO_PAR_SSI_FS_MASK		(0xFF3F)
+#define GPIO_PAR_SSI_FS_UNMASK		(0xFF3F)
 #define GPIO_PAR_SSI_FS_FS		(0x00C0)
 #define GPIO_PAR_SSI_FS_U1RTS		(0x0080)
 #define GPIO_PAR_SSI_FS_GPIO		(0x0000)
-#define GPIO_PAR_SSI_SRXD_MASK		(0xFFCF)
+#define GPIO_PAR_SSI_SRXD_UNMASK	(0xFFCF)
 #define GPIO_PAR_SSI_SRXD_SRXD		(0x0030)
 #define GPIO_PAR_SSI_SRXD_U1RXD		(0x0020)
 #define GPIO_PAR_SSI_SRXD_GPIO		(0x0000)
-#define GPIO_PAR_SSI_STXD_MASK		(0xFFF3)
+#define GPIO_PAR_SSI_STXD_UNMASK	(0xFFF3)
 #define GPIO_PAR_SSI_STXD_STXD		(0x000C)
 #define GPIO_PAR_SSI_STXD_U1TXD		(0x0008)
 #define GPIO_PAR_SSI_STXD_GPIO		(0x0000)
@@ -552,7 +552,7 @@
 #define GPIO_PAR_PCI_GNT1		(0x0400)
 #define GPIO_PAR_PCI_GNT2		(0x1000)
 #define GPIO_PAR_PCI_GNT3(x)		(((x)&0x0003)<<14)
-#define GPIO_PAR_PCI_GNT3_MASK		(0x3FFF)
+#define GPIO_PAR_PCI_GNT3_UNMASK	(0x3FFF)
 #define GPIO_PAR_PCI_GNT3_GNT3		(0xC000)
 #define GPIO_PAR_PCI_GNT3_ATA_DMACK	(0x8000)
 #define GPIO_PAR_PCI_GNT3_GPIO		(0x0000)
@@ -562,7 +562,7 @@
 #define GPIO_PAR_PCI_GNT1_GPIO		(0x0000)
 #define GPIO_PAR_PCI_GNT0_GNT0		(0x0100)
 #define GPIO_PAR_PCI_GNT0_GPIO		(0x0000)
-#define GPIO_PAR_PCI_REQ3_MASK		(0xFF3F)
+#define GPIO_PAR_PCI_REQ3_UNMASK	(0xFF3F)
 #define GPIO_PAR_PCI_REQ3_REQ3		(0x00C0)
 #define GPIO_PAR_PCI_REQ3_ATA_INTRQ	(0x0080)
 #define GPIO_PAR_PCI_REQ3_GPIO		(0x0000)
@@ -578,22 +578,22 @@
 #define GPIO_MSCR_SDRAM_SDCLK(x)	(((x)&0x03)<<2)
 #define GPIO_MSCR_SDRAM_SDDQS(x)	(((x)&0x03)<<4)
 #define GPIO_MSCR_SDRAM_SDDATA(x)	(((x)&0x03)<<6)
-#define GPIO_MSCR_SDRAM_SDDATA_MASK	(0x3F)
+#define GPIO_MSCR_SDRAM_SDDATA_UNMASK	(0x3F)
 #define GPIO_MSCR_SDRAM_SDDATA_DDR1	(0xC0)
 #define GPIO_MSCR_SDRAM_SDDATA_DDR2	(0x80)
 #define GPIO_MSCR_SDRAM_SDDATA_FS_LPDDR	(0x40)
 #define GPIO_MSCR_SDRAM_SDDATA_HS_LPDDR	(0x00)
-#define GPIO_MSCR_SDRAM_SDDQS_MASK	(0xCF)
+#define GPIO_MSCR_SDRAM_SDDQS_UNMASK	(0xCF)
 #define GPIO_MSCR_SDRAM_SDDQS_DDR1	(0x30)
 #define GPIO_MSCR_SDRAM_SDDQS_DDR2	(0x20)
 #define GPIO_MSCR_SDRAM_SDDQS_FS_LPDDR	(0x10)
 #define GPIO_MSCR_SDRAM_SDDQS_HS_LPDDR	(0x00)
-#define GPIO_MSCR_SDRAM_SDCLK_MASK	(0xF3)
+#define GPIO_MSCR_SDRAM_SDCLK_UNMASK	(0xF3)
 #define GPIO_MSCR_SDRAM_SDCLK_DDR1	(0x0C)
 #define GPIO_MSCR_SDRAM_SDCLK_DDR2	(0x08)
 #define GPIO_MSCR_SDRAM_SDCLK_FS_LPDDR	(0x04)
 #define GPIO_MSCR_SDRAM_SDCLK_HS_LPDDR	(0x00)
-#define GPIO_MSCR_SDRAM_SDCTL_MASK	(0xFC)
+#define GPIO_MSCR_SDRAM_SDCTL_UNMASK	(0xFC)
 #define GPIO_MSCR_SDRAM_SDCTL_DDR1	(0x03)
 #define GPIO_MSCR_SDRAM_SDCTL_DDR2	(0x02)
 #define GPIO_MSCR_SDRAM_SDCTL_FS_LPDDR	(0x01)
diff --git a/include/asm-m68k/m547x_8x.h b/arch/m68k/include/asm/m547x_8x.h
index 23cee8e5e4..23cee8e5e4 100644
--- a/include/asm-m68k/m547x_8x.h
+++ b/arch/m68k/include/asm/m547x_8x.h
diff --git a/include/asm-m68k/posix_types.h b/arch/m68k/include/asm/posix_types.h
index 4fbc0405f7..4fbc0405f7 100644
--- a/include/asm-m68k/posix_types.h
+++ b/arch/m68k/include/asm/posix_types.h
diff --git a/include/asm-m68k/processor.h b/arch/m68k/include/asm/processor.h
index 3fafa6ff1a..3fafa6ff1a 100644
--- a/include/asm-m68k/processor.h
+++ b/arch/m68k/include/asm/processor.h
diff --git a/include/asm-m68k/ptrace.h b/arch/m68k/include/asm/ptrace.h
index 01535beb15..01535beb15 100644
--- a/include/asm-m68k/ptrace.h
+++ b/arch/m68k/include/asm/ptrace.h
diff --git a/include/asm-m68k/rtc.h b/arch/m68k/include/asm/rtc.h
index 7651ca9325..7651ca9325 100644
--- a/include/asm-m68k/rtc.h
+++ b/arch/m68k/include/asm/rtc.h
diff --git a/include/asm-m68k/string.h b/arch/m68k/include/asm/string.h
index e0773a8828..e0773a8828 100644
--- a/include/asm-m68k/string.h
+++ b/arch/m68k/include/asm/string.h
diff --git a/include/asm-m68k/timer.h b/arch/m68k/include/asm/timer.h
index 1a5de05871..1a5de05871 100644
--- a/include/asm-m68k/timer.h
+++ b/arch/m68k/include/asm/timer.h
diff --git a/include/asm-m68k/types.h b/arch/m68k/include/asm/types.h
index 3ffcab20df..3ffcab20df 100644
--- a/include/asm-m68k/types.h
+++ b/arch/m68k/include/asm/types.h
diff --git a/include/asm-m68k/u-boot.h b/arch/m68k/include/asm/u-boot.h
index a0f2983750..a0f2983750 100644
--- a/include/asm-m68k/u-boot.h
+++ b/arch/m68k/include/asm/u-boot.h
diff --git a/include/asm-m68k/uart.h b/arch/m68k/include/asm/uart.h
index 9a528ea498..9a528ea498 100644
--- a/include/asm-m68k/uart.h
+++ b/arch/m68k/include/asm/uart.h
diff --git a/include/asm-m68k/unaligned.h b/arch/m68k/include/asm/unaligned.h
index 328aa0c316..328aa0c316 100644
--- a/include/asm-m68k/unaligned.h
+++ b/arch/m68k/include/asm/unaligned.h
diff --git a/lib_m68k/Makefile b/arch/m68k/lib/Makefile
index 6db35ed2c1..6db35ed2c1 100644
--- a/lib_m68k/Makefile
+++ b/arch/m68k/lib/Makefile
diff --git a/lib_m68k/board.c b/arch/m68k/lib/board.c
index 732023d67c..732023d67c 100644
--- a/lib_m68k/board.c
+++ b/arch/m68k/lib/board.c
diff --git a/lib_m68k/bootm.c b/arch/m68k/lib/bootm.c
index e5ed6eb7cc..e5ed6eb7cc 100644
--- a/lib_m68k/bootm.c
+++ b/arch/m68k/lib/bootm.c
diff --git a/arch/m68k/lib/cache.c b/arch/m68k/lib/cache.c
new file mode 100644
index 0000000000..ed881783f1
--- /dev/null
+++ b/arch/m68k/lib/cache.c
@@ -0,0 +1,150 @@
+/*
+ * (C) Copyright 2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/immap.h>
+#include <asm/cache.h>
+
+volatile int *cf_icache_status = (int *)ICACHE_STATUS;
+volatile int *cf_dcache_status = (int *)DCACHE_STATUS;
+
+void flush_cache(ulong start_addr, ulong size)
+{
+	/* Must be implemented for all M68k processors with copy-back data cache */
+}
+
+int icache_status(void)
+{
+	return *cf_icache_status;
+}
+
+int dcache_status(void)
+{
+	return *cf_dcache_status;
+}
+
+void icache_enable(void)
+{
+	icache_invalid();
+
+	*cf_icache_status = 1;
+
+#ifdef CONFIG_CF_V4
+	__asm__ __volatile__("movec %0, %%acr2"::"r"(CONFIG_SYS_CACHE_ACR2));
+	__asm__ __volatile__("movec %0, %%acr3"::"r"(CONFIG_SYS_CACHE_ACR3));
+#elif defined(CONFIG_CF_V4e)
+	__asm__ __volatile__("movec %0, %%acr6"::"r"(CONFIG_SYS_CACHE_ACR6));
+	__asm__ __volatile__("movec %0, %%acr7"::"r"(CONFIG_SYS_CACHE_ACR7));
+#else
+	__asm__ __volatile__("movec %0, %%acr0"::"r"(CONFIG_SYS_CACHE_ACR0));
+	__asm__ __volatile__("movec %0, %%acr1"::"r"(CONFIG_SYS_CACHE_ACR1));
+#endif
+
+	__asm__ __volatile__("movec %0, %%cacr"::"r"(CONFIG_SYS_CACHE_ICACR));
+}
+
+void icache_disable(void)
+{
+	u32 temp = 0;
+
+	*cf_icache_status = 0;
+	icache_invalid();
+
+#ifdef CONFIG_CF_V4
+	__asm__ __volatile__("movec %0, %%acr2"::"r"(temp));
+	__asm__ __volatile__("movec %0, %%acr3"::"r"(temp));
+#elif defined(CONFIG_CF_V4e)
+	__asm__ __volatile__("movec %0, %%acr6"::"r"(temp));
+	__asm__ __volatile__("movec %0, %%acr7"::"r"(temp));
+#else
+	__asm__ __volatile__("movec %0, %%acr0"::"r"(temp));
+	__asm__ __volatile__("movec %0, %%acr1"::"r"(temp));
+
+#endif
+}
+
+void icache_invalid(void)
+{
+	u32 temp;
+
+	temp = CONFIG_SYS_ICACHE_INV;
+	if (*cf_icache_status)
+		temp |= CONFIG_SYS_CACHE_ICACR;
+
+	__asm__ __volatile__("movec %0, %%cacr"::"r"(temp));
+}
+
+/*
+ * data cache only for ColdFire V4 such as MCF547x_8x, MCF5445x
+ * the dcache will be dummy in ColdFire V2 and V3
+ */
+void dcache_enable(void)
+{
+	dcache_invalid();
+	*cf_dcache_status = 1;
+
+#ifdef CONFIG_CF_V4
+	__asm__ __volatile__("movec %0, %%acr0"::"r"(CONFIG_SYS_CACHE_ACR0));
+	__asm__ __volatile__("movec %0, %%acr1"::"r"(CONFIG_SYS_CACHE_ACR1));
+#elif defined(CONFIG_CF_V4e)
+	__asm__ __volatile__("movec %0, %%acr4"::"r"(CONFIG_SYS_CACHE_ACR4));
+	__asm__ __volatile__("movec %0, %%acr5"::"r"(CONFIG_SYS_CACHE_ACR5));
+
+#endif
+
+	__asm__ __volatile__("movec %0, %%cacr"::"r"(CONFIG_SYS_CACHE_DCACR));
+}
+
+void dcache_disable(void)
+{
+	u32 temp = 0;
+
+	*cf_dcache_status = 0;
+	dcache_invalid();
+
+	__asm__ __volatile__("movec %0, %%cacr"::"r"(temp));
+
+#ifdef CONFIG_CF_V4
+	__asm__ __volatile__("movec %0, %%acr0"::"r"(temp));
+	__asm__ __volatile__("movec %0, %%acr1"::"r"(temp));
+#elif defined(CONFIG_CF_V4e)
+	__asm__ __volatile__("movec %0, %%acr4"::"r"(temp));
+	__asm__ __volatile__("movec %0, %%acr5"::"r"(temp));
+
+#endif
+}
+
+void dcache_invalid(void)
+{
+#ifdef CONFIG_CF_V4
+	u32 temp;
+
+	temp = CONFIG_SYS_DCACHE_INV;
+	if (*cf_dcache_status)
+		temp |= CONFIG_SYS_CACHE_DCACR;
+	if (*cf_icache_status)
+		temp |= CONFIG_SYS_CACHE_ICACR;
+
+	__asm__ __volatile__("movec %0, %%cacr"::"r"(temp));
+#endif
+}
diff --git a/lib_m68k/interrupts.c b/arch/m68k/lib/interrupts.c
index 133494f6dc..133494f6dc 100644
--- a/lib_m68k/interrupts.c
+++ b/arch/m68k/lib/interrupts.c
diff --git a/lib_m68k/time.c b/arch/m68k/lib/time.c
index 7eaea5e7f7..7eaea5e7f7 100644
--- a/lib_m68k/time.c
+++ b/arch/m68k/lib/time.c
diff --git a/lib_m68k/traps.c b/arch/m68k/lib/traps.c
index 1ca94dc55f..1ca94dc55f 100644
--- a/lib_m68k/traps.c
+++ b/arch/m68k/lib/traps.c
diff --git a/lib_microblaze/config.mk b/arch/microblaze/config.mk
index c3c9f958c0..c3c9f958c0 100644
--- a/lib_microblaze/config.mk
+++ b/arch/microblaze/config.mk
diff --git a/cpu/microblaze/Makefile b/arch/microblaze/cpu/Makefile
index 9d542013cc..9d542013cc 100644
--- a/cpu/microblaze/Makefile
+++ b/arch/microblaze/cpu/Makefile
diff --git a/cpu/microblaze/cache.c b/arch/microblaze/cpu/cache.c
index 3b7c4d4f7f..3b7c4d4f7f 100644
--- a/cpu/microblaze/cache.c
+++ b/arch/microblaze/cpu/cache.c
diff --git a/cpu/microblaze/cpu.c b/arch/microblaze/cpu/cpu.c
index 4d2b270b23..4d2b270b23 100644
--- a/cpu/microblaze/cpu.c
+++ b/arch/microblaze/cpu/cpu.c
diff --git a/cpu/microblaze/exception.c b/arch/microblaze/cpu/exception.c
index 0365de3a0b..0365de3a0b 100644
--- a/cpu/microblaze/exception.c
+++ b/arch/microblaze/cpu/exception.c
diff --git a/cpu/microblaze/interrupts.c b/arch/microblaze/cpu/interrupts.c
index a6021c99c3..a6021c99c3 100644
--- a/cpu/microblaze/interrupts.c
+++ b/arch/microblaze/cpu/interrupts.c
diff --git a/cpu/microblaze/irq.S b/arch/microblaze/cpu/irq.S
index e1fc19046c..e1fc19046c 100644
--- a/cpu/microblaze/irq.S
+++ b/arch/microblaze/cpu/irq.S
diff --git a/cpu/microblaze/start.S b/arch/microblaze/cpu/start.S
index 2e9a08dc54..2e9a08dc54 100644
--- a/cpu/microblaze/start.S
+++ b/arch/microblaze/cpu/start.S
diff --git a/cpu/microblaze/timer.c b/arch/microblaze/cpu/timer.c
index a91eabc642..a91eabc642 100644
--- a/cpu/microblaze/timer.c
+++ b/arch/microblaze/cpu/timer.c
diff --git a/include/asm-microblaze/asm.h b/arch/microblaze/include/asm/asm.h
index deb23e094a..deb23e094a 100644
--- a/include/asm-microblaze/asm.h
+++ b/arch/microblaze/include/asm/asm.h
diff --git a/include/asm-microblaze/bitops.h b/arch/microblaze/include/asm/bitops.h
index e8c835f7c0..e8c835f7c0 100644
--- a/include/asm-microblaze/bitops.h
+++ b/arch/microblaze/include/asm/bitops.h
diff --git a/include/asm-microblaze/byteorder.h b/arch/microblaze/include/asm/byteorder.h
index a4a75b7a6d..a4a75b7a6d 100644
--- a/include/asm-microblaze/byteorder.h
+++ b/arch/microblaze/include/asm/byteorder.h
diff --git a/include/asm-microblaze/config.h b/arch/microblaze/include/asm/config.h
index 8a9064b3c8..8a9064b3c8 100644
--- a/include/asm-microblaze/config.h
+++ b/arch/microblaze/include/asm/config.h
diff --git a/include/asm-microblaze/errno.h b/arch/microblaze/include/asm/errno.h
index 4c82b503d9..4c82b503d9 100644
--- a/include/asm-microblaze/errno.h
+++ b/arch/microblaze/include/asm/errno.h
diff --git a/include/asm-microblaze/global_data.h b/arch/microblaze/include/asm/global_data.h
index ec7837f6b9..ec7837f6b9 100644
--- a/include/asm-microblaze/global_data.h
+++ b/arch/microblaze/include/asm/global_data.h
diff --git a/include/asm-microblaze/io.h b/arch/microblaze/include/asm/io.h
index 7e190d15c6..7e190d15c6 100644
--- a/include/asm-microblaze/io.h
+++ b/arch/microblaze/include/asm/io.h
diff --git a/include/asm-microblaze/microblaze_intc.h b/arch/microblaze/include/asm/microblaze_intc.h
index 4c385aa24f..4c385aa24f 100644
--- a/include/asm-microblaze/microblaze_intc.h
+++ b/arch/microblaze/include/asm/microblaze_intc.h
diff --git a/include/asm-microblaze/microblaze_timer.h b/arch/microblaze/include/asm/microblaze_timer.h
index 844c8db115..844c8db115 100644
--- a/include/asm-microblaze/microblaze_timer.h
+++ b/arch/microblaze/include/asm/microblaze_timer.h
diff --git a/include/asm-microblaze/posix_types.h b/arch/microblaze/include/asm/posix_types.h
index 9a2cc663ec..9a2cc663ec 100644
--- a/include/asm-microblaze/posix_types.h
+++ b/arch/microblaze/include/asm/posix_types.h
diff --git a/include/asm-microblaze/processor.h b/arch/microblaze/include/asm/processor.h
index 78b8976ca3..78b8976ca3 100644
--- a/include/asm-microblaze/processor.h
+++ b/arch/microblaze/include/asm/processor.h
diff --git a/include/asm-microblaze/ptrace.h b/arch/microblaze/include/asm/ptrace.h
index b796d4faf6..b796d4faf6 100644
--- a/include/asm-microblaze/ptrace.h
+++ b/arch/microblaze/include/asm/ptrace.h
diff --git a/include/asm-microblaze/string.h b/arch/microblaze/include/asm/string.h
index 724f5bdfa6..724f5bdfa6 100644
--- a/include/asm-microblaze/string.h
+++ b/arch/microblaze/include/asm/string.h
diff --git a/include/asm-microblaze/system.h b/arch/microblaze/include/asm/system.h
index 0297a11590..0297a11590 100644
--- a/include/asm-microblaze/system.h
+++ b/arch/microblaze/include/asm/system.h
diff --git a/include/asm-microblaze/types.h b/arch/microblaze/include/asm/types.h
index 77094f62d6..77094f62d6 100644
--- a/include/asm-microblaze/types.h
+++ b/arch/microblaze/include/asm/types.h
diff --git a/include/asm-microblaze/u-boot.h b/arch/microblaze/include/asm/u-boot.h
index 543a6b1777..543a6b1777 100644
--- a/include/asm-microblaze/u-boot.h
+++ b/arch/microblaze/include/asm/u-boot.h
diff --git a/include/asm-microblaze/unaligned.h b/arch/microblaze/include/asm/unaligned.h
index 785c2e9157..785c2e9157 100644
--- a/include/asm-microblaze/unaligned.h
+++ b/arch/microblaze/include/asm/unaligned.h
diff --git a/lib_microblaze/Makefile b/arch/microblaze/lib/Makefile
index 9b0f296e3f..9b0f296e3f 100644
--- a/lib_microblaze/Makefile
+++ b/arch/microblaze/lib/Makefile
diff --git a/lib_microblaze/board.c b/arch/microblaze/lib/board.c
index d4baea930a..d4baea930a 100644
--- a/lib_microblaze/board.c
+++ b/arch/microblaze/lib/board.c
diff --git a/lib_microblaze/bootm.c b/arch/microblaze/lib/bootm.c
index bce4774fe3..bce4774fe3 100644
--- a/lib_microblaze/bootm.c
+++ b/arch/microblaze/lib/bootm.c
diff --git a/lib_microblaze/cache.c b/arch/microblaze/lib/cache.c
index 4b2e8e3790..4b2e8e3790 100644
--- a/lib_microblaze/cache.c
+++ b/arch/microblaze/lib/cache.c
diff --git a/lib_microblaze/time.c b/arch/microblaze/lib/time.c
index da016a0015..da016a0015 100644
--- a/lib_microblaze/time.c
+++ b/arch/microblaze/lib/time.c
diff --git a/lib_mips/config.mk b/arch/mips/config.mk
index aa06761ae3..aa06761ae3 100644
--- a/lib_mips/config.mk
+++ b/arch/mips/config.mk
diff --git a/cpu/mips/Makefile b/arch/mips/cpu/Makefile
index 28a1cbb104..28a1cbb104 100644
--- a/cpu/mips/Makefile
+++ b/arch/mips/cpu/Makefile
diff --git a/cpu/mips/asc_serial.c b/arch/mips/cpu/asc_serial.c
index be686c2ae8..be686c2ae8 100644
--- a/cpu/mips/asc_serial.c
+++ b/arch/mips/cpu/asc_serial.c
diff --git a/cpu/mips/asc_serial.h b/arch/mips/cpu/asc_serial.h
index 7ffdcfaf8b..7ffdcfaf8b 100644
--- a/cpu/mips/asc_serial.h
+++ b/arch/mips/cpu/asc_serial.h
diff --git a/cpu/mips/au1x00_eth.c b/arch/mips/cpu/au1x00_eth.c
index 5074997a29..5074997a29 100644
--- a/cpu/mips/au1x00_eth.c
+++ b/arch/mips/cpu/au1x00_eth.c
diff --git a/cpu/mips/au1x00_serial.c b/arch/mips/cpu/au1x00_serial.c
index c25ba5a5b3..c25ba5a5b3 100644
--- a/cpu/mips/au1x00_serial.c
+++ b/arch/mips/cpu/au1x00_serial.c
diff --git a/cpu/mips/au1x00_usb_ohci.c b/arch/mips/cpu/au1x00_usb_ohci.c
index 0bc2305d87..0bc2305d87 100644
--- a/cpu/mips/au1x00_usb_ohci.c
+++ b/arch/mips/cpu/au1x00_usb_ohci.c
diff --git a/cpu/mips/au1x00_usb_ohci.h b/arch/mips/cpu/au1x00_usb_ohci.h
index bb9f351099..bb9f351099 100644
--- a/cpu/mips/au1x00_usb_ohci.h
+++ b/arch/mips/cpu/au1x00_usb_ohci.h
diff --git a/cpu/mips/cache.S b/arch/mips/cpu/cache.S
index ff4f11cf78..ff4f11cf78 100644
--- a/cpu/mips/cache.S
+++ b/arch/mips/cpu/cache.S
diff --git a/cpu/mips/config.mk b/arch/mips/cpu/config.mk
index a173c5480c..a173c5480c 100644
--- a/cpu/mips/config.mk
+++ b/arch/mips/cpu/config.mk
diff --git a/cpu/mips/cpu.c b/arch/mips/cpu/cpu.c
index d5a16047de..d5a16047de 100644
--- a/cpu/mips/cpu.c
+++ b/arch/mips/cpu/cpu.c
diff --git a/cpu/mips/incaip_clock.c b/arch/mips/cpu/incaip_clock.c
index fc2c62180b..fc2c62180b 100644
--- a/cpu/mips/incaip_clock.c
+++ b/arch/mips/cpu/incaip_clock.c
diff --git a/cpu/mips/incaip_wdt.S b/arch/mips/cpu/incaip_wdt.S
index 3ade3cd6fd..3ade3cd6fd 100644
--- a/cpu/mips/incaip_wdt.S
+++ b/arch/mips/cpu/incaip_wdt.S
diff --git a/cpu/mips/interrupts.c b/arch/mips/cpu/interrupts.c
index 87f7a9f7e6..87f7a9f7e6 100644
--- a/cpu/mips/interrupts.c
+++ b/arch/mips/cpu/interrupts.c
diff --git a/cpu/mips/start.S b/arch/mips/cpu/start.S
index 57db589b94..57db589b94 100644
--- a/cpu/mips/start.S
+++ b/arch/mips/cpu/start.S
diff --git a/include/asm-mips/addrspace.h b/arch/mips/include/asm/addrspace.h
index 3a1e6d615f..3a1e6d615f 100644
--- a/include/asm-mips/addrspace.h
+++ b/arch/mips/include/asm/addrspace.h
diff --git a/include/asm-mips/asm.h b/arch/mips/include/asm/asm.h
index 608cfcfbb3..608cfcfbb3 100644
--- a/include/asm-mips/asm.h
+++ b/arch/mips/include/asm/asm.h
diff --git a/include/asm-mips/au1x00.h b/arch/mips/include/asm/au1x00.h
index 2a948e8fe7..2a948e8fe7 100644
--- a/include/asm-mips/au1x00.h
+++ b/arch/mips/include/asm/au1x00.h
diff --git a/include/asm-mips/bitops.h b/arch/mips/include/asm/bitops.h
index 1c8f4c0500..1c8f4c0500 100644
--- a/include/asm-mips/bitops.h
+++ b/arch/mips/include/asm/bitops.h
diff --git a/include/asm-mips/byteorder.h b/arch/mips/include/asm/byteorder.h
index b5e685feb6..b5e685feb6 100644
--- a/include/asm-mips/byteorder.h
+++ b/arch/mips/include/asm/byteorder.h
diff --git a/include/asm-mips/cachectl.h b/arch/mips/include/asm/cachectl.h
index f3ce721861..f3ce721861 100644
--- a/include/asm-mips/cachectl.h
+++ b/arch/mips/include/asm/cachectl.h
diff --git a/include/asm-mips/cacheops.h b/arch/mips/include/asm/cacheops.h
index 70bcad7694..70bcad7694 100644
--- a/include/asm-mips/cacheops.h
+++ b/arch/mips/include/asm/cacheops.h
diff --git a/include/asm-mips/config.h b/arch/mips/include/asm/config.h
index 049c44eaf8..049c44eaf8 100644
--- a/include/asm-mips/config.h
+++ b/arch/mips/include/asm/config.h
diff --git a/include/asm-mips/errno.h b/arch/mips/include/asm/errno.h
index 1665a63a81..1665a63a81 100644
--- a/include/asm-mips/errno.h
+++ b/arch/mips/include/asm/errno.h
diff --git a/include/asm-mips/global_data.h b/arch/mips/include/asm/global_data.h
index b2c4891151..b2c4891151 100644
--- a/include/asm-mips/global_data.h
+++ b/arch/mips/include/asm/global_data.h
diff --git a/include/asm-mips/inca-ip.h b/arch/mips/include/asm/inca-ip.h
index e787a1dee6..e787a1dee6 100644
--- a/include/asm-mips/inca-ip.h
+++ b/arch/mips/include/asm/inca-ip.h
diff --git a/include/asm-mips/io.h b/arch/mips/include/asm/io.h
index 025012ae60..025012ae60 100644
--- a/include/asm-mips/io.h
+++ b/arch/mips/include/asm/io.h
diff --git a/include/asm-mips/isadep.h b/arch/mips/include/asm/isadep.h
index 24c6cda793..24c6cda793 100644
--- a/include/asm-mips/isadep.h
+++ b/arch/mips/include/asm/isadep.h
diff --git a/include/asm-mips/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index be7e5c65ec..be7e5c65ec 100644
--- a/include/asm-mips/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
diff --git a/include/asm-mips/posix_types.h b/arch/mips/include/asm/posix_types.h
index 879aae210b..879aae210b 100644
--- a/include/asm-mips/posix_types.h
+++ b/arch/mips/include/asm/posix_types.h
diff --git a/include/asm-mips/processor.h b/arch/mips/include/asm/processor.h
index 24858ddda5..24858ddda5 100644
--- a/include/asm-mips/processor.h
+++ b/arch/mips/include/asm/processor.h
diff --git a/include/asm-mips/ptrace.h b/arch/mips/include/asm/ptrace.h
index 5659c0c873..5659c0c873 100644
--- a/include/asm-mips/ptrace.h
+++ b/arch/mips/include/asm/ptrace.h
diff --git a/include/asm-mips/reboot.h b/arch/mips/include/asm/reboot.h
index 978d206816..978d206816 100644
--- a/include/asm-mips/reboot.h
+++ b/arch/mips/include/asm/reboot.h
diff --git a/include/asm-mips/reg.h b/arch/mips/include/asm/reg.h
index fc6bc0c169..fc6bc0c169 100644
--- a/include/asm-mips/reg.h
+++ b/arch/mips/include/asm/reg.h
diff --git a/include/asm-mips/regdef.h b/arch/mips/include/asm/regdef.h
index 2e65cc3c43..2e65cc3c43 100644
--- a/include/asm-mips/regdef.h
+++ b/arch/mips/include/asm/regdef.h
diff --git a/include/asm-mips/sgidefs.h b/arch/mips/include/asm/sgidefs.h
index 67f2658958..67f2658958 100644
--- a/include/asm-mips/sgidefs.h
+++ b/arch/mips/include/asm/sgidefs.h
diff --git a/include/asm-mips/string.h b/arch/mips/include/asm/string.h
index 579a591e62..579a591e62 100644
--- a/include/asm-mips/string.h
+++ b/arch/mips/include/asm/string.h
diff --git a/include/asm-mips/system.h b/arch/mips/include/asm/system.h
index b6d50e2f04..b6d50e2f04 100644
--- a/include/asm-mips/system.h
+++ b/arch/mips/include/asm/system.h
diff --git a/include/asm-mips/types.h b/arch/mips/include/asm/types.h
index d4bb85999b..d4bb85999b 100644
--- a/include/asm-mips/types.h
+++ b/arch/mips/include/asm/types.h
diff --git a/include/asm-mips/u-boot.h b/arch/mips/include/asm/u-boot.h
index d9c14caf4a..d9c14caf4a 100644
--- a/include/asm-mips/u-boot.h
+++ b/arch/mips/include/asm/u-boot.h
diff --git a/include/asm-mips/unaligned.h b/arch/mips/include/asm/unaligned.h
index 1d5112ea69..1d5112ea69 100644
--- a/include/asm-mips/unaligned.h
+++ b/arch/mips/include/asm/unaligned.h
diff --git a/lib_mips/Makefile b/arch/mips/lib/Makefile
index 7967e5803a..7967e5803a 100644
--- a/lib_mips/Makefile
+++ b/arch/mips/lib/Makefile
diff --git a/lib_mips/board.c b/arch/mips/lib/board.c
index b2d113e870..b2d113e870 100644
--- a/lib_mips/board.c
+++ b/arch/mips/lib/board.c
diff --git a/lib_mips/bootm.c b/arch/mips/lib/bootm.c
index 54af24cba3..54af24cba3 100644
--- a/lib_mips/bootm.c
+++ b/arch/mips/lib/bootm.c
diff --git a/lib_mips/bootm_qemu_mips.c b/arch/mips/lib/bootm_qemu_mips.c
index cc70fa93f3..cc70fa93f3 100644
--- a/lib_mips/bootm_qemu_mips.c
+++ b/arch/mips/lib/bootm_qemu_mips.c
diff --git a/lib_mips/time.c b/arch/mips/lib/time.c
index 0e6644149b..0e6644149b 100644
--- a/lib_mips/time.c
+++ b/arch/mips/lib/time.c
diff --git a/lib_nios/config.mk b/arch/nios/config.mk
index e1b9f07bb3..e1b9f07bb3 100644
--- a/lib_nios/config.mk
+++ b/arch/nios/config.mk
diff --git a/cpu/nios/Makefile b/arch/nios/cpu/Makefile
index ad1745608d..ad1745608d 100644
--- a/cpu/nios/Makefile
+++ b/arch/nios/cpu/Makefile
diff --git a/cpu/nios/asmi.c b/arch/nios/cpu/asmi.c
index 33553b7ca6..33553b7ca6 100644
--- a/cpu/nios/asmi.c
+++ b/arch/nios/cpu/asmi.c
diff --git a/cpu/nios/config.mk b/arch/nios/cpu/config.mk
index f228d7219a..f228d7219a 100644
--- a/cpu/nios/config.mk
+++ b/arch/nios/cpu/config.mk
diff --git a/cpu/nios/cpu.c b/arch/nios/cpu/cpu.c
index 5519e82780..5519e82780 100644
--- a/cpu/nios/cpu.c
+++ b/arch/nios/cpu/cpu.c
diff --git a/cpu/nios/interrupts.c b/arch/nios/cpu/interrupts.c
index 55a5718574..55a5718574 100644
--- a/cpu/nios/interrupts.c
+++ b/arch/nios/cpu/interrupts.c
diff --git a/cpu/nios/serial.c b/arch/nios/cpu/serial.c
index 44aa6001f5..44aa6001f5 100644
--- a/cpu/nios/serial.c
+++ b/arch/nios/cpu/serial.c
diff --git a/cpu/nios/spi.c b/arch/nios/cpu/spi.c
index 89f9797faa..89f9797faa 100644
--- a/cpu/nios/spi.c
+++ b/arch/nios/cpu/spi.c
diff --git a/cpu/nios/start.S b/arch/nios/cpu/start.S
index 3578a04d51..3578a04d51 100644
--- a/cpu/nios/start.S
+++ b/arch/nios/cpu/start.S
diff --git a/cpu/nios/traps.S b/arch/nios/cpu/traps.S
index bc4d3f66da..bc4d3f66da 100644
--- a/cpu/nios/traps.S
+++ b/arch/nios/cpu/traps.S
diff --git a/include/asm-nios/bitops.h b/arch/nios/include/asm/bitops.h
index 0be74f42b8..0be74f42b8 100644
--- a/include/asm-nios/bitops.h
+++ b/arch/nios/include/asm/bitops.h
diff --git a/include/asm-nios/byteorder.h b/arch/nios/include/asm/byteorder.h
index dc7102115f..dc7102115f 100644
--- a/include/asm-nios/byteorder.h
+++ b/arch/nios/include/asm/byteorder.h
diff --git a/include/asm-nios/cache.h b/arch/nios/include/asm/cache.h
index 3cdb7039ff..3cdb7039ff 100644
--- a/include/asm-nios/cache.h
+++ b/arch/nios/include/asm/cache.h
diff --git a/include/asm-nios/config.h b/arch/nios/include/asm/config.h
index 2efe898b35..2efe898b35 100644
--- a/include/asm-nios/config.h
+++ b/arch/nios/include/asm/config.h
diff --git a/include/asm-nios/global_data.h b/arch/nios/include/asm/global_data.h
index fa54ee4dd3..fa54ee4dd3 100644
--- a/include/asm-nios/global_data.h
+++ b/arch/nios/include/asm/global_data.h
diff --git a/include/asm-nios/io.h b/arch/nios/include/asm/io.h
index 899682cc40..899682cc40 100644
--- a/include/asm-nios/io.h
+++ b/arch/nios/include/asm/io.h
diff --git a/include/asm-nios/posix_types.h b/arch/nios/include/asm/posix_types.h
index eb7421489f..eb7421489f 100644
--- a/include/asm-nios/posix_types.h
+++ b/arch/nios/include/asm/posix_types.h
diff --git a/include/asm-nios/processor.h b/arch/nios/include/asm/processor.h
index 78b8976ca3..78b8976ca3 100644
--- a/include/asm-nios/processor.h
+++ b/arch/nios/include/asm/processor.h
diff --git a/include/asm-nios/psr.h b/arch/nios/include/asm/psr.h
index 6e8eba8095..6e8eba8095 100644
--- a/include/asm-nios/psr.h
+++ b/arch/nios/include/asm/psr.h
diff --git a/include/asm-nios/ptrace.h b/arch/nios/include/asm/ptrace.h
index 73754c8696..73754c8696 100644
--- a/include/asm-nios/ptrace.h
+++ b/arch/nios/include/asm/ptrace.h
diff --git a/include/asm-nios/status_led.h b/arch/nios/include/asm/status_led.h
index 241c917688..241c917688 100644
--- a/include/asm-nios/status_led.h
+++ b/arch/nios/include/asm/status_led.h
diff --git a/include/asm-nios/string.h b/arch/nios/include/asm/string.h
index fa33275010..fa33275010 100644
--- a/include/asm-nios/string.h
+++ b/arch/nios/include/asm/string.h
diff --git a/include/asm-nios/system.h b/arch/nios/include/asm/system.h
index 9a9383d161..9a9383d161 100644
--- a/include/asm-nios/system.h
+++ b/arch/nios/include/asm/system.h
diff --git a/include/asm-nios/types.h b/arch/nios/include/asm/types.h
index 636e12fd38..636e12fd38 100644
--- a/include/asm-nios/types.h
+++ b/arch/nios/include/asm/types.h
diff --git a/include/asm-nios/u-boot.h b/arch/nios/include/asm/u-boot.h
index bdb6cf21b6..bdb6cf21b6 100644
--- a/include/asm-nios/u-boot.h
+++ b/arch/nios/include/asm/u-boot.h
diff --git a/lib_nios/Makefile b/arch/nios/lib/Makefile
index f66e9893ab..f66e9893ab 100644
--- a/lib_nios/Makefile
+++ b/arch/nios/lib/Makefile
diff --git a/lib_nios/board.c b/arch/nios/lib/board.c
index 5d2fb2ec4a..5d2fb2ec4a 100644
--- a/lib_nios/board.c
+++ b/arch/nios/lib/board.c
diff --git a/lib_nios/bootm.c b/arch/nios/lib/bootm.c
index b0d5b82574..b0d5b82574 100644
--- a/lib_nios/bootm.c
+++ b/arch/nios/lib/bootm.c
diff --git a/lib_nios/cache.c b/arch/nios/lib/cache.c
index 87dbab1734..87dbab1734 100644
--- a/lib_nios/cache.c
+++ b/arch/nios/lib/cache.c
diff --git a/lib_nios/divmod.c b/arch/nios/lib/divmod.c
index 3c7e71e975..3c7e71e975 100644
--- a/lib_nios/divmod.c
+++ b/arch/nios/lib/divmod.c
diff --git a/lib_nios/math.h b/arch/nios/lib/math.h
index f0aed8edc3..f0aed8edc3 100644
--- a/lib_nios/math.h
+++ b/arch/nios/lib/math.h
diff --git a/lib_nios/mult.c b/arch/nios/lib/mult.c
index ec8139ed5a..ec8139ed5a 100644
--- a/lib_nios/mult.c
+++ b/arch/nios/lib/mult.c
diff --git a/lib_nios/time.c b/arch/nios/lib/time.c
index d5096ee129..d5096ee129 100644
--- a/lib_nios/time.c
+++ b/arch/nios/lib/time.c
diff --git a/lib_nios2/config.mk b/arch/nios2/config.mk
index be40639280..be40639280 100644
--- a/lib_nios2/config.mk
+++ b/arch/nios2/config.mk
diff --git a/cpu/nios2/Makefile b/arch/nios2/cpu/Makefile
index 75f30b43a8..3dfaa833c0 100644
--- a/cpu/nios2/Makefile
+++ b/arch/nios2/cpu/Makefile
@@ -27,7 +27,7 @@ LIB	= $(obj)lib$(CPU).a
 
 START	= start.o
 SOBJS	= exceptions.o
-COBJS	= cpu.o interrupts.o serial.o sysid.o traps.o epcs.o
+COBJS	= cpu.o interrupts.o sysid.o traps.o epcs.o
 
 SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/nios2/config.mk b/arch/nios2/cpu/config.mk
index f228d7219a..f228d7219a 100644
--- a/cpu/nios2/config.mk
+++ b/arch/nios2/cpu/config.mk
diff --git a/cpu/nios2/cpu.c b/arch/nios2/cpu/cpu.c
index 6379534a0b..6379534a0b 100644
--- a/cpu/nios2/cpu.c
+++ b/arch/nios2/cpu/cpu.c
diff --git a/cpu/nios2/epcs.c b/arch/nios2/cpu/epcs.c
index 483b249cd5..ab7d746b5f 100644
--- a/cpu/nios2/epcs.c
+++ b/arch/nios2/cpu/epcs.c
@@ -85,7 +85,7 @@ static int epcs_cs (int assert)
 
 	if (assert) {
 		tmp = readl (&epcs->control);
-		writel (&epcs->control, tmp | NIOS_SPI_SSO);
+		writel (tmp | NIOS_SPI_SSO, &epcs->control);
 	} else {
 		/* Let all bits shift out */
 		start = get_timer (0);
@@ -93,7 +93,7 @@ static int epcs_cs (int assert)
 			if (get_timer (start) > EPCS_TIMEOUT)
 				return (-1);
 		tmp = readl (&epcs->control);
-		writel (&epcs->control, tmp & ~NIOS_SPI_SSO);
+		writel (tmp & ~NIOS_SPI_SSO, &epcs->control);
 	}
 	return (0);
 }
@@ -106,7 +106,7 @@ static int epcs_tx (unsigned char c)
 	while ((readl (&epcs->status) & NIOS_SPI_TRDY) == 0)
 		if (get_timer (start) > EPCS_TIMEOUT)
 			return (-1);
-	writel (&epcs->txdata, c);
+	writel (c, &epcs->txdata);
 	return (0);
 }
 
@@ -207,6 +207,8 @@ static void epcs_status_wr (unsigned char status)
 static struct epcs_devinfo_t devinfo[] = {
 	{ "EPCS1 ", 0x10, 17, 4, 15, 8, 0x0c },
 	{ "EPCS4 ", 0x12, 19, 8, 16, 8, 0x1c },
+	{ "EPCS16", 0x14, 21, 32, 16, 8, 0x1c },
+	{ "EPCS64", 0x16, 23,128, 16, 8, 0x1c },
 	{ 0, 0, 0, 0, 0, 0 }
 };
 
@@ -501,15 +503,17 @@ void do_epcs_info (struct epcs_devinfo_t *dev, int argc, char *argv[])
 	}
 
 	/* Sector info */
-	for (i=0; i<dev->num_sects; i++) {
+	for (i=0; (i < dev->num_sects) && (argc > 1); i++) {
 		erased = epcs_sect_erased (i, &tmp, dev);
-		printf ("     %d: %06x ",
+		if ((i & 0x03) == 0) printf ("\n");
+		printf ("%4d: %07x ",
 			i, i*(1<<dev->sz_sect) );
 		if (erased)
-			printf ("erased\n");
+			printf ("E ");
 		else
-			printf ("data @ 0x%06x\n", tmp);
+			printf ("  ");
 	}
+	printf ("\n");
 
 	return;
 }
diff --git a/cpu/nios2/exceptions.S b/arch/nios2/cpu/exceptions.S
index b9c7a587e1..b9c7a587e1 100644
--- a/cpu/nios2/exceptions.S
+++ b/arch/nios2/cpu/exceptions.S
diff --git a/cpu/nios2/interrupts.c b/arch/nios2/cpu/interrupts.c
index 1c3566ebf9..b552db4eba 100644
--- a/cpu/nios2/interrupts.c
+++ b/arch/nios2/cpu/interrupts.c
@@ -56,7 +56,40 @@ volatile ulong timestamp = 0;
 
 void reset_timer (void)
 {
+	nios_timer_t *tmr =(nios_timer_t *)CONFIG_SYS_NIOS_TMRBASE;
+
+	/* From Embedded Peripherals Handbook:
+	 *
+	 * "When the hardware is configured with Writeable period
+	 * disabled, writing to one of the period_n registers causes
+	 * the counter to reset to the fixed Timeout Period specified
+	 * at system generation time."
+	 *
+	 * Here we force a reload to prevent early timeouts from
+	 * get_timer() when the interrupt period is greater than
+	 * than 1 msec.
+	 *
+	 * Simply write to periodl with its own value to force an
+	 * internal counter reload, THEN reset the timestamp.
+	 */
+	writel (readl (&tmr->periodl), &tmr->periodl);
 	timestamp = 0;
+
+	/* From Embedded Peripherals Handbook:
+	 *
+	 * "Writing to one of the period_n registers stops the internal
+	 * counter, except when the hardware is configured with Start/Stop
+	 * control bits off. If Start/Stop control bits is off, writing
+	 * either register does not stop the counter."
+	 *
+	 * In order to accomodate either configuration, the control
+	 * register is re-written. If the counter is stopped, it will
+	 * be restarted. If it is running, the write is essentially
+	 * a nop.
+	 */
+	writel (NIOS_TIMER_ITO | NIOS_TIMER_CONT | NIOS_TIMER_START,
+			&tmr->control);
+
 }
 
 ulong get_timer (ulong base)
@@ -81,7 +114,7 @@ void tmr_isr (void *arg)
 	/* Interrupt is cleared by writing anything to the
 	 * status register.
 	 */
-	writel (&tmr->status, 0);
+	writel (0, &tmr->status);
 	timestamp += CONFIG_SYS_NIOS_TMRMS;
 #ifdef CONFIG_STATUS_LED
 	status_led_tick(timestamp);
@@ -92,16 +125,16 @@ static void tmr_init (void)
 {
 	nios_timer_t *tmr =(nios_timer_t *)CONFIG_SYS_NIOS_TMRBASE;
 
-	writel (&tmr->status, 0);
-	writel (&tmr->control, 0);
-	writel (&tmr->control, NIOS_TIMER_STOP);
+	writel (0, &tmr->status);
+	writel (0, &tmr->control);
+	writel (NIOS_TIMER_STOP, &tmr->control);
 
 #if defined(CONFIG_SYS_NIOS_TMRCNT)
-	writel (&tmr->periodl, CONFIG_SYS_NIOS_TMRCNT & 0xffff);
-	writel (&tmr->periodh, (CONFIG_SYS_NIOS_TMRCNT >> 16) & 0xffff);
+	writel (CONFIG_SYS_NIOS_TMRCNT & 0xffff, &tmr->periodl);
+	writel ((CONFIG_SYS_NIOS_TMRCNT >> 16) & 0xffff, &tmr->periodh);
 #endif
-	writel (&tmr->control, NIOS_TIMER_ITO | NIOS_TIMER_CONT |
-			  NIOS_TIMER_START );
+	writel (NIOS_TIMER_ITO | NIOS_TIMER_CONT | NIOS_TIMER_START,
+			&tmr->control);
 	irq_install_handler (CONFIG_SYS_NIOS_TMRIRQ, tmr_isr, (void *)tmr);
 }
 
diff --git a/cpu/nios2/start.S b/arch/nios2/cpu/start.S
index 31cd5b004a..31cd5b004a 100644
--- a/cpu/nios2/start.S
+++ b/arch/nios2/cpu/start.S
diff --git a/cpu/nios2/sysid.c b/arch/nios2/cpu/sysid.c
index 77bc8b5690..77bc8b5690 100644
--- a/cpu/nios2/sysid.c
+++ b/arch/nios2/cpu/sysid.c
diff --git a/cpu/nios2/traps.c b/arch/nios2/cpu/traps.c
index 3f1517d61b..3f1517d61b 100644
--- a/cpu/nios2/traps.c
+++ b/arch/nios2/cpu/traps.c
diff --git a/include/asm-nios2/system.h b/arch/nios2/include/asm/bitops.h
index ec84f5935f..cf48ff7a1a 100644
--- a/include/asm-nios2/system.h
+++ b/arch/nios2/include/asm/bitops.h
@@ -20,7 +20,13 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
  */
-#ifndef __ASM_NIOS2_SYSTEM_H_
-#define __ASM_NIOS2_SYSTEM_H_
 
-#endif /* __ASM_NIOS2_SYSTEM_H */
+#ifndef __ASM_NIOS2_BITOPS_H_
+#define __ASM_NIOS2_BITOPS_H_
+
+/* copied from linux-2.6/include/asm-generic/bitops */
+#include <asm/bitops/atomic.h>
+#include <asm/bitops/non-atomic.h>
+#include <asm/bitops/ffs.h>
+
+#endif /* __ASM_NIOS2_BITOPS_H */
diff --git a/arch/nios2/include/asm/bitops/atomic.h b/arch/nios2/include/asm/bitops/atomic.h
new file mode 100644
index 0000000000..c8946465e6
--- /dev/null
+++ b/arch/nios2/include/asm/bitops/atomic.h
@@ -0,0 +1,189 @@
+#ifndef _ASM_GENERIC_BITOPS_ATOMIC_H_
+#define _ASM_GENERIC_BITOPS_ATOMIC_H_
+
+#include <asm/types.h>
+#include <asm/system.h>
+
+#ifdef CONFIG_SMP
+#include <asm/spinlock.h>
+#include <asm/cache.h>		/* we use L1_CACHE_BYTES */
+
+/* Use an array of spinlocks for our atomic_ts.
+ * Hash function to index into a different SPINLOCK.
+ * Since "a" is usually an address, use one spinlock per cacheline.
+ */
+#  define ATOMIC_HASH_SIZE 4
+#  define ATOMIC_HASH(a) (&(__atomic_hash[ (((unsigned long) a)/L1_CACHE_BYTES) & (ATOMIC_HASH_SIZE-1) ]))
+
+extern raw_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned;
+
+/* Can't use raw_spin_lock_irq because of #include problems, so
+ * this is the substitute */
+#define _atomic_spin_lock_irqsave(l,f) do {	\
+	raw_spinlock_t *s = ATOMIC_HASH(l);	\
+	local_irq_save(f);			\
+	__raw_spin_lock(s);			\
+} while(0)
+
+#define _atomic_spin_unlock_irqrestore(l,f) do {	\
+	raw_spinlock_t *s = ATOMIC_HASH(l);		\
+	__raw_spin_unlock(s);				\
+	local_irq_restore(f);				\
+} while(0)
+
+
+#else
+#  define _atomic_spin_lock_irqsave(l,f) do { local_irq_save(f); } while (0)
+#  define _atomic_spin_unlock_irqrestore(l,f) do { local_irq_restore(f); } while (0)
+#endif
+
+/*
+ * NMI events can occur at any time, including when interrupts have been
+ * disabled by *_irqsave().  So you can get NMI events occurring while a
+ * *_bit function is holding a spin lock.  If the NMI handler also wants
+ * to do bit manipulation (and they do) then you can get a deadlock
+ * between the original caller of *_bit() and the NMI handler.
+ *
+ * by Keith Owens
+ */
+
+/**
+ * set_bit - Atomically set a bit in memory
+ * @nr: the bit to set
+ * @addr: the address to start counting from
+ *
+ * This function is atomic and may not be reordered.  See __set_bit()
+ * if you do not require the atomic guarantees.
+ *
+ * Note: there are no guarantees that this function will not be reordered
+ * on non x86 architectures, so if you are writing portable code,
+ * make sure not to rely on its reordering guarantees.
+ *
+ * Note that @nr may be almost arbitrarily large; this function is not
+ * restricted to acting on a single-word quantity.
+ */
+static inline void set_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned long mask = BIT_MASK(nr);
+	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+	unsigned long flags;
+
+	_atomic_spin_lock_irqsave(p, flags);
+	*p  |= mask;
+	_atomic_spin_unlock_irqrestore(p, flags);
+}
+
+/**
+ * clear_bit - Clears a bit in memory
+ * @nr: Bit to clear
+ * @addr: Address to start counting from
+ *
+ * clear_bit() is atomic and may not be reordered.  However, it does
+ * not contain a memory barrier, so if it is used for locking purposes,
+ * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
+ * in order to ensure changes are visible on other processors.
+ */
+static inline void clear_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned long mask = BIT_MASK(nr);
+	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+	unsigned long flags;
+
+	_atomic_spin_lock_irqsave(p, flags);
+	*p &= ~mask;
+	_atomic_spin_unlock_irqrestore(p, flags);
+}
+
+/**
+ * change_bit - Toggle a bit in memory
+ * @nr: Bit to change
+ * @addr: Address to start counting from
+ *
+ * change_bit() is atomic and may not be reordered. It may be
+ * reordered on other architectures than x86.
+ * Note that @nr may be almost arbitrarily large; this function is not
+ * restricted to acting on a single-word quantity.
+ */
+static inline void change_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned long mask = BIT_MASK(nr);
+	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+	unsigned long flags;
+
+	_atomic_spin_lock_irqsave(p, flags);
+	*p ^= mask;
+	_atomic_spin_unlock_irqrestore(p, flags);
+}
+
+/**
+ * test_and_set_bit - Set a bit and return its old value
+ * @nr: Bit to set
+ * @addr: Address to count from
+ *
+ * This operation is atomic and cannot be reordered.
+ * It may be reordered on other architectures than x86.
+ * It also implies a memory barrier.
+ */
+static inline int test_and_set_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned long mask = BIT_MASK(nr);
+	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+	unsigned long old;
+	unsigned long flags;
+
+	_atomic_spin_lock_irqsave(p, flags);
+	old = *p;
+	*p = old | mask;
+	_atomic_spin_unlock_irqrestore(p, flags);
+
+	return (old & mask) != 0;
+}
+
+/**
+ * test_and_clear_bit - Clear a bit and return its old value
+ * @nr: Bit to clear
+ * @addr: Address to count from
+ *
+ * This operation is atomic and cannot be reordered.
+ * It can be reorderdered on other architectures other than x86.
+ * It also implies a memory barrier.
+ */
+static inline int test_and_clear_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned long mask = BIT_MASK(nr);
+	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+	unsigned long old;
+	unsigned long flags;
+
+	_atomic_spin_lock_irqsave(p, flags);
+	old = *p;
+	*p = old & ~mask;
+	_atomic_spin_unlock_irqrestore(p, flags);
+
+	return (old & mask) != 0;
+}
+
+/**
+ * test_and_change_bit - Change a bit and return its old value
+ * @nr: Bit to change
+ * @addr: Address to count from
+ *
+ * This operation is atomic and cannot be reordered.
+ * It also implies a memory barrier.
+ */
+static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned long mask = BIT_MASK(nr);
+	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+	unsigned long old;
+	unsigned long flags;
+
+	_atomic_spin_lock_irqsave(p, flags);
+	old = *p;
+	*p = old ^ mask;
+	_atomic_spin_unlock_irqrestore(p, flags);
+
+	return (old & mask) != 0;
+}
+
+#endif /* _ASM_GENERIC_BITOPS_ATOMIC_H */
diff --git a/arch/nios2/include/asm/bitops/ffs.h b/arch/nios2/include/asm/bitops/ffs.h
new file mode 100644
index 0000000000..fbbb43af7d
--- /dev/null
+++ b/arch/nios2/include/asm/bitops/ffs.h
@@ -0,0 +1,41 @@
+#ifndef _ASM_GENERIC_BITOPS_FFS_H_
+#define _ASM_GENERIC_BITOPS_FFS_H_
+
+/**
+ * ffs - find first bit set
+ * @x: the word to search
+ *
+ * This is defined the same way as
+ * the libc and compiler builtin ffs routines, therefore
+ * differs in spirit from the above ffz (man ffs).
+ */
+static inline int ffs(int x)
+{
+	int r = 1;
+
+	if (!x)
+		return 0;
+	if (!(x & 0xffff)) {
+		x >>= 16;
+		r += 16;
+	}
+	if (!(x & 0xff)) {
+		x >>= 8;
+		r += 8;
+	}
+	if (!(x & 0xf)) {
+		x >>= 4;
+		r += 4;
+	}
+	if (!(x & 3)) {
+		x >>= 2;
+		r += 2;
+	}
+	if (!(x & 1)) {
+		x >>= 1;
+		r += 1;
+	}
+	return r;
+}
+
+#endif /* _ASM_GENERIC_BITOPS_FFS_H_ */
diff --git a/arch/nios2/include/asm/bitops/non-atomic.h b/arch/nios2/include/asm/bitops/non-atomic.h
new file mode 100644
index 0000000000..697cc2b7e0
--- /dev/null
+++ b/arch/nios2/include/asm/bitops/non-atomic.h
@@ -0,0 +1,108 @@
+#ifndef _ASM_GENERIC_BITOPS_NON_ATOMIC_H_
+#define _ASM_GENERIC_BITOPS_NON_ATOMIC_H_
+
+#include <asm/types.h>
+
+/**
+ * __set_bit - Set a bit in memory
+ * @nr: the bit to set
+ * @addr: the address to start counting from
+ *
+ * Unlike set_bit(), this function is non-atomic and may be reordered.
+ * If it's called on the same region of memory simultaneously, the effect
+ * may be that only one operation succeeds.
+ */
+static inline void __set_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned long mask = BIT_MASK(nr);
+	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+
+	*p  |= mask;
+}
+
+static inline void __clear_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned long mask = BIT_MASK(nr);
+	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+
+	*p &= ~mask;
+}
+
+/**
+ * __change_bit - Toggle a bit in memory
+ * @nr: the bit to change
+ * @addr: the address to start counting from
+ *
+ * Unlike change_bit(), this function is non-atomic and may be reordered.
+ * If it's called on the same region of memory simultaneously, the effect
+ * may be that only one operation succeeds.
+ */
+static inline void __change_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned long mask = BIT_MASK(nr);
+	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+
+	*p ^= mask;
+}
+
+/**
+ * __test_and_set_bit - Set a bit and return its old value
+ * @nr: Bit to set
+ * @addr: Address to count from
+ *
+ * This operation is non-atomic and can be reordered.
+ * If two examples of this operation race, one can appear to succeed
+ * but actually fail.  You must protect multiple accesses with a lock.
+ */
+static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned long mask = BIT_MASK(nr);
+	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+	unsigned long old = *p;
+
+	*p = old | mask;
+	return (old & mask) != 0;
+}
+
+/**
+ * __test_and_clear_bit - Clear a bit and return its old value
+ * @nr: Bit to clear
+ * @addr: Address to count from
+ *
+ * This operation is non-atomic and can be reordered.
+ * If two examples of this operation race, one can appear to succeed
+ * but actually fail.  You must protect multiple accesses with a lock.
+ */
+static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
+{
+	unsigned long mask = BIT_MASK(nr);
+	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+	unsigned long old = *p;
+
+	*p = old & ~mask;
+	return (old & mask) != 0;
+}
+
+/* WARNING: non atomic and it can be reordered! */
+static inline int __test_and_change_bit(int nr,
+					    volatile unsigned long *addr)
+{
+	unsigned long mask = BIT_MASK(nr);
+	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+	unsigned long old = *p;
+
+	*p = old ^ mask;
+	return (old & mask) != 0;
+}
+
+/**
+ * test_bit - Determine whether a bit is set
+ * @nr: bit number to test
+ * @addr: Address to start counting from
+ */
+static inline int test_bit(int nr, const volatile unsigned long *addr)
+{
+	return 1UL & (addr[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG-1)));
+}
+
+#endif /* _ASM_GENERIC_BITOPS_NON_ATOMIC_H_ */
diff --git a/include/asm-nios2/byteorder.h b/arch/nios2/include/asm/byteorder.h
index 495c823af2..495c823af2 100644
--- a/include/asm-nios2/byteorder.h
+++ b/arch/nios2/include/asm/byteorder.h
diff --git a/include/asm-nios2/cache.h b/arch/nios2/include/asm/cache.h
index c78f34308b..c78f34308b 100644
--- a/include/asm-nios2/cache.h
+++ b/arch/nios2/include/asm/cache.h
diff --git a/include/asm-nios2/config.h b/arch/nios2/include/asm/config.h
index 011d603a4b..011d603a4b 100644
--- a/include/asm-nios2/config.h
+++ b/arch/nios2/include/asm/config.h
diff --git a/include/asm-ppc/errno.h b/arch/nios2/include/asm/errno.h
index 4c82b503d9..4c82b503d9 100644
--- a/include/asm-ppc/errno.h
+++ b/arch/nios2/include/asm/errno.h
diff --git a/include/asm-nios2/global_data.h b/arch/nios2/include/asm/global_data.h
index 34aa96277a..34aa96277a 100644
--- a/include/asm-nios2/global_data.h
+++ b/arch/nios2/include/asm/global_data.h
diff --git a/include/asm-nios2/io.h b/arch/nios2/include/asm/io.h
index 01d11efece..121405cd60 100644
--- a/include/asm-nios2/io.h
+++ b/arch/nios2/include/asm/io.h
@@ -80,19 +80,19 @@ extern unsigned inl (unsigned port);
 	({unsigned long val;\
 	 asm volatile( "ldwio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})
 
-#define writeb(addr,val)\
-	asm volatile ("stbio %1, 0(%0)" : : "r" (addr), "r" (val))
-#define writew(addr,val)\
-	asm volatile ("sthio %1, 0(%0)" : : "r" (addr), "r" (val))
-#define writel(addr,val)\
-	asm volatile ("stwio %1, 0(%0)" : : "r" (addr), "r" (val))
+#define writeb(val,addr)\
+	asm volatile ("stbio %0, 0(%1)" : : "r" (val), "r" (addr))
+#define writew(val,addr)\
+	asm volatile ("sthio %0, 0(%1)" : : "r" (val), "r" (addr))
+#define writel(val,addr)\
+	asm volatile ("stwio %0, 0(%1)" : : "r" (val), "r" (addr))
 
 #define inb(addr)	readb(addr)
 #define inw(addr)	readw(addr)
 #define inl(addr)	readl(addr)
-#define outb(addr,val)	writeb(addr,val)
-#define outw(addr,val)	writew(addr,val)
-#define outl(addr,val)	writel(addr,val)
+#define outb(val, addr)	writeb(val,addr)
+#define outw(val, addr)	writew(val,addr)
+#define outl(val, addr)	writel(val,addr)
 
 static inline void insb (unsigned long port, void *dst, unsigned long count)
 {
diff --git a/include/asm-nios2/opcodes.h b/arch/nios2/include/asm/opcodes.h
index 211f8ba9dd..211f8ba9dd 100644
--- a/include/asm-nios2/opcodes.h
+++ b/arch/nios2/include/asm/opcodes.h
diff --git a/include/asm-nios2/posix_types.h b/arch/nios2/include/asm/posix_types.h
index c2deea6bf7..c2deea6bf7 100644
--- a/include/asm-nios2/posix_types.h
+++ b/arch/nios2/include/asm/posix_types.h
diff --git a/include/asm-nios2/processor.h b/arch/nios2/include/asm/processor.h
index 68502a5303..68502a5303 100644
--- a/include/asm-nios2/processor.h
+++ b/arch/nios2/include/asm/processor.h
diff --git a/include/asm-nios2/psr.h b/arch/nios2/include/asm/psr.h
index a498b46cf3..a498b46cf3 100644
--- a/include/asm-nios2/psr.h
+++ b/arch/nios2/include/asm/psr.h
diff --git a/include/asm-nios2/ptrace.h b/arch/nios2/include/asm/ptrace.h
index 5430880142..5430880142 100644
--- a/include/asm-nios2/ptrace.h
+++ b/arch/nios2/include/asm/ptrace.h
diff --git a/include/asm-nios2/status_led.h b/arch/nios2/include/asm/status_led.h
index 20f8d90195..20f8d90195 100644
--- a/include/asm-nios2/status_led.h
+++ b/arch/nios2/include/asm/status_led.h
diff --git a/include/asm-nios2/string.h b/arch/nios2/include/asm/string.h
index e86490354f..e86490354f 100644
--- a/include/asm-nios2/string.h
+++ b/arch/nios2/include/asm/string.h
diff --git a/arch/nios2/include/asm/system.h b/arch/nios2/include/asm/system.h
new file mode 100644
index 0000000000..bb03ca5316
--- /dev/null
+++ b/arch/nios2/include/asm/system.h
@@ -0,0 +1,59 @@
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __ASM_NIOS2_SYSTEM_H_
+#define __ASM_NIOS2_SYSTEM_H_
+
+#define local_irq_enable() __asm__ __volatile__ (  \
+	"rdctl	r8, status\n"			   \
+	"ori	r8, r8, 1\n"			   \
+	"wrctl	status, r8\n"			   \
+	: : : "r8")
+
+#define local_irq_disable() __asm__ __volatile__ ( \
+	"rdctl	r8, status\n"			   \
+	"andi	r8, r8, 0xfffe\n"		   \
+	"wrctl	status, r8\n"			   \
+	: : : "r8")
+
+#define local_save_flags(x) __asm__ __volatile__ (	\
+	"rdctl	r8, status\n"				\
+	"mov	%0, r8\n"				\
+	: "=r" (x) : : "r8", "memory")
+
+#define local_irq_restore(x) __asm__ __volatile__ (	\
+	"mov	r8, %0\n"				\
+	"wrctl	status, r8\n"				\
+	: : "r" (x) : "r8", "memory")
+
+/* For spinlocks etc */
+#define local_irq_save(x) do { local_save_flags(x); local_irq_disable(); } \
+	while (0)
+
+#define	irqs_disabled()					\
+({							\
+	unsigned long flags;				\
+	local_save_flags(flags);			\
+	((flags & NIOS2_STATUS_PIE_MSK) == 0x0);	\
+})
+
+#endif /* __ASM_NIOS2_SYSTEM_H */
diff --git a/include/asm-nios2/types.h b/arch/nios2/include/asm/types.h
index ea859c0774..ea859c0774 100644
--- a/include/asm-nios2/types.h
+++ b/arch/nios2/include/asm/types.h
diff --git a/include/asm-nios2/u-boot.h b/arch/nios2/include/asm/u-boot.h
index ec844d0401..ec844d0401 100644
--- a/include/asm-nios2/u-boot.h
+++ b/arch/nios2/include/asm/u-boot.h
diff --git a/include/asm-nios2/unaligned.h b/arch/nios2/include/asm/unaligned.h
index 779117c4bc..779117c4bc 100644
--- a/include/asm-nios2/unaligned.h
+++ b/arch/nios2/include/asm/unaligned.h
diff --git a/lib_nios2/Makefile b/arch/nios2/lib/Makefile
index b69bc38850..b69bc38850 100644
--- a/lib_nios2/Makefile
+++ b/arch/nios2/lib/Makefile
diff --git a/lib_nios2/board.c b/arch/nios2/lib/board.c
index 41d3297190..8ec66a3540 100644
--- a/lib_nios2/board.c
+++ b/arch/nios2/lib/board.c
@@ -139,6 +139,13 @@ void board_init (void)
 	board_late_init ();
 #endif
 
+#if defined(CONFIG_CMD_NET)
+#if defined(CONFIG_NET_MULTI)
+	puts ("Net:   ");
+#endif
+	eth_initialize (bd);
+#endif
+
 	/* main_loop */
 	for (;;) {
 		WATCHDOG_RESET ();
diff --git a/lib_nios2/bootm.c b/arch/nios2/lib/bootm.c
index 675bfac63a..5d25edf80d 100644
--- a/lib_nios2/bootm.c
+++ b/arch/nios2/lib/bootm.c
@@ -26,21 +26,26 @@
 #include <asm/byteorder.h>
 #include <asm/cache.h>
 
+#define NIOS_MAGIC 0x534f494e /* enable command line and initrd passing */
+
 int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
 {
-	void (*kernel)(void) = (void (*)(void))images->ep;
+	void (*kernel)(int, int, int, char *) = (void *)images->ep;
+	char *commandline = getenv("bootargs");
+	ulong initrd_start = images->rd_start;
+	ulong initrd_end = images->rd_end;
 
 	if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
 		return 1;
 
 	/* flushes data and instruction caches before calling the kernel */
-	flush_dcache (0,CONFIG_SYS_DCACHE_SIZE);
-	flush_icache (0,CONFIG_SYS_ICACHE_SIZE);
+	disable_interrupts();
+	flush_dcache((ulong)kernel, CONFIG_SYS_DCACHE_SIZE);
+	flush_icache((ulong)kernel, CONFIG_SYS_ICACHE_SIZE);
 
-	/* For now we assume the Microtronix linux ... which only
-	 * needs to be called ;-)
-	 */
-	kernel ();
+	debug("bootargs=%s @ 0x%lx\n", commandline, (ulong)&commandline);
+	debug("initrd=0x%lx-0x%lx\n", (ulong)initrd_start, (ulong)initrd_end);
+	kernel(NIOS_MAGIC, initrd_start, initrd_end, commandline);
 	/* does not return */
 
 	return 1;
diff --git a/lib_nios2/cache.S b/arch/nios2/lib/cache.S
index ee3b4b79bf..ee3b4b79bf 100644
--- a/lib_nios2/cache.S
+++ b/arch/nios2/lib/cache.S
diff --git a/lib_nios2/divmod.c b/arch/nios2/lib/divmod.c
index 3c7e71e975..3c7e71e975 100644
--- a/lib_nios2/divmod.c
+++ b/arch/nios2/lib/divmod.c
diff --git a/lib_nios2/math.h b/arch/nios2/lib/math.h
index f0aed8edc3..f0aed8edc3 100644
--- a/lib_nios2/math.h
+++ b/arch/nios2/lib/math.h
diff --git a/lib_nios2/mult.c b/arch/nios2/lib/mult.c
index ec8139ed5a..ec8139ed5a 100644
--- a/lib_nios2/mult.c
+++ b/arch/nios2/lib/mult.c
diff --git a/lib_nios2/time.c b/arch/nios2/lib/time.c
index d5096ee129..d5096ee129 100644
--- a/lib_nios2/time.c
+++ b/arch/nios2/lib/time.c
diff --git a/lib_ppc/config.mk b/arch/ppc/config.mk
index 06a3b107d5..06a3b107d5 100644
--- a/lib_ppc/config.mk
+++ b/arch/ppc/config.mk
diff --git a/cpu/74xx_7xx/Makefile b/arch/ppc/cpu/74xx_7xx/Makefile
index fe905f31fe..fe905f31fe 100644
--- a/cpu/74xx_7xx/Makefile
+++ b/arch/ppc/cpu/74xx_7xx/Makefile
diff --git a/cpu/74xx_7xx/cache.S b/arch/ppc/cpu/74xx_7xx/cache.S
index 66c72983d4..66c72983d4 100644
--- a/cpu/74xx_7xx/cache.S
+++ b/arch/ppc/cpu/74xx_7xx/cache.S
diff --git a/cpu/74xx_7xx/config.mk b/arch/ppc/cpu/74xx_7xx/config.mk
index df1f6acedf..df1f6acedf 100644
--- a/cpu/74xx_7xx/config.mk
+++ b/arch/ppc/cpu/74xx_7xx/config.mk
diff --git a/cpu/74xx_7xx/cpu.c b/arch/ppc/cpu/74xx_7xx/cpu.c
index 3c172779b1..3c172779b1 100644
--- a/cpu/74xx_7xx/cpu.c
+++ b/arch/ppc/cpu/74xx_7xx/cpu.c
diff --git a/cpu/74xx_7xx/cpu_init.c b/arch/ppc/cpu/74xx_7xx/cpu_init.c
index 1dd1b2cd84..1dd1b2cd84 100644
--- a/cpu/74xx_7xx/cpu_init.c
+++ b/arch/ppc/cpu/74xx_7xx/cpu_init.c
diff --git a/cpu/74xx_7xx/interrupts.c b/arch/ppc/cpu/74xx_7xx/interrupts.c
index 0ea1aec7a6..0ea1aec7a6 100644
--- a/cpu/74xx_7xx/interrupts.c
+++ b/arch/ppc/cpu/74xx_7xx/interrupts.c
diff --git a/cpu/74xx_7xx/io.S b/arch/ppc/cpu/74xx_7xx/io.S
index af2e6d12fb..af2e6d12fb 100644
--- a/cpu/74xx_7xx/io.S
+++ b/arch/ppc/cpu/74xx_7xx/io.S
diff --git a/cpu/74xx_7xx/kgdb.S b/arch/ppc/cpu/74xx_7xx/kgdb.S
index ad487cdaf4..ad487cdaf4 100644
--- a/cpu/74xx_7xx/kgdb.S
+++ b/arch/ppc/cpu/74xx_7xx/kgdb.S
diff --git a/cpu/74xx_7xx/speed.c b/arch/ppc/cpu/74xx_7xx/speed.c
index f2fdcd5dc3..f2fdcd5dc3 100644
--- a/cpu/74xx_7xx/speed.c
+++ b/arch/ppc/cpu/74xx_7xx/speed.c
diff --git a/cpu/74xx_7xx/start.S b/arch/ppc/cpu/74xx_7xx/start.S
index 88fdf88c34..88fdf88c34 100644
--- a/cpu/74xx_7xx/start.S
+++ b/arch/ppc/cpu/74xx_7xx/start.S
diff --git a/cpu/74xx_7xx/traps.c b/arch/ppc/cpu/74xx_7xx/traps.c
index 1d5dd017ef..1d5dd017ef 100644
--- a/cpu/74xx_7xx/traps.c
+++ b/arch/ppc/cpu/74xx_7xx/traps.c
diff --git a/cpu/mpc512x/Makefile b/arch/ppc/cpu/mpc512x/Makefile
index 427db7ae04..1719c66e8d 100644
--- a/cpu/mpc512x/Makefile
+++ b/arch/ppc/cpu/mpc512x/Makefile
@@ -37,8 +37,8 @@ COBJS-y += iopin.o
 COBJS-y += serial.o
 COBJS-y += speed.o
 COBJS-${CONFIG_FSL_DIU_FB} += diu.o
-COBJS-${CONFIG_FSL_DIU_FB} += ../../board/freescale/common/fsl_diu_fb.o
-COBJS-${CONFIG_FSL_DIU_FB} += ../../board/freescale/common/fsl_logo_bmp.o
+COBJS-${CONFIG_FSL_DIU_FB} += ../../../../board/freescale/common/fsl_diu_fb.o
+COBJS-${CONFIG_FSL_DIU_FB} += ../../../../board/freescale/common/fsl_logo_bmp.o
 COBJS-${CONFIG_CMD_IDE} += ide.o
 COBJS-${CONFIG_IIM} += iim.o
 COBJS-$(CONFIG_PCI) += pci.o
diff --git a/cpu/mpc512x/asm-offsets.h b/arch/ppc/cpu/mpc512x/asm-offsets.h
index 4b147783fb..5873fe05ec 100644
--- a/cpu/mpc512x/asm-offsets.h
+++ b/arch/ppc/cpu/mpc512x/asm-offsets.h
@@ -1,5 +1,5 @@
 /*
- * needed for cpu/mpc512x/start.S
+ * needed for arch/ppc/cpu/mpc512x/start.S
  *
  * These should be auto-generated
  */
diff --git a/cpu/mpc512x/config.mk b/arch/ppc/cpu/mpc512x/config.mk
index fb0a563e6f..b6727dcd21 100644
--- a/cpu/mpc512x/config.mk
+++ b/arch/ppc/cpu/mpc512x/config.mk
@@ -26,4 +26,4 @@ PLATFORM_CPPFLAGS += -DCONFIG_MPC512X -DCONFIG_E300 \
 
 # Use default linker script.
 # A board port can override this setting in board/*/config.mk
-LDSCRIPT := $(SRCTREE)/cpu/mpc512x/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc512x/u-boot.lds
diff --git a/cpu/mpc512x/cpu.c b/arch/ppc/cpu/mpc512x/cpu.c
index 09cbd2024d..09cbd2024d 100644
--- a/cpu/mpc512x/cpu.c
+++ b/arch/ppc/cpu/mpc512x/cpu.c
diff --git a/cpu/mpc512x/cpu_init.c b/arch/ppc/cpu/mpc512x/cpu_init.c
index fe6beaf84d..fe6beaf84d 100644
--- a/cpu/mpc512x/cpu_init.c
+++ b/arch/ppc/cpu/mpc512x/cpu_init.c
diff --git a/cpu/mpc512x/diu.c b/arch/ppc/cpu/mpc512x/diu.c
index ca459a101e..93611615f1 100644
--- a/cpu/mpc512x/diu.c
+++ b/arch/ppc/cpu/mpc512x/diu.c
@@ -27,8 +27,7 @@
 #include <command.h>
 #include <asm/io.h>
 
-#include "../../board/freescale/common/pixis.h"
-#include "../../board/freescale/common/fsl_diu_fb.h"
+#include "../../../../board/freescale/common/fsl_diu_fb.h"
 
 #if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
 #include <stdio_dev.h>
diff --git a/cpu/mpc512x/fixed_sdram.c b/arch/ppc/cpu/mpc512x/fixed_sdram.c
index 442b5fc918..442b5fc918 100644
--- a/cpu/mpc512x/fixed_sdram.c
+++ b/arch/ppc/cpu/mpc512x/fixed_sdram.c
diff --git a/cpu/mpc512x/i2c.c b/arch/ppc/cpu/mpc512x/i2c.c
index e2d909751e..e2d909751e 100644
--- a/cpu/mpc512x/i2c.c
+++ b/arch/ppc/cpu/mpc512x/i2c.c
diff --git a/cpu/mpc512x/ide.c b/arch/ppc/cpu/mpc512x/ide.c
index dd6b2f4673..dd6b2f4673 100644
--- a/cpu/mpc512x/ide.c
+++ b/arch/ppc/cpu/mpc512x/ide.c
diff --git a/cpu/mpc512x/iim.c b/arch/ppc/cpu/mpc512x/iim.c
index 8f2eb37e17..8f2eb37e17 100644
--- a/cpu/mpc512x/iim.c
+++ b/arch/ppc/cpu/mpc512x/iim.c
diff --git a/cpu/mpc512x/interrupts.c b/arch/ppc/cpu/mpc512x/interrupts.c
index ef7c773b2b..ef7c773b2b 100644
--- a/cpu/mpc512x/interrupts.c
+++ b/arch/ppc/cpu/mpc512x/interrupts.c
diff --git a/cpu/mpc512x/iopin.c b/arch/ppc/cpu/mpc512x/iopin.c
index be20947623..be20947623 100644
--- a/cpu/mpc512x/iopin.c
+++ b/arch/ppc/cpu/mpc512x/iopin.c
diff --git a/cpu/mpc512x/pci.c b/arch/ppc/cpu/mpc512x/pci.c
index 141db8b865..141db8b865 100644
--- a/cpu/mpc512x/pci.c
+++ b/arch/ppc/cpu/mpc512x/pci.c
diff --git a/cpu/mpc512x/serial.c b/arch/ppc/cpu/mpc512x/serial.c
index ec2f41bb36..ec2f41bb36 100644
--- a/cpu/mpc512x/serial.c
+++ b/arch/ppc/cpu/mpc512x/serial.c
diff --git a/cpu/mpc512x/speed.c b/arch/ppc/cpu/mpc512x/speed.c
index ce8d0949b2..ce8d0949b2 100644
--- a/cpu/mpc512x/speed.c
+++ b/arch/ppc/cpu/mpc512x/speed.c
diff --git a/cpu/mpc512x/start.S b/arch/ppc/cpu/mpc512x/start.S
index d26b61707e..d26b61707e 100644
--- a/cpu/mpc512x/start.S
+++ b/arch/ppc/cpu/mpc512x/start.S
diff --git a/cpu/mpc512x/traps.c b/arch/ppc/cpu/mpc512x/traps.c
index 786f4a5a7e..786f4a5a7e 100644
--- a/cpu/mpc512x/traps.c
+++ b/arch/ppc/cpu/mpc512x/traps.c
diff --git a/cpu/mpc512x/u-boot.lds b/arch/ppc/cpu/mpc512x/u-boot.lds
index 2e260eb2af..fbc2026d53 100644
--- a/cpu/mpc512x/u-boot.lds
+++ b/arch/ppc/cpu/mpc512x/u-boot.lds
@@ -49,7 +49,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc512x/start.o	(.text)
+    arch/ppc/cpu/mpc512x/start.o	(.text)
     *(.text)
     *(.got1)
     . = ALIGN(16);
diff --git a/cpu/mpc5xx/Makefile b/arch/ppc/cpu/mpc5xx/Makefile
index 8aab0189d7..f2ebb9a123 100644
--- a/cpu/mpc5xx/Makefile
+++ b/arch/ppc/cpu/mpc5xx/Makefile
@@ -25,11 +25,11 @@
 #
 
 #
-# File:			cpu/mpc5xx/Makefile
+# File:			arch/ppc/cpu/mpc5xx/Makefile
 #
 # Discription:		Makefile to build mpc5xx cpu configuration.
 #			Will include top config.mk which itselfs
-#			uses the definitions made in cpu/mpc5xx/config.mk
+#			uses the definitions made in arch/ppc/cpu/mpc5xx/config.mk
 #
 
 
diff --git a/cpu/mpc5xx/config.mk b/arch/ppc/cpu/mpc5xx/config.mk
index 78549249bd..e0b0ce1fd5 100644
--- a/cpu/mpc5xx/config.mk
+++ b/arch/ppc/cpu/mpc5xx/config.mk
@@ -33,4 +33,4 @@ PLATFORM_RELFLAGS +=	-fPIC -meabi
 PLATFORM_CPPFLAGS +=	-DCONFIG_5xx -ffixed-r2 -mpowerpc -msoft-float
 
 # Use default linker script.  Board port can override in board/*/config.mk
-LDSCRIPT := $(SRCTREE)/cpu/mpc5xx/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc5xx/u-boot.lds
diff --git a/cpu/mpc5xx/cpu.c b/arch/ppc/cpu/mpc5xx/cpu.c
index 7fffebcc1e..7fffebcc1e 100644
--- a/cpu/mpc5xx/cpu.c
+++ b/arch/ppc/cpu/mpc5xx/cpu.c
diff --git a/cpu/mpc5xx/cpu_init.c b/arch/ppc/cpu/mpc5xx/cpu_init.c
index cb4bf84737..cb4bf84737 100644
--- a/cpu/mpc5xx/cpu_init.c
+++ b/arch/ppc/cpu/mpc5xx/cpu_init.c
diff --git a/cpu/mpc5xx/interrupts.c b/arch/ppc/cpu/mpc5xx/interrupts.c
index 167543fcf5..167543fcf5 100644
--- a/cpu/mpc5xx/interrupts.c
+++ b/arch/ppc/cpu/mpc5xx/interrupts.c
diff --git a/cpu/mpc5xx/serial.c b/arch/ppc/cpu/mpc5xx/serial.c
index 88c6db81cb..88c6db81cb 100644
--- a/cpu/mpc5xx/serial.c
+++ b/arch/ppc/cpu/mpc5xx/serial.c
diff --git a/cpu/mpc5xx/speed.c b/arch/ppc/cpu/mpc5xx/speed.c
index ea5c1dead5..ea5c1dead5 100644
--- a/cpu/mpc5xx/speed.c
+++ b/arch/ppc/cpu/mpc5xx/speed.c
diff --git a/cpu/mpc5xx/spi.c b/arch/ppc/cpu/mpc5xx/spi.c
index 3ca15ea838..3ca15ea838 100644
--- a/cpu/mpc5xx/spi.c
+++ b/arch/ppc/cpu/mpc5xx/spi.c
diff --git a/cpu/mpc5xx/start.S b/arch/ppc/cpu/mpc5xx/start.S
index 0af879e391..0af879e391 100644
--- a/cpu/mpc5xx/start.S
+++ b/arch/ppc/cpu/mpc5xx/start.S
diff --git a/cpu/mpc5xx/traps.c b/arch/ppc/cpu/mpc5xx/traps.c
index 6882c21a41..6882c21a41 100644
--- a/cpu/mpc5xx/traps.c
+++ b/arch/ppc/cpu/mpc5xx/traps.c
diff --git a/cpu/mpc5xx/u-boot.lds b/arch/ppc/cpu/mpc5xx/u-boot.lds
index deeb06ae26..55190c72d9 100644
--- a/cpu/mpc5xx/u-boot.lds
+++ b/arch/ppc/cpu/mpc5xx/u-boot.lds
@@ -55,7 +55,7 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc5xx/start.o	(.text)
+    arch/ppc/cpu/mpc5xx/start.o	(.text)
 
     *(.text)
     *(.got1)
diff --git a/cpu/mpc5xxx/Makefile b/arch/ppc/cpu/mpc5xxx/Makefile
index 06fdbcfb72..0ee0611550 100644
--- a/cpu/mpc5xxx/Makefile
+++ b/arch/ppc/cpu/mpc5xxx/Makefile
@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(CPU).a
 
 START	= start.o
-SOBJS	= io.o firmware_sc_task_bestcomm.impl.o firmware_sc_task.impl.o
+SOBJS	= io.o firmware_sc_task_bestcomm.impl.o
 COBJS	= i2c.o traps.o cpu.o cpu_init.o ide.o interrupts.o \
 	  loadtask.o pci_mpc5200.o serial.o speed.o usb_ohci.o usb.o
 
diff --git a/cpu/mpc5xxx/config.mk b/arch/ppc/cpu/mpc5xxx/config.mk
index 5e82f67ea9..9a64cb623d 100644
--- a/cpu/mpc5xxx/config.mk
+++ b/arch/ppc/cpu/mpc5xxx/config.mk
@@ -27,4 +27,4 @@ PLATFORM_CPPFLAGS += -DCONFIG_MPC5xxx -ffixed-r2 \
 		     -mstring -mcpu=603e -mmultiple
 
 # Use default linker script.  Board port can override in board/*/config.mk
-LDSCRIPT := $(SRCTREE)/cpu/mpc5xxx/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc5xxx/u-boot.lds
diff --git a/cpu/mpc5xxx/cpu.c b/arch/ppc/cpu/mpc5xxx/cpu.c
index edfb8282b7..b20234d32e 100644
--- a/cpu/mpc5xxx/cpu.c
+++ b/arch/ppc/cpu/mpc5xxx/cpu.c
@@ -50,16 +50,10 @@ int checkcpu (void)
 {
 	ulong clock = gd->cpu_clk;
 	char buf[32];
-#ifndef CONFIG_MGT5100
 	uint svr, pvr;
-#endif
 
 	puts ("CPU:   ");
 
-#ifdef CONFIG_MGT5100
-	puts   (CPU_ID_STR);
-	printf (" (JTAG ID %08lx)", *(vu_long *)MPC5XXX_CDM_JTAGID);
-#else
 	svr = get_svr();
 	pvr = get_pvr();
 
@@ -77,7 +71,6 @@ int checkcpu (void)
 
 	printf (" v%d.%d, Core v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr),
 		PVR_MAJ(pvr), PVR_MIN(pvr));
-#endif
 	printf (" at %s MHz\n", strmhz (buf, clock));
 	return 0;
 }
diff --git a/cpu/mpc5xxx/cpu_init.c b/arch/ppc/cpu/mpc5xxx/cpu_init.c
index 560c9b311c..9daf3755ac 100644
--- a/cpu/mpc5xxx/cpu_init.c
+++ b/arch/ppc/cpu/mpc5xxx/cpu_init.c
@@ -53,10 +53,6 @@ void cpu_init_f (void)
 		(struct mpc5xxx_gpt *) MPC5XXX_GPT;
 #endif /* CONFIG_WATCHDOG */
 	unsigned long addecr = (1 << 25); /* Boot_CS */
-
-#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_MGT5100)
-	addecr |= (1 << 22); /* SDRAM enable */
-#endif
 	/* Pointer is writable since we allocated a register for it */
 	gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
 
@@ -136,7 +132,6 @@ void cpu_init_f (void)
 	out_be32(&lpb->cs5_cfg, CONFIG_SYS_CS5_CFG);
 #endif
 
-#if defined(CONFIG_MPC5200)
 	addecr |= 1;
 #if defined(CONFIG_SYS_CS6_START) && defined(CONFIG_SYS_CS6_SIZE)
 	out_be32(&mm->cs6_start, START_REG(CONFIG_SYS_CS6_START));
@@ -164,14 +159,9 @@ void cpu_init_f (void)
 #if defined(CONFIG_SYS_CS_DEADCYCLE)
 	out_be32(&lpb->cs_deadcycle, CONFIG_SYS_CS_DEADCYCLE);
 #endif
-#endif /* CONFIG_MPC5200 */
 
 	/* Enable chip selects */
-#if defined(CONFIG_MGT5100)
-	out_be32(&mm->addecr, addecr);
-#elif defined(CONFIG_MPC5200)
 	out_be32(&mm->ipbi_ws_ctrl, addecr);
-#endif
 	out_be32(&lpb->cs_ctrl, (1 << 24));
 
 	/* Setup pin multiplexing */
@@ -179,7 +169,6 @@ void cpu_init_f (void)
 	out_be32(&gpio->port_config, CONFIG_SYS_GPS_PORT_CONFIG);
 #endif
 
-#if defined(CONFIG_MPC5200)
 	/* enable timebase */
 	setbits_be32(&xlb->config, (1 << 13));
 
@@ -187,33 +176,29 @@ void cpu_init_f (void)
 	setbits_be32(&xlb->config, (1 << 15));
 	out_be32(&xlb->snoop_window, CONFIG_SYS_SDRAM_BASE | 0x1d);
 
-# if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK)
+#if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK)
 	/* Motorola reports IPB should better run at 133 MHz. */
-#  if defined(CONFIG_MGT5100)
-	setbits_be32(&mm->addecr, 1);
-#  elif defined(CONFIG_MPC5200)
 	setbits_be32(&mm->ipbi_ws_ctrl, 1);
-#  endif
 	/* pci_clk_sel = 0x02, ipb_clk_sel = 0x00; */
 	addecr = in_be32(&cdm->cfg);
 	addecr &= ~0x103;
-#  if defined(CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2)
+# if defined(CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2)
 	/* pci_clk_sel = 0x01 -> IPB_CLK/2 */
 	addecr |= 0x01;
-#  else
+# else
 	/* pci_clk_sel = 0x02 -> XLB_CLK/4 = IPB_CLK/4 */
 	addecr |= 0x02;
-#  endif /* CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 */
+# endif /* CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 */
 	out_be32(&cdm->cfg, addecr);
-# endif	/* CONFIG_SYS_IPBCLK_EQUALS_XLBCLK */
+#endif	/* CONFIG_SYS_IPBCLK_EQUALS_XLBCLK */
 	/* Configure the XLB Arbiter */
 	out_be32(&xlb->master_pri_enable, 0xff);
 	out_be32(&xlb->master_priority, 0x11111111);
 
-# if defined(CONFIG_SYS_XLB_PIPELINING)
+#if defined(CONFIG_SYS_XLB_PIPELINING)
 	/* Enable piplining */
 	clrbits_be32(&xlb->config, (1 << 31));
-# endif
+#endif
 
 #if defined(CONFIG_WATCHDOG)
 	/* Charge the watchdog timer - prescaler = 64k, count = 64k*/
@@ -222,8 +207,6 @@ void cpu_init_f (void)
 
 	reset_5xxx_watchdog();
 #endif /* CONFIG_WATCHDOG */
-
-#endif	/* CONFIG_MPC5200 */
 }
 
 /*
@@ -235,11 +218,7 @@ int cpu_init_r (void)
 		(struct mpc5xxx_intr *) MPC5XXX_ICTL;
 
 	/* mask all interrupts */
-#if defined(CONFIG_MGT5100)
-	out_be32(&intr->per_mask, 0xfffffc00);
-#elif defined(CONFIG_MPC5200)
 	out_be32(&intr->per_mask, 0xffffff00);
-#endif
 	setbits_be32(&intr->main_mask, 0x0001ffff);
 	clrbits_be32(&intr->ctrl, 0x00000f00);
 	/* route critical ints to normal ints */
diff --git a/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S b/arch/ppc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S
index d140c7e989..00c23121ac 100644
--- a/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S
+++ b/arch/ppc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S
@@ -6,8 +6,6 @@
 
 #include <config.h>
 
-#if defined(CONFIG_MPC5200)
-
 /* sas/sccg, gas target */
 .section        smartdmaInitData,"aw",@progbits	/* Initialized data for task variables */
 .section        smartdmaTaskTable,"aw",@progbits	/* Task tables */
@@ -359,5 +357,3 @@ scEthernetRecv_CSave:	/* Task 0 context save space */
 .globl scEthernetXmit_CSave
 scEthernetXmit_CSave:	/* Task 1 context save space */
 .space  128, 0x0
-
-#endif /* CONFIG_MPC5200 */
diff --git a/cpu/mpc5xxx/i2c.c b/arch/ppc/cpu/mpc5xxx/i2c.c
index 4f7f716328..4f7f716328 100644
--- a/cpu/mpc5xxx/i2c.c
+++ b/arch/ppc/cpu/mpc5xxx/i2c.c
diff --git a/cpu/mpc5xxx/ide.c b/arch/ppc/cpu/mpc5xxx/ide.c
index d337abb1c9..d337abb1c9 100644
--- a/cpu/mpc5xxx/ide.c
+++ b/arch/ppc/cpu/mpc5xxx/ide.c
diff --git a/cpu/mpc5xxx/interrupts.c b/arch/ppc/cpu/mpc5xxx/interrupts.c
index 6035771eeb..6035771eeb 100644
--- a/cpu/mpc5xxx/interrupts.c
+++ b/arch/ppc/cpu/mpc5xxx/interrupts.c
diff --git a/cpu/mpc5xxx/io.S b/arch/ppc/cpu/mpc5xxx/io.S
index 2178a26763..2178a26763 100644
--- a/cpu/mpc5xxx/io.S
+++ b/arch/ppc/cpu/mpc5xxx/io.S
diff --git a/cpu/mpc5xxx/loadtask.c b/arch/ppc/cpu/mpc5xxx/loadtask.c
index 47e7b596a6..47e7b596a6 100644
--- a/cpu/mpc5xxx/loadtask.c
+++ b/arch/ppc/cpu/mpc5xxx/loadtask.c
diff --git a/cpu/mpc5xxx/pci_mpc5200.c b/arch/ppc/cpu/mpc5xxx/pci_mpc5200.c
index 225738a073..8268f8afe1 100644
--- a/cpu/mpc5xxx/pci_mpc5200.c
+++ b/arch/ppc/cpu/mpc5xxx/pci_mpc5200.c
@@ -23,7 +23,7 @@
 
 #include <common.h>
 
-#if defined(CONFIG_PCI) && defined(CONFIG_MPC5200)
+#if defined(CONFIG_PCI)
 
 #include <asm/processor.h>
 #include <asm/io.h>
@@ -184,4 +184,4 @@ void pci_mpc5xxx_init (struct pci_controller *hose)
 
 	hose->last_busno = pci_hose_scan(hose);
 }
-#endif /* CONFIG_PCI && CONFIG_MPC5200 */
+#endif /* CONFIG_PCI */
diff --git a/cpu/mpc5xxx/serial.c b/arch/ppc/cpu/mpc5xxx/serial.c
index a8a384aa58..66759887c6 100644
--- a/cpu/mpc5xxx/serial.c
+++ b/arch/ppc/cpu/mpc5xxx/serial.c
@@ -50,8 +50,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PSC_BASE MPC5XXX_PSC2
 #elif CONFIG_PSC_CONSOLE == 3
 #define PSC_BASE MPC5XXX_PSC3
-#elif defined(CONFIG_MGT5100)
-#error CONFIG_PSC_CONSOLE must be in 1, 2 or 3
 #elif CONFIG_PSC_CONSOLE == 4
 #define PSC_BASE MPC5XXX_PSC4
 #elif CONFIG_PSC_CONSOLE == 5
@@ -73,8 +71,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PSC_BASE2 MPC5XXX_PSC2
 #elif CONFIG_PSC_CONSOLE2 == 3
 #define PSC_BASE2 MPC5XXX_PSC3
-#elif defined(CONFIG_MGT5100)
-#error CONFIG_PSC_CONSOLE2 must be in 1, 2 or 3
 #elif CONFIG_PSC_CONSOLE2 == 4
 #define PSC_BASE2 MPC5XXX_PSC4
 #elif CONFIG_PSC_CONSOLE2 == 5
@@ -104,23 +100,14 @@ int serial_init (void)
 	psc->command = PSC_SEL_MODE_REG_1;
 
 	/* select clock sources */
-#if defined(CONFIG_MGT5100)
-	psc->psc_clock_select = 0xdd00;
-	baseclk = (CONFIG_SYS_MPC5XXX_CLKIN + 16) / 32;
-#elif defined(CONFIG_MPC5200)
 	psc->psc_clock_select = 0;
 	baseclk = (gd->ipb_clk + 16) / 32;
-#endif
 
 	/* switch to UART mode */
 	psc->sicr = 0;
 
 	/* configure parity, bit length and so on */
-#if defined(CONFIG_MGT5100)
-	psc->mode = PSC_MODE_ERR | PSC_MODE_8_BITS | PSC_MODE_PARNONE;
-#elif defined(CONFIG_MPC5200)
 	psc->mode = PSC_MODE_8_BITS | PSC_MODE_PARNONE;
-#endif
 	psc->mode = PSC_MODE_ONE_STOP;
 
 	/* set up UART divisor */
@@ -246,11 +233,7 @@ void serial_setbrg(void)
 #endif
 	unsigned long baseclk, div;
 
-#if defined(CONFIG_MGT5100)
-	baseclk = (CONFIG_SYS_MPC5XXX_CLKIN + 16) / 32;
-#elif defined(CONFIG_MPC5200)
 	baseclk = (gd->ipb_clk + 16) / 32;
-#endif
 
 	/* set up UART divisor */
 	div = (baseclk + (gd->baudrate/2)) / gd->baudrate;
diff --git a/cpu/mpc5xxx/speed.c b/arch/ppc/cpu/mpc5xxx/speed.c
index 8027d3e08a..8027d3e08a 100644
--- a/cpu/mpc5xxx/speed.c
+++ b/arch/ppc/cpu/mpc5xxx/speed.c
diff --git a/cpu/mpc5xxx/start.S b/arch/ppc/cpu/mpc5xxx/start.S
index d499da5036..ba49944210 100644
--- a/cpu/mpc5xxx/start.S
+++ b/arch/ppc/cpu/mpc5xxx/start.S
@@ -111,9 +111,6 @@ boot_warm:
 # if defined(CONFIG_SYS_RAMBOOT)
 #  error CONFIG_SYS_LOWBOOT is incompatible with CONFIG_SYS_RAMBOOT
 # endif /* CONFIG_SYS_RAMBOOT */
-# if defined(CONFIG_MGT5100)
-#  error CONFIG_SYS_LOWBOOT is incompatible with MGT5100
-# endif /* CONFIG_MGT5100 */
 	lis	r4, CONFIG_SYS_DEFAULT_MBAR@h
 	lis	r3,	START_REG(CONFIG_SYS_BOOTCS_START)@h
 	ori	r3, r3, START_REG(CONFIG_SYS_BOOTCS_START)@l
@@ -145,14 +142,9 @@ lowboot_reentry:
 #if defined(CONFIG_SYS_DEFAULT_MBAR) && !defined(CONFIG_SYS_RAMBOOT)
 	lis	r3, CONFIG_SYS_MBAR@h
 	ori	r3, r3, CONFIG_SYS_MBAR@l
-#if defined(CONFIG_MPC5200)
 	/* MBAR is mirrored into the MBAR SPR */
 	mtspr	MBAR,r3
 	rlwinm	r3, r3, 16, 16, 31
-#endif
-#if defined(CONFIG_MGT5100)
-	rlwinm	r3, r3, 17, 15, 31
-#endif
 	lis	r4, CONFIG_SYS_DEFAULT_MBAR@h
 	stw	r3, 0(r4)
 #endif /* CONFIG_SYS_DEFAULT_MBAR */
diff --git a/cpu/mpc5xxx/traps.c b/arch/ppc/cpu/mpc5xxx/traps.c
index 934a2f2ab0..934a2f2ab0 100644
--- a/cpu/mpc5xxx/traps.c
+++ b/arch/ppc/cpu/mpc5xxx/traps.c
diff --git a/cpu/mpc5xxx/u-boot-customlayout.lds b/arch/ppc/cpu/mpc5xxx/u-boot-customlayout.lds
index c340086619..81ebde987f 100644
--- a/cpu/mpc5xxx/u-boot-customlayout.lds
+++ b/arch/ppc/cpu/mpc5xxx/u-boot-customlayout.lds
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within  */
     /* the sector layout of our flash chips!    XXX FIXME XXX   */
 
-    cpu/mpc5xxx/start.o          (.text)
-    cpu/mpc5xxx/traps.o          (.text)
-    lib_generic/crc32.o         (.text)
-    lib_ppc/cache.o             (.text)
-    lib_ppc/time.o              (.text)
+    arch/ppc/cpu/mpc5xxx/start.o          (.text)
+    arch/ppc/cpu/mpc5xxx/traps.o          (.text)
+    lib/crc32.o         (.text)
+    arch/ppc/lib/cache.o             (.text)
+    arch/ppc/lib/time.o              (.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o        (.ppcenv)
diff --git a/cpu/mpc5xxx/u-boot.lds b/arch/ppc/cpu/mpc5xxx/u-boot.lds
index 7fe1e95129..64ef481297 100644
--- a/cpu/mpc5xxx/u-boot.lds
+++ b/arch/ppc/cpu/mpc5xxx/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc5xxx/start.o	(.text)
+    arch/ppc/cpu/mpc5xxx/start.o	(.text)
     *(.text)
     *(.got1)
     . = ALIGN(16);
diff --git a/cpu/mpc5xxx/usb.c b/arch/ppc/cpu/mpc5xxx/usb.c
index bec7da3eab..bec7da3eab 100644
--- a/cpu/mpc5xxx/usb.c
+++ b/arch/ppc/cpu/mpc5xxx/usb.c
diff --git a/cpu/mpc5xxx/usb_ohci.c b/arch/ppc/cpu/mpc5xxx/usb_ohci.c
index 66a4af8d8e..7976e4df7d 100644
--- a/cpu/mpc5xxx/usb_ohci.c
+++ b/arch/ppc/cpu/mpc5xxx/usb_ohci.c
@@ -76,13 +76,8 @@
 #define m16_swap(x) swap_16(x)
 #define m32_swap(x) swap_32(x)
 
-#ifdef CONFIG_MPC5200
 #define ohci_cpu_to_le16(x) (x)
 #define ohci_cpu_to_le32(x) (x)
-#else
-#define ohci_cpu_to_le16(x) swap_16(x)
-#define ohci_cpu_to_le32(x) swap_32(x)
-#endif
 
 /* global ohci_t */
 static ohci_t gohci;
@@ -803,9 +798,7 @@ static td_t * dl_reverse_done_list (ohci_t *ohci)
 				} else
 					td_list->ed->hwHeadP &= ohci_cpu_to_le32 (0xfffffff2);
 			}
-#ifdef CONFIG_MPC5200
 			td_list->hwNextTD = 0;
-#endif
 		}
 
 		td_list->next_dl_td = td_rev;
diff --git a/cpu/mpc5xxx/usb_ohci.h b/arch/ppc/cpu/mpc5xxx/usb_ohci.h
index 6eedbdd1d9..629b529a69 100644
--- a/cpu/mpc5xxx/usb_ohci.h
+++ b/arch/ppc/cpu/mpc5xxx/usb_ohci.h
@@ -127,13 +127,8 @@ typedef struct td td_t;
 #define NUM_INTS 32	/* part of the OHCI standard */
 struct ohci_hcca {
 	__u32	int_table[NUM_INTS];	/* Interrupt ED table */
-#if defined(CONFIG_MPC5200)
 	__u16	pad1;			/* set to 0 on each frame_no change */
 	__u16	frame_no;		/* current frame number */
-#else
-	__u16	frame_no;		/* current frame number */
-	__u16	pad1;			/* set to 0 on each frame_no change */
-#endif
 	__u32	done_head;		/* info returned for an interrupt */
 	u8		reserved_for_hc[116];
 } __attribute__((aligned(256)));
diff --git a/cpu/mpc8220/Makefile b/arch/ppc/cpu/mpc8220/Makefile
index b4fad286dc..b4fad286dc 100644
--- a/cpu/mpc8220/Makefile
+++ b/arch/ppc/cpu/mpc8220/Makefile
diff --git a/cpu/mpc8220/config.mk b/arch/ppc/cpu/mpc8220/config.mk
index 3ce40c0dbe..e2ebf38bd5 100644
--- a/cpu/mpc8220/config.mk
+++ b/arch/ppc/cpu/mpc8220/config.mk
@@ -27,4 +27,4 @@ PLATFORM_CPPFLAGS += -DCONFIG_MPC8220 -ffixed-r2 \
 		     -mstring -mcpu=603e -mmultiple
 
 # Use default linker script.  Board port can override in board/*/config.mk
-LDSCRIPT := $(SRCTREE)/cpu/mpc8220/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc8220/u-boot.lds
diff --git a/cpu/mpc8220/cpu.c b/arch/ppc/cpu/mpc8220/cpu.c
index 563cfe0536..563cfe0536 100644
--- a/cpu/mpc8220/cpu.c
+++ b/arch/ppc/cpu/mpc8220/cpu.c
diff --git a/cpu/mpc8220/cpu_init.c b/arch/ppc/cpu/mpc8220/cpu_init.c
index 8f52c7dd0e..8f52c7dd0e 100644
--- a/cpu/mpc8220/cpu_init.c
+++ b/arch/ppc/cpu/mpc8220/cpu_init.c
diff --git a/cpu/mpc8220/dma.h b/arch/ppc/cpu/mpc8220/dma.h
index d06ee63139..d06ee63139 100644
--- a/cpu/mpc8220/dma.h
+++ b/arch/ppc/cpu/mpc8220/dma.h
diff --git a/cpu/mpc8220/dramSetup.c b/arch/ppc/cpu/mpc8220/dramSetup.c
index 52cf1333f7..52cf1333f7 100644
--- a/cpu/mpc8220/dramSetup.c
+++ b/arch/ppc/cpu/mpc8220/dramSetup.c
diff --git a/cpu/mpc8220/dramSetup.h b/arch/ppc/cpu/mpc8220/dramSetup.h
index 3b64e088cd..3b64e088cd 100644
--- a/cpu/mpc8220/dramSetup.h
+++ b/arch/ppc/cpu/mpc8220/dramSetup.h
diff --git a/cpu/mpc8220/fec.c b/arch/ppc/cpu/mpc8220/fec.c
index 992e0ffbc4..992e0ffbc4 100644
--- a/cpu/mpc8220/fec.c
+++ b/arch/ppc/cpu/mpc8220/fec.c
diff --git a/cpu/mpc8220/fec.h b/arch/ppc/cpu/mpc8220/fec.h
index a8927fcdbb..a8927fcdbb 100644
--- a/cpu/mpc8220/fec.h
+++ b/arch/ppc/cpu/mpc8220/fec.h
diff --git a/cpu/mpc8220/fec_dma_tasks.S b/arch/ppc/cpu/mpc8220/fec_dma_tasks.S
index 3f8a03bf15..3f8a03bf15 100644
--- a/cpu/mpc8220/fec_dma_tasks.S
+++ b/arch/ppc/cpu/mpc8220/fec_dma_tasks.S
diff --git a/cpu/mpc8220/i2c.c b/arch/ppc/cpu/mpc8220/i2c.c
index 76ecdf11e2..76ecdf11e2 100644
--- a/cpu/mpc8220/i2c.c
+++ b/arch/ppc/cpu/mpc8220/i2c.c
diff --git a/cpu/mpc8220/i2cCore.c b/arch/ppc/cpu/mpc8220/i2cCore.c
index b89ad034f4..b89ad034f4 100644
--- a/cpu/mpc8220/i2cCore.c
+++ b/arch/ppc/cpu/mpc8220/i2cCore.c
diff --git a/cpu/mpc8220/i2cCore.h b/arch/ppc/cpu/mpc8220/i2cCore.h
index 72783fd48b..72783fd48b 100644
--- a/cpu/mpc8220/i2cCore.h
+++ b/arch/ppc/cpu/mpc8220/i2cCore.h
diff --git a/cpu/mpc8220/interrupts.c b/arch/ppc/cpu/mpc8220/interrupts.c
index 78e99179c9..78e99179c9 100644
--- a/cpu/mpc8220/interrupts.c
+++ b/arch/ppc/cpu/mpc8220/interrupts.c
diff --git a/cpu/mpc8220/io.S b/arch/ppc/cpu/mpc8220/io.S
index 5ecdf550a1..5ecdf550a1 100644
--- a/cpu/mpc8220/io.S
+++ b/arch/ppc/cpu/mpc8220/io.S
diff --git a/cpu/mpc8220/loadtask.c b/arch/ppc/cpu/mpc8220/loadtask.c
index 6d8b627e8c..6d8b627e8c 100644
--- a/cpu/mpc8220/loadtask.c
+++ b/arch/ppc/cpu/mpc8220/loadtask.c
diff --git a/cpu/mpc8220/pci.c b/arch/ppc/cpu/mpc8220/pci.c
index 7ef43b72cd..7ef43b72cd 100644
--- a/cpu/mpc8220/pci.c
+++ b/arch/ppc/cpu/mpc8220/pci.c
diff --git a/cpu/mpc8220/speed.c b/arch/ppc/cpu/mpc8220/speed.c
index 62ac845b7a..62ac845b7a 100644
--- a/cpu/mpc8220/speed.c
+++ b/arch/ppc/cpu/mpc8220/speed.c
diff --git a/cpu/mpc8220/start.S b/arch/ppc/cpu/mpc8220/start.S
index e28999d322..e28999d322 100644
--- a/cpu/mpc8220/start.S
+++ b/arch/ppc/cpu/mpc8220/start.S
diff --git a/cpu/mpc8220/traps.c b/arch/ppc/cpu/mpc8220/traps.c
index 456578001b..456578001b 100644
--- a/cpu/mpc8220/traps.c
+++ b/arch/ppc/cpu/mpc8220/traps.c
diff --git a/cpu/mpc8220/u-boot.lds b/arch/ppc/cpu/mpc8220/u-boot.lds
index 4400e60c8f..8c5d3071f9 100644
--- a/cpu/mpc8220/u-boot.lds
+++ b/arch/ppc/cpu/mpc8220/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc8220/start.o	(.text)
+    arch/ppc/cpu/mpc8220/start.o	(.text)
     *(.text)
     *(.got1)
     . = ALIGN(16);
diff --git a/cpu/mpc8220/uart.c b/arch/ppc/cpu/mpc8220/uart.c
index 0c4b536b48..0c4b536b48 100644
--- a/cpu/mpc8220/uart.c
+++ b/arch/ppc/cpu/mpc8220/uart.c
diff --git a/cpu/mpc824x/.gitignore b/arch/ppc/cpu/mpc824x/.gitignore
index 2d79931e96..2d79931e96 100644
--- a/cpu/mpc824x/.gitignore
+++ b/arch/ppc/cpu/mpc824x/.gitignore
diff --git a/cpu/mpc824x/Makefile b/arch/ppc/cpu/mpc824x/Makefile
index a57ad12c41..a57ad12c41 100644
--- a/cpu/mpc824x/Makefile
+++ b/arch/ppc/cpu/mpc824x/Makefile
diff --git a/cpu/mpc824x/config.mk b/arch/ppc/cpu/mpc824x/config.mk
index 940474bbd9..31ecd20d9f 100644
--- a/cpu/mpc824x/config.mk
+++ b/arch/ppc/cpu/mpc824x/config.mk
@@ -26,4 +26,4 @@ PLATFORM_RELFLAGS += -fPIC -meabi
 PLATFORM_CPPFLAGS += -DCONFIG_MPC824X -ffixed-r2 -mstring -mcpu=603e -msoft-float
 
 # Use default linker script.  Board port can override in board/*/config.mk
-LDSCRIPT := $(SRCTREE)/cpu/mpc824x/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc824x/u-boot.lds
diff --git a/cpu/mpc824x/cpu.c b/arch/ppc/cpu/mpc824x/cpu.c
index 08f6a947f4..08f6a947f4 100644
--- a/cpu/mpc824x/cpu.c
+++ b/arch/ppc/cpu/mpc824x/cpu.c
diff --git a/cpu/mpc824x/cpu_init.c b/arch/ppc/cpu/mpc824x/cpu_init.c
index 395f7767d1..395f7767d1 100644
--- a/cpu/mpc824x/cpu_init.c
+++ b/arch/ppc/cpu/mpc824x/cpu_init.c
diff --git a/cpu/mpc824x/drivers/epic.h b/arch/ppc/cpu/mpc824x/drivers/epic.h
index 2803f631cf..2803f631cf 100644
--- a/cpu/mpc824x/drivers/epic.h
+++ b/arch/ppc/cpu/mpc824x/drivers/epic.h
diff --git a/cpu/mpc824x/drivers/epic/README b/arch/ppc/cpu/mpc824x/drivers/epic/README
index 57989969b9..57989969b9 100644
--- a/cpu/mpc824x/drivers/epic/README
+++ b/arch/ppc/cpu/mpc824x/drivers/epic/README
diff --git a/cpu/mpc824x/drivers/epic/epic.h b/arch/ppc/cpu/mpc824x/drivers/epic/epic.h
index 58f81c5dfd..58f81c5dfd 100644
--- a/cpu/mpc824x/drivers/epic/epic.h
+++ b/arch/ppc/cpu/mpc824x/drivers/epic/epic.h
diff --git a/cpu/mpc824x/drivers/epic/epic1.c b/arch/ppc/cpu/mpc824x/drivers/epic/epic1.c
index ecbb42d0d6..ecbb42d0d6 100644
--- a/cpu/mpc824x/drivers/epic/epic1.c
+++ b/arch/ppc/cpu/mpc824x/drivers/epic/epic1.c
diff --git a/cpu/mpc824x/drivers/epic/epic2.S b/arch/ppc/cpu/mpc824x/drivers/epic/epic2.S
index 52d19aae8e..52d19aae8e 100644
--- a/cpu/mpc824x/drivers/epic/epic2.S
+++ b/arch/ppc/cpu/mpc824x/drivers/epic/epic2.S
diff --git a/cpu/mpc824x/drivers/epic/epicutil.S b/arch/ppc/cpu/mpc824x/drivers/epic/epicutil.S
index 4877050ba4..4877050ba4 100644
--- a/cpu/mpc824x/drivers/epic/epicutil.S
+++ b/arch/ppc/cpu/mpc824x/drivers/epic/epicutil.S
diff --git a/cpu/mpc824x/drivers/errors.h b/arch/ppc/cpu/mpc824x/drivers/errors.h
index 20794a2e89..20794a2e89 100644
--- a/cpu/mpc824x/drivers/errors.h
+++ b/arch/ppc/cpu/mpc824x/drivers/errors.h
diff --git a/cpu/mpc824x/drivers/i2c/i2c.c b/arch/ppc/cpu/mpc824x/drivers/i2c/i2c.c
index 637ae4c1b1..637ae4c1b1 100644
--- a/cpu/mpc824x/drivers/i2c/i2c.c
+++ b/arch/ppc/cpu/mpc824x/drivers/i2c/i2c.c
diff --git a/cpu/mpc824x/drivers/i2c_export.h b/arch/ppc/cpu/mpc824x/drivers/i2c_export.h
index 6264d189bb..6264d189bb 100644
--- a/cpu/mpc824x/drivers/i2c_export.h
+++ b/arch/ppc/cpu/mpc824x/drivers/i2c_export.h
diff --git a/cpu/mpc824x/interrupts.c b/arch/ppc/cpu/mpc824x/interrupts.c
index 139c52cd3c..139c52cd3c 100644
--- a/cpu/mpc824x/interrupts.c
+++ b/arch/ppc/cpu/mpc824x/interrupts.c
diff --git a/cpu/mpc824x/pci.c b/arch/ppc/cpu/mpc824x/pci.c
index cf9cf41ae5..cf9cf41ae5 100644
--- a/cpu/mpc824x/pci.c
+++ b/arch/ppc/cpu/mpc824x/pci.c
diff --git a/cpu/mpc824x/speed.c b/arch/ppc/cpu/mpc824x/speed.c
index fdcb9723cb..fdcb9723cb 100644
--- a/cpu/mpc824x/speed.c
+++ b/arch/ppc/cpu/mpc824x/speed.c
diff --git a/cpu/mpc824x/start.S b/arch/ppc/cpu/mpc824x/start.S
index f3f595af25..f3f595af25 100644
--- a/cpu/mpc824x/start.S
+++ b/arch/ppc/cpu/mpc824x/start.S
diff --git a/cpu/mpc824x/traps.c b/arch/ppc/cpu/mpc824x/traps.c
index 0a7243020b..0a7243020b 100644
--- a/cpu/mpc824x/traps.c
+++ b/arch/ppc/cpu/mpc824x/traps.c
diff --git a/cpu/mpc8260/u-boot.lds b/arch/ppc/cpu/mpc824x/u-boot.lds
index c777cf9da9..8a6d5084ec 100644
--- a/cpu/mpc8260/u-boot.lds
+++ b/arch/ppc/cpu/mpc824x/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc8260/start.o		(.text)
+    arch/ppc/cpu/mpc824x/start.o		(.text)
     *(.text)
     *(.got1)
     . = ALIGN(16);
diff --git a/cpu/mpc8260/Makefile b/arch/ppc/cpu/mpc8260/Makefile
index 9f0c2dd50c..9f0c2dd50c 100644
--- a/cpu/mpc8260/Makefile
+++ b/arch/ppc/cpu/mpc8260/Makefile
diff --git a/cpu/mpc8260/bedbug_603e.c b/arch/ppc/cpu/mpc8260/bedbug_603e.c
index c969ff65e6..c969ff65e6 100644
--- a/cpu/mpc8260/bedbug_603e.c
+++ b/arch/ppc/cpu/mpc8260/bedbug_603e.c
diff --git a/cpu/mpc8260/commproc.c b/arch/ppc/cpu/mpc8260/commproc.c
index 94f6bc224f..94f6bc224f 100644
--- a/cpu/mpc8260/commproc.c
+++ b/arch/ppc/cpu/mpc8260/commproc.c
diff --git a/cpu/mpc8260/config.mk b/arch/ppc/cpu/mpc8260/config.mk
index 39d81eef8b..51bb9faf25 100644
--- a/cpu/mpc8260/config.mk
+++ b/arch/ppc/cpu/mpc8260/config.mk
@@ -27,4 +27,4 @@ PLATFORM_CPPFLAGS += -DCONFIG_8260 -DCONFIG_CPM2 -ffixed-r2 \
 		     -mstring -mcpu=603e -mmultiple
 
 # Use default linker script.  Board port can override in board/*/config.mk
-LDSCRIPT := $(SRCTREE)/cpu/mpc8260/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc8260/u-boot.lds
diff --git a/cpu/mpc8260/cpu.c b/arch/ppc/cpu/mpc8260/cpu.c
index aedbf297ab..aedbf297ab 100644
--- a/cpu/mpc8260/cpu.c
+++ b/arch/ppc/cpu/mpc8260/cpu.c
diff --git a/cpu/mpc8260/cpu_init.c b/arch/ppc/cpu/mpc8260/cpu_init.c
index 1d52773445..1d52773445 100644
--- a/cpu/mpc8260/cpu_init.c
+++ b/arch/ppc/cpu/mpc8260/cpu_init.c
diff --git a/cpu/mpc8260/ether_fcc.c b/arch/ppc/cpu/mpc8260/ether_fcc.c
index 5ac02a09c0..5ac02a09c0 100644
--- a/cpu/mpc8260/ether_fcc.c
+++ b/arch/ppc/cpu/mpc8260/ether_fcc.c
diff --git a/cpu/mpc8260/ether_scc.c b/arch/ppc/cpu/mpc8260/ether_scc.c
index 432111df4c..432111df4c 100644
--- a/cpu/mpc8260/ether_scc.c
+++ b/arch/ppc/cpu/mpc8260/ether_scc.c
diff --git a/cpu/mpc8260/i2c.c b/arch/ppc/cpu/mpc8260/i2c.c
index d2bdcc2d82..d2bdcc2d82 100644
--- a/cpu/mpc8260/i2c.c
+++ b/arch/ppc/cpu/mpc8260/i2c.c
diff --git a/cpu/mpc8260/interrupts.c b/arch/ppc/cpu/mpc8260/interrupts.c
index a7700c4b65..a7700c4b65 100644
--- a/cpu/mpc8260/interrupts.c
+++ b/arch/ppc/cpu/mpc8260/interrupts.c
diff --git a/cpu/mpc8260/kgdb.S b/arch/ppc/cpu/mpc8260/kgdb.S
index c5936c7345..c5936c7345 100644
--- a/cpu/mpc8260/kgdb.S
+++ b/arch/ppc/cpu/mpc8260/kgdb.S
diff --git a/cpu/mpc8260/pci.c b/arch/ppc/cpu/mpc8260/pci.c
index 6a14ba4adc..6a14ba4adc 100644
--- a/cpu/mpc8260/pci.c
+++ b/arch/ppc/cpu/mpc8260/pci.c
diff --git a/cpu/mpc8260/serial_scc.c b/arch/ppc/cpu/mpc8260/serial_scc.c
index 4ab6a28640..4ab6a28640 100644
--- a/cpu/mpc8260/serial_scc.c
+++ b/arch/ppc/cpu/mpc8260/serial_scc.c
diff --git a/cpu/mpc8260/serial_smc.c b/arch/ppc/cpu/mpc8260/serial_smc.c
index fbb3fb0420..fbb3fb0420 100644
--- a/cpu/mpc8260/serial_smc.c
+++ b/arch/ppc/cpu/mpc8260/serial_smc.c
diff --git a/cpu/mpc8260/speed.c b/arch/ppc/cpu/mpc8260/speed.c
index 0e1c2b0659..0e1c2b0659 100644
--- a/cpu/mpc8260/speed.c
+++ b/arch/ppc/cpu/mpc8260/speed.c
diff --git a/cpu/mpc8260/speed.h b/arch/ppc/cpu/mpc8260/speed.h
index 3f32a143cc..3f32a143cc 100644
--- a/cpu/mpc8260/speed.h
+++ b/arch/ppc/cpu/mpc8260/speed.h
diff --git a/cpu/mpc8260/spi.c b/arch/ppc/cpu/mpc8260/spi.c
index f5d2ac35a6..f5d2ac35a6 100644
--- a/cpu/mpc8260/spi.c
+++ b/arch/ppc/cpu/mpc8260/spi.c
diff --git a/cpu/mpc8260/start.S b/arch/ppc/cpu/mpc8260/start.S
index 1fc70bc5e4..1fc70bc5e4 100644
--- a/cpu/mpc8260/start.S
+++ b/arch/ppc/cpu/mpc8260/start.S
diff --git a/cpu/mpc8260/traps.c b/arch/ppc/cpu/mpc8260/traps.c
index d216f71f94..d216f71f94 100644
--- a/cpu/mpc8260/traps.c
+++ b/arch/ppc/cpu/mpc8260/traps.c
diff --git a/cpu/mpc824x/u-boot.lds b/arch/ppc/cpu/mpc8260/u-boot.lds
index 0eac48f2cd..988784416f 100644
--- a/cpu/mpc824x/u-boot.lds
+++ b/arch/ppc/cpu/mpc8260/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc824x/start.o		(.text)
+    arch/ppc/cpu/mpc8260/start.o		(.text)
     *(.text)
     *(.got1)
     . = ALIGN(16);
diff --git a/cpu/mpc83xx/Makefile b/arch/ppc/cpu/mpc83xx/Makefile
index 15e2c18b13..15e2c18b13 100644
--- a/cpu/mpc83xx/Makefile
+++ b/arch/ppc/cpu/mpc83xx/Makefile
diff --git a/cpu/mpc83xx/config.mk b/arch/ppc/cpu/mpc83xx/config.mk
index e80919bc28..8596f6a5e7 100644
--- a/cpu/mpc83xx/config.mk
+++ b/arch/ppc/cpu/mpc83xx/config.mk
@@ -26,4 +26,4 @@ PLATFORM_CPPFLAGS += -DCONFIG_MPC83xx -DCONFIG_E300 \
 			-ffixed-r2 -msoft-float
 
 # Use default linker script.  Board port can override in board/*/config.mk
-LDSCRIPT := $(SRCTREE)/cpu/mpc83xx/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc83xx/u-boot.lds
diff --git a/cpu/mpc83xx/cpu.c b/arch/ppc/cpu/mpc83xx/cpu.c
index 51180d6daa..51180d6daa 100644
--- a/cpu/mpc83xx/cpu.c
+++ b/arch/ppc/cpu/mpc83xx/cpu.c
diff --git a/cpu/mpc83xx/cpu_init.c b/arch/ppc/cpu/mpc83xx/cpu_init.c
index 75b45222bd..75b45222bd 100644
--- a/cpu/mpc83xx/cpu_init.c
+++ b/arch/ppc/cpu/mpc83xx/cpu_init.c
diff --git a/cpu/mpc83xx/ecc.c b/arch/ppc/cpu/mpc83xx/ecc.c
index f3942b411f..f3942b411f 100644
--- a/cpu/mpc83xx/ecc.c
+++ b/arch/ppc/cpu/mpc83xx/ecc.c
diff --git a/cpu/mpc83xx/fdt.c b/arch/ppc/cpu/mpc83xx/fdt.c
index daf73a6e5a..daf73a6e5a 100644
--- a/cpu/mpc83xx/fdt.c
+++ b/arch/ppc/cpu/mpc83xx/fdt.c
diff --git a/cpu/mpc83xx/interrupts.c b/arch/ppc/cpu/mpc83xx/interrupts.c
index faffbaf838..faffbaf838 100644
--- a/cpu/mpc83xx/interrupts.c
+++ b/arch/ppc/cpu/mpc83xx/interrupts.c
diff --git a/cpu/mpc83xx/nand_init.c b/arch/ppc/cpu/mpc83xx/nand_init.c
index 38e141a828..38e141a828 100644
--- a/cpu/mpc83xx/nand_init.c
+++ b/arch/ppc/cpu/mpc83xx/nand_init.c
diff --git a/cpu/mpc83xx/pci.c b/arch/ppc/cpu/mpc83xx/pci.c
index a42b230ff3..a42b230ff3 100644
--- a/cpu/mpc83xx/pci.c
+++ b/arch/ppc/cpu/mpc83xx/pci.c
diff --git a/cpu/mpc83xx/pcie.c b/arch/ppc/cpu/mpc83xx/pcie.c
index 77f8906b9f..77f8906b9f 100644
--- a/cpu/mpc83xx/pcie.c
+++ b/arch/ppc/cpu/mpc83xx/pcie.c
diff --git a/cpu/mpc83xx/qe_io.c b/arch/ppc/cpu/mpc83xx/qe_io.c
index db94f00098..db94f00098 100644
--- a/cpu/mpc83xx/qe_io.c
+++ b/arch/ppc/cpu/mpc83xx/qe_io.c
diff --git a/cpu/mpc83xx/serdes.c b/arch/ppc/cpu/mpc83xx/serdes.c
index 64033fe4c3..64033fe4c3 100644
--- a/cpu/mpc83xx/serdes.c
+++ b/arch/ppc/cpu/mpc83xx/serdes.c
diff --git a/cpu/mpc83xx/spd_sdram.c b/arch/ppc/cpu/mpc83xx/spd_sdram.c
index 44aaa9abc2..44aaa9abc2 100644
--- a/cpu/mpc83xx/spd_sdram.c
+++ b/arch/ppc/cpu/mpc83xx/spd_sdram.c
diff --git a/cpu/mpc83xx/speed.c b/arch/ppc/cpu/mpc83xx/speed.c
index bde7e920a2..bde7e920a2 100644
--- a/cpu/mpc83xx/speed.c
+++ b/arch/ppc/cpu/mpc83xx/speed.c
diff --git a/cpu/mpc83xx/start.S b/arch/ppc/cpu/mpc83xx/start.S
index 68bb6209c3..68bb6209c3 100644
--- a/cpu/mpc83xx/start.S
+++ b/arch/ppc/cpu/mpc83xx/start.S
diff --git a/cpu/mpc83xx/traps.c b/arch/ppc/cpu/mpc83xx/traps.c
index 9d71b8b730..9d71b8b730 100644
--- a/cpu/mpc83xx/traps.c
+++ b/arch/ppc/cpu/mpc83xx/traps.c
diff --git a/cpu/mpc83xx/u-boot.lds b/arch/ppc/cpu/mpc83xx/u-boot.lds
index c84d4b0222..157cef676e 100644
--- a/cpu/mpc83xx/u-boot.lds
+++ b/arch/ppc/cpu/mpc83xx/u-boot.lds
@@ -50,7 +50,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc83xx/start.o	(.text)
+    arch/ppc/cpu/mpc83xx/start.o	(.text)
     *(.text)
     *(.got1)
     . = ALIGN(16);
diff --git a/cpu/mpc85xx/Makefile b/arch/ppc/cpu/mpc85xx/Makefile
index 56de7eb381..f064fee26b 100644
--- a/cpu/mpc85xx/Makefile
+++ b/arch/ppc/cpu/mpc85xx/Makefile
@@ -50,7 +50,11 @@ COBJS-$(CONFIG_MPC8572) += ddr-gen3.o
 COBJS-$(CONFIG_MPC8536) += ddr-gen3.o
 COBJS-$(CONFIG_MPC8569)	+= ddr-gen3.o
 COBJS-$(CONFIG_P1011)	+= ddr-gen3.o
+COBJS-$(CONFIG_P1012)	+= ddr-gen3.o
+COBJS-$(CONFIG_P1013)	+= ddr-gen3.o
 COBJS-$(CONFIG_P1020)	+= ddr-gen3.o
+COBJS-$(CONFIG_P1021)	+= ddr-gen3.o
+COBJS-$(CONFIG_P1022)	+= ddr-gen3.o
 COBJS-$(CONFIG_P2010)	+= ddr-gen3.o
 COBJS-$(CONFIG_P2020)	+= ddr-gen3.o
 COBJS-$(CONFIG_PPC_P4080)	+= ddr-gen3.o
diff --git a/cpu/mpc85xx/commproc.c b/arch/ppc/cpu/mpc85xx/commproc.c
index 594aace4b1..594aace4b1 100644
--- a/cpu/mpc85xx/commproc.c
+++ b/arch/ppc/cpu/mpc85xx/commproc.c
diff --git a/cpu/mpc85xx/config.mk b/arch/ppc/cpu/mpc85xx/config.mk
index 408184ad15..ffb813dc39 100644
--- a/cpu/mpc85xx/config.mk
+++ b/arch/ppc/cpu/mpc85xx/config.mk
@@ -32,4 +32,4 @@ PLATFORM_CPPFLAGS +=$(call cc-option,-mspe=yes)
 PLATFORM_CPPFLAGS +=$(call cc-option,-mno-spe)
 
 # Use default linker script.  Board port can override in board/*/config.mk
-LDSCRIPT := $(SRCTREE)/cpu/mpc85xx/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc85xx/u-boot.lds
diff --git a/cpu/mpc85xx/cpu.c b/arch/ppc/cpu/mpc85xx/cpu.c
index 0cc6e0323f..0cc6e0323f 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/arch/ppc/cpu/mpc85xx/cpu.c
diff --git a/cpu/mpc85xx/cpu_init.c b/arch/ppc/cpu/mpc85xx/cpu_init.c
index e0126d331a..e0126d331a 100644
--- a/cpu/mpc85xx/cpu_init.c
+++ b/arch/ppc/cpu/mpc85xx/cpu_init.c
diff --git a/cpu/mpc85xx/cpu_init_early.c b/arch/ppc/cpu/mpc85xx/cpu_init_early.c
index 32aa94b612..32aa94b612 100644
--- a/cpu/mpc85xx/cpu_init_early.c
+++ b/arch/ppc/cpu/mpc85xx/cpu_init_early.c
diff --git a/cpu/mpc85xx/cpu_init_nand.c b/arch/ppc/cpu/mpc85xx/cpu_init_nand.c
index 184cca4c54..184cca4c54 100644
--- a/cpu/mpc85xx/cpu_init_nand.c
+++ b/arch/ppc/cpu/mpc85xx/cpu_init_nand.c
diff --git a/cpu/mpc85xx/ddr-gen1.c b/arch/ppc/cpu/mpc85xx/ddr-gen1.c
index 54437dd0cb..54437dd0cb 100644
--- a/cpu/mpc85xx/ddr-gen1.c
+++ b/arch/ppc/cpu/mpc85xx/ddr-gen1.c
diff --git a/cpu/mpc85xx/ddr-gen2.c b/arch/ppc/cpu/mpc85xx/ddr-gen2.c
index 655f99c028..655f99c028 100644
--- a/cpu/mpc85xx/ddr-gen2.c
+++ b/arch/ppc/cpu/mpc85xx/ddr-gen2.c
diff --git a/cpu/mpc85xx/ddr-gen3.c b/arch/ppc/cpu/mpc85xx/ddr-gen3.c
index 0691ca455a..0691ca455a 100644
--- a/cpu/mpc85xx/ddr-gen3.c
+++ b/arch/ppc/cpu/mpc85xx/ddr-gen3.c
diff --git a/cpu/mpc85xx/ether_fcc.c b/arch/ppc/cpu/mpc85xx/ether_fcc.c
index 5f1414d758..5f1414d758 100644
--- a/cpu/mpc85xx/ether_fcc.c
+++ b/arch/ppc/cpu/mpc85xx/ether_fcc.c
diff --git a/cpu/mpc85xx/fdt.c b/arch/ppc/cpu/mpc85xx/fdt.c
index 1d11ab470f..1d11ab470f 100644
--- a/cpu/mpc85xx/fdt.c
+++ b/arch/ppc/cpu/mpc85xx/fdt.c
diff --git a/cpu/mpc85xx/fixed_ivor.S b/arch/ppc/cpu/mpc85xx/fixed_ivor.S
index 320cae3296..320cae3296 100644
--- a/cpu/mpc85xx/fixed_ivor.S
+++ b/arch/ppc/cpu/mpc85xx/fixed_ivor.S
diff --git a/cpu/mpc85xx/interrupts.c b/arch/ppc/cpu/mpc85xx/interrupts.c
index 409367d158..409367d158 100644
--- a/cpu/mpc85xx/interrupts.c
+++ b/arch/ppc/cpu/mpc85xx/interrupts.c
diff --git a/cpu/mpc85xx/mp.c b/arch/ppc/cpu/mpc85xx/mp.c
index 826bf32d4d..826bf32d4d 100644
--- a/cpu/mpc85xx/mp.c
+++ b/arch/ppc/cpu/mpc85xx/mp.c
diff --git a/cpu/mpc85xx/mp.h b/arch/ppc/cpu/mpc85xx/mp.h
index 3422cc1070..3422cc1070 100644
--- a/cpu/mpc85xx/mp.h
+++ b/arch/ppc/cpu/mpc85xx/mp.h
diff --git a/cpu/mpc85xx/mpc8536_serdes.c b/arch/ppc/cpu/mpc85xx/mpc8536_serdes.c
index cb6a6f00c9..cb6a6f00c9 100644
--- a/cpu/mpc85xx/mpc8536_serdes.c
+++ b/arch/ppc/cpu/mpc85xx/mpc8536_serdes.c
diff --git a/cpu/mpc85xx/pci.c b/arch/ppc/cpu/mpc85xx/pci.c
index 75d2716ef4..75d2716ef4 100644
--- a/cpu/mpc85xx/pci.c
+++ b/arch/ppc/cpu/mpc85xx/pci.c
diff --git a/cpu/mpc85xx/qe_io.c b/arch/ppc/cpu/mpc85xx/qe_io.c
index 72a29b7b5a..72a29b7b5a 100644
--- a/cpu/mpc85xx/qe_io.c
+++ b/arch/ppc/cpu/mpc85xx/qe_io.c
diff --git a/cpu/mpc85xx/release.S b/arch/ppc/cpu/mpc85xx/release.S
index 00c4c547fd..0b5b9da032 100644
--- a/cpu/mpc85xx/release.S
+++ b/arch/ppc/cpu/mpc85xx/release.S
@@ -1,5 +1,5 @@
 /*
- * Copyright 2008-2009 Freescale Semiconductor, Inc.
+ * Copyright 2008-2010 Freescale Semiconductor, Inc.
  * Kumar Gala <kumar.gala@freescale.com>
  *
  * See file CREDITS for list of people who contributed to this
@@ -57,11 +57,19 @@ __secondary_start_page:
 
 #ifndef CONFIG_E500MC
 	li	r3,(HID1_ASTME|HID1_ABE)@l	/* Addr streaming & broadcast */
+	mfspr   r0,PVR
+	andi.	r0,r0,0xff
+	cmpwi	r0,0x50@l	/* if we are rev 5.0 or greater set MBDD */
+	blt 1f
+	/* Set MBDD bit also */
+	ori r3, r3, HID1_MBDD@l
+1:
 	mtspr	SPRN_HID1,r3
 #endif
 
 	/* Enable branch prediction */
-	li	r3,0x201
+	lis	r3,BUCSR_ENABLE@h
+	ori	r3,r3,BUCSR_ENABLE@l
 	mtspr	SPRN_BUCSR,r3
 
 	/* Ensure TB is 0 */
@@ -70,18 +78,40 @@ __secondary_start_page:
 	mttbu	r3
 
 	/* Enable/invalidate the I-Cache */
-	mfspr	r0,SPRN_L1CSR1
-	ori	r0,r0,(L1CSR1_ICFI|L1CSR1_ICE)
-	mtspr	SPRN_L1CSR1,r0
+	lis	r2,(L1CSR1_ICFI|L1CSR1_ICLFR)@h
+	ori	r2,r2,(L1CSR1_ICFI|L1CSR1_ICLFR)@l
+	mtspr	SPRN_L1CSR1,r2
+1:
+	mfspr	r3,SPRN_L1CSR1
+	and.	r1,r3,r2
+	bne	1b
+
+	lis	r3,(L1CSR1_CPE|L1CSR1_ICE)@h
+	ori	r3,r3,(L1CSR1_CPE|L1CSR1_ICE)@l
+	mtspr	SPRN_L1CSR1,r3
 	isync
+2:
+	mfspr	r3,SPRN_L1CSR1
+	andi.	r1,r3,L1CSR1_ICE@l
+	beq	2b
 
 	/* Enable/invalidate the D-Cache */
-	mfspr	r0,SPRN_L1CSR0
-	ori	r0,r0,(L1CSR0_DCFI|L1CSR0_DCE)
-	msync
-	isync
-	mtspr	SPRN_L1CSR0,r0
+	lis	r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@h
+	ori	r2,r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@l
+	mtspr	SPRN_L1CSR0,r2
+1:
+	mfspr	r3,SPRN_L1CSR0
+	and.	r1,r3,r2
+	bne	1b
+
+	lis	r3,(L1CSR0_CPE|L1CSR0_DCE)@h
+	ori	r3,r3,(L1CSR0_CPE|L1CSR0_DCE)@l
+	mtspr	SPRN_L1CSR0,r3
 	isync
+2:
+	mfspr	r3,SPRN_L1CSR0
+	andi.	r1,r3,L1CSR0_DCE@l
+	beq	2b
 
 #define toreset(x) (x - __secondary_start_page + 0xfffff000)
 
diff --git a/cpu/mpc85xx/resetvec.S b/arch/ppc/cpu/mpc85xx/resetvec.S
index 29555d4a00..29555d4a00 100644
--- a/cpu/mpc85xx/resetvec.S
+++ b/arch/ppc/cpu/mpc85xx/resetvec.S
diff --git a/cpu/mpc85xx/serial_scc.c b/arch/ppc/cpu/mpc85xx/serial_scc.c
index 2dab2124fc..2dab2124fc 100644
--- a/cpu/mpc85xx/serial_scc.c
+++ b/arch/ppc/cpu/mpc85xx/serial_scc.c
diff --git a/cpu/mpc85xx/speed.c b/arch/ppc/cpu/mpc85xx/speed.c
index 268edbc5b7..268edbc5b7 100644
--- a/cpu/mpc85xx/speed.c
+++ b/arch/ppc/cpu/mpc85xx/speed.c
diff --git a/cpu/mpc85xx/start.S b/arch/ppc/cpu/mpc85xx/start.S
index 386fa81990..b3cb56a5b0 100644
--- a/cpu/mpc85xx/start.S
+++ b/arch/ppc/cpu/mpc85xx/start.S
@@ -1,5 +1,5 @@
 /*
- * Copyright 2004, 2007-2009 Freescale Semiconductor, Inc.
+ * Copyright 2004, 2007-2010 Freescale Semiconductor, Inc.
  * Copyright (C) 2003  Motorola,Inc.
  *
  * See file CREDITS for list of people who contributed to this
@@ -108,13 +108,41 @@ _start_e500:
 	mtspr	L1CSR2,r2
 #endif
 
-	lis	r2,L1CSR0_CPE@H	/* enable parity */
-	ori	r2,r2,L1CSR0_DCE
-	mtspr	L1CSR0,r2	/* enable L1 Dcache */
+	/* Enable/invalidate the I-Cache */
+	lis	r2,(L1CSR1_ICFI|L1CSR1_ICLFR)@h
+	ori	r2,r2,(L1CSR1_ICFI|L1CSR1_ICLFR)@l
+	mtspr	SPRN_L1CSR1,r2
+1:
+	mfspr	r3,SPRN_L1CSR1
+	and.	r1,r3,r2
+	bne	1b
+
+	lis	r3,(L1CSR1_CPE|L1CSR1_ICE)@h
+	ori	r3,r3,(L1CSR1_CPE|L1CSR1_ICE)@l
+	mtspr	SPRN_L1CSR1,r3
 	isync
-	mtspr	L1CSR1,r2	/* enable L1 Icache */
+2:
+	mfspr	r3,SPRN_L1CSR1
+	andi.	r1,r3,L1CSR1_ICE@l
+	beq	2b
+
+	/* Enable/invalidate the D-Cache */
+	lis	r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@h
+	ori	r2,r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@l
+	mtspr	SPRN_L1CSR0,r2
+1:
+	mfspr	r3,SPRN_L1CSR0
+	and.	r1,r3,r2
+	bne	1b
+
+	lis	r3,(L1CSR0_CPE|L1CSR0_DCE)@h
+	ori	r3,r3,(L1CSR0_CPE|L1CSR0_DCE)@l
+	mtspr	SPRN_L1CSR0,r3
 	isync
-	msync
+2:
+	mfspr	r3,SPRN_L1CSR0
+	andi.	r1,r3,L1CSR0_DCE@l
+	beq	2b
 
 	/* Setup interrupt vectors */
 	lis	r1,TEXT_BASE@h
@@ -180,13 +208,21 @@ _start_e500:
 
 #ifndef CONFIG_E500MC
 	li	r0,(HID1_ASTME|HID1_ABE)@l	/* Addr streaming & broadcast */
+	mfspr	r3,PVR
+	andi.	r3,r3, 0xff
+	cmpwi	r3,0x50@l	/* if we are rev 5.0 or greater set MBDD */
+	blt 1f
+	/* Set MBDD bit also */
+	ori r0, r0, HID1_MBDD@l
+1:
 	mtspr	HID1,r0
 #endif
 
 	/* Enable Branch Prediction */
 #if defined(CONFIG_BTB)
-	li	r0,0x201		/* BBFI = 1, BPEN = 1 */
-	mtspr	BUCSR,r0
+	lis	r0,BUCSR_ENABLE@h
+	ori	r0,r0,BUCSR_ENABLE@l
+	mtspr	SPRN_BUCSR,r0
 #endif
 
 #if defined(CONFIG_SYS_INIT_DBCR)
diff --git a/cpu/mpc85xx/tlb.c b/arch/ppc/cpu/mpc85xx/tlb.c
index b3037aceaf..b3037aceaf 100644
--- a/cpu/mpc85xx/tlb.c
+++ b/arch/ppc/cpu/mpc85xx/tlb.c
diff --git a/cpu/mpc85xx/traps.c b/arch/ppc/cpu/mpc85xx/traps.c
index 10108d86e3..10108d86e3 100644
--- a/cpu/mpc85xx/traps.c
+++ b/arch/ppc/cpu/mpc85xx/traps.c
diff --git a/cpu/mpc85xx/u-boot-nand.lds b/arch/ppc/cpu/mpc85xx/u-boot-nand.lds
index b4c63e2a2a..b9240f22a7 100644
--- a/cpu/mpc85xx/u-boot-nand.lds
+++ b/arch/ppc/cpu/mpc85xx/u-boot-nand.lds
@@ -117,7 +117,7 @@ SECTIONS
 
   .bootpg ADDR(.text) - 0x1000 :
   {
-    cpu/mpc85xx/start.o	(.bootpg)
+    arch/ppc/cpu/mpc85xx/start.o	(.bootpg)
   } :text = 0xffff
 
   . = ADDR(.text) + 0x80000;
diff --git a/cpu/mpc85xx/u-boot-nand_spl.lds b/arch/ppc/cpu/mpc85xx/u-boot-nand_spl.lds
index fef3e42e09..fef3e42e09 100644
--- a/cpu/mpc85xx/u-boot-nand_spl.lds
+++ b/arch/ppc/cpu/mpc85xx/u-boot-nand_spl.lds
diff --git a/cpu/mpc85xx/u-boot.lds b/arch/ppc/cpu/mpc85xx/u-boot.lds
index 183dce9514..9698bf405a 100644
--- a/cpu/mpc85xx/u-boot.lds
+++ b/arch/ppc/cpu/mpc85xx/u-boot.lds
@@ -121,7 +121,7 @@ SECTIONS
 
   .bootpg RESET_VECTOR_ADDRESS - 0xffc :
   {
-    cpu/mpc85xx/start.o	(.bootpg)
+    arch/ppc/cpu/mpc85xx/start.o	(.bootpg)
   } :text = 0xffff
 
   .resetvec RESET_VECTOR_ADDRESS :
diff --git a/cpu/mpc86xx/Makefile b/arch/ppc/cpu/mpc86xx/Makefile
index daca79ad4f..daca79ad4f 100644
--- a/cpu/mpc86xx/Makefile
+++ b/arch/ppc/cpu/mpc86xx/Makefile
diff --git a/cpu/mpc86xx/cache.S b/arch/ppc/cpu/mpc86xx/cache.S
index 0bb058b043..0bb058b043 100644
--- a/cpu/mpc86xx/cache.S
+++ b/arch/ppc/cpu/mpc86xx/cache.S
diff --git a/cpu/mpc86xx/config.mk b/arch/ppc/cpu/mpc86xx/config.mk
index ca2f8376ed..ca2f8376ed 100644
--- a/cpu/mpc86xx/config.mk
+++ b/arch/ppc/cpu/mpc86xx/config.mk
diff --git a/cpu/mpc86xx/cpu.c b/arch/ppc/cpu/mpc86xx/cpu.c
index f7e012db57..188757587f 100644
--- a/cpu/mpc86xx/cpu.c
+++ b/arch/ppc/cpu/mpc86xx/cpu.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2006,2009 Freescale Semiconductor, Inc.
+ * Copyright 2006,2009-2010 Freescale Semiconductor, Inc.
  * Jeff Brown
  * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
  *
@@ -197,3 +197,37 @@ void mpc86xx_reginfo(void)
 	printf("\tBR7\t0x%08X\tOR7\t0x%08X \n", in_be32(&lbc->br7), in_be32(&lbc->or7));
 
 }
+
+/*
+ * Set the DDR BATs to reflect the actual size of DDR.
+ *
+ * dram_size is the actual size of DDR, in bytes
+ *
+ * Note: we assume that CONFIG_MAX_MEM_MAPPED is 2G or smaller as we only
+ * are using a single BAT to cover DDR.
+ *
+ * If this is not true, (e.g. CONFIG_MAX_MEM_MAPPED is 2GB but HID0_XBSEN
+ * is not defined) then we might have a situation where U-Boot will attempt
+ * to relocated itself outside of the region mapped by DBAT0.
+ * This will cause a machine check.
+ *
+ * Currently we are limited to power of two sized DDR since we only use a
+ * single bat.  If a non-power of two size is used that is less than
+ * CONFIG_MAX_MEM_MAPPED u-boot will crash.
+ *
+ */
+void setup_ddr_bat(phys_addr_t dram_size)
+{
+	unsigned long batu, bl;
+
+	bl = TO_BATU_BL(min(dram_size, CONFIG_MAX_MEM_MAPPED));
+
+	if (BATU_SIZE(bl) != dram_size) {
+		u64 sz = (u64)dram_size - BATU_SIZE(bl);
+		print_size(sz, " left unmapped\n");
+	}
+
+	batu = bl | BATU_VS | BATU_VP;
+	write_bat(DBAT0, batu, CONFIG_SYS_DBAT0L);
+	write_bat(IBAT0, batu, CONFIG_SYS_IBAT0L);
+}
diff --git a/cpu/mpc86xx/cpu_init.c b/arch/ppc/cpu/mpc86xx/cpu_init.c
index 5a78a9cdc7..b4f047d85d 100644
--- a/cpu/mpc86xx/cpu_init.c
+++ b/arch/ppc/cpu/mpc86xx/cpu_init.c
@@ -138,8 +138,12 @@ int cpu_init_r(void)
 /* Set up BAT registers */
 void setup_bats(void)
 {
+#if defined(CONFIG_SYS_DBAT0U) && defined(CONFIG_SYS_DBAT0L)
 	write_bat(DBAT0, CONFIG_SYS_DBAT0U, CONFIG_SYS_DBAT0L);
+#endif
+#if defined(CONFIG_SYS_IBAT0U) && defined(CONFIG_SYS_IBAT0L)
 	write_bat(IBAT0, CONFIG_SYS_IBAT0U, CONFIG_SYS_IBAT0L);
+#endif
 	write_bat(DBAT1, CONFIG_SYS_DBAT1U, CONFIG_SYS_DBAT1L);
 	write_bat(IBAT1, CONFIG_SYS_IBAT1U, CONFIG_SYS_IBAT1L);
 	write_bat(DBAT2, CONFIG_SYS_DBAT2U, CONFIG_SYS_DBAT2L);
diff --git a/cpu/mpc86xx/ddr-8641.c b/arch/ppc/cpu/mpc86xx/ddr-8641.c
index b8f2c9387f..b8f2c9387f 100644
--- a/cpu/mpc86xx/ddr-8641.c
+++ b/arch/ppc/cpu/mpc86xx/ddr-8641.c
diff --git a/cpu/mpc86xx/fdt.c b/arch/ppc/cpu/mpc86xx/fdt.c
index 51f3f4c220..51f3f4c220 100644
--- a/cpu/mpc86xx/fdt.c
+++ b/arch/ppc/cpu/mpc86xx/fdt.c
diff --git a/cpu/mpc86xx/interrupts.c b/arch/ppc/cpu/mpc86xx/interrupts.c
index c78fc72254..c78fc72254 100644
--- a/cpu/mpc86xx/interrupts.c
+++ b/arch/ppc/cpu/mpc86xx/interrupts.c
diff --git a/cpu/mpc86xx/mp.c b/arch/ppc/cpu/mpc86xx/mp.c
index b4a0faacde..b4a0faacde 100644
--- a/cpu/mpc86xx/mp.c
+++ b/arch/ppc/cpu/mpc86xx/mp.c
diff --git a/cpu/mpc86xx/release.S b/arch/ppc/cpu/mpc86xx/release.S
index 67a6f2bdb5..67a6f2bdb5 100644
--- a/cpu/mpc86xx/release.S
+++ b/arch/ppc/cpu/mpc86xx/release.S
diff --git a/cpu/mpc86xx/speed.c b/arch/ppc/cpu/mpc86xx/speed.c
index 64a3479d7e..64a3479d7e 100644
--- a/cpu/mpc86xx/speed.c
+++ b/arch/ppc/cpu/mpc86xx/speed.c
diff --git a/cpu/mpc86xx/start.S b/arch/ppc/cpu/mpc86xx/start.S
index ed1e4ca668..ed1e4ca668 100644
--- a/cpu/mpc86xx/start.S
+++ b/arch/ppc/cpu/mpc86xx/start.S
diff --git a/cpu/mpc86xx/traps.c b/arch/ppc/cpu/mpc86xx/traps.c
index 406403e512..406403e512 100644
--- a/cpu/mpc86xx/traps.c
+++ b/arch/ppc/cpu/mpc86xx/traps.c
diff --git a/cpu/mpc8xx/Makefile b/arch/ppc/cpu/mpc8xx/Makefile
index 5f70459690..5f70459690 100644
--- a/cpu/mpc8xx/Makefile
+++ b/arch/ppc/cpu/mpc8xx/Makefile
diff --git a/cpu/mpc8xx/bedbug_860.c b/arch/ppc/cpu/mpc8xx/bedbug_860.c
index 0308bbbf7a..0308bbbf7a 100644
--- a/cpu/mpc8xx/bedbug_860.c
+++ b/arch/ppc/cpu/mpc8xx/bedbug_860.c
diff --git a/cpu/mpc8xx/commproc.c b/arch/ppc/cpu/mpc8xx/commproc.c
index a87a0dce88..a87a0dce88 100644
--- a/cpu/mpc8xx/commproc.c
+++ b/arch/ppc/cpu/mpc8xx/commproc.c
diff --git a/cpu/mpc8xx/config.mk b/arch/ppc/cpu/mpc8xx/config.mk
index 5540d65350..5540d65350 100644
--- a/cpu/mpc8xx/config.mk
+++ b/arch/ppc/cpu/mpc8xx/config.mk
diff --git a/cpu/mpc8xx/cpu.c b/arch/ppc/cpu/mpc8xx/cpu.c
index 2eb848bd0e..2eb848bd0e 100644
--- a/cpu/mpc8xx/cpu.c
+++ b/arch/ppc/cpu/mpc8xx/cpu.c
diff --git a/cpu/mpc8xx/cpu_init.c b/arch/ppc/cpu/mpc8xx/cpu_init.c
index eb0091bdb3..eb0091bdb3 100644
--- a/cpu/mpc8xx/cpu_init.c
+++ b/arch/ppc/cpu/mpc8xx/cpu_init.c
diff --git a/cpu/mpc8xx/fdt.c b/arch/ppc/cpu/mpc8xx/fdt.c
index 7130983ff2..7130983ff2 100644
--- a/cpu/mpc8xx/fdt.c
+++ b/arch/ppc/cpu/mpc8xx/fdt.c
diff --git a/cpu/mpc8xx/fec.c b/arch/ppc/cpu/mpc8xx/fec.c
index 89c1ff939d..89c1ff939d 100644
--- a/cpu/mpc8xx/fec.c
+++ b/arch/ppc/cpu/mpc8xx/fec.c
diff --git a/cpu/mpc8xx/fec.h b/arch/ppc/cpu/mpc8xx/fec.h
index a49417c666..a49417c666 100644
--- a/cpu/mpc8xx/fec.h
+++ b/arch/ppc/cpu/mpc8xx/fec.h
diff --git a/cpu/mpc8xx/i2c.c b/arch/ppc/cpu/mpc8xx/i2c.c
index 338cababe8..338cababe8 100644
--- a/cpu/mpc8xx/i2c.c
+++ b/arch/ppc/cpu/mpc8xx/i2c.c
diff --git a/cpu/mpc8xx/interrupts.c b/arch/ppc/cpu/mpc8xx/interrupts.c
index 5daa6b2752..5daa6b2752 100644
--- a/cpu/mpc8xx/interrupts.c
+++ b/arch/ppc/cpu/mpc8xx/interrupts.c
diff --git a/cpu/mpc8xx/kgdb.S b/arch/ppc/cpu/mpc8xx/kgdb.S
index 2cc8fe63c9..2cc8fe63c9 100644
--- a/cpu/mpc8xx/kgdb.S
+++ b/arch/ppc/cpu/mpc8xx/kgdb.S
diff --git a/cpu/mpc8xx/lcd.c b/arch/ppc/cpu/mpc8xx/lcd.c
index 4b88b21b3f..4b88b21b3f 100644
--- a/cpu/mpc8xx/lcd.c
+++ b/arch/ppc/cpu/mpc8xx/lcd.c
diff --git a/cpu/mpc8xx/plprcr_write.S b/arch/ppc/cpu/mpc8xx/plprcr_write.S
index e325671142..e325671142 100644
--- a/cpu/mpc8xx/plprcr_write.S
+++ b/arch/ppc/cpu/mpc8xx/plprcr_write.S
diff --git a/cpu/mpc8xx/scc.c b/arch/ppc/cpu/mpc8xx/scc.c
index effb967e32..effb967e32 100644
--- a/cpu/mpc8xx/scc.c
+++ b/arch/ppc/cpu/mpc8xx/scc.c
diff --git a/cpu/mpc8xx/serial.c b/arch/ppc/cpu/mpc8xx/serial.c
index 664db65a56..664db65a56 100644
--- a/cpu/mpc8xx/serial.c
+++ b/arch/ppc/cpu/mpc8xx/serial.c
diff --git a/cpu/mpc8xx/speed.c b/arch/ppc/cpu/mpc8xx/speed.c
index f309f29c04..f309f29c04 100644
--- a/cpu/mpc8xx/speed.c
+++ b/arch/ppc/cpu/mpc8xx/speed.c
diff --git a/cpu/mpc8xx/spi.c b/arch/ppc/cpu/mpc8xx/spi.c
index b2ac23e5ea..b2ac23e5ea 100644
--- a/cpu/mpc8xx/spi.c
+++ b/arch/ppc/cpu/mpc8xx/spi.c
diff --git a/cpu/mpc8xx/start.S b/arch/ppc/cpu/mpc8xx/start.S
index 7cf602fd4b..7cf602fd4b 100644
--- a/cpu/mpc8xx/start.S
+++ b/arch/ppc/cpu/mpc8xx/start.S
diff --git a/cpu/mpc8xx/traps.c b/arch/ppc/cpu/mpc8xx/traps.c
index 6efe8e0ea7..6efe8e0ea7 100644
--- a/cpu/mpc8xx/traps.c
+++ b/arch/ppc/cpu/mpc8xx/traps.c
diff --git a/cpu/mpc8xx/upatch.c b/arch/ppc/cpu/mpc8xx/upatch.c
index a8cb735ab7..a8cb735ab7 100644
--- a/cpu/mpc8xx/upatch.c
+++ b/arch/ppc/cpu/mpc8xx/upatch.c
diff --git a/cpu/mpc8xx/video.c b/arch/ppc/cpu/mpc8xx/video.c
index c79c499b6f..c79c499b6f 100644
--- a/cpu/mpc8xx/video.c
+++ b/arch/ppc/cpu/mpc8xx/video.c
diff --git a/cpu/mpc8xx/wlkbd.c b/arch/ppc/cpu/mpc8xx/wlkbd.c
index 13009e2641..13009e2641 100644
--- a/cpu/mpc8xx/wlkbd.c
+++ b/arch/ppc/cpu/mpc8xx/wlkbd.c
diff --git a/cpu/mpc8xxx/Makefile b/arch/ppc/cpu/mpc8xxx/Makefile
index 481f9e541d..481f9e541d 100644
--- a/cpu/mpc8xxx/Makefile
+++ b/arch/ppc/cpu/mpc8xxx/Makefile
diff --git a/cpu/mpc8xxx/cpu.c b/arch/ppc/cpu/mpc8xxx/cpu.c
index d191263f50..fef062b224 100644
--- a/cpu/mpc8xxx/cpu.c
+++ b/arch/ppc/cpu/mpc8xxx/cpu.c
@@ -1,9 +1,9 @@
 /*
- * Copyright 2009 Freescale Semiconductor, Inc.
+ * Copyright 2009-2010 Freescale Semiconductor, Inc.
  *
- * This file is derived from cpu/mpc85xx/cpu.c and cpu/mpc86xx/cpu.c.
- * Basically this file contains cpu specific common code for 85xx/86xx
- * processors.
+ * This file is derived from arch/ppc/cpu/mpc85xx/cpu.c and
+ * arch/ppc/cpu/mpc86xx/cpu.c. Basically this file contains
+ * cpu specific common code for 85xx/86xx processors.
  * See file CREDITS for list of people who contributed to this
  * project.
  *
@@ -66,8 +66,16 @@ struct cpu_type cpu_type_list [] = {
 	CPU_TYPE_ENTRY(8572, 8572_E, 2),
 	CPU_TYPE_ENTRY(P1011, P1011, 1),
 	CPU_TYPE_ENTRY(P1011, P1011_E, 1),
+	CPU_TYPE_ENTRY(P1012, P1012, 1),
+	CPU_TYPE_ENTRY(P1012, P1012_E, 1),
+	CPU_TYPE_ENTRY(P1013, P1013, 1),
+	CPU_TYPE_ENTRY(P1013, P1013_E, 1),
 	CPU_TYPE_ENTRY(P1020, P1020, 2),
 	CPU_TYPE_ENTRY(P1020, P1020_E, 2),
+	CPU_TYPE_ENTRY(P1021, P1021, 2),
+	CPU_TYPE_ENTRY(P1021, P1021_E, 2),
+	CPU_TYPE_ENTRY(P1022, P1022, 2),
+	CPU_TYPE_ENTRY(P1022, P1022_E, 2),
 	CPU_TYPE_ENTRY(P2010, P2010, 1),
 	CPU_TYPE_ENTRY(P2010, P2010_E, 1),
 	CPU_TYPE_ENTRY(P2020, P2020, 2),
diff --git a/cpu/mpc8xxx/ddr/Makefile b/arch/ppc/cpu/mpc8xxx/ddr/Makefile
index cb7f856554..cb7f856554 100644
--- a/cpu/mpc8xxx/ddr/Makefile
+++ b/arch/ppc/cpu/mpc8xxx/ddr/Makefile
diff --git a/cpu/mpc8xxx/ddr/common_timing_params.h b/arch/ppc/cpu/mpc8xxx/ddr/common_timing_params.h
index 5aea517f25..5aea517f25 100644
--- a/cpu/mpc8xxx/ddr/common_timing_params.h
+++ b/arch/ppc/cpu/mpc8xxx/ddr/common_timing_params.h
diff --git a/cpu/mpc8xxx/ddr/ctrl_regs.c b/arch/ppc/cpu/mpc8xxx/ddr/ctrl_regs.c
index adc4f6ee37..03f9c4380d 100644
--- a/cpu/mpc8xxx/ddr/ctrl_regs.c
+++ b/arch/ppc/cpu/mpc8xxx/ddr/ctrl_regs.c
@@ -1,9 +1,10 @@
 /*
- * Copyright 2008-2009 Freescale Semiconductor, Inc.
+ * Copyright 2008-2010 Freescale Semiconductor, Inc.
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * Version 2 as published by the Free Software Foundation.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
  */
 
 /*
@@ -934,7 +935,8 @@ static void set_ddr_init_ext_addr(fsl_ddr_cfg_regs_t *ddr)
 }
 
 /* DDR SDRAM Timing Configuration 4 (TIMING_CFG_4) */
-static void set_timing_cfg_4(fsl_ddr_cfg_regs_t *ddr)
+static void set_timing_cfg_4(fsl_ddr_cfg_regs_t *ddr,
+				const memctl_options_t *popts)
 {
 	unsigned int rwt = 0; /* Read-to-write turnaround for same CS */
 	unsigned int wrt = 0; /* Write-to-read turnaround for same CS */
@@ -943,9 +945,15 @@ static void set_timing_cfg_4(fsl_ddr_cfg_regs_t *ddr)
 	unsigned int dll_lock = 0; /* DDR SDRAM DLL Lock Time */
 
 #if defined(CONFIG_FSL_DDR3)
-	/* We need set BL/2 + 4 for BC4 or OTF */
-	rrt = 4;	/* BL/2 + 4 clocks */
-	wwt = 4;	/* BL/2 + 4 clocks */
+	if (popts->burst_length == DDR_BL8) {
+		/* We set BL/2 for fixed BL8 */
+		rrt = 0;	/* BL/2 clocks */
+		wwt = 0;	/* BL/2 clocks */
+	} else {
+		/* We need to set BL/2 + 2 to BC4 and OTF */
+		rrt = 2;	/* BL/2 + 2 clocks */
+		wwt = 2;	/* BL/2 + 2 clocks */
+	}
 	dll_lock = 1;	/* tDLLK = 512 clocks from spec */
 #endif
 	ddr->timing_cfg_4 = (0
@@ -1343,7 +1351,7 @@ compute_fsl_memctl_config_regs(const memctl_options_t *popts,
 	set_ddr_sdram_clk_cntl(ddr, popts);
 	set_ddr_init_addr(ddr);
 	set_ddr_init_ext_addr(ddr);
-	set_timing_cfg_4(ddr);
+	set_timing_cfg_4(ddr, popts);
 	set_timing_cfg_5(ddr);
 
 	set_ddr_zq_cntl(ddr, zq_en);
diff --git a/cpu/mpc8xxx/ddr/ddr.h b/arch/ppc/cpu/mpc8xxx/ddr/ddr.h
index f1220750df..f1220750df 100644
--- a/cpu/mpc8xxx/ddr/ddr.h
+++ b/arch/ppc/cpu/mpc8xxx/ddr/ddr.h
diff --git a/cpu/mpc8xxx/ddr/ddr1_dimm_params.c b/arch/ppc/cpu/mpc8xxx/ddr/ddr1_dimm_params.c
index 9184764418..9184764418 100644
--- a/cpu/mpc8xxx/ddr/ddr1_dimm_params.c
+++ b/arch/ppc/cpu/mpc8xxx/ddr/ddr1_dimm_params.c
diff --git a/cpu/mpc8xxx/ddr/ddr2_dimm_params.c b/arch/ppc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c
index d9d0fa70ee..d9d0fa70ee 100644
--- a/cpu/mpc8xxx/ddr/ddr2_dimm_params.c
+++ b/arch/ppc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c
diff --git a/cpu/mpc8xxx/ddr/ddr3_dimm_params.c b/arch/ppc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
index d4199baa82..d4199baa82 100644
--- a/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
+++ b/arch/ppc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
diff --git a/cpu/mpc8xxx/ddr/lc_common_dimm_params.c b/arch/ppc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
index e888e3ea56..e888e3ea56 100644
--- a/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
+++ b/arch/ppc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
diff --git a/cpu/mpc8xxx/ddr/main.c b/arch/ppc/cpu/mpc8xxx/ddr/main.c
index faa1af95ef..faa1af95ef 100644
--- a/cpu/mpc8xxx/ddr/main.c
+++ b/arch/ppc/cpu/mpc8xxx/ddr/main.c
diff --git a/cpu/mpc8xxx/ddr/options.c b/arch/ppc/cpu/mpc8xxx/ddr/options.c
index 3dcd33ddf2..46731c8153 100644
--- a/cpu/mpc8xxx/ddr/options.c
+++ b/arch/ppc/cpu/mpc8xxx/ddr/options.c
@@ -1,9 +1,10 @@
 /*
- * Copyright 2008 Freescale Semiconductor, Inc.
+ * Copyright 2008, 2010 Freescale Semiconductor, Inc.
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * Version 2 as published by the Free Software Foundation.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
  */
 
 #include <common.h>
@@ -109,8 +110,13 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
 
 	/* Choose burst length. */
 #if defined(CONFIG_FSL_DDR3)
+#if defined(CONFIG_E500MC)
+	popts->OTF_burst_chop_en = 0;	/* on-the-fly burst chop disable */
+	popts->burst_length = DDR_BL8;	/* Fixed 8-beat burst len */
+#else
 	popts->OTF_burst_chop_en = 1;	/* on-the-fly burst chop */
 	popts->burst_length = DDR_OTF;	/* on-the-fly BC4 and BL8 */
+#endif
 #else
 	popts->burst_length = DDR_BL4;	/* has to be 4 for DDR2 */
 #endif
diff --git a/cpu/mpc8xxx/ddr/util.c b/arch/ppc/cpu/mpc8xxx/ddr/util.c
index 1e2d921286..1e2d921286 100644
--- a/cpu/mpc8xxx/ddr/util.c
+++ b/arch/ppc/cpu/mpc8xxx/ddr/util.c
diff --git a/cpu/mpc8xxx/fdt.c b/arch/ppc/cpu/mpc8xxx/fdt.c
index 3a9b5841b6..e68d6f336b 100644
--- a/cpu/mpc8xxx/fdt.c
+++ b/arch/ppc/cpu/mpc8xxx/fdt.c
@@ -1,9 +1,9 @@
 /*
  * Copyright 2009 Freescale Semiconductor, Inc.
  *
- * This file is derived from cpu/mpc85xx/cpu.c and cpu/mpc86xx/cpu.c.
- * Basically this file contains cpu specific common code for 85xx/86xx
- * processors.
+ * This file is derived from arch/ppc/cpu/mpc85xx/cpu.c and
+ * arch/ppc/cpu/mpc86xx/cpu.c. Basically this file contains
+ * cpu specific common code for 85xx/86xx processors.
  * See file CREDITS for list of people who contributed to this
  * project.
  *
diff --git a/cpu/mpc8xxx/pci_cfg.c b/arch/ppc/cpu/mpc8xxx/pci_cfg.c
index d53781b62b..9b7181d5b6 100644
--- a/cpu/mpc8xxx/pci_cfg.c
+++ b/arch/ppc/cpu/mpc8xxx/pci_cfg.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2009 Freescale Semiconductor, Inc.
+ * Copyright 2009-2010 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -25,7 +25,7 @@
 #include <pci.h>
 
 struct pci_info {
-	u16	cfg;
+	u32	cfg;
 };
 
 /* The cfg field is a bit mask in which each bit represents the value of
@@ -153,7 +153,8 @@ static struct pci_info pci_config_info[] =
 			 (1 << 7) | (1 << 0xe) | (1 << 0xf),
 	},
 };
-#elif defined(CONFIG_P1011) || defined(CONFIG_P1020)
+#elif defined(CONFIG_P1011) || defined(CONFIG_P1020) || \
+      defined(CONFIG_P1012) || defined(CONFIG_P1021)
 static struct pci_info pci_config_info[] =
 {
 	[LAW_TRGT_IF_PCIE_1] = {
@@ -163,6 +164,29 @@ static struct pci_info pci_config_info[] =
 		.cfg =   (1 << 0xe),
 	},
 };
+#elif defined(CONFIG_P1013) || defined(CONFIG_P1022)
+static struct pci_info pci_config_info[] =
+{
+	[LAW_TRGT_IF_PCIE_1] = {
+		.cfg =   (1 << 6) | (1 << 7) | (1 << 9) | (1 << 0xa) |
+			 (1 << 0xb) | (1 << 0xd) | (1 << 0xe) |
+			 (1 << 0xf) | (1 << 0x15) | (1 << 0x16) |
+			 (1 << 0x17) | (1 << 0x18) | (1 << 0x19) |
+			 (1 << 0x1a) | (1 << 0x1b) | (1 << 0x1c) |
+			 (1 << 0x1d) | (1 << 0x1e) | (1 << 0x1f),
+	},
+	[LAW_TRGT_IF_PCIE_2] = {
+		.cfg =   (1 << 0) | (1 << 1) | (1 << 6) | (1 << 7) |
+			 (1 << 9) | (1 << 0xa) | (1 << 0xb) | (1 << 0xd) |
+			 (1 << 0x15) | (1 << 0x16) | (1 << 0x17) |
+			 (1 << 0x18) | (1 << 0x1c),
+	},
+	[LAW_TRGT_IF_PCIE_3] = {
+		.cfg =   (1 << 6) | (1 << 7) | (1 << 9) | (1 << 0xd) |
+			 (1 << 0x15) | (1 << 0x16) | (1 << 0x17) | (1 << 0x18) |
+			 (1 << 0x19) | (1 << 0x1a) | (1 << 0x1b),
+	},
+};
 #elif defined(CONFIG_P2010) || defined(CONFIG_P2020)
 static struct pci_info pci_config_info[] =
 {
diff --git a/cpu/ppc4xx/40x_spd_sdram.c b/arch/ppc/cpu/ppc4xx/40x_spd_sdram.c
index 5e6dbe3331..595d5687d6 100644
--- a/cpu/ppc4xx/40x_spd_sdram.c
+++ b/arch/ppc/cpu/ppc4xx/40x_spd_sdram.c
@@ -1,5 +1,5 @@
 /*
- * cpu/ppc4xx/40x_spd_sdram.c
+ * arch/ppc/cpu/ppc4xx/40x_spd_sdram.c
  * This SPD SDRAM detection code supports IBM/AMCC PPC44x cpu with a
  * SDRAM controller. Those are all current 405 PPC's.
  *
diff --git a/cpu/ppc4xx/44x_spd_ddr.c b/arch/ppc/cpu/ppc4xx/44x_spd_ddr.c
index 6176eabfbf..9d1994f99e 100644
--- a/cpu/ppc4xx/44x_spd_ddr.c
+++ b/arch/ppc/cpu/ppc4xx/44x_spd_ddr.c
@@ -1,5 +1,5 @@
 /*
- * cpu/ppc4xx/44x_spd_ddr.c
+ * arch/ppc/cpu/ppc4xx/44x_spd_ddr.c
  * This SPD DDR detection code supports IBM/AMCC PPC44x cpu with a
  * DDR controller. Those are 440GP/GX/EP/GR.
  *
diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c
index 593a286919..ea6c2ac770 100644
--- a/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c
@@ -1,5 +1,5 @@
 /*
- * cpu/ppc4xx/44x_spd_ddr2.c
+ * arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c
  * This SPD SDRAM detection code supports AMCC PPC44x cpu's with a
  * DDR2 controller (non Denali Core). Those currently are:
  *
diff --git a/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c b/arch/ppc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
index 0283c91d84..72630716c9 100644
--- a/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
+++ b/arch/ppc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
@@ -1,5 +1,5 @@
 /*
- * cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
+ * arch/ppc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c
  * This SPD SDRAM detection code supports AMCC PPC44x cpu's with a
  * DDR2 controller (non Denali Core). Those currently are:
  *
diff --git a/cpu/ppc4xx/4xx_pci.c b/arch/ppc/cpu/ppc4xx/4xx_pci.c
index eed4534e5f..eed4534e5f 100644
--- a/cpu/ppc4xx/4xx_pci.c
+++ b/arch/ppc/cpu/ppc4xx/4xx_pci.c
diff --git a/cpu/ppc4xx/4xx_pcie.c b/arch/ppc/cpu/ppc4xx/4xx_pcie.c
index f3b921477b..10b58b7118 100644
--- a/cpu/ppc4xx/4xx_pcie.c
+++ b/arch/ppc/cpu/ppc4xx/4xx_pcie.c
@@ -29,7 +29,7 @@
 #include <pci.h>
 #include <ppc4xx.h>
 #include <asm/processor.h>
-#include <asm-ppc/io.h>
+#include <asm/io.h>
 #include <asm/errno.h>
 
 #if (defined(CONFIG_440SPE) || defined(CONFIG_405EX) ||	\
diff --git a/cpu/ppc4xx/4xx_uart.c b/arch/ppc/cpu/ppc4xx/4xx_uart.c
index 8de65425c9..8de65425c9 100644
--- a/cpu/ppc4xx/4xx_uart.c
+++ b/arch/ppc/cpu/ppc4xx/4xx_uart.c
diff --git a/cpu/ppc4xx/Makefile b/arch/ppc/cpu/ppc4xx/Makefile
index 365f966fed..88d53fbb1a 100644
--- a/cpu/ppc4xx/Makefile
+++ b/arch/ppc/cpu/ppc4xx/Makefile
@@ -52,7 +52,6 @@ COBJS	+= denali_data_eye.o
 COBJS	+= denali_spd_ddr2.o
 COBJS	+= ecc.o
 COBJS	+= fdt.o
-COBJS	+= i2c.o
 COBJS	+= interrupts.o
 COBJS	+= iop480_uart.o
 ifdef CONFIG_CMD_REGINFO
diff --git a/cpu/ppc4xx/bedbug_405.c b/arch/ppc/cpu/ppc4xx/bedbug_405.c
index ef11cb65e4..ef11cb65e4 100644
--- a/cpu/ppc4xx/bedbug_405.c
+++ b/arch/ppc/cpu/ppc4xx/bedbug_405.c
diff --git a/cpu/ppc4xx/cache.S b/arch/ppc/cpu/ppc4xx/cache.S
index 269716fceb..269716fceb 100644
--- a/cpu/ppc4xx/cache.S
+++ b/arch/ppc/cpu/ppc4xx/cache.S
diff --git a/cpu/ppc4xx/cmd_chip_config.c b/arch/ppc/cpu/ppc4xx/cmd_chip_config.c
index ba57211dd0..ba57211dd0 100644
--- a/cpu/ppc4xx/cmd_chip_config.c
+++ b/arch/ppc/cpu/ppc4xx/cmd_chip_config.c
diff --git a/cpu/ppc4xx/commproc.c b/arch/ppc/cpu/ppc4xx/commproc.c
index a1696d37e6..a1696d37e6 100644
--- a/cpu/ppc4xx/commproc.c
+++ b/arch/ppc/cpu/ppc4xx/commproc.c
diff --git a/cpu/ppc4xx/config.mk b/arch/ppc/cpu/ppc4xx/config.mk
index c1de1e97e6..ea4d707842 100644
--- a/cpu/ppc4xx/config.mk
+++ b/arch/ppc/cpu/ppc4xx/config.mk
@@ -34,4 +34,4 @@ PLATFORM_CPPFLAGS += -Wa,-m405 -mcpu=405
 endif
 
 # Use default linker script.  Board port can override in board/*/config.mk
-LDSCRIPT := $(SRCTREE)/cpu/ppc4xx/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/ppc4xx/u-boot.lds
diff --git a/cpu/ppc4xx/cpu.c b/arch/ppc/cpu/ppc4xx/cpu.c
index e1a023b703..e1a023b703 100644
--- a/cpu/ppc4xx/cpu.c
+++ b/arch/ppc/cpu/ppc4xx/cpu.c
diff --git a/cpu/ppc4xx/cpu_init.c b/arch/ppc/cpu/ppc4xx/cpu_init.c
index ccd9993677..8a6e545c1a 100644
--- a/cpu/ppc4xx/cpu_init.c
+++ b/arch/ppc/cpu/ppc4xx/cpu_init.c
@@ -111,17 +111,72 @@ void reconfigure_pll(u32 new_cpu_freq)
 			mtcpr(CPR0_SPCID, reg);
 			reset_needed = 1;
 		}
+	}
+
+	/* Get current value of FWDVA.*/
+	mfcpr(CPR0_PLLD, reg);
+	temp = (reg & PLLD_FWDVA_MASK) >> 16;
 
-		/* Set reload inhibit so configuration will persist across
-		 * processor resets */
+	/*
+	 * Check to see if FWDVA has been set to value of 1. if it has we must
+	 * modify it.
+	 */
+	if (temp == 1) {
+		mfcpr(CPR0_PLLD, reg);
+		/* Get current value of fbdv.  */
+		temp = (reg & PLLD_FBDV_MASK) >> 24;
+		fbdv = temp ? temp : 32;
+		/* Get current value of lfbdv. */
+		temp = (reg & PLLD_LFBDV_MASK);
+		lfbdv = temp ? temp : 64;
+		/*
+		 * Load register that contains current boot strapping option.
+		 */
+		mfcpr(CPR0_ICFG, reg);
+		/* Shift strapping option into low 3 bits.*/
+		reg = (reg >> 28);
+
+		if ((reg == BOOT_STRAP_OPTION_A) || (reg == BOOT_STRAP_OPTION_B) ||
+		    (reg == BOOT_STRAP_OPTION_D) || (reg == BOOT_STRAP_OPTION_E)) {
+			/*
+			 * Get current value of FWDVA. Assign current FWDVA to
+			 * new FWDVB.
+			 */
+			mfcpr(CPR0_PLLD, reg);
+			target_fwdvb = (reg & PLLD_FWDVA_MASK) >> 16;
+			fwdvb = target_fwdvb ? target_fwdvb : 8;
+			/*
+			 * Get current value of FWDVB. Assign current FWDVB to
+			 * new FWDVA.
+			 */
+			target_fwdva = (reg & PLLD_FWDVB_MASK) >> 8;
+			fwdva = target_fwdva ? target_fwdva : 16;
+			/*
+			 * Update CPR0_PLLD with switched FWDVA and FWDVB.
+			 */
+			reg &= ~(PLLD_FWDVA_MASK | PLLD_FWDVB_MASK |
+				PLLD_FBDV_MASK | PLLD_LFBDV_MASK);
+			reg |= ((fwdva == 16 ? 0 : fwdva) << 16) |
+				((fwdvb == 8 ? 0 : fwdvb) << 8) |
+				((fbdv == 32 ? 0 : fbdv) << 24) |
+				(lfbdv == 64 ? 0 : lfbdv);
+			mtcpr(CPR0_PLLD, reg);
+			/* Acknowledge that a reset is required. */
+			reset_needed = 1;
+		}
+	}
+
+	if (reset_needed) {
+		/*
+		 * Set reload inhibit so configuration will persist across
+		 * processor resets
+		 */
 		mfcpr(CPR0_ICFG, reg);
 		reg &= ~CPR0_ICFG_RLI_MASK;
 		reg |= 1 << 31;
 		mtcpr(CPR0_ICFG, reg);
-	}
 
-	/* Reset processor if configuration changed */
-	if (reset_needed) {
+		/* Reset processor if configuration changed */
 		__asm__ __volatile__ ("sync; isync");
 		mtspr(SPRN_DBCR0, 0x20000000);
 	}
diff --git a/cpu/ppc4xx/dcr.S b/arch/ppc/cpu/ppc4xx/dcr.S
index 93465a3b51..93465a3b51 100644
--- a/cpu/ppc4xx/dcr.S
+++ b/arch/ppc/cpu/ppc4xx/dcr.S
diff --git a/cpu/ppc4xx/denali_data_eye.c b/arch/ppc/cpu/ppc4xx/denali_data_eye.c
index ffc3817449..15a9b4f3ec 100644
--- a/cpu/ppc4xx/denali_data_eye.c
+++ b/arch/ppc/cpu/ppc4xx/denali_data_eye.c
@@ -1,5 +1,5 @@
 /*
- * cpu/ppc4xx/denali_data_eye.c
+ * arch/ppc/cpu/ppc4xx/denali_data_eye.c
  * Extracted from board/amcc/sequoia/sdram.c by Larry Johnson <lrj@acm.org>.
  *
  * (C) Copyright 2006
diff --git a/cpu/ppc4xx/denali_spd_ddr2.c b/arch/ppc/cpu/ppc4xx/denali_spd_ddr2.c
index 5858cb36a5..72f76cd2fa 100644
--- a/cpu/ppc4xx/denali_spd_ddr2.c
+++ b/arch/ppc/cpu/ppc4xx/denali_spd_ddr2.c
@@ -1,12 +1,12 @@
 /*
- * cpu/ppc4xx/denali_spd_ddr2.c
+ * arch/ppc/cpu/ppc4xx/denali_spd_ddr2.c
  * This SPD SDRAM detection code supports AMCC PPC44x CPUs with a Denali-core
  * DDR2 controller, specifically the 440EPx/GRx.
  *
  * (C) Copyright 2007-2008
  * Larry Johnson, lrj@acm.org.
  *
- * Based primarily on cpu/ppc4xx/4xx_spd_ddr2.c, which is...
+ * Based primarily on arch/ppc/cpu/ppc4xx/4xx_spd_ddr2.c, which is...
  *
  * (C) Copyright 2007
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
diff --git a/cpu/ppc4xx/ecc.c b/arch/ppc/cpu/ppc4xx/ecc.c
index f105605459..f105605459 100644
--- a/cpu/ppc4xx/ecc.c
+++ b/arch/ppc/cpu/ppc4xx/ecc.c
diff --git a/cpu/ppc4xx/ecc.h b/arch/ppc/cpu/ppc4xx/ecc.h
index b2588919eb..b2588919eb 100644
--- a/cpu/ppc4xx/ecc.h
+++ b/arch/ppc/cpu/ppc4xx/ecc.h
diff --git a/cpu/ppc4xx/fdt.c b/arch/ppc/cpu/ppc4xx/fdt.c
index 15a184b5c6..15a184b5c6 100644
--- a/cpu/ppc4xx/fdt.c
+++ b/arch/ppc/cpu/ppc4xx/fdt.c
diff --git a/cpu/ppc4xx/gpio.c b/arch/ppc/cpu/ppc4xx/gpio.c
index c0d351a957..c0d351a957 100644
--- a/cpu/ppc4xx/gpio.c
+++ b/arch/ppc/cpu/ppc4xx/gpio.c
diff --git a/cpu/ppc4xx/interrupts.c b/arch/ppc/cpu/ppc4xx/interrupts.c
index 6db84210b8..6db84210b8 100644
--- a/cpu/ppc4xx/interrupts.c
+++ b/arch/ppc/cpu/ppc4xx/interrupts.c
diff --git a/cpu/ppc4xx/iop480_uart.c b/arch/ppc/cpu/ppc4xx/iop480_uart.c
index 0e3423f7ab..0e3423f7ab 100644
--- a/cpu/ppc4xx/iop480_uart.c
+++ b/arch/ppc/cpu/ppc4xx/iop480_uart.c
diff --git a/cpu/ppc4xx/kgdb.S b/arch/ppc/cpu/ppc4xx/kgdb.S
index 4227a4c15b..4227a4c15b 100644
--- a/cpu/ppc4xx/kgdb.S
+++ b/arch/ppc/cpu/ppc4xx/kgdb.S
diff --git a/cpu/ppc4xx/miiphy.c b/arch/ppc/cpu/ppc4xx/miiphy.c
index 22ed5c25ea..22ed5c25ea 100644
--- a/cpu/ppc4xx/miiphy.c
+++ b/arch/ppc/cpu/ppc4xx/miiphy.c
diff --git a/cpu/ppc4xx/reginfo.c b/arch/ppc/cpu/ppc4xx/reginfo.c
index a9756672c1..a9756672c1 100644
--- a/cpu/ppc4xx/reginfo.c
+++ b/arch/ppc/cpu/ppc4xx/reginfo.c
diff --git a/cpu/ppc4xx/resetvec.S b/arch/ppc/cpu/ppc4xx/resetvec.S
index b3308bd6ae..b3308bd6ae 100644
--- a/cpu/ppc4xx/resetvec.S
+++ b/arch/ppc/cpu/ppc4xx/resetvec.S
diff --git a/cpu/ppc4xx/sdram.c b/arch/ppc/cpu/ppc4xx/sdram.c
index 30c6e0e38e..30c6e0e38e 100644
--- a/cpu/ppc4xx/sdram.c
+++ b/arch/ppc/cpu/ppc4xx/sdram.c
diff --git a/cpu/ppc4xx/sdram.h b/arch/ppc/cpu/ppc4xx/sdram.h
index bea3376534..bea3376534 100644
--- a/cpu/ppc4xx/sdram.h
+++ b/arch/ppc/cpu/ppc4xx/sdram.h
diff --git a/cpu/ppc4xx/speed.c b/arch/ppc/cpu/ppc4xx/speed.c
index 906face033..906face033 100644
--- a/cpu/ppc4xx/speed.c
+++ b/arch/ppc/cpu/ppc4xx/speed.c
diff --git a/cpu/ppc4xx/start.S b/arch/ppc/cpu/ppc4xx/start.S
index 927c88c78f..c739deb9b4 100644
--- a/cpu/ppc4xx/start.S
+++ b/arch/ppc/cpu/ppc4xx/start.S
@@ -475,7 +475,7 @@ tlbnxt:	addi	r4,r4,1		/* Next TLB */
 	/*----------------------------------------------------------------*/
 	/* TLB entry setup -- step thru tlbtab */
 	/*----------------------------------------------------------------*/
-#if defined(CONFIG_440SPE)
+#if defined(CONFIG_440SPE_REVA)
 	/*----------------------------------------------------------------*/
 	/* We have different TLB tables for revA and rev B of 440SPe */
 	/*----------------------------------------------------------------*/
diff --git a/cpu/ppc4xx/tlb.c b/arch/ppc/cpu/ppc4xx/tlb.c
index 24a9a9cc28..24a9a9cc28 100644
--- a/cpu/ppc4xx/tlb.c
+++ b/arch/ppc/cpu/ppc4xx/tlb.c
diff --git a/cpu/ppc4xx/traps.c b/arch/ppc/cpu/ppc4xx/traps.c
index 42e422157c..42e422157c 100644
--- a/cpu/ppc4xx/traps.c
+++ b/arch/ppc/cpu/ppc4xx/traps.c
diff --git a/cpu/ppc4xx/u-boot.lds b/arch/ppc/cpu/ppc4xx/u-boot.lds
index 2b47934a2e..3704d8a695 100644
--- a/cpu/ppc4xx/u-boot.lds
+++ b/arch/ppc/cpu/ppc4xx/u-boot.lds
@@ -124,7 +124,7 @@ SECTIONS
 #ifdef CONFIG_440
   .bootpg RESET_VECTOR_ADDRESS - 0xffc :
   {
-    cpu/ppc4xx/start.o	(.bootpg)
+    arch/ppc/cpu/ppc4xx/start.o	(.bootpg)
 
     /*
      * PPC440 board need a board specific object with the
diff --git a/cpu/ppc4xx/uic.c b/arch/ppc/cpu/ppc4xx/uic.c
index 8b1b259faf..8b1b259faf 100644
--- a/cpu/ppc4xx/uic.c
+++ b/arch/ppc/cpu/ppc4xx/uic.c
diff --git a/cpu/ppc4xx/usb.c b/arch/ppc/cpu/ppc4xx/usb.c
index 592efe70a7..592efe70a7 100644
--- a/cpu/ppc4xx/usb.c
+++ b/arch/ppc/cpu/ppc4xx/usb.c
diff --git a/cpu/ppc4xx/usb_ohci.c b/arch/ppc/cpu/ppc4xx/usb_ohci.c
index a9edacd330..a9edacd330 100644
--- a/cpu/ppc4xx/usb_ohci.c
+++ b/arch/ppc/cpu/ppc4xx/usb_ohci.c
diff --git a/cpu/ppc4xx/usb_ohci.h b/arch/ppc/cpu/ppc4xx/usb_ohci.h
index 2c3dc4f99c..2c3dc4f99c 100644
--- a/cpu/ppc4xx/usb_ohci.h
+++ b/arch/ppc/cpu/ppc4xx/usb_ohci.h
diff --git a/cpu/ppc4xx/usbdev.c b/arch/ppc/cpu/ppc4xx/usbdev.c
index fe398afc02..fe398afc02 100644
--- a/cpu/ppc4xx/usbdev.c
+++ b/arch/ppc/cpu/ppc4xx/usbdev.c
diff --git a/cpu/ppc4xx/usbdev.h b/arch/ppc/cpu/ppc4xx/usbdev.h
index ef6a2da649..ef6a2da649 100644
--- a/cpu/ppc4xx/usbdev.h
+++ b/arch/ppc/cpu/ppc4xx/usbdev.h
diff --git a/cpu/ppc4xx/xilinx_irq.c b/arch/ppc/cpu/ppc4xx/xilinx_irq.c
index 71087771cb..71087771cb 100644
--- a/cpu/ppc4xx/xilinx_irq.c
+++ b/arch/ppc/cpu/ppc4xx/xilinx_irq.c
diff --git a/include/asm-ppc/4xx_pci.h b/arch/ppc/include/asm/4xx_pci.h
index f686e7cb07..f686e7cb07 100644
--- a/include/asm-ppc/4xx_pci.h
+++ b/arch/ppc/include/asm/4xx_pci.h
diff --git a/include/asm-ppc/4xx_pcie.h b/arch/ppc/include/asm/4xx_pcie.h
index a0e88de11d..a0e88de11d 100644
--- a/include/asm-ppc/4xx_pcie.h
+++ b/arch/ppc/include/asm/4xx_pcie.h
diff --git a/include/asm-ppc/5xx_immap.h b/arch/ppc/include/asm/5xx_immap.h
index 72cbab43e4..72cbab43e4 100644
--- a/include/asm-ppc/5xx_immap.h
+++ b/arch/ppc/include/asm/5xx_immap.h
diff --git a/include/asm-ppc/8xx_immap.h b/arch/ppc/include/asm/8xx_immap.h
index 40679cb2b0..40679cb2b0 100644
--- a/include/asm-ppc/8xx_immap.h
+++ b/arch/ppc/include/asm/8xx_immap.h
diff --git a/include/asm-ppc/atomic.h b/arch/ppc/include/asm/atomic.h
index 23f22df1b7..23f22df1b7 100644
--- a/include/asm-ppc/atomic.h
+++ b/arch/ppc/include/asm/atomic.h
diff --git a/include/asm-ppc/bitops.h b/arch/ppc/include/asm/bitops.h
index adaf091492..adaf091492 100644
--- a/include/asm-ppc/bitops.h
+++ b/arch/ppc/include/asm/bitops.h
diff --git a/include/asm-ppc/byteorder.h b/arch/ppc/include/asm/byteorder.h
index 3f5bcf63a1..3f5bcf63a1 100644
--- a/include/asm-ppc/byteorder.h
+++ b/arch/ppc/include/asm/byteorder.h
diff --git a/include/asm-ppc/cache.h b/arch/ppc/include/asm/cache.h
index 53e8d05f50..53e8d05f50 100644
--- a/include/asm-ppc/cache.h
+++ b/arch/ppc/include/asm/cache.h
diff --git a/include/asm-ppc/config.h b/arch/ppc/include/asm/config.h
index 0d78aa400e..fc3facb307 100644
--- a/include/asm-ppc/config.h
+++ b/arch/ppc/include/asm/config.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2009 Freescale Semiconductor, Inc.
+ * Copyright 2009-2010 Freescale Semiconductor, Inc.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
@@ -41,6 +41,7 @@
 #endif
 
 #if defined(CONFIG_MPC8572) || defined(CONFIG_P1020) || \
+	defined(CONFIG_P1021) || defined(CONFIG_P1022) || \
 	defined(CONFIG_P2020) || defined(CONFIG_MPC8641)
 #define CONFIG_MAX_CPUS		2
 #elif defined(CONFIG_PPC_P4080)
diff --git a/include/asm-ppc/cpm_8260.h b/arch/ppc/include/asm/cpm_8260.h
index 8302404abb..8302404abb 100644
--- a/include/asm-ppc/cpm_8260.h
+++ b/arch/ppc/include/asm/cpm_8260.h
diff --git a/include/asm-ppc/cpm_85xx.h b/arch/ppc/include/asm/cpm_85xx.h
index a74a3a115b..a74a3a115b 100644
--- a/include/asm-ppc/cpm_85xx.h
+++ b/arch/ppc/include/asm/cpm_85xx.h
diff --git a/include/asm-ppc/e300.h b/arch/ppc/include/asm/e300.h
index bfef4dfd62..bfef4dfd62 100644
--- a/include/asm-ppc/e300.h
+++ b/arch/ppc/include/asm/e300.h
diff --git a/include/asm-sh/errno.h b/arch/ppc/include/asm/errno.h
index 4c82b503d9..4c82b503d9 100644
--- a/include/asm-sh/errno.h
+++ b/arch/ppc/include/asm/errno.h
diff --git a/include/asm-ppc/fsl_ddr_dimm_params.h b/arch/ppc/include/asm/fsl_ddr_dimm_params.h
index 55923e09b3..55923e09b3 100644
--- a/include/asm-ppc/fsl_ddr_dimm_params.h
+++ b/arch/ppc/include/asm/fsl_ddr_dimm_params.h
diff --git a/include/asm-ppc/fsl_ddr_sdram.h b/arch/ppc/include/asm/fsl_ddr_sdram.h
index 3216a50633..3216a50633 100644
--- a/include/asm-ppc/fsl_ddr_sdram.h
+++ b/arch/ppc/include/asm/fsl_ddr_sdram.h
diff --git a/include/asm-ppc/fsl_dma.h b/arch/ppc/include/asm/fsl_dma.h
index 11641912a6..11641912a6 100644
--- a/include/asm-ppc/fsl_dma.h
+++ b/arch/ppc/include/asm/fsl_dma.h
diff --git a/include/asm-ppc/fsl_i2c.h b/arch/ppc/include/asm/fsl_i2c.h
index 4f71341327..4f71341327 100644
--- a/include/asm-ppc/fsl_i2c.h
+++ b/arch/ppc/include/asm/fsl_i2c.h
diff --git a/include/asm-ppc/fsl_law.h b/arch/ppc/include/asm/fsl_law.h
index 34c56a259a..34c56a259a 100644
--- a/include/asm-ppc/fsl_law.h
+++ b/arch/ppc/include/asm/fsl_law.h
diff --git a/include/asm-ppc/fsl_lbc.h b/arch/ppc/include/asm/fsl_lbc.h
index 5723de643a..5723de643a 100644
--- a/include/asm-ppc/fsl_lbc.h
+++ b/arch/ppc/include/asm/fsl_lbc.h
diff --git a/include/asm-ppc/fsl_pci.h b/arch/ppc/include/asm/fsl_pci.h
index db61e7e9cb..db61e7e9cb 100644
--- a/include/asm-ppc/fsl_pci.h
+++ b/arch/ppc/include/asm/fsl_pci.h
diff --git a/include/asm-ppc/fsl_serdes.h b/arch/ppc/include/asm/fsl_serdes.h
index 6da4b6ff94..6da4b6ff94 100644
--- a/include/asm-ppc/fsl_serdes.h
+++ b/arch/ppc/include/asm/fsl_serdes.h
diff --git a/include/asm-ppc/global_data.h b/arch/ppc/include/asm/global_data.h
index d3dd44e96d..d3dd44e96d 100644
--- a/include/asm-ppc/global_data.h
+++ b/arch/ppc/include/asm/global_data.h
diff --git a/include/asm-ppc/gpio.h b/arch/ppc/include/asm/gpio.h
index 23e29b195e..23e29b195e 100644
--- a/include/asm-ppc/gpio.h
+++ b/arch/ppc/include/asm/gpio.h
diff --git a/include/asm-ppc/immap_512x.h b/arch/ppc/include/asm/immap_512x.h
index 95350fd9b8..95350fd9b8 100644
--- a/include/asm-ppc/immap_512x.h
+++ b/arch/ppc/include/asm/immap_512x.h
diff --git a/include/asm-ppc/immap_8220.h b/arch/ppc/include/asm/immap_8220.h
index f9595f42d9..f9595f42d9 100644
--- a/include/asm-ppc/immap_8220.h
+++ b/arch/ppc/include/asm/immap_8220.h
diff --git a/include/asm-ppc/immap_8260.h b/arch/ppc/include/asm/immap_8260.h
index 4974ae56fc..4974ae56fc 100644
--- a/include/asm-ppc/immap_8260.h
+++ b/arch/ppc/include/asm/immap_8260.h
diff --git a/include/asm-ppc/immap_83xx.h b/arch/ppc/include/asm/immap_83xx.h
index 6b42a73f3f..6b42a73f3f 100644
--- a/include/asm-ppc/immap_83xx.h
+++ b/arch/ppc/include/asm/immap_83xx.h
diff --git a/include/asm-ppc/immap_85xx.h b/arch/ppc/include/asm/immap_85xx.h
index 957ad76a79..957ad76a79 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/arch/ppc/include/asm/immap_85xx.h
diff --git a/include/asm-ppc/immap_86xx.h b/arch/ppc/include/asm/immap_86xx.h
index fd7acdb767..fd7acdb767 100644
--- a/include/asm-ppc/immap_86xx.h
+++ b/arch/ppc/include/asm/immap_86xx.h
diff --git a/include/asm-ppc/immap_qe.h b/arch/ppc/include/asm/immap_qe.h
index 531cfc891d..531cfc891d 100644
--- a/include/asm-ppc/immap_qe.h
+++ b/arch/ppc/include/asm/immap_qe.h
diff --git a/include/asm-ppc/interrupt.h b/arch/ppc/include/asm/interrupt.h
index 792836b229..792836b229 100644
--- a/include/asm-ppc/interrupt.h
+++ b/arch/ppc/include/asm/interrupt.h
diff --git a/include/asm-ppc/io.h b/arch/ppc/include/asm/io.h
index 4ddad26e81..4ddad26e81 100644
--- a/include/asm-ppc/io.h
+++ b/arch/ppc/include/asm/io.h
diff --git a/include/asm-ppc/iopin_8260.h b/arch/ppc/include/asm/iopin_8260.h
index 619f3a8abe..619f3a8abe 100644
--- a/include/asm-ppc/iopin_8260.h
+++ b/arch/ppc/include/asm/iopin_8260.h
diff --git a/include/asm-ppc/iopin_85xx.h b/arch/ppc/include/asm/iopin_85xx.h
index 0f07ba355e..0f07ba355e 100644
--- a/include/asm-ppc/iopin_85xx.h
+++ b/arch/ppc/include/asm/iopin_85xx.h
diff --git a/include/asm-ppc/iopin_8xx.h b/arch/ppc/include/asm/iopin_8xx.h
index 3a2a682f66..3a2a682f66 100644
--- a/include/asm-ppc/iopin_8xx.h
+++ b/arch/ppc/include/asm/iopin_8xx.h
diff --git a/include/asm-ppc/m8260_pci.h b/arch/ppc/include/asm/m8260_pci.h
index 45f01de820..45f01de820 100644
--- a/include/asm-ppc/m8260_pci.h
+++ b/arch/ppc/include/asm/m8260_pci.h
diff --git a/include/asm-ppc/mc146818rtc.h b/arch/ppc/include/asm/mc146818rtc.h
index 5f806c4ec2..5f806c4ec2 100644
--- a/include/asm-ppc/mc146818rtc.h
+++ b/arch/ppc/include/asm/mc146818rtc.h
diff --git a/include/asm-ppc/mmu.h b/arch/ppc/include/asm/mmu.h
index fd1024947d..ce7f081005 100644
--- a/include/asm-ppc/mmu.h
+++ b/arch/ppc/include/asm/mmu.h
@@ -213,7 +213,11 @@ extern void print_bats(void);
 #define BATL_PADDR(x) ((phys_addr_t)((x & 0xfffe0000)		\
 				     | ((x & 0x0e00ULL) << 24)	\
 				     | ((x & 0x04ULL) << 30)))
-#define BATU_SIZE(x) (1UL << (fls((x & BATU_BL_MAX) >> 2) + 17))
+#define BATU_SIZE(x) (1ULL << (fls((x & BATU_BL_MAX) >> 2) + 17))
+
+/* bytes into BATU_BL */
+#define TO_BATU_BL(x) \
+	(u32)((((1ull << __ilog2_u64((u64)x)) / (128 * 1024)) - 1) * 4)
 
 /* Used to set up SDR1 register */
 #define HASH_TABLE_SIZE_64K	0x00010000
diff --git a/include/asm-ppc/mp.h b/arch/ppc/include/asm/mp.h
index 5388c951c8..5388c951c8 100644
--- a/include/asm-ppc/mp.h
+++ b/arch/ppc/include/asm/mp.h
diff --git a/include/asm-ppc/mpc512x.h b/arch/ppc/include/asm/mpc512x.h
index 960e229294..960e229294 100644
--- a/include/asm-ppc/mpc512x.h
+++ b/arch/ppc/include/asm/mpc512x.h
diff --git a/include/asm-ppc/mpc8349_pci.h b/arch/ppc/include/asm/mpc8349_pci.h
index 7a1adba950..7a1adba950 100644
--- a/include/asm-ppc/mpc8349_pci.h
+++ b/arch/ppc/include/asm/mpc8349_pci.h
diff --git a/include/asm-ppc/mpc8xxx_spi.h b/arch/ppc/include/asm/mpc8xxx_spi.h
index 41737d3c69..41737d3c69 100644
--- a/include/asm-ppc/mpc8xxx_spi.h
+++ b/arch/ppc/include/asm/mpc8xxx_spi.h
diff --git a/include/asm-ppc/pci_io.h b/arch/ppc/include/asm/pci_io.h
index 9b738c383f..9b738c383f 100644
--- a/include/asm-ppc/pci_io.h
+++ b/arch/ppc/include/asm/pci_io.h
diff --git a/include/asm-ppc/pnp.h b/arch/ppc/include/asm/pnp.h
index 22ceba2253..22ceba2253 100644
--- a/include/asm-ppc/pnp.h
+++ b/arch/ppc/include/asm/pnp.h
diff --git a/include/asm-ppc/posix_types.h b/arch/ppc/include/asm/posix_types.h
index 9170728117..9170728117 100644
--- a/include/asm-ppc/posix_types.h
+++ b/arch/ppc/include/asm/posix_types.h
diff --git a/include/asm-ppc/ppc4xx-ebc.h b/arch/ppc/include/asm/ppc4xx-ebc.h
index 9c17e46252..9c17e46252 100644
--- a/include/asm-ppc/ppc4xx-ebc.h
+++ b/arch/ppc/include/asm/ppc4xx-ebc.h
diff --git a/include/asm-ppc/ppc4xx-isram.h b/arch/ppc/include/asm/ppc4xx-isram.h
index d6d17ac961..d6d17ac961 100644
--- a/include/asm-ppc/ppc4xx-isram.h
+++ b/arch/ppc/include/asm/ppc4xx-isram.h
diff --git a/include/asm-ppc/ppc4xx-sdram.h b/arch/ppc/include/asm/ppc4xx-sdram.h
index 92be514b40..92be514b40 100644
--- a/include/asm-ppc/ppc4xx-sdram.h
+++ b/arch/ppc/include/asm/ppc4xx-sdram.h
diff --git a/include/asm-ppc/ppc4xx-uic.h b/arch/ppc/include/asm/ppc4xx-uic.h
index 782d0454b7..782d0454b7 100644
--- a/include/asm-ppc/ppc4xx-uic.h
+++ b/arch/ppc/include/asm/ppc4xx-uic.h
diff --git a/include/asm-ppc/ppc4xx_config.h b/arch/ppc/include/asm/ppc4xx_config.h
index 49acb60aed..49acb60aed 100644
--- a/include/asm-ppc/ppc4xx_config.h
+++ b/arch/ppc/include/asm/ppc4xx_config.h
diff --git a/include/asm-ppc/processor.h b/arch/ppc/include/asm/processor.h
index c6da411630..9ec319ae17 100644
--- a/include/asm-ppc/processor.h
+++ b/arch/ppc/include/asm/processor.h
@@ -265,6 +265,7 @@
 #define	  HID1_RFXE	(1<<17)		/* Read Fault Exception Enable */
 #define	  HID1_ASTME	(1<<13)		/* Address bus streaming mode */
 #define	  HID1_ABE	(1<<12)		/* Address broadcast enable */
+#define	  HID1_MBDD	(1<<6)		/* optimized sync instruction */
 #define SPRN_IABR	0x3F2	/* Instruction Address Breakpoint Register */
 #ifndef CONFIG_BOOKE
 #define SPRN_IAC1	0x3F4	/* Instruction Address Compare 1 */
@@ -485,10 +486,12 @@
 #define SPRN_L2CFG0	0x207	/* L2 Cache Configuration Register 0 */
 #define SPRN_L1CSR0	0x3f2	/* L1 Data Cache Control and Status Register 0 */
 #define   L1CSR0_CPE		0x00010000	/* Data Cache Parity Enable */
+#define   L1CSR0_DCLFR		0x00000100	/* D-Cache Lock Flash Reset */
 #define   L1CSR0_DCFI		0x00000002	/* Data Cache Flash Invalidate */
 #define   L1CSR0_DCE		0x00000001	/* Data Cache Enable */
 #define SPRN_L1CSR1	0x3f3	/* L1 Instruction Cache Control and Status Register 1 */
 #define   L1CSR1_CPE		0x00010000	/* Instruction Cache Parity Enable */
+#define   L1CSR1_ICLFR		0x00000100	/* I-Cache Lock Flash Reset */
 #define   L1CSR1_ICFI		0x00000002	/* Instruction Cache Flash Invalidate */
 #define   L1CSR1_ICE		0x00000001	/* Instruction Cache Enable */
 #define SPRN_L1CSR2	0x25e	/* L1 Data Cache Control and Status Register 2 */
@@ -531,6 +534,9 @@
 #define SPRN_MCSRR0	0x23a	/* Machine Check Save and Restore Register 0 */
 #define SPRN_MCSRR1	0x23b	/* Machine Check Save and Restore Register 1 */
 #define SPRN_BUCSR	0x3f5	/* Branch Control and Status Register */
+#define	  BUCSR_BBFI	0x00000200	/* Branch buffer flash invalidate */
+#define	  BUCSR_BPEN	0x00000001	/* Branch prediction enable */
+#define   BUCSR_ENABLE (BUCSR_BBFI|BUCSR_BPEN)
 #define SPRN_BBEAR	0x201	/* Branch Buffer Entry Address Register */
 #define SPRN_BBTAR	0x202	/* Branch Buffer Target Address Register */
 #define SPRN_PID1	0x279	/* Process ID Register 1 */
@@ -1030,8 +1036,16 @@
 #define SVR_8572_E	0x80E800
 #define SVR_P1011	0x80E500
 #define SVR_P1011_E	0x80ED00
+#define SVR_P1012	0x80E501
+#define SVR_P1012_E	0x80ED01
+#define SVR_P1013	0x80E700
+#define SVR_P1013_E	0x80EF00
 #define SVR_P1020	0x80E400
 #define SVR_P1020_E	0x80EC00
+#define SVR_P1021	0x80E401
+#define SVR_P1021_E	0x80EC01
+#define SVR_P1022	0x80E600
+#define SVR_P1022_E	0x80EE00
 #define SVR_P2010	0x80E300
 #define SVR_P2010_E	0x80EB00
 #define SVR_P2020	0x80E200
diff --git a/include/asm-ppc/ptrace.h b/arch/ppc/include/asm/ptrace.h
index 196613b9f1..196613b9f1 100644
--- a/include/asm-ppc/ptrace.h
+++ b/arch/ppc/include/asm/ptrace.h
diff --git a/include/asm-ppc/residual.h b/arch/ppc/include/asm/residual.h
index dc85edbc3c..dc85edbc3c 100644
--- a/include/asm-ppc/residual.h
+++ b/arch/ppc/include/asm/residual.h
diff --git a/include/asm-ppc/sigcontext.h b/arch/ppc/include/asm/sigcontext.h
index 715c868ab6..715c868ab6 100644
--- a/include/asm-ppc/sigcontext.h
+++ b/arch/ppc/include/asm/sigcontext.h
diff --git a/include/asm-ppc/signal.h b/arch/ppc/include/asm/signal.h
index b11a28efd1..b11a28efd1 100644
--- a/include/asm-ppc/signal.h
+++ b/arch/ppc/include/asm/signal.h
diff --git a/include/asm-ppc/status_led.h b/arch/ppc/include/asm/status_led.h
index 037570993a..037570993a 100644
--- a/include/asm-ppc/status_led.h
+++ b/arch/ppc/include/asm/status_led.h
diff --git a/include/asm-ppc/string.h b/arch/ppc/include/asm/string.h
index d912a6b5fe..d912a6b5fe 100644
--- a/include/asm-ppc/string.h
+++ b/arch/ppc/include/asm/string.h
diff --git a/include/asm-ppc/types.h b/arch/ppc/include/asm/types.h
index b27a6b753a..b27a6b753a 100644
--- a/include/asm-ppc/types.h
+++ b/arch/ppc/include/asm/types.h
diff --git a/include/asm-ppc/u-boot.h b/arch/ppc/include/asm/u-boot.h
index ea2d22df27..ea2d22df27 100644
--- a/include/asm-ppc/u-boot.h
+++ b/arch/ppc/include/asm/u-boot.h
diff --git a/include/asm-ppc/unaligned.h b/arch/ppc/include/asm/unaligned.h
index 5f1b1e3c21..5f1b1e3c21 100644
--- a/include/asm-ppc/unaligned.h
+++ b/arch/ppc/include/asm/unaligned.h
diff --git a/include/asm-ppc/xilinx_irq.h b/arch/ppc/include/asm/xilinx_irq.h
index 61171c21ff..61171c21ff 100644
--- a/include/asm-ppc/xilinx_irq.h
+++ b/arch/ppc/include/asm/xilinx_irq.h
diff --git a/lib_ppc/Makefile b/arch/ppc/lib/Makefile
index 334e457805..334e457805 100644
--- a/lib_ppc/Makefile
+++ b/arch/ppc/lib/Makefile
diff --git a/lib_ppc/bat_rw.c b/arch/ppc/lib/bat_rw.c
index c48c240151..c48c240151 100644
--- a/lib_ppc/bat_rw.c
+++ b/arch/ppc/lib/bat_rw.c
diff --git a/lib_ppc/board.c b/arch/ppc/lib/board.c
index a30acee4fe..a30acee4fe 100644
--- a/lib_ppc/board.c
+++ b/arch/ppc/lib/board.c
diff --git a/lib_ppc/bootm.c b/arch/ppc/lib/bootm.c
index 0685a9331c..0685a9331c 100644
--- a/lib_ppc/bootm.c
+++ b/arch/ppc/lib/bootm.c
diff --git a/lib_ppc/cache.c b/arch/ppc/lib/cache.c
index 338b08bd77..338b08bd77 100644
--- a/lib_ppc/cache.c
+++ b/arch/ppc/lib/cache.c
diff --git a/lib_ppc/extable.c b/arch/ppc/lib/extable.c
index 7408d5c969..7408d5c969 100644
--- a/lib_ppc/extable.c
+++ b/arch/ppc/lib/extable.c
diff --git a/lib_ppc/interrupts.c b/arch/ppc/lib/interrupts.c
index f6031707ae..f6031707ae 100644
--- a/lib_ppc/interrupts.c
+++ b/arch/ppc/lib/interrupts.c
diff --git a/lib_ppc/kgdb.c b/arch/ppc/lib/kgdb.c
index d3eb1f35a9..d3eb1f35a9 100644
--- a/lib_ppc/kgdb.c
+++ b/arch/ppc/lib/kgdb.c
diff --git a/lib_ppc/ppccache.S b/arch/ppc/lib/ppccache.S
index 278a8048f8..278a8048f8 100644
--- a/lib_ppc/ppccache.S
+++ b/arch/ppc/lib/ppccache.S
diff --git a/lib_ppc/ppcstring.S b/arch/ppc/lib/ppcstring.S
index 97023a0555..97023a0555 100644
--- a/lib_ppc/ppcstring.S
+++ b/arch/ppc/lib/ppcstring.S
diff --git a/lib_ppc/reloc.S b/arch/ppc/lib/reloc.S
index 50f9a83fc6..50f9a83fc6 100644
--- a/lib_ppc/reloc.S
+++ b/arch/ppc/lib/reloc.S
diff --git a/lib_ppc/ticks.S b/arch/ppc/lib/ticks.S
index b8d25b7f46..b8d25b7f46 100644
--- a/lib_ppc/ticks.S
+++ b/arch/ppc/lib/ticks.S
diff --git a/lib_ppc/time.c b/arch/ppc/lib/time.c
index 29099612db..29099612db 100644
--- a/lib_ppc/time.c
+++ b/arch/ppc/lib/time.c
diff --git a/lib_sh/config.mk b/arch/sh/config.mk
index fa5369fd08..797bf4c226 100644
--- a/lib_sh/config.mk
+++ b/arch/sh/config.mk
@@ -31,4 +31,4 @@ endif
 PLATFORM_CPPFLAGS += -DCONFIG_SH -D__SH__
 PLATFORM_LDFLAGS += -e $(TEXT_BASE) --defsym reloc_dst=$(TEXT_BASE)
 
-LDSCRIPT := $(SRCTREE)/cpu/$(CPU)/u-boot.lds
+LDSCRIPT := $(SRCTREE)/$(CPUDIR)/u-boot.lds
diff --git a/cpu/sh2/Makefile b/arch/sh/cpu/sh2/Makefile
index 346d3285db..346d3285db 100644
--- a/cpu/sh2/Makefile
+++ b/arch/sh/cpu/sh2/Makefile
diff --git a/cpu/sh2/cache.c b/arch/sh/cpu/sh2/cache.c
index b5c47cf21a..b5c47cf21a 100644
--- a/cpu/sh2/cache.c
+++ b/arch/sh/cpu/sh2/cache.c
diff --git a/cpu/sh2/config.mk b/arch/sh/cpu/sh2/config.mk
index 52d5a0f4d5..52d5a0f4d5 100644
--- a/cpu/sh2/config.mk
+++ b/arch/sh/cpu/sh2/config.mk
diff --git a/cpu/sh2/cpu.c b/arch/sh/cpu/sh2/cpu.c
index e0cb04752d..e0cb04752d 100644
--- a/cpu/sh2/cpu.c
+++ b/arch/sh/cpu/sh2/cpu.c
diff --git a/cpu/sh2/interrupts.c b/arch/sh/cpu/sh2/interrupts.c
index fe6ff3a9cb..fe6ff3a9cb 100644
--- a/cpu/sh2/interrupts.c
+++ b/arch/sh/cpu/sh2/interrupts.c
diff --git a/cpu/sh2/start.S b/arch/sh/cpu/sh2/start.S
index 0ab867d54d..0ab867d54d 100644
--- a/cpu/sh2/start.S
+++ b/arch/sh/cpu/sh2/start.S
diff --git a/cpu/sh2/u-boot.lds b/arch/sh/cpu/sh2/u-boot.lds
index 6db5a00913..e4e8b60696 100644
--- a/cpu/sh2/u-boot.lds
+++ b/arch/sh/cpu/sh2/u-boot.lds
@@ -38,7 +38,7 @@ SECTIONS
 
 	.text :
 	{
-		cpu/sh2/start.o		(.text)
+		arch/sh/cpu/sh2/start.o		(.text)
 		. = ALIGN(8192);
 		common/env_embedded.o	(.ppcenv)
 		. = ALIGN(8192);
diff --git a/cpu/sh2/watchdog.c b/arch/sh/cpu/sh2/watchdog.c
index de0254b446..de0254b446 100644
--- a/cpu/sh2/watchdog.c
+++ b/arch/sh/cpu/sh2/watchdog.c
diff --git a/cpu/sh3/Makefile b/arch/sh/cpu/sh3/Makefile
index 35e8f51ab1..35e8f51ab1 100644
--- a/cpu/sh3/Makefile
+++ b/arch/sh/cpu/sh3/Makefile
diff --git a/cpu/sh3/cache.c b/arch/sh/cpu/sh3/cache.c
index c294a2b91d..c294a2b91d 100644
--- a/cpu/sh3/cache.c
+++ b/arch/sh/cpu/sh3/cache.c
diff --git a/cpu/sh3/config.mk b/arch/sh/cpu/sh3/config.mk
index f2da3686e8..f2da3686e8 100644
--- a/cpu/sh3/config.mk
+++ b/arch/sh/cpu/sh3/config.mk
diff --git a/cpu/sh3/cpu.c b/arch/sh/cpu/sh3/cpu.c
index 8261d29d48..8261d29d48 100644
--- a/cpu/sh3/cpu.c
+++ b/arch/sh/cpu/sh3/cpu.c
diff --git a/cpu/sh3/interrupts.c b/arch/sh/cpu/sh3/interrupts.c
index 55284ccc08..55284ccc08 100644
--- a/cpu/sh3/interrupts.c
+++ b/arch/sh/cpu/sh3/interrupts.c
diff --git a/cpu/sh3/start.S b/arch/sh/cpu/sh3/start.S
index c0f83261d1..c0f83261d1 100644
--- a/cpu/sh3/start.S
+++ b/arch/sh/cpu/sh3/start.S
diff --git a/cpu/sh3/u-boot.lds b/arch/sh/cpu/sh3/u-boot.lds
index 1e55b832f5..8afe1603ee 100644
--- a/cpu/sh3/u-boot.lds
+++ b/arch/sh/cpu/sh3/u-boot.lds
@@ -44,7 +44,7 @@ SECTIONS
 
 	.text :
 	{
-		cpu/sh3/start.o		(.text)
+		arch/sh/cpu/sh3/start.o		(.text)
 		. = ALIGN(8192);
 		common/env_embedded.o	(.ppcenv)
 		. = ALIGN(8192);
diff --git a/cpu/sh3/watchdog.c b/arch/sh/cpu/sh3/watchdog.c
index 92bea74719..92bea74719 100644
--- a/cpu/sh3/watchdog.c
+++ b/arch/sh/cpu/sh3/watchdog.c
diff --git a/cpu/sh4/Makefile b/arch/sh/cpu/sh4/Makefile
index 3c96a49311..3c96a49311 100644
--- a/cpu/sh4/Makefile
+++ b/arch/sh/cpu/sh4/Makefile
diff --git a/cpu/sh4/cache.c b/arch/sh/cpu/sh4/cache.c
index 377005cd4d..377005cd4d 100644
--- a/cpu/sh4/cache.c
+++ b/arch/sh/cpu/sh4/cache.c
diff --git a/cpu/sh4/config.mk b/arch/sh/cpu/sh4/config.mk
index b3feb2a515..b3feb2a515 100644
--- a/cpu/sh4/config.mk
+++ b/arch/sh/cpu/sh4/config.mk
diff --git a/cpu/sh4/cpu.c b/arch/sh/cpu/sh4/cpu.c
index be410abf00..be410abf00 100644
--- a/cpu/sh4/cpu.c
+++ b/arch/sh/cpu/sh4/cpu.c
diff --git a/cpu/sh4/interrupts.c b/arch/sh/cpu/sh4/interrupts.c
index 6988ecc7c2..6988ecc7c2 100644
--- a/cpu/sh4/interrupts.c
+++ b/arch/sh/cpu/sh4/interrupts.c
diff --git a/cpu/sh4/start.S b/arch/sh/cpu/sh4/start.S
index 711ae668d5..711ae668d5 100644
--- a/cpu/sh4/start.S
+++ b/arch/sh/cpu/sh4/start.S
diff --git a/cpu/sh4/u-boot.lds b/arch/sh/cpu/sh4/u-boot.lds
index bff9f43c10..d3719df543 100644
--- a/cpu/sh4/u-boot.lds
+++ b/arch/sh/cpu/sh4/u-boot.lds
@@ -41,7 +41,7 @@ SECTIONS
 
 	.text :
 	{
-		cpu/sh4/start.o		(.text)
+		arch/sh/cpu/sh4/start.o		(.text)
 		. = ALIGN(8192);
 		common/env_embedded.o	(.ppcenv)
 		. = ALIGN(8192);
diff --git a/cpu/sh4/watchdog.c b/arch/sh/cpu/sh4/watchdog.c
index f6924290f0..f6924290f0 100644
--- a/cpu/sh4/watchdog.c
+++ b/arch/sh/cpu/sh4/watchdog.c
diff --git a/include/asm-sh/bitops.h b/arch/sh/include/asm/bitops.h
index c57d628478..c57d628478 100644
--- a/include/asm-sh/bitops.h
+++ b/arch/sh/include/asm/bitops.h
diff --git a/include/asm-sh/byteorder.h b/arch/sh/include/asm/byteorder.h
index 25626a0760..25626a0760 100644
--- a/include/asm-sh/byteorder.h
+++ b/arch/sh/include/asm/byteorder.h
diff --git a/include/asm-sh/cache.h b/arch/sh/include/asm/cache.h
index 2cfc0a7944..2cfc0a7944 100644
--- a/include/asm-sh/cache.h
+++ b/arch/sh/include/asm/cache.h
diff --git a/include/asm-sh/clk.h b/arch/sh/include/asm/clk.h
index 9cac6b09f9..9cac6b09f9 100644
--- a/include/asm-sh/clk.h
+++ b/arch/sh/include/asm/clk.h
diff --git a/include/asm-sh/config.h b/arch/sh/include/asm/config.h
index 978cc92f40..978cc92f40 100644
--- a/include/asm-sh/config.h
+++ b/arch/sh/include/asm/config.h
diff --git a/include/asm-sh/cpu_sh2.h b/arch/sh/include/asm/cpu_sh2.h
index 8bc9bc64c5..8bc9bc64c5 100644
--- a/include/asm-sh/cpu_sh2.h
+++ b/arch/sh/include/asm/cpu_sh2.h
diff --git a/include/asm-sh/cpu_sh3.h b/arch/sh/include/asm/cpu_sh3.h
index 6db38a2f84..6db38a2f84 100644
--- a/include/asm-sh/cpu_sh3.h
+++ b/arch/sh/include/asm/cpu_sh3.h
diff --git a/include/asm-sh/cpu_sh4.h b/arch/sh/include/asm/cpu_sh4.h
index fdcebd608e..fdcebd608e 100644
--- a/include/asm-sh/cpu_sh4.h
+++ b/arch/sh/include/asm/cpu_sh4.h
diff --git a/include/asm-sh/cpu_sh7203.h b/arch/sh/include/asm/cpu_sh7203.h
index 77dcac43d3..77dcac43d3 100644
--- a/include/asm-sh/cpu_sh7203.h
+++ b/arch/sh/include/asm/cpu_sh7203.h
diff --git a/include/asm-sh/cpu_sh7710.h b/arch/sh/include/asm/cpu_sh7710.h
index e223f1ca16..e223f1ca16 100644
--- a/include/asm-sh/cpu_sh7710.h
+++ b/arch/sh/include/asm/cpu_sh7710.h
diff --git a/include/asm-sh/cpu_sh7720.h b/arch/sh/include/asm/cpu_sh7720.h
index 1b393b88a6..1b393b88a6 100644
--- a/include/asm-sh/cpu_sh7720.h
+++ b/arch/sh/include/asm/cpu_sh7720.h
diff --git a/include/asm-sh/cpu_sh7722.h b/arch/sh/include/asm/cpu_sh7722.h
index 0975b78e9b..0975b78e9b 100644
--- a/include/asm-sh/cpu_sh7722.h
+++ b/arch/sh/include/asm/cpu_sh7722.h
diff --git a/include/asm-sh/cpu_sh7723.h b/arch/sh/include/asm/cpu_sh7723.h
index 6dac6e9a01..6dac6e9a01 100644
--- a/include/asm-sh/cpu_sh7723.h
+++ b/arch/sh/include/asm/cpu_sh7723.h
diff --git a/include/asm-sh/cpu_sh7750.h b/arch/sh/include/asm/cpu_sh7750.h
index 4e43a465e6..4e43a465e6 100644
--- a/include/asm-sh/cpu_sh7750.h
+++ b/arch/sh/include/asm/cpu_sh7750.h
diff --git a/include/asm-sh/cpu_sh7763.h b/arch/sh/include/asm/cpu_sh7763.h
index 78b456b4b2..78b456b4b2 100644
--- a/include/asm-sh/cpu_sh7763.h
+++ b/arch/sh/include/asm/cpu_sh7763.h
diff --git a/include/asm-sh/cpu_sh7780.h b/arch/sh/include/asm/cpu_sh7780.h
index d4f824e715..d4f824e715 100644
--- a/include/asm-sh/cpu_sh7780.h
+++ b/arch/sh/include/asm/cpu_sh7780.h
diff --git a/include/asm-sh/cpu_sh7785.h b/arch/sh/include/asm/cpu_sh7785.h
index 4a4dfc9042..4a4dfc9042 100644
--- a/include/asm-sh/cpu_sh7785.h
+++ b/arch/sh/include/asm/cpu_sh7785.h
diff --git a/include/asm-sparc/errno.h b/arch/sh/include/asm/errno.h
index 4c82b503d9..4c82b503d9 100644
--- a/include/asm-sparc/errno.h
+++ b/arch/sh/include/asm/errno.h
diff --git a/include/asm-sh/global_data.h b/arch/sh/include/asm/global_data.h
index c12b8558ec..c12b8558ec 100644
--- a/include/asm-sh/global_data.h
+++ b/arch/sh/include/asm/global_data.h
diff --git a/include/asm-sh/io.h b/arch/sh/include/asm/io.h
index ca598a60f3..ca598a60f3 100644
--- a/include/asm-sh/io.h
+++ b/arch/sh/include/asm/io.h
diff --git a/include/asm-sh/irqflags.h b/arch/sh/include/asm/irqflags.h
index 830e5486ac..830e5486ac 100644
--- a/include/asm-sh/irqflags.h
+++ b/arch/sh/include/asm/irqflags.h
diff --git a/include/asm-sh/macro.h b/arch/sh/include/asm/macro.h
index 2b273c3ef4..2b273c3ef4 100644
--- a/include/asm-sh/macro.h
+++ b/arch/sh/include/asm/macro.h
diff --git a/include/asm-sh/pci.h b/arch/sh/include/asm/pci.h
index 040c532132..040c532132 100644
--- a/include/asm-sh/pci.h
+++ b/arch/sh/include/asm/pci.h
diff --git a/include/asm-sh/posix_types.h b/arch/sh/include/asm/posix_types.h
index c9d9fb84f1..c9d9fb84f1 100644
--- a/include/asm-sh/posix_types.h
+++ b/arch/sh/include/asm/posix_types.h
diff --git a/include/asm-sh/processor.h b/arch/sh/include/asm/processor.h
index 938a89cff5..938a89cff5 100644
--- a/include/asm-sh/processor.h
+++ b/arch/sh/include/asm/processor.h
diff --git a/include/asm-sh/ptrace.h b/arch/sh/include/asm/ptrace.h
index 16252cc25b..16252cc25b 100644
--- a/include/asm-sh/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
diff --git a/include/asm-sh/string.h b/arch/sh/include/asm/string.h
index 27d981b79a..27d981b79a 100644
--- a/include/asm-sh/string.h
+++ b/arch/sh/include/asm/string.h
diff --git a/include/asm-sh/system.h b/arch/sh/include/asm/system.h
index a62c42261d..a62c42261d 100644
--- a/include/asm-sh/system.h
+++ b/arch/sh/include/asm/system.h
diff --git a/include/asm-sh/types.h b/arch/sh/include/asm/types.h
index aed4a6eb57..aed4a6eb57 100644
--- a/include/asm-sh/types.h
+++ b/arch/sh/include/asm/types.h
diff --git a/include/asm-sh/u-boot.h b/arch/sh/include/asm/u-boot.h
index 27d43b9347..27d43b9347 100644
--- a/include/asm-sh/u-boot.h
+++ b/arch/sh/include/asm/u-boot.h
diff --git a/include/asm-sh/unaligned-sh4a.h b/arch/sh/include/asm/unaligned-sh4a.h
index 9f4dd252c9..9f4dd252c9 100644
--- a/include/asm-sh/unaligned-sh4a.h
+++ b/arch/sh/include/asm/unaligned-sh4a.h
diff --git a/include/asm-sh/unaligned.h b/arch/sh/include/asm/unaligned.h
index 2e0d164050..2e0d164050 100644
--- a/include/asm-sh/unaligned.h
+++ b/arch/sh/include/asm/unaligned.h
diff --git a/lib_sh/Makefile b/arch/sh/lib/Makefile
index f7c6479426..f7c6479426 100644
--- a/lib_sh/Makefile
+++ b/arch/sh/lib/Makefile
diff --git a/lib_sh/board.c b/arch/sh/lib/board.c
index c97e20c3e1..c97e20c3e1 100644
--- a/lib_sh/board.c
+++ b/arch/sh/lib/board.c
diff --git a/lib_sh/bootm.c b/arch/sh/lib/bootm.c
index ae1f869f10..ae1f869f10 100644
--- a/lib_sh/bootm.c
+++ b/arch/sh/lib/bootm.c
diff --git a/lib_sh/time.c b/arch/sh/lib/time.c
index 9a8f89aef6..9a8f89aef6 100644
--- a/lib_sh/time.c
+++ b/arch/sh/lib/time.c
diff --git a/lib_sh/time_sh2.c b/arch/sh/lib/time_sh2.c
index 789b46f0e0..789b46f0e0 100644
--- a/lib_sh/time_sh2.c
+++ b/arch/sh/lib/time_sh2.c
diff --git a/lib_sparc/config.mk b/arch/sparc/config.mk
index 4de6515ef4..4de6515ef4 100644
--- a/lib_sparc/config.mk
+++ b/arch/sparc/config.mk
diff --git a/cpu/leon2/Makefile b/arch/sparc/cpu/leon2/Makefile
index 7cc4420179..7cc4420179 100644
--- a/cpu/leon2/Makefile
+++ b/arch/sparc/cpu/leon2/Makefile
diff --git a/cpu/leon2/config.mk b/arch/sparc/cpu/leon2/config.mk
index 30b224a068..30b224a068 100644
--- a/cpu/leon2/config.mk
+++ b/arch/sparc/cpu/leon2/config.mk
diff --git a/cpu/leon2/cpu.c b/arch/sparc/cpu/leon2/cpu.c
index d6e23b129c..d6e23b129c 100644
--- a/cpu/leon2/cpu.c
+++ b/arch/sparc/cpu/leon2/cpu.c
diff --git a/cpu/leon2/cpu_init.c b/arch/sparc/cpu/leon2/cpu_init.c
index a24f778c6d..a24f778c6d 100644
--- a/cpu/leon2/cpu_init.c
+++ b/arch/sparc/cpu/leon2/cpu_init.c
diff --git a/cpu/leon2/interrupts.c b/arch/sparc/cpu/leon2/interrupts.c
index 9b0da963af..9b0da963af 100644
--- a/cpu/leon2/interrupts.c
+++ b/arch/sparc/cpu/leon2/interrupts.c
diff --git a/cpu/leon2/prom.c b/arch/sparc/cpu/leon2/prom.c
index 1a6c7f79cd..1a6c7f79cd 100644
--- a/cpu/leon2/prom.c
+++ b/arch/sparc/cpu/leon2/prom.c
diff --git a/cpu/leon2/serial.c b/arch/sparc/cpu/leon2/serial.c
index 4f41b8e6aa..4f41b8e6aa 100644
--- a/cpu/leon2/serial.c
+++ b/arch/sparc/cpu/leon2/serial.c
diff --git a/cpu/leon2/start.S b/arch/sparc/cpu/leon2/start.S
index b1f1eb5f3c..b1f1eb5f3c 100644
--- a/cpu/leon2/start.S
+++ b/arch/sparc/cpu/leon2/start.S
diff --git a/cpu/leon3/Makefile b/arch/sparc/cpu/leon3/Makefile
index 182543dd10..182543dd10 100644
--- a/cpu/leon3/Makefile
+++ b/arch/sparc/cpu/leon3/Makefile
diff --git a/cpu/leon3/ambapp.c b/arch/sparc/cpu/leon3/ambapp.c
index efd41ae0a8..efd41ae0a8 100644
--- a/cpu/leon3/ambapp.c
+++ b/arch/sparc/cpu/leon3/ambapp.c
diff --git a/cpu/leon3/config.mk b/arch/sparc/cpu/leon3/config.mk
index 30b224a068..30b224a068 100644
--- a/cpu/leon3/config.mk
+++ b/arch/sparc/cpu/leon3/config.mk
diff --git a/cpu/leon3/cpu.c b/arch/sparc/cpu/leon3/cpu.c
index 976f311348..976f311348 100644
--- a/cpu/leon3/cpu.c
+++ b/arch/sparc/cpu/leon3/cpu.c
diff --git a/cpu/leon3/cpu_init.c b/arch/sparc/cpu/leon3/cpu_init.c
index be22ec26aa..be22ec26aa 100644
--- a/cpu/leon3/cpu_init.c
+++ b/arch/sparc/cpu/leon3/cpu_init.c
diff --git a/cpu/leon3/interrupts.c b/arch/sparc/cpu/leon3/interrupts.c
index ac6aca5d18..ac6aca5d18 100644
--- a/cpu/leon3/interrupts.c
+++ b/arch/sparc/cpu/leon3/interrupts.c
diff --git a/cpu/leon3/prom.c b/arch/sparc/cpu/leon3/prom.c
index 18d2fb294a..18d2fb294a 100644
--- a/cpu/leon3/prom.c
+++ b/arch/sparc/cpu/leon3/prom.c
diff --git a/cpu/leon3/serial.c b/arch/sparc/cpu/leon3/serial.c
index 4b2fcb8667..4b2fcb8667 100644
--- a/cpu/leon3/serial.c
+++ b/arch/sparc/cpu/leon3/serial.c
diff --git a/cpu/leon3/start.S b/arch/sparc/cpu/leon3/start.S
index bd634bd0c2..bd634bd0c2 100644
--- a/cpu/leon3/start.S
+++ b/arch/sparc/cpu/leon3/start.S
diff --git a/cpu/leon3/usb_uhci.c b/arch/sparc/cpu/leon3/usb_uhci.c
index 8f99e1db19..8f99e1db19 100644
--- a/cpu/leon3/usb_uhci.c
+++ b/arch/sparc/cpu/leon3/usb_uhci.c
diff --git a/cpu/leon3/usb_uhci.h b/arch/sparc/cpu/leon3/usb_uhci.h
index bf572a661b..bf572a661b 100644
--- a/cpu/leon3/usb_uhci.h
+++ b/arch/sparc/cpu/leon3/usb_uhci.h
diff --git a/include/asm-sparc/arch-leon2/asi.h b/arch/sparc/include/asm/arch-leon2/asi.h
index 38fdd5c8c7..38fdd5c8c7 100644
--- a/include/asm-sparc/arch-leon2/asi.h
+++ b/arch/sparc/include/asm/arch-leon2/asi.h
diff --git a/include/asm-sparc/arch-leon3/asi.h b/arch/sparc/include/asm/arch-leon3/asi.h
index 700b3caa5e..700b3caa5e 100644
--- a/include/asm-sparc/arch-leon3/asi.h
+++ b/arch/sparc/include/asm/arch-leon3/asi.h
diff --git a/include/asm-sparc/asi.h b/arch/sparc/include/asm/asi.h
index bf6d70fece..bf6d70fece 100644
--- a/include/asm-sparc/asi.h
+++ b/arch/sparc/include/asm/asi.h
diff --git a/include/asm-sparc/asmmacro.h b/arch/sparc/include/asm/asmmacro.h
index aeb87ee7dd..aeb87ee7dd 100644
--- a/include/asm-sparc/asmmacro.h
+++ b/arch/sparc/include/asm/asmmacro.h
diff --git a/include/asm-sparc/atomic.h b/arch/sparc/include/asm/atomic.h
index 636498d557..636498d557 100644
--- a/include/asm-sparc/atomic.h
+++ b/arch/sparc/include/asm/atomic.h
diff --git a/include/asm-sparc/bitops.h b/arch/sparc/include/asm/bitops.h
index ceb39f2fe5..ceb39f2fe5 100644
--- a/include/asm-sparc/bitops.h
+++ b/arch/sparc/include/asm/bitops.h
diff --git a/include/asm-sparc/byteorder.h b/arch/sparc/include/asm/byteorder.h
index b9fc65663f..b9fc65663f 100644
--- a/include/asm-sparc/byteorder.h
+++ b/arch/sparc/include/asm/byteorder.h
diff --git a/include/asm-sparc/cache.h b/arch/sparc/include/asm/cache.h
index 03e8d94bb2..03e8d94bb2 100644
--- a/include/asm-sparc/cache.h
+++ b/arch/sparc/include/asm/cache.h
diff --git a/include/asm-sparc/config.h b/arch/sparc/include/asm/config.h
index 36438be112..36438be112 100644
--- a/include/asm-sparc/config.h
+++ b/arch/sparc/include/asm/config.h
diff --git a/arch/sparc/include/asm/errno.h b/arch/sparc/include/asm/errno.h
new file mode 100644
index 0000000000..4c82b503d9
--- /dev/null
+++ b/arch/sparc/include/asm/errno.h
@@ -0,0 +1 @@
+#include <asm-generic/errno.h>
diff --git a/include/asm-sparc/global_data.h b/arch/sparc/include/asm/global_data.h
index dea2857274..dea2857274 100644
--- a/include/asm-sparc/global_data.h
+++ b/arch/sparc/include/asm/global_data.h
diff --git a/include/asm-sparc/io.h b/arch/sparc/include/asm/io.h
index 0c5d86cb3a..0c5d86cb3a 100644
--- a/include/asm-sparc/io.h
+++ b/arch/sparc/include/asm/io.h
diff --git a/include/asm-sparc/irq.h b/arch/sparc/include/asm/irq.h
index c5538c092d..c5538c092d 100644
--- a/include/asm-sparc/irq.h
+++ b/arch/sparc/include/asm/irq.h
diff --git a/include/asm-sparc/leon.h b/arch/sparc/include/asm/leon.h
index f7175eee9f..f7175eee9f 100644
--- a/include/asm-sparc/leon.h
+++ b/arch/sparc/include/asm/leon.h
diff --git a/include/asm-sparc/leon2.h b/arch/sparc/include/asm/leon2.h
index fa55cade0b..fa55cade0b 100644
--- a/include/asm-sparc/leon2.h
+++ b/arch/sparc/include/asm/leon2.h
diff --git a/include/asm-sparc/leon3.h b/arch/sparc/include/asm/leon3.h
index b90d35b198..b90d35b198 100644
--- a/include/asm-sparc/leon3.h
+++ b/arch/sparc/include/asm/leon3.h
diff --git a/include/asm-sparc/machines.h b/arch/sparc/include/asm/machines.h
index 1e26195991..1e26195991 100644
--- a/include/asm-sparc/machines.h
+++ b/arch/sparc/include/asm/machines.h
diff --git a/include/asm-sparc/page.h b/arch/sparc/include/asm/page.h
index 484953a86d..484953a86d 100644
--- a/include/asm-sparc/page.h
+++ b/arch/sparc/include/asm/page.h
diff --git a/include/asm-sparc/posix_types.h b/arch/sparc/include/asm/posix_types.h
index 8d98b2a6a1..8d98b2a6a1 100644
--- a/include/asm-sparc/posix_types.h
+++ b/arch/sparc/include/asm/posix_types.h
diff --git a/include/asm-sparc/processor.h b/arch/sparc/include/asm/processor.h
index d518389ad6..d518389ad6 100644
--- a/include/asm-sparc/processor.h
+++ b/arch/sparc/include/asm/processor.h
diff --git a/include/asm-sparc/prom.h b/arch/sparc/include/asm/prom.h
index d55cc863da..d55cc863da 100644
--- a/include/asm-sparc/prom.h
+++ b/arch/sparc/include/asm/prom.h
diff --git a/include/asm-sparc/psr.h b/arch/sparc/include/asm/psr.h
index fc779477e5..fc779477e5 100644
--- a/include/asm-sparc/psr.h
+++ b/arch/sparc/include/asm/psr.h
diff --git a/include/asm-sparc/ptrace.h b/arch/sparc/include/asm/ptrace.h
index 12a9c569a2..12a9c569a2 100644
--- a/include/asm-sparc/ptrace.h
+++ b/arch/sparc/include/asm/ptrace.h
diff --git a/include/asm-sparc/srmmu.h b/arch/sparc/include/asm/srmmu.h
index 5214d96a7e..5214d96a7e 100644
--- a/include/asm-sparc/srmmu.h
+++ b/arch/sparc/include/asm/srmmu.h
diff --git a/include/asm-sparc/stack.h b/arch/sparc/include/asm/stack.h
index b40a9f355f..b40a9f355f 100644
--- a/include/asm-sparc/stack.h
+++ b/arch/sparc/include/asm/stack.h
diff --git a/include/asm-sparc/string.h b/arch/sparc/include/asm/string.h
index c6bbc203d5..c6bbc203d5 100644
--- a/include/asm-sparc/string.h
+++ b/arch/sparc/include/asm/string.h
diff --git a/include/asm-sparc/types.h b/arch/sparc/include/asm/types.h
index 0a8a26c597..0a8a26c597 100644
--- a/include/asm-sparc/types.h
+++ b/arch/sparc/include/asm/types.h
diff --git a/include/asm-sparc/u-boot.h b/arch/sparc/include/asm/u-boot.h
index 209873ffec..209873ffec 100644
--- a/include/asm-sparc/u-boot.h
+++ b/arch/sparc/include/asm/u-boot.h
diff --git a/include/asm-sparc/winmacro.h b/arch/sparc/include/asm/winmacro.h
index 66fc639a7e..66fc639a7e 100644
--- a/include/asm-sparc/winmacro.h
+++ b/arch/sparc/include/asm/winmacro.h
diff --git a/lib_sparc/Makefile b/arch/sparc/lib/Makefile
index 040ca10d3b..040ca10d3b 100644
--- a/lib_sparc/Makefile
+++ b/arch/sparc/lib/Makefile
diff --git a/lib_sparc/board.c b/arch/sparc/lib/board.c
index 11eea603c1..11eea603c1 100644
--- a/lib_sparc/board.c
+++ b/arch/sparc/lib/board.c
diff --git a/lib_sparc/bootm.c b/arch/sparc/lib/bootm.c
index c62cf57d80..c62cf57d80 100644
--- a/lib_sparc/bootm.c
+++ b/arch/sparc/lib/bootm.c
diff --git a/lib_sparc/cache.c b/arch/sparc/lib/cache.c
index 59d9bbe672..59d9bbe672 100644
--- a/lib_sparc/cache.c
+++ b/arch/sparc/lib/cache.c
diff --git a/lib_sparc/interrupts.c b/arch/sparc/lib/interrupts.c
index 4c73b82a6f..4c73b82a6f 100644
--- a/lib_sparc/interrupts.c
+++ b/arch/sparc/lib/interrupts.c
diff --git a/lib_sparc/time.c b/arch/sparc/lib/time.c
index 82b2a3abce..82b2a3abce 100644
--- a/lib_sparc/time.c
+++ b/arch/sparc/lib/time.c
diff --git a/board/BuS/EB+MCF-EV123/u-boot.lds b/board/BuS/EB+MCF-EV123/u-boot.lds
index 34507938fd..0fa633a1fe 100644
--- a/board/BuS/EB+MCF-EV123/u-boot.lds
+++ b/board/BuS/EB+MCF-EV123/u-boot.lds
@@ -55,12 +55,12 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf52x2/start.o	(.text)
+    arch/m68k/cpu/mcf52x2/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/string.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o	(.text)
-    lib_generic/zlib.o	(.text)
+    lib/string.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o	(.text)
+    lib/zlib.o	(.text)
 
 /*    . = env_offset; */
     common/env_embedded.o(.text)
diff --git a/board/LEOX/elpt860/u-boot.lds b/board/LEOX/elpt860/u-boot.lds
index 3c44b3ef29..e26792cc2f 100644
--- a/board/LEOX/elpt860/u-boot.lds
+++ b/board/LEOX/elpt860/u-boot.lds
@@ -64,17 +64,17 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o			(.text)
+    arch/ppc/cpu/mpc8xx/start.o			(.text)
     common/dlmalloc.o			(.text)
-    lib_ppc/ppcstring.o			(.text)
-    lib_generic/vsprintf.o		(.text)
-    lib_generic/crc32.o			(.text)
-    lib_generic/zlib.o			(.text)
-    lib_generic/string.o		(.text)
-    lib_ppc/cache.o			(.text)
-    lib_ppc/extable.o			(.text)
-    lib_ppc/time.o			(.text)
-    lib_ppc/ticks.o			(.text)
+    arch/ppc/lib/ppcstring.o			(.text)
+    lib/vsprintf.o		(.text)
+    lib/crc32.o			(.text)
+    lib/zlib.o			(.text)
+    lib/string.o		(.text)
+    arch/ppc/lib/cache.o			(.text)
+    arch/ppc/lib/extable.o			(.text)
+    arch/ppc/lib/time.o			(.text)
+    arch/ppc/lib/ticks.o			(.text)
 
     . = env_offset;
     common/env_embedded.o		(.text)
diff --git a/board/LEOX/elpt860/u-boot.lds.debug b/board/LEOX/elpt860/u-boot.lds.debug
index 5126083425..707ff7a6b0 100644
--- a/board/LEOX/elpt860/u-boot.lds.debug
+++ b/board/LEOX/elpt860/u-boot.lds.debug
@@ -64,10 +64,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o	(.text)
diff --git a/board/MAI/AmigaOneG3SE/u-boot.lds b/board/MAI/AmigaOneG3SE/u-boot.lds
index 18510a8e7e..1f55c6571d 100644
--- a/board/MAI/AmigaOneG3SE/u-boot.lds
+++ b/board/MAI/AmigaOneG3SE/u-boot.lds
@@ -59,7 +59,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/74xx_7xx/start.o	(.text)
+    arch/ppc/cpu/74xx_7xx/start.o	(.text)
 /* store the environment in a seperate sector in the boot flash */
 /*    . = env_offset; */
     common/env_embedded.o(.text)
diff --git a/board/Marvell/db64360/u-boot.lds b/board/Marvell/db64360/u-boot.lds
index d021331148..6dff003dc1 100644
--- a/board/Marvell/db64360/u-boot.lds
+++ b/board/Marvell/db64360/u-boot.lds
@@ -56,7 +56,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/74xx_7xx/start.o	(.text)
+    arch/ppc/cpu/74xx_7xx/start.o	(.text)
 
 /* store the environment in a seperate sector in the boot flash */
 /*    . = env_offset; */
diff --git a/board/Marvell/db64460/u-boot.lds b/board/Marvell/db64460/u-boot.lds
index d021331148..6dff003dc1 100644
--- a/board/Marvell/db64460/u-boot.lds
+++ b/board/Marvell/db64460/u-boot.lds
@@ -56,7 +56,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/74xx_7xx/start.o	(.text)
+    arch/ppc/cpu/74xx_7xx/start.o	(.text)
 
 /* store the environment in a seperate sector in the boot flash */
 /*    . = env_offset; */
diff --git a/board/RPXClassic/u-boot.lds b/board/RPXClassic/u-boot.lds
index 47247ec813..f7de95dc87 100644
--- a/board/RPXClassic/u-boot.lds
+++ b/board/RPXClassic/u-boot.lds
@@ -55,12 +55,12 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 /* XXX ?
     . = env_offset;
 */
diff --git a/board/RPXClassic/u-boot.lds.debug b/board/RPXClassic/u-boot.lds.debug
index a2d940f048..57cc305868 100644
--- a/board/RPXClassic/u-boot.lds.debug
+++ b/board/RPXClassic/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/RPXlite/u-boot.lds b/board/RPXlite/u-boot.lds
index 47247ec813..f7de95dc87 100644
--- a/board/RPXlite/u-boot.lds
+++ b/board/RPXlite/u-boot.lds
@@ -55,12 +55,12 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 /* XXX ?
     . = env_offset;
 */
diff --git a/board/RPXlite/u-boot.lds.debug b/board/RPXlite/u-boot.lds.debug
index a2d940f048..57cc305868 100644
--- a/board/RPXlite/u-boot.lds.debug
+++ b/board/RPXlite/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/RPXlite_dw/u-boot.lds b/board/RPXlite_dw/u-boot.lds
index 7ae7be0c02..a2db9a6288 100644
--- a/board/RPXlite_dw/u-boot.lds
+++ b/board/RPXlite_dw/u-boot.lds
@@ -55,12 +55,12 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 /* XXX ?
     . = env_offset;
 */
diff --git a/board/RPXlite_dw/u-boot.lds.debug b/board/RPXlite_dw/u-boot.lds.debug
index 83fdc15011..723f562911 100644
--- a/board/RPXlite_dw/u-boot.lds.debug
+++ b/board/RPXlite_dw/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/RRvision/u-boot.lds b/board/RRvision/u-boot.lds
index f22b25fc3d..b323768fb0 100644
--- a/board/RRvision/u-boot.lds
+++ b/board/RRvision/u-boot.lds
@@ -55,15 +55,15 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o		(.text)
-    cpu/mpc8xx/traps.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/traps.o		(.text)
     common/dlmalloc.o		(.text)
-    lib_ppc/ppcstring.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
-    lib_ppc/cache.o		(.text)
-    lib_ppc/time.o		(.text)
+    arch/ppc/lib/ppcstring.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
+    arch/ppc/lib/cache.o		(.text)
+    arch/ppc/lib/time.o		(.text)
 
     . = env_offset;
     common/env_embedded.o	(.ppcenv)
diff --git a/board/actux1/config.mk b/board/actux1/config.mk
index 119140d8c3..a0dbe0bc48 100644
--- a/board/actux1/config.mk
+++ b/board/actux1/config.mk
@@ -1,6 +1,6 @@
 TEXT_BASE = 0x00e00000
 
 # include NPE ethernet driver
-BOARDLIBS = cpu/ixp/npe/libnpe.a
+BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.a
 
 LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds
diff --git a/board/actux1/u-boot.lds b/board/actux1/u-boot.lds
index 836775f0fe..5c1ece79c8 100644
--- a/board/actux1/u-boot.lds
+++ b/board/actux1/u-boot.lds
@@ -30,12 +30,12 @@ SECTIONS
 
 	. = ALIGN (4);
 	.text : {
-		cpu/ixp/start.o(.text)
-		lib_generic/string.o(.text)
-		lib_generic/vsprintf.o(.text)
-		lib_arm/board.o(.text)
+		arch/arm/cpu/ixp/start.o(.text)
+		lib/string.o(.text)
+		lib/vsprintf.o(.text)
+		arch/arm/lib/board.o(.text)
 		common/dlmalloc.o(.text)
-		cpu/ixp/cpu.o(.text)
+		arch/arm/cpu/ixp/cpu.o(.text)
 		. = env_offset;
 		common/env_embedded.o(.ppcenv)
 		* (.text)
diff --git a/board/actux2/config.mk b/board/actux2/config.mk
index 119140d8c3..a0dbe0bc48 100644
--- a/board/actux2/config.mk
+++ b/board/actux2/config.mk
@@ -1,6 +1,6 @@
 TEXT_BASE = 0x00e00000
 
 # include NPE ethernet driver
-BOARDLIBS = cpu/ixp/npe/libnpe.a
+BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.a
 
 LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds
diff --git a/board/actux2/u-boot.lds b/board/actux2/u-boot.lds
index 0752656b59..707c027ab5 100644
--- a/board/actux2/u-boot.lds
+++ b/board/actux2/u-boot.lds
@@ -30,12 +30,12 @@ SECTIONS
 
 	. = ALIGN (4);
 	.text : {
-		cpu/ixp/start.o(.text)
-		lib_generic/string.o(.text)
-		lib_generic/vsprintf.o(.text)
-		lib_arm/board.o(.text)
+		arch/arm/cpu/ixp/start.o(.text)
+		lib/string.o(.text)
+		lib/vsprintf.o(.text)
+		arch/arm/lib/board.o(.text)
 		common/dlmalloc.o(.text)
-		cpu/ixp/cpu.o(.text)
+		arch/arm/cpu/ixp/cpu.o(.text)
 
 		. = env_offset;
 		common/env_embedded.o (.ppcenv)
diff --git a/board/actux3/config.mk b/board/actux3/config.mk
index 119140d8c3..a0dbe0bc48 100644
--- a/board/actux3/config.mk
+++ b/board/actux3/config.mk
@@ -1,6 +1,6 @@
 TEXT_BASE = 0x00e00000
 
 # include NPE ethernet driver
-BOARDLIBS = cpu/ixp/npe/libnpe.a
+BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.a
 
 LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds
diff --git a/board/actux3/u-boot.lds b/board/actux3/u-boot.lds
index a69e7db9ca..497ab97690 100644
--- a/board/actux3/u-boot.lds
+++ b/board/actux3/u-boot.lds
@@ -30,12 +30,12 @@ SECTIONS
 
 	. = ALIGN (4);
 	.text : {
-		cpu/ixp/start.o (.text)
-		lib_generic/string.o (.text)
-		lib_generic/vsprintf.o (.text)
-		lib_arm/board.o (.text)
+		arch/arm/cpu/ixp/start.o (.text)
+		lib/string.o (.text)
+		lib/vsprintf.o (.text)
+		arch/arm/lib/board.o (.text)
 		common/dlmalloc.o (.text)
-		cpu/ixp/cpu.o (.text)
+		arch/arm/cpu/ixp/cpu.o (.text)
 
 		. = env_offset;
 		common/env_embedded.o (.ppcenv)
diff --git a/board/actux4/config.mk b/board/actux4/config.mk
index 9a634cdffa..f2b5fc911a 100644
--- a/board/actux4/config.mk
+++ b/board/actux4/config.mk
@@ -1,4 +1,4 @@
 TEXT_BASE = 0x00e00000
 
 # include NPE ethernet driver
-BOARDLIBS = cpu/ixp/npe/libnpe.a
+BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.a
diff --git a/board/adder/u-boot.lds b/board/adder/u-boot.lds
index 397ee2f053..018bcf1a26 100644
--- a/board/adder/u-boot.lds
+++ b/board/adder/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt           : { *(.plt)		}
   .text          :
   {
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     *(.text)
     *(.got1)
     . = ALIGN(16);
diff --git a/board/altera/common/AMDLV065D.c b/board/altera/common/AMDLV065D.c
index 0fcf354cdc..7a1b4d3c2f 100644
--- a/board/altera/common/AMDLV065D.c
+++ b/board/altera/common/AMDLV065D.c
@@ -122,12 +122,12 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
 	for (sect = s_first; sect <= s_last; sect++) {
 		if (info->protect[sect] == 0) {	/* not protected */
 			addr2 = (unsigned char *) info->start[sect];
-			writeb (addr, 0xaa);
-			writeb (addr,  0x55);
-			writeb (addr,  0x80);
-			writeb (addr,  0xaa);
-			writeb (addr,  0x55);
-			writeb (addr2, 0x30);
+			writeb (0xaa, addr);
+			writeb (0x55, addr);
+			writeb (0x80, addr);
+			writeb (0xaa, addr);
+			writeb (0x55, addr);
+			writeb (0x30, addr2);
 			/* Now just wait for 0xff & provide some user
 			 * feedback while we wait.
 			 */
@@ -169,10 +169,10 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 			return (2);
 		}
 
-		writeb (cmd,  0xaa);
-		writeb (cmd,  0x55);
-		writeb (cmd,  0xa0);
-		writeb (dst, b);
+		writeb (0xaa, cmd);
+		writeb (0x55, cmd);
+		writeb (0xa0, cmd);
+		writeb (b, dst);
 
 		/* Verify write */
 		start = get_timer (0);
diff --git a/board/altera/common/epled.c b/board/altera/common/epled.c
index e5e7705761..d0197358f4 100644
--- a/board/altera/common/epled.c
+++ b/board/altera/common/epled.c
@@ -39,7 +39,7 @@ void __led_init (led_id_t mask, int state)
 		val &= ~mask;
 	else
 		val |= mask;
-	writel (&pio->data, val);
+	writel (val, &pio->data);
 }
 
 void __led_set (led_id_t mask, int state)
@@ -50,7 +50,7 @@ void __led_set (led_id_t mask, int state)
 		val &= ~mask;
 	else
 		val |= mask;
-	writel (&pio->data, val);
+	writel (val, &pio->data);
 }
 
 void __led_toggle (led_id_t mask)
@@ -58,5 +58,5 @@ void __led_toggle (led_id_t mask)
 	nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LEDPIO_ADDR;
 
 	val ^= mask;
-	writel (&pio->data, val);
+	writel (val, &pio->data);
 }
diff --git a/board/altera/dk1c20/u-boot.lds b/board/altera/dk1c20/u-boot.lds
index 98ee8f8323..50c3fe75a0 100644
--- a/board/altera/dk1c20/u-boot.lds
+++ b/board/altera/dk1c20/u-boot.lds
@@ -30,7 +30,7 @@ SECTIONS
 {
 	.text :
 	{
-	  cpu/nios/start.o (.text)
+	  arch/nios/cpu/start.o (.text)
 	  *(.text)
 	}
 	__text_end = .;
diff --git a/board/altera/dk1s10/u-boot.lds b/board/altera/dk1s10/u-boot.lds
index 98ee8f8323..50c3fe75a0 100644
--- a/board/altera/dk1s10/u-boot.lds
+++ b/board/altera/dk1s10/u-boot.lds
@@ -30,7 +30,7 @@ SECTIONS
 {
 	.text :
 	{
-	  cpu/nios/start.o (.text)
+	  arch/nios/cpu/start.o (.text)
 	  *(.text)
 	}
 	__text_end = .;
diff --git a/board/altera/ep1c20/u-boot.lds b/board/altera/ep1c20/u-boot.lds
index e2eb3aa431..b909e94f8f 100644
--- a/board/altera/ep1c20/u-boot.lds
+++ b/board/altera/ep1c20/u-boot.lds
@@ -30,7 +30,7 @@ SECTIONS
 {
 	.text :
 	{
-	  cpu/nios2/start.o (.text)
+	  arch/nios/cpu2/start.o (.text)
 	  *(.text)
 	  *(.text.*)
 	  *(.gnu.linkonce.t*)
diff --git a/board/altera/ep1s10/u-boot.lds b/board/altera/ep1s10/u-boot.lds
index e2eb3aa431..b909e94f8f 100644
--- a/board/altera/ep1s10/u-boot.lds
+++ b/board/altera/ep1s10/u-boot.lds
@@ -30,7 +30,7 @@ SECTIONS
 {
 	.text :
 	{
-	  cpu/nios2/start.o (.text)
+	  arch/nios/cpu2/start.o (.text)
 	  *(.text)
 	  *(.text.*)
 	  *(.gnu.linkonce.t*)
diff --git a/board/altera/ep1s40/u-boot.lds b/board/altera/ep1s40/u-boot.lds
index e2eb3aa431..b909e94f8f 100644
--- a/board/altera/ep1s40/u-boot.lds
+++ b/board/altera/ep1s40/u-boot.lds
@@ -30,7 +30,7 @@ SECTIONS
 {
 	.text :
 	{
-	  cpu/nios2/start.o (.text)
+	  arch/nios/cpu2/start.o (.text)
 	  *(.text)
 	  *(.text.*)
 	  *(.gnu.linkonce.t*)
diff --git a/board/amcc/acadia/u-boot-nand.lds b/board/amcc/acadia/u-boot-nand.lds
index 738caa0c5f..bfca582715 100644
--- a/board/amcc/acadia/u-boot-nand.lds
+++ b/board/amcc/acadia/u-boot-nand.lds
@@ -53,7 +53,7 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
 
     /* Align to next NAND block */
     . = ALIGN(0x4000);
diff --git a/board/amcc/bamboo/init.S b/board/amcc/bamboo/init.S
index a5c9d6d764..7439c805c2 100644
--- a/board/amcc/bamboo/init.S
+++ b/board/amcc/bamboo/init.S
@@ -25,7 +25,7 @@
 
 #include <ppc_asm.tmpl>
 #include <config.h>
-#include <asm-ppc/mmu.h>
+#include <asm/mmu.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/amcc/bamboo/u-boot-nand.lds b/board/amcc/bamboo/u-boot-nand.lds
index 738caa0c5f..bfca582715 100644
--- a/board/amcc/bamboo/u-boot-nand.lds
+++ b/board/amcc/bamboo/u-boot-nand.lds
@@ -53,7 +53,7 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
 
     /* Align to next NAND block */
     . = ALIGN(0x4000);
diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c
index 13a0daced7..71a5701916 100644
--- a/board/amcc/canyonlands/canyonlands.c
+++ b/board/amcc/canyonlands/canyonlands.c
@@ -42,7 +42,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define BOARD_ARCHES		4
 
 /*
- * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
+ * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with
  * board specific values.
  */
 #if defined(CONFIG_ARCHES)
diff --git a/board/amcc/canyonlands/init.S b/board/amcc/canyonlands/init.S
index 0b667968ac..993bec30ea 100644
--- a/board/amcc/canyonlands/init.S
+++ b/board/amcc/canyonlands/init.S
@@ -23,7 +23,7 @@
 
 #include <ppc_asm.tmpl>
 #include <config.h>
-#include <asm-ppc/mmu.h>
+#include <asm/mmu.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/amcc/canyonlands/u-boot-nand.lds b/board/amcc/canyonlands/u-boot-nand.lds
index 47c6bd9211..b04b05e38a 100644
--- a/board/amcc/canyonlands/u-boot-nand.lds
+++ b/board/amcc/canyonlands/u-boot-nand.lds
@@ -53,7 +53,7 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
 
     /* Align to next NAND block */
     . = ALIGN(0x20000);
diff --git a/board/amcc/ebony/init.S b/board/amcc/ebony/init.S
index 811a96a1f4..153fa811c4 100644
--- a/board/amcc/ebony/init.S
+++ b/board/amcc/ebony/init.S
@@ -22,7 +22,7 @@
 
 #include <ppc_asm.tmpl>
 #include <config.h>
-#include <asm-ppc/mmu.h>
+#include <asm/mmu.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/amcc/katmai/init.S b/board/amcc/katmai/init.S
index 1c74a82c3d..90598f63bc 100644
--- a/board/amcc/katmai/init.S
+++ b/board/amcc/katmai/init.S
@@ -25,7 +25,7 @@
 
 #include <ppc_asm.tmpl>
 #include <config.h>
-#include <asm-ppc/mmu.h>
+#include <asm/mmu.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/amcc/katmai/katmai.c b/board/amcc/katmai/katmai.c
index 54e2a39aa1..15291f96b5 100644
--- a/board/amcc/katmai/katmai.c
+++ b/board/amcc/katmai/katmai.c
@@ -249,7 +249,7 @@ int checkboard (void)
 }
 
 /*
- * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
+ * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with
  * board specific values.
  */
 u32 ddr_wrdtr(u32 default_val) {
diff --git a/board/amcc/kilauea/u-boot-nand.lds b/board/amcc/kilauea/u-boot-nand.lds
index 738caa0c5f..bfca582715 100644
--- a/board/amcc/kilauea/u-boot-nand.lds
+++ b/board/amcc/kilauea/u-boot-nand.lds
@@ -53,7 +53,7 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
 
     /* Align to next NAND block */
     . = ALIGN(0x4000);
diff --git a/board/amcc/luan/init.S b/board/amcc/luan/init.S
index fb54dea3a0..513b0fc560 100644
--- a/board/amcc/luan/init.S
+++ b/board/amcc/luan/init.S
@@ -25,7 +25,7 @@
 
 #include <ppc_asm.tmpl>
 #include <config.h>
-#include <asm-ppc/mmu.h>
+#include <asm/mmu.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c
index 332d170d61..6542565f08 100644
--- a/board/amcc/luan/luan.c
+++ b/board/amcc/luan/luan.c
@@ -119,7 +119,7 @@ int checkboard(void)
 }
 
 /*
- * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
+ * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with
  * board specific values.
  */
 u32 ddr_clktr(u32 default_val) {
diff --git a/board/amcc/ocotea/init.S b/board/amcc/ocotea/init.S
index 8bcfbb197e..e7c75dfac5 100644
--- a/board/amcc/ocotea/init.S
+++ b/board/amcc/ocotea/init.S
@@ -22,7 +22,7 @@
 
 #include <ppc_asm.tmpl>
 #include <config.h>
-#include <asm-ppc/mmu.h>
+#include <asm/mmu.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/amcc/redwood/init.S b/board/amcc/redwood/init.S
index 363d7932ac..4da586918d 100644
--- a/board/amcc/redwood/init.S
+++ b/board/amcc/redwood/init.S
@@ -23,7 +23,7 @@
 
 #include <ppc_asm.tmpl>
 #include <config.h>
-#include <asm-ppc/mmu.h>
+#include <asm/mmu.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/amcc/redwood/redwood.c b/board/amcc/redwood/redwood.c
index bc8cb0c443..32fb8c584b 100644
--- a/board/amcc/redwood/redwood.c
+++ b/board/amcc/redwood/redwood.c
@@ -29,7 +29,7 @@
 #include <ppc4xx.h>
 #include <asm/processor.h>
 #include <i2c.h>
-#include <asm-ppc/io.h>
+#include <asm/io.h>
 
 int compare_to_true(char *str);
 char *remove_l_w_space(char *in_str);
diff --git a/board/amcc/sequoia/init.S b/board/amcc/sequoia/init.S
index 3c0e400f95..f090070b4d 100644
--- a/board/amcc/sequoia/init.S
+++ b/board/amcc/sequoia/init.S
@@ -22,7 +22,7 @@
  */
 
 #include <ppc_asm.tmpl>
-#include <asm-ppc/mmu.h>
+#include <asm/mmu.h>
 #include <config.h>
 
 /*
diff --git a/board/amcc/sequoia/sdram.c b/board/amcc/sequoia/sdram.c
index bde471c2ef..b5c7d6d506 100644
--- a/board/amcc/sequoia/sdram.c
+++ b/board/amcc/sequoia/sdram.c
@@ -40,7 +40,7 @@ extern int denali_wait_for_dlllock(void);
 extern void denali_core_search_data_eye(void);
 
 #if defined(CONFIG_NAND_SPL)
-/* Using cpu/ppc4xx/speed.c to calculate the bus frequency is too big
+/* Using arch/ppc/cpu/ppc4xx/speed.c to calculate the bus frequency is too big
  * for the 4k NAND boot image so define bus_frequency to 133MHz here
  * which is save for the refresh counter setup.
  */
diff --git a/board/amcc/sequoia/u-boot-nand.lds b/board/amcc/sequoia/u-boot-nand.lds
index fb629e0c5e..8a71bfa44e 100644
--- a/board/amcc/sequoia/u-boot-nand.lds
+++ b/board/amcc/sequoia/u-boot-nand.lds
@@ -53,7 +53,7 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
 
     /* Align to next NAND block */
     . = ALIGN(0x4000);
diff --git a/board/amcc/sequoia/u-boot-ram.lds b/board/amcc/sequoia/u-boot-ram.lds
index e22dbecbf7..c6a321e400 100644
--- a/board/amcc/sequoia/u-boot-ram.lds
+++ b/board/amcc/sequoia/u-boot-ram.lds
@@ -50,7 +50,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
 
     *(.text)
     *(.got1)
diff --git a/board/amcc/yucca/init.S b/board/amcc/yucca/init.S
index 9308fdac20..f51035ff68 100644
--- a/board/amcc/yucca/init.S
+++ b/board/amcc/yucca/init.S
@@ -25,7 +25,7 @@
 
 #include <ppc_asm.tmpl>
 #include <config.h>
-#include <asm-ppc/mmu.h>
+#include <asm/mmu.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/amcc/yucca/yucca.c b/board/amcc/yucca/yucca.c
index 8c65cfb6fe..241f484491 100644
--- a/board/amcc/yucca/yucca.c
+++ b/board/amcc/yucca/yucca.c
@@ -555,7 +555,7 @@ int checkboard (void)
 }
 
 /*
- * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
+ * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with
  * board specific values.
  */
 static int ppc440spe_rev_a(void)
diff --git a/board/amirix/ap1000/u-boot.lds b/board/amirix/ap1000/u-boot.lds
index 707203d60f..faeefe8bdd 100644
--- a/board/amirix/ap1000/u-boot.lds
+++ b/board/amirix/ap1000/u-boot.lds
@@ -55,18 +55,18 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
     board/amirix/ap1000/init.o	(.text)
-    cpu/ppc4xx/kgdb.o	(.text)
-    cpu/ppc4xx/traps.o	(.text)
-    cpu/ppc4xx/interrupts.o	(.text)
-    cpu/ppc4xx/4xx_uart.o	(.text)
-    cpu/ppc4xx/cpu_init.o	(.text)
-    cpu/ppc4xx/speed.o	(.text)
+    arch/ppc/cpu/ppc4xx/kgdb.o	(.text)
+    arch/ppc/cpu/ppc4xx/traps.o	(.text)
+    arch/ppc/cpu/ppc4xx/interrupts.o	(.text)
+    arch/ppc/cpu/ppc4xx/4xx_uart.o	(.text)
+    arch/ppc/cpu/ppc4xx/cpu_init.o	(.text)
+    arch/ppc/cpu/ppc4xx/speed.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
-    lib_generic/zlib.o		(.text)
+    lib/crc32.o		(.text)
+    arch/ppc/lib/extable.o	(.text)
+    lib/zlib.o		(.text)
 
 /*    . = env_offset;*/
 /*    common/env_embedded.o(.text)*/
diff --git a/board/armltd/integrator/integrator.c b/board/armltd/integrator/integrator.c
index 518944e077..9bb56b5208 100644
--- a/board/armltd/integrator/integrator.c
+++ b/board/armltd/integrator/integrator.c
@@ -132,9 +132,7 @@ int board_eth_init(bd_t *bis)
 #ifdef CONFIG_SMC91111
 	rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
 #endif
-#ifdef CONFIG_PCI
 	rc += pci_eth_init(bis);
-#endif
 	return rc;
 }
 #endif
diff --git a/board/astro/mcf5373l/Makefile b/board/astro/mcf5373l/Makefile
new file mode 100644
index 0000000000..c7a1d05518
--- /dev/null
+++ b/board/astro/mcf5373l/Makefile
@@ -0,0 +1,44 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	= $(BOARD).o fpga.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/astro/mcf5373l/astro.h b/board/astro/mcf5373l/astro.h
new file mode 100644
index 0000000000..b55a6f785c
--- /dev/null
+++ b/board/astro/mcf5373l/astro.h
@@ -0,0 +1,44 @@
+#ifndef __ASTRO_H__
+#define __ASTRO_H__
+
+/* in mcf5373l.c */
+int rs_serial_init(int port, int baud);
+void astro_put_char(char ch);
+int astro_is_char(void);
+int astro_get_char(void);
+
+/* in fpga.c */
+int astro5373l_altera_load(void);
+int astro5373l_xilinx_load(void);
+
+/* data structures used for communication (update.c) */
+typedef struct card_id {
+	char card_type;
+	char hardware_version;
+	char software_version;
+	char software_subversion;	/* " ","a".."z" */
+	char fpga_version_altera;
+	char fpga_version_xilinx;
+} card_id_t;
+
+typedef struct {
+	unsigned char mode;
+	unsigned char deviation;
+	unsigned short freq;
+} __attribute__ ((packed)) output_params_t;
+
+typedef struct {
+	unsigned short satfreq;
+	unsigned char satdatallg;
+	unsigned short symbolrate;
+	unsigned char viterbirate;
+	unsigned char symbolrate_l;
+	output_params_t output_params;
+	unsigned char reserve;
+	unsigned char card_error;
+	unsigned short dummy_ts_id;
+	unsigned char dummy_pat_ver;
+	unsigned char dummy_sdt_ver;
+} __attribute__ ((packed)) parameters_t;
+
+#endif /* __ASTRO_H__ */
diff --git a/board/xilinx/ml300/config.mk b/board/astro/mcf5373l/config.mk
index 208a25ba11..6316a3029a 100644
--- a/board/xilinx/ml300/config.mk
+++ b/board/astro/mcf5373l/config.mk
@@ -1,6 +1,7 @@
 #
-# (C) Copyright 2000
+# (C) Copyright 2000-2003
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
 #
 # See file CREDITS for list of people who contributed to this
 # project.
@@ -21,12 +22,6 @@
 # MA 02111-1307 USA
 #
 
-#
-# esd ADCIOP boards
-#
-
-#TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0x04000000
+TEXT_BASE = $(CONFIG_TEXT_BASE)
 
-# Use board specific linker script
-LDSCRIPT := $(SRCTREE)/board/xilinx/ml300/u-boot.lds
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/astro/mcf5373l/fpga.c b/board/astro/mcf5373l/fpga.c
new file mode 100644
index 0000000000..467461b8e8
--- /dev/null
+++ b/board/astro/mcf5373l/fpga.c
@@ -0,0 +1,425 @@
+/*
+ * (C) Copyright 2006
+ * Wolfgang Wegner, ASTRO Strobel Kommunikationssysteme GmbH,
+ * w.wegner@astro-kom.de
+ *
+ * based on the files by
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de
+ * and
+ * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
+ * Keith Outwater, keith_outwater@mvis.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+/* Altera/Xilinx FPGA configuration support for the ASTRO "URMEL" board */
+
+#include <common.h>
+#include <watchdog.h>
+#include <altera.h>
+#include <ACEX1K.h>
+#include <spartan3.h>
+#include <command.h>
+#include <asm/immap_5329.h>
+#include <asm/io.h>
+#include "fpga.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int altera_pre_fn(int cookie)
+{
+	gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
+	unsigned char tmp_char;
+	unsigned short tmp_short;
+
+	/* first, set the required pins to GPIO function */
+	/* PAR_T0IN -> GPIO */
+	tmp_char = readb(&gpiop->par_timer);
+	tmp_char &= 0xfc;
+	writeb(tmp_char, &gpiop->par_timer);
+	/* all QSPI pins -> GPIO */
+	writew(0x0000, &gpiop->par_qspi);
+	/* U0RTS, U0CTS -> GPIO */
+	tmp_short = __raw_readw(&gpiop->par_uart);
+	tmp_short &= 0xfff3;
+	__raw_writew(tmp_short, &gpiop->par_uart);
+	/* all PWM pins -> GPIO */
+	writeb(0x00, &gpiop->par_pwm);
+	/* next, set data direction registers */
+	writeb(0x01, &gpiop->pddr_timer);
+	writeb(0x25, &gpiop->pddr_qspi);
+	writeb(0x0c, &gpiop->pddr_uart);
+	writeb(0x04, &gpiop->pddr_pwm);
+
+	/* ensure other SPI peripherals are deselected */
+	writeb(0x08, &gpiop->ppd_uart);
+	writeb(0x38, &gpiop->ppd_qspi);
+
+	/* CONFIG = 0 STATUS = 0 -> FPGA in reset state */
+	writeb(0xFB, &gpiop->pclrr_uart);
+	/* enable Altera configuration by clearing QSPI_CS2 and DT0IN */
+	writeb(0xFE, &gpiop->pclrr_timer);
+	writeb(0xDF, &gpiop->pclrr_qspi);
+	return FPGA_SUCCESS;
+}
+
+/* Set the state of CONFIG Pin */
+int altera_config_fn(int assert_config, int flush, int cookie)
+{
+	gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
+
+	if (assert_config)
+		writeb(0x04, &gpiop->ppd_uart);
+	else
+		writeb(0xFB, &gpiop->pclrr_uart);
+	return FPGA_SUCCESS;
+}
+
+/* Returns the state of STATUS Pin */
+int altera_status_fn(int cookie)
+{
+	gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
+
+	if (readb(&gpiop->ppd_pwm) & 0x08)
+		return FPGA_FAIL;
+	return FPGA_SUCCESS;
+}
+
+/* Returns the state of CONF_DONE Pin */
+int altera_done_fn(int cookie)
+{
+	gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
+
+	if (readb(&gpiop->ppd_pwm) & 0x20)
+		return FPGA_FAIL;
+	return FPGA_SUCCESS;
+}
+
+/*
+ * writes the complete buffer to the FPGA
+ * writing the complete buffer in one function is much faster,
+ * then calling it for every bit
+ */
+int altera_write_fn(void *buf, size_t len, int flush, int cookie)
+{
+	size_t bytecount = 0;
+	gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
+	unsigned char *data = (unsigned char *)buf;
+	unsigned char val = 0;
+	int i;
+	int len_40 = len / 40;
+
+	while (bytecount < len) {
+		val = data[bytecount++];
+		i = 8;
+		do {
+			writeb(0xFB, &gpiop->pclrr_qspi);
+			if (val & 0x01)
+				writeb(0x01, &gpiop->ppd_qspi);
+			else
+				writeb(0xFE, &gpiop->pclrr_qspi);
+			writeb(0x04, &gpiop->ppd_qspi);
+			val >>= 1;
+			i--;
+		} while (i > 0);
+
+		if (bytecount % len_40 == 0) {
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+			WATCHDOG_RESET();
+#endif
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+			putc('.');	/* let them know we are alive */
+#endif
+#ifdef CONFIG_SYS_FPGA_CHECK_CTRLC
+			if (ctrlc())
+				return FPGA_FAIL;
+#endif
+		}
+	}
+	return FPGA_SUCCESS;
+}
+
+/* called, when programming is aborted */
+int altera_abort_fn(int cookie)
+{
+	gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
+
+	writeb(0x20, &gpiop->ppd_qspi);
+	writeb(0x08, &gpiop->ppd_uart);
+	return FPGA_SUCCESS;
+}
+
+/* called, when programming was succesful */
+int altera_post_fn(int cookie)
+{
+	return altera_abort_fn(cookie);
+}
+
+/*
+ * Note that these are pointers to code that is in Flash. They will be
+ * relocated at runtime.
+ * FIXME: relocation not yet working for coldfire, see below!
+ */
+Altera_CYC2_Passive_Serial_fns altera_fns = {
+	altera_pre_fn,
+	altera_config_fn,
+	altera_status_fn,
+	altera_done_fn,
+	altera_write_fn,
+	altera_abort_fn,
+	altera_post_fn
+};
+
+Altera_desc altera_fpga[CONFIG_FPGA_COUNT] = {
+	{Altera_CYC2,
+	 passive_serial,
+	 85903,
+	 (void *)&altera_fns,
+	 NULL,
+	 0}
+};
+
+/* Initialize the fpga.  Return 1 on success, 0 on failure. */
+int astro5373l_altera_load(void)
+{
+	int i;
+
+	for (i = 0; i < CONFIG_FPGA_COUNT; i++) {
+		/*
+		 * I did not yet manage to get relocation work properly,
+		 * so set stuff here instead of static initialisation:
+		 */
+		altera_fns.pre = altera_pre_fn;
+		altera_fns.config = altera_config_fn;
+		altera_fns.status = altera_status_fn;
+		altera_fns.done = altera_done_fn;
+		altera_fns.write = altera_write_fn;
+		altera_fns.abort = altera_abort_fn;
+		altera_fns.post = altera_post_fn;
+		altera_fpga[i].iface_fns = (void *)&altera_fns;
+		fpga_add(fpga_altera, &altera_fpga[i]);
+	}
+	return 1;
+}
+
+/* Set the FPGA's PROG_B line to the specified level */
+int xilinx_pgm_fn(int assert, int flush, int cookie)
+{
+	gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
+
+	if (assert)
+		writeb(0xFB, &gpiop->pclrr_uart);
+	else
+		writeb(0x04, &gpiop->ppd_uart);
+	return assert;
+}
+
+/*
+ * Test the state of the active-low FPGA INIT line.  Return 1 on INIT
+ * asserted (low).
+ */
+int xilinx_init_fn(int cookie)
+{
+	gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
+
+	return (readb(&gpiop->ppd_pwm) & 0x08) == 0;
+}
+
+/* Test the state of the active-high FPGA DONE pin */
+int xilinx_done_fn(int cookie)
+{
+	gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
+
+	return (readb(&gpiop->ppd_pwm) & 0x20) >> 5;
+}
+
+/* Abort an FPGA operation */
+int xilinx_abort_fn(int cookie)
+{
+	gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
+	/* ensure all SPI peripherals and FPGAs are deselected */
+	writeb(0x08, &gpiop->ppd_uart);
+	writeb(0x01, &gpiop->ppd_timer);
+	writeb(0x38, &gpiop->ppd_qspi);
+	return FPGA_FAIL;
+}
+
+/*
+ * FPGA pre-configuration function. Just make sure that
+ * FPGA reset is asserted to keep the FPGA from starting up after
+ * configuration.
+ */
+int xilinx_pre_config_fn(int cookie)
+{
+	gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
+	unsigned char tmp_char;
+	unsigned short tmp_short;
+
+	/* first, set the required pins to GPIO function */
+	/* PAR_T0IN -> GPIO */
+	tmp_char = readb(&gpiop->par_timer);
+	tmp_char &= 0xfc;
+	writeb(tmp_char, &gpiop->par_timer);
+	/* all QSPI pins -> GPIO */
+	writew(0x0000, &gpiop->par_qspi);
+	/* U0RTS, U0CTS -> GPIO */
+	tmp_short = __raw_readw(&gpiop->par_uart);
+	tmp_short &= 0xfff3;
+	__raw_writew(tmp_short, &gpiop->par_uart);
+	/* all PWM pins -> GPIO */
+	writeb(0x00, &gpiop->par_pwm);
+	/* next, set data direction registers */
+	writeb(0x01, &gpiop->pddr_timer);
+	writeb(0x25, &gpiop->pddr_qspi);
+	writeb(0x0c, &gpiop->pddr_uart);
+	writeb(0x04, &gpiop->pddr_pwm);
+
+	/* ensure other SPI peripherals are deselected */
+	writeb(0x08, &gpiop->ppd_uart);
+	writeb(0x38, &gpiop->ppd_qspi);
+	writeb(0x01, &gpiop->ppd_timer);
+
+	/* CONFIG = 0, STATUS = 0 -> FPGA in reset state */
+	writeb(0xFB, &gpiop->pclrr_uart);
+	/* enable Xilinx configuration by clearing QSPI_CS2 and U0CTS */
+	writeb(0xF7, &gpiop->pclrr_uart);
+	writeb(0xDF, &gpiop->pclrr_qspi);
+	return 0;
+}
+
+/*
+ * FPGA post configuration function. Should perform a test if FPGA is running.
+ */
+int xilinx_post_config_fn(int cookie)
+{
+	int rc = 0;
+
+	/*
+	 * no test yet
+	 */
+	return rc;
+}
+
+int xilinx_clk_fn(int assert_clk, int flush, int cookie)
+{
+	gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
+
+	if (assert_clk)
+		writeb(0x04, &gpiop->ppd_qspi);
+	else
+		writeb(0xFB, &gpiop->pclrr_qspi);
+	return assert_clk;
+}
+
+int xilinx_wr_fn(int assert_write, int flush, int cookie)
+{
+	gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
+
+	if (assert_write)
+		writeb(0x01, &gpiop->ppd_qspi);
+	else
+		writeb(0xFE, &gpiop->pclrr_qspi);
+	return assert_write;
+}
+
+int xilinx_fastwr_fn(void *buf, size_t len, int flush, int cookie)
+{
+	size_t bytecount = 0;
+	gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
+	unsigned char *data = (unsigned char *)buf;
+	unsigned char val = 0;
+	int i;
+	int len_40 = len / 40;
+
+	for (bytecount = 0; bytecount < len; bytecount++) {
+		val = *(data++);
+		for (i = 8; i > 0; i--) {
+			writeb(0xFB, &gpiop->pclrr_qspi);
+			if (val & 0x80)
+				writeb(0x01, &gpiop->ppd_qspi);
+			else
+				writeb(0xFE, &gpiop->pclrr_qspi);
+			writeb(0x04, &gpiop->ppd_qspi);
+			val <<= 1;
+		}
+		if (bytecount % len_40 == 0) {
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+			WATCHDOG_RESET();
+#endif
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+			putc('.');	/* let them know we are alive */
+#endif
+#ifdef CONFIG_SYS_FPGA_CHECK_CTRLC
+			if (ctrlc())
+				return FPGA_FAIL;
+#endif
+		}
+	}
+	return FPGA_SUCCESS;
+}
+
+/*
+ * Note that these are pointers to code that is in Flash.  They will be
+ * relocated at runtime.
+ * FIXME: relocation not yet working for coldfire, see below!
+ */
+Xilinx_Spartan3_Slave_Serial_fns xilinx_fns = {
+	xilinx_pre_config_fn,
+	xilinx_pgm_fn,
+	xilinx_clk_fn,
+	xilinx_init_fn,
+	xilinx_done_fn,
+	xilinx_wr_fn,
+	0,
+	xilinx_fastwr_fn
+};
+
+Xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = {
+	{Xilinx_Spartan3,
+	 slave_serial,
+	 XILINX_XC3S4000_SIZE,
+	 (void *)&xilinx_fns,
+	 0}
+};
+
+/* Initialize the fpga.  Return 1 on success, 0 on failure. */
+int astro5373l_xilinx_load(void)
+{
+	int i;
+
+	fpga_init();
+
+	for (i = 0; i < CONFIG_FPGA_COUNT; i++) {
+		/*
+		 * I did not yet manage to get relocation work properly,
+		 * so set stuff here instead of static initialisation:
+		 */
+		xilinx_fns.pre = xilinx_pre_config_fn;
+		xilinx_fns.pgm = xilinx_pgm_fn;
+		xilinx_fns.clk = xilinx_clk_fn;
+		xilinx_fns.init = xilinx_init_fn;
+		xilinx_fns.done = xilinx_done_fn;
+		xilinx_fns.wr = xilinx_wr_fn;
+		xilinx_fns.bwr = xilinx_fastwr_fn;
+		xilinx_fpga[i].iface_fns = (void *)&xilinx_fns;
+		fpga_add(fpga_xilinx, &xilinx_fpga[i]);
+	}
+	return 1;
+}
diff --git a/board/astro/mcf5373l/mcf5373l.c b/board/astro/mcf5373l/mcf5373l.c
new file mode 100644
index 0000000000..3c09a21eed
--- /dev/null
+++ b/board/astro/mcf5373l/mcf5373l.c
@@ -0,0 +1,211 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ * modified by Wolfgang Wegner <w.wegner@astro-kom.de> for ASTRO 5373l
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <watchdog.h>
+#include <command.h>
+#include <asm/m5329.h>
+#include <asm/immap_5329.h>
+#include <asm/io.h>
+
+/* needed for astro bus: */
+#include <asm/uart.h>
+#include "astro.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+extern void uart_port_conf(void);
+
+int checkboard(void)
+{
+	puts("Board: ");
+	puts("ASTRO MCF5373L (Urmel) Board\n");
+	return 0;
+}
+
+phys_size_t initdram(int board_type)
+{
+#if !defined(CONFIG_MONITOR_IS_IN_RAM)
+	sdram_t *sdp = (sdram_t *)(MMAP_SDRAM);
+
+	/*
+	 * GPIO configuration for bus should be set correctly from reset,
+	 * so we do not care! First, set up address space: at this point,
+	 * we should be running from internal SRAM;
+	 * so use CONFIG_SYS_SDRAM_BASE as the base address for SDRAM,
+	 * and do not care where it is
+	 */
+	__raw_writel((CONFIG_SYS_SDRAM_BASE & 0xFFF00000) | 0x00000018,
+			&sdp->cs0);
+	__raw_writel((CONFIG_SYS_SDRAM_BASE & 0xFFF00000) | 0x00000000,
+			&sdp->cs1);
+	/*
+	 * I am not sure from the data sheet, but it seems burst length
+	 * has to be 8 for the 16 bit data bus we use;
+	 * so these values are for BL = 8
+	 */
+	__raw_writel(0x33211530, &sdp->cfg1);
+	__raw_writel(0x56570000, &sdp->cfg2);
+	/* send PrechargeALL, REF and IREF remain cleared! */
+	__raw_writel(0xE1462C02, &sdp->ctrl);
+	udelay(1);
+	/* refresh SDRAM twice */
+	__raw_writel(0xE1462C04, &sdp->ctrl);
+	udelay(1);
+	__raw_writel(0xE1462C04, &sdp->ctrl);
+	/* init MR  */
+	__raw_writel(0x008D0000, &sdp->mode);
+	/* initialize EMR */
+	__raw_writel(0x80010000, &sdp->mode);
+	/* wait until DLL is locked */
+	udelay(1);
+	/*
+	 * enable automatic refresh, lock mode register,
+	 * clear iref and ipall
+	 */
+	__raw_writel(0x71462C00, &sdp->ctrl);
+	/* Dummy write to start SDRAM */
+	writel(0, CONFIG_SYS_SDRAM_BASE);
+#endif
+
+	/*
+	 * for get_ram_size() to work, both CS areas have to be
+	 * configured, i.e. CS1 has to be explicitely disabled, else
+	 * probing for memory will cause the SDRAM bus to hang!
+	 * (Do not rely on the SDCS register(s) being set to 0x00000000
+	 * during reset as stated in the data sheet.)
+	 */
+	return get_ram_size((unsigned long *)CONFIG_SYS_SDRAM_BASE,
+				0x80000000 - CONFIG_SYS_SDRAM_BASE);
+}
+
+#define UART_BASE MMAP_UART0
+int rs_serial_init(int port, int baud)
+{
+	uart_t *uart;
+	u32 counter;
+
+	switch (port) {
+	case 0:
+		uart = (uart_t *)(MMAP_UART0);
+		break;
+	case 1:
+		uart = (uart_t *)(MMAP_UART1);
+		break;
+	case 2:
+		uart = (uart_t *)(MMAP_UART2);
+		break;
+	default:
+		uart = (uart_t *)(MMAP_UART0);
+	}
+
+	uart_port_conf();
+
+	/* write to SICR: SIM2 = uart mode,dcd does not affect rx */
+	writeb(UART_UCR_RESET_RX, &uart->ucr);
+	writeb(UART_UCR_RESET_TX, &uart->ucr);
+	writeb(UART_UCR_RESET_ERROR, &uart->ucr);
+	writeb(UART_UCR_RESET_MR, &uart->ucr);
+	__asm__ ("nop");
+
+	writeb(0, &uart->uimr);
+
+	/* write to CSR: RX/TX baud rate from timers */
+	writeb(UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK, &uart->ucsr);
+
+	writeb(UART_UMR_BC_8 | UART_UMR_PM_NONE, &uart->umr);
+	writeb(UART_UMR_SB_STOP_BITS_1, &uart->umr);
+
+	/* Setting up BaudRate */
+	counter = (u32) (gd->bus_clk / (baud));
+	counter >>= 5;
+
+	/* write to CTUR: divide counter upper byte */
+	writeb((u8) ((counter & 0xff00) >> 8), &uart->ubg1);
+	/* write to CTLR: divide counter lower byte */
+	writeb((u8) (counter & 0x00ff), &uart->ubg2);
+
+	writeb(UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED, &uart->ucr);
+
+	return 0;
+}
+
+void astro_put_char(char ch)
+{
+	uart_t *uart;
+	unsigned long timer;
+
+	uart = (uart_t *)(MMAP_UART0);
+	/*
+	 * Wait for last character to go. Timeout of 6ms should
+	 * be enough for our lowest baud rate of 2400.
+	 */
+	timer = get_timer(0);
+	while (get_timer(timer) < 6) {
+		if (readb(&uart->usr) & UART_USR_TXRDY)
+			break;
+	}
+	writeb(ch, &uart->utb);
+
+	return;
+}
+
+int astro_is_char(void)
+{
+	uart_t *uart;
+
+	uart = (uart_t *)(MMAP_UART0);
+	return readb(&uart->usr) & UART_USR_RXRDY;
+}
+
+int astro_get_char(void)
+{
+	uart_t *uart;
+
+	uart = (uart_t *)(MMAP_UART0);
+	while (!(readb(&uart->usr) & UART_USR_RXRDY)) ;
+	return readb(&uart->urb);
+}
+
+int misc_init_r(void)
+{
+	int retval = 0;
+
+	puts("Configure Xilinx FPGA...");
+	retval = astro5373l_xilinx_load();
+	if (!retval) {
+		puts("failed!\n");
+		return retval;
+	}
+	puts("done\n");
+
+	puts("Configure Altera FPGA...");
+	retval = astro5373l_altera_load();
+	if (!retval) {
+		puts("failed!\n");
+		return retval;
+	}
+	puts("done\n");
+
+	return retval;
+}
diff --git a/board/xilinx/ml300/u-boot.lds.debug b/board/astro/mcf5373l/u-boot.lds
index 970628d556..167a0a3f12 100644
--- a/board/xilinx/ml300/u-boot.lds.debug
+++ b/board/astro/mcf5373l/u-boot.lds
@@ -21,7 +21,7 @@
  * MA 02111-1307 USA
  */
 
-OUTPUT_ARCH(powerpc)
+OUTPUT_ARCH(m68k)
 /* Do we need any of these for elf?
    __DYNAMIC = 0;    */
 SECTIONS
@@ -55,37 +55,39 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    mpc8xx/start.o	(.text)
-    common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
+    arch/m68k/cpu/mcf532x/start.o		(.text)
+    arch/m68k/lib/traps.o		(.text)
+    arch/m68k/lib/interrupts.o	(.text)
+    common/dlmalloc.o		(.text)
+    lib/zlib.o		(.text)
 
-    common/env_embedded.o(.text)
+    . = DEFINED(env_offset) ? env_offset : .;
+    common/env_embedded.o	(.text)
 
     *(.text)
+/*    *(.fixup)*/
     *(.got1)
   }
   _etext = .;
   PROVIDE (etext = .);
   .rodata    :
   {
-    *(.rodata)
-    *(.rodata1)
-    *(.rodata.str1.4)
-    *(.eh_frame)
+    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
   }
   .fini      : { *(.fini)    } =0
   .ctors     : { *(.ctors)   }
   .dtors     : { *(.dtors)   }
 
   /* Read-write section, merged into data segment: */
-  . = (. + 0x0FFF) & 0xFFFFF000;
+  . = (. + 0x00FF) & 0xFFFFFF00;
   _erotext = .;
   PROVIDE (erotext = .);
+
   .reloc   :
   {
+    __got_start = .;
     *(.got)
+    __got_end = .;
     _GOT2_TABLE_ = .;
     *(.got2)
     _FIXUP_TABLE_ = .;
@@ -106,29 +108,34 @@ SECTIONS
   _edata  =  .;
   PROVIDE (edata = .);
 
+  . = .;
   __u_boot_cmd_start = .;
   .u_boot_cmd : { *(.u_boot_cmd) }
   __u_boot_cmd_end = .;
 
 
+  . = .;
   __start___ex_table = .;
   __ex_table : { *(__ex_table) }
   __stop___ex_table = .;
 
-  . = ALIGN(4096);
+  . = ALIGN(256);
   __init_begin = .;
   .text.init : { *(.text.init) }
   .data.init : { *(.data.init) }
-  . = ALIGN(4096);
+  . = ALIGN(256);
   __init_end = .;
 
   __bss_start = .;
   .bss       :
   {
+   _sbss = .;
    *(.sbss) *(.scommon)
    *(.dynbss)
    *(.bss)
    *(COMMON)
+   . = ALIGN(4);
+   _ebss = .;
   }
   _end = . ;
   PROVIDE (end = .);
diff --git a/board/bc3450/bc3450.c b/board/bc3450/bc3450.c
index 6fb0096bed..3117b5fbff 100644
--- a/board/bc3450/bc3450.c
+++ b/board/bc3450/bc3450.c
@@ -104,7 +104,6 @@ static void sdram_start (int hi_addr)
  *	      is something else than 0x00000000.
  */
 
-#if defined(CONFIG_MPC5200)
 phys_size_t initdram (int board_type)
 {
 	ulong dramsize = 0;
@@ -204,57 +203,6 @@ phys_size_t initdram (int board_type)
 	return dramsize;
 }
 
-#elif defined(CONFIG_MGT5100)
-
-phys_size_t initdram (int board_type)
-{
-	ulong dramsize = 0;
-#ifndef CONFIG_SYS_RAMBOOT
-	ulong test1, test2;
-
-	/* setup and enable SDRAM chip selects */
-	*(vu_long *)MPC5XXX_SDRAM_START = 0x00000000;
-	*(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;	/* 2G		*/
-	*(vu_long *)MPC5XXX_ADDECR |= (1 << 22);	/* Enable SDRAM */
-	__asm__ volatile ("sync");
-
-	/* setup config registers */
-	*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
-	*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
-
-	/* address select register */
-	*(vu_long *)MPC5XXX_SDRAM_XLBSEL = SDRAM_ADDRSEL;
-	__asm__ volatile ("sync");
-
-	/* find RAM size */
-	sdram_start(0);
-	test1 = get_ram_size((ulong *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
-	sdram_start(1);
-	test2 = get_ram_size((ulong *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
-	if (test1 > test2) {
-		sdram_start(0);
-		dramsize = test1;
-	} else {
-		dramsize = test2;
-	}
-
-	/* set SDRAM end address according to size */
-	*(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15);
-
-#else /* CONFIG_SYS_RAMBOOT */
-
-	/* Retrieve amount of SDRAM available */
-	dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15);
-
-#endif /* CONFIG_SYS_RAMBOOT */
-
-	return dramsize;
-}
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
-
 int checkboard (void)
 {
 #if defined (CONFIG_TQM5200)
@@ -276,10 +224,6 @@ void flash_preinit(void)
 	 * Note that CS_BOOT cannot be cleared when
 	 * executing in flash.
 	 */
-#if defined(CONFIG_MGT5100)
-	*(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25);	/* disable CS_BOOT */
-	*(vu_long *)MPC5XXX_ADDECR |= (1 << 16);	/* enable CS0	   */
-#endif
 	*(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1;		/* clear RO	   */
 }
 
diff --git a/board/bc3450/mt48lc16m16a2-75.h b/board/bc3450/mt48lc16m16a2-75.h
index 3f1e1691bb..48b43213dc 100644
--- a/board/bc3450/mt48lc16m16a2-75.h
+++ b/board/bc3450/mt48lc16m16a2-75.h
@@ -23,7 +23,6 @@
 
 #define SDRAM_DDR	0		/* is SDR */
 
-#if defined(CONFIG_MPC5200)
 /* Settings for XLB = 132 MHz */
 #define SDRAM_MODE	0x00CD0000
 /* #define SDRAM_MODE	0x008D0000 */ /* CAS latency 2 */
@@ -33,15 +32,3 @@
 /*#define SDRAM_CONFIG1	0xD7322800 */ /* SDRAM controller bug workaround */
 #define SDRAM_CONFIG2	0x8AD70000
 /*#define SDRAM_CONFIG2	0xDDD70000 */ /* SDRAM controller bug workaround */
-
-#elif defined(CONFIG_MGT5100)
-/* Settings for XLB = 66 MHz */
-#define SDRAM_MODE	0x008D0000
-#define SDRAM_CONTROL	0x504F0000
-#define SDRAM_CONFIG1	0xC2222600
-#define SDRAM_CONFIG2	0x88B70004
-#define SDRAM_ADDRSEL	0x02000000
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
diff --git a/board/bf518f-ezbrd/config.mk b/board/bf518f-ezbrd/config.mk
index f85bef5e2a..3f9d41f371 100644
--- a/board/bf518f-ezbrd/config.mk
+++ b/board/bf518f-ezbrd/config.mk
@@ -26,8 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
-CFLAGS_lib_generic += -O2
-CFLAGS_lzma += -O2
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
 
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
diff --git a/board/bf526-ezbrd/config.mk b/board/bf526-ezbrd/config.mk
index f85bef5e2a..3f9d41f371 100644
--- a/board/bf526-ezbrd/config.mk
+++ b/board/bf526-ezbrd/config.mk
@@ -26,8 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
-CFLAGS_lib_generic += -O2
-CFLAGS_lzma += -O2
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
 
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
diff --git a/board/bf527-ezkit/config.mk b/board/bf527-ezkit/config.mk
index f85bef5e2a..3f9d41f371 100644
--- a/board/bf527-ezkit/config.mk
+++ b/board/bf527-ezkit/config.mk
@@ -26,8 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
-CFLAGS_lib_generic += -O2
-CFLAGS_lzma += -O2
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
 
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
diff --git a/board/bf533-ezkit/config.mk b/board/bf533-ezkit/config.mk
index 3c0b46f721..bc046f129f 100644
--- a/board/bf533-ezkit/config.mk
+++ b/board/bf533-ezkit/config.mk
@@ -26,8 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
-CFLAGS_lib_generic += -O2
-CFLAGS_lzma += -O2
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
 
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
diff --git a/board/bf533-stamp/config.mk b/board/bf533-stamp/config.mk
index 3c0b46f721..bc046f129f 100644
--- a/board/bf533-stamp/config.mk
+++ b/board/bf533-stamp/config.mk
@@ -26,8 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
-CFLAGS_lib_generic += -O2
-CFLAGS_lzma += -O2
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
 
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
diff --git a/board/bf537-stamp/cmd_bf537led.c b/board/bf537-stamp/cmd_bf537led.c
index e65c4f8359..317f088497 100644
--- a/board/bf537-stamp/cmd_bf537led.c
+++ b/board/bf537-stamp/cmd_bf537led.c
@@ -25,7 +25,7 @@
 #include <config.h>
 #include <command.h>
 #include <asm/blackfin.h>
-#include <asm-blackfin/string.h>
+#include <asm/string.h>
 #ifdef CONFIG_BF537_STAMP_LEDCMD
 
 /* Define the command usage in a reusable way */
diff --git a/board/bf537-stamp/config.mk b/board/bf537-stamp/config.mk
index bc14257489..5766829115 100644
--- a/board/bf537-stamp/config.mk
+++ b/board/bf537-stamp/config.mk
@@ -26,8 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
-CFLAGS_lib_generic += -O2
-CFLAGS_lzma += -O2
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
 
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
diff --git a/board/bf538f-ezkit/config.mk b/board/bf538f-ezkit/config.mk
index 3c0b46f721..bc046f129f 100644
--- a/board/bf538f-ezkit/config.mk
+++ b/board/bf538f-ezkit/config.mk
@@ -26,8 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
-CFLAGS_lib_generic += -O2
-CFLAGS_lzma += -O2
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
 
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
diff --git a/board/bf548-ezkit/config.mk b/board/bf548-ezkit/config.mk
index 42ff946673..ce96c0d479 100644
--- a/board/bf548-ezkit/config.mk
+++ b/board/bf548-ezkit/config.mk
@@ -26,8 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
-CFLAGS_lib_generic += -O2
-CFLAGS_lzma += -O2
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
 
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS-BFIN_BOOT_PARA       := --dma 6
diff --git a/board/bf561-acvilon/config.mk b/board/bf561-acvilon/config.mk
index cfad21a2a4..a90b193388 100644
--- a/board/bf561-acvilon/config.mk
+++ b/board/bf561-acvilon/config.mk
@@ -26,8 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
-CFLAGS_lib_generic += -O2
-CFLAGS_lzma += -O2
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
 
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS-BFIN_BOOT_PARA := --bits 16
diff --git a/board/bf561-ezkit/config.mk b/board/bf561-ezkit/config.mk
index cfad21a2a4..a90b193388 100644
--- a/board/bf561-ezkit/config.mk
+++ b/board/bf561-ezkit/config.mk
@@ -26,8 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
-CFLAGS_lib_generic += -O2
-CFLAGS_lzma += -O2
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
 
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS-BFIN_BOOT_PARA := --bits 16
diff --git a/board/c2mon/u-boot.lds b/board/c2mon/u-boot.lds
index 2d0efb3161..5bd5a75c61 100644
--- a/board/c2mon/u-boot.lds
+++ b/board/c2mon/u-boot.lds
@@ -55,12 +55,12 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/c2mon/u-boot.lds.debug b/board/c2mon/u-boot.lds.debug
index ad36953915..e62f6be5aa 100644
--- a/board/c2mon/u-boot.lds.debug
+++ b/board/c2mon/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/canmb/canmb.c b/board/canmb/canmb.c
index dce07bf785..6ddc858ea4 100644
--- a/board/canmb/canmb.c
+++ b/board/canmb/canmb.c
@@ -81,7 +81,6 @@ static void sdram_start (int hi_addr)
  *            is something else than 0x00000000.
  */
 
-#if defined(CONFIG_MPC5200)
 phys_size_t initdram (int board_type)
 {
 	ulong dramsize = 0;
@@ -183,57 +182,6 @@ phys_size_t initdram (int board_type)
 	return dramsize + dramsize2;
 }
 
-#elif defined(CONFIG_MGT5100)
-
-phys_size_t initdram (int board_type)
-{
-	ulong dramsize = 0;
-#ifndef CONFIG_SYS_RAMBOOT
-	ulong test1, test2;
-
-	/* setup and enable SDRAM chip selects */
-	*(vu_long *)MPC5XXX_SDRAM_START = 0x00000000;
-	*(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */
-	*(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */
-	__asm__ volatile ("sync");
-
-	/* setup config registers */
-	*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
-	*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
-
-	/* address select register */
-	*(vu_long *)MPC5XXX_SDRAM_XLBSEL = SDRAM_ADDRSEL;
-	__asm__ volatile ("sync");
-
-	/* find RAM size */
-	sdram_start(0);
-	test1 = get_ram_size((ulong *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
-	sdram_start(1);
-	test2 = get_ram_size((ulong *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
-	if (test1 > test2) {
-		sdram_start(0);
-		dramsize = test1;
-	} else {
-		dramsize = test2;
-	}
-
-	/* set SDRAM end address according to size */
-	*(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15);
-
-#else /* CONFIG_SYS_RAMBOOT */
-
-	/* Retrieve amount of SDRAM available */
-	dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15);
-
-#endif /* CONFIG_SYS_RAMBOOT */
-
-	return dramsize;
-}
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
-
 int checkboard (void)
 {
 	puts ("Board: CANMB\n");
diff --git a/board/canmb/mt48lc16m32s2-75.h b/board/canmb/mt48lc16m32s2-75.h
index ffdf0396a5..15477259ca 100644
--- a/board/canmb/mt48lc16m32s2-75.h
+++ b/board/canmb/mt48lc16m32s2-75.h
@@ -23,21 +23,8 @@
 
 #define SDRAM_DDR	0		/* is SDR */
 
-#if defined(CONFIG_MPC5200)
 /* Settings for XLB = 132 MHz */
 #define SDRAM_MODE	0x00CD0000
 #define SDRAM_CONTROL	0x504F0000
 #define SDRAM_CONFIG1	0xD2322800
 #define SDRAM_CONFIG2	0x8AD70000
-
-#elif defined(CONFIG_MGT5100)
-/* Settings for XLB = 66 MHz */
-#define SDRAM_MODE	0x008D0000
-#define SDRAM_CONTROL	0x504F0000
-#define SDRAM_CONFIG1	0xC2222600
-#define SDRAM_CONFIG2	0x88B70004
-#define SDRAM_ADDRSEL	0x02000000
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
diff --git a/board/cm-bf527/config.mk b/board/cm-bf527/config.mk
index f85bef5e2a..3f9d41f371 100644
--- a/board/cm-bf527/config.mk
+++ b/board/cm-bf527/config.mk
@@ -26,8 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
-CFLAGS_lib_generic += -O2
-CFLAGS_lzma += -O2
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
 
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
diff --git a/board/cm-bf533/config.mk b/board/cm-bf533/config.mk
index 3c0b46f721..bc046f129f 100644
--- a/board/cm-bf533/config.mk
+++ b/board/cm-bf533/config.mk
@@ -26,8 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
-CFLAGS_lib_generic += -O2
-CFLAGS_lzma += -O2
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
 
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
diff --git a/board/cm-bf537e/config.mk b/board/cm-bf537e/config.mk
index 3c0b46f721..bc046f129f 100644
--- a/board/cm-bf537e/config.mk
+++ b/board/cm-bf537e/config.mk
@@ -26,8 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
-CFLAGS_lib_generic += -O2
-CFLAGS_lzma += -O2
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
 
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
diff --git a/board/cm-bf537u/config.mk b/board/cm-bf537u/config.mk
index 3c0b46f721..bc046f129f 100644
--- a/board/cm-bf537u/config.mk
+++ b/board/cm-bf537u/config.mk
@@ -26,8 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
-CFLAGS_lib_generic += -O2
-CFLAGS_lzma += -O2
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
 
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
diff --git a/board/cm-bf548/config.mk b/board/cm-bf548/config.mk
index 0c95b39627..f071a39d75 100644
--- a/board/cm-bf548/config.mk
+++ b/board/cm-bf548/config.mk
@@ -26,8 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
-CFLAGS_lib_generic += -O2
-CFLAGS_lzma += -O2
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
 
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS-BFIN_BOOT_PARA       := --dma 6
diff --git a/board/cm-bf561/cm-bf561.c b/board/cm-bf561/cm-bf561.c
index 80cfff7242..5741f64107 100644
--- a/board/cm-bf561/cm-bf561.c
+++ b/board/cm-bf561/cm-bf561.c
@@ -18,9 +18,9 @@ int checkboard(void)
 	return 0;
 }
 
-#ifdef CONFIG_SMC91111
+#ifdef CONFIG_SMC911X
 int board_eth_init(bd_t *bis)
 {
-	return smc91111_initialize(0, CONFIG_SMC91111_BASE);
+	return smc911x_initialize(0, CONFIG_SMC911X_BASE);
 }
 #endif
diff --git a/board/cm-bf561/config.mk b/board/cm-bf561/config.mk
index cfad21a2a4..a90b193388 100644
--- a/board/cm-bf561/config.mk
+++ b/board/cm-bf561/config.mk
@@ -26,8 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
-CFLAGS_lib_generic += -O2
-CFLAGS_lzma += -O2
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
 
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS-BFIN_BOOT_PARA := --bits 16
diff --git a/board/cm5200/u-boot.lds b/board/cm5200/u-boot.lds
index 5887f774e9..30a37d9fb2 100644
--- a/board/cm5200/u-boot.lds
+++ b/board/cm5200/u-boot.lds
@@ -50,7 +50,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc5xxx/start.o	(.text)
+    arch/ppc/cpu/mpc5xxx/start.o	(.text)
     *(.text)
     *(.got1)
     . = ALIGN(16);
diff --git a/board/cobra5272/u-boot.lds b/board/cobra5272/u-boot.lds
index 7e716bb09a..ec0f5e9faa 100644
--- a/board/cobra5272/u-boot.lds
+++ b/board/cobra5272/u-boot.lds
@@ -54,12 +54,12 @@ SECTIONS
   {
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
-    cpu/mcf52x2/start.o		(.text)
-    cpu/mcf52x2/cpu_init.o	(.text)
-    lib_m68k/traps.o		(.text)
-    cpu/mcf52x2/interrupts.o	(.text)
+    arch/m68k/cpu/mcf52x2/start.o		(.text)
+    arch/m68k/cpu/mcf52x2/cpu_init.o	(.text)
+    arch/m68k/lib/traps.o		(.text)
+    arch/m68k/cpu/mcf52x2/interrupts.o	(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/zlib.o		(.text)
+    lib/zlib.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.text)
diff --git a/board/cogent/u-boot.lds.debug b/board/cogent/u-boot.lds.debug
index a2d940f048..57cc305868 100644
--- a/board/cogent/u-boot.lds.debug
+++ b/board/cogent/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/cray/L1/u-boot.lds.debug b/board/cray/L1/u-boot.lds.debug
index 970628d556..09c0191e5f 100644
--- a/board/cray/L1/u-boot.lds.debug
+++ b/board/cray/L1/u-boot.lds.debug
@@ -57,9 +57,9 @@ SECTIONS
 
     mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    arch/ppc/lib/extable.o	(.text)
 
     common/env_embedded.o(.text)
 
diff --git a/board/csb272/csb272.c b/board/csb272/csb272.c
index d6d65cf45c..5a00afe402 100644
--- a/board/csb272/csb272.c
+++ b/board/csb272/csb272.c
@@ -129,7 +129,7 @@ phys_size_t initdram (int board_type)
 	/*
 	 * ToDo: Move the asm init routine sdram_init() to this C file,
 	 * or even better use some common ppc4xx code available
-	 * in cpu/ppc4xx
+	 * in arch/ppc/cpu/ppc4xx
 	 */
 	sdram_init();
 
diff --git a/board/csb472/csb472.c b/board/csb472/csb472.c
index 20d34adfdd..996a67b4ed 100644
--- a/board/csb472/csb472.c
+++ b/board/csb472/csb472.c
@@ -97,7 +97,7 @@ phys_size_t initdram (int board_type)
 	/*
 	 * ToDo: Move the asm init routine sdram_init() to this C file,
 	 * or even better use some common ppc4xx code available
-	 * in cpu/ppc4xx
+	 * in arch/ppc/cpu/ppc4xx
 	 */
 	sdram_init();
 
diff --git a/board/davinci/da830evm/da830evm.c b/board/davinci/da830evm/da830evm.c
index ed668afccc..6385443666 100644
--- a/board/davinci/da830evm/da830evm.c
+++ b/board/davinci/da830evm/da830evm.c
@@ -150,7 +150,7 @@ int board_init(void)
 		DAVINCI_ABCR_RHOLD(0) |
 		DAVINCI_ABCR_TA(2) |
 		DAVINCI_ABCR_ASIZE_8BIT),
-	       &davinci_emif_regs->AB2CR);
+	       &davinci_emif_regs->ab2cr);
 #endif
 
 	/* arch number of the board */
diff --git a/board/davinci/dvevm/board_init.S b/board/davinci/dvevm/board_init.S
index 22d8adc18c..81b23d0436 100644
--- a/board/davinci/dvevm/board_init.S
+++ b/board/davinci/dvevm/board_init.S
@@ -2,7 +2,7 @@
  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  *
  * Board-specific low level initialization code. Called at the very end
- * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
+ * of arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
  * initialization required.
  *
  * This program is free software; you can redistribute it and/or
diff --git a/board/davinci/schmoogie/board_init.S b/board/davinci/schmoogie/board_init.S
index 22d8adc18c..81b23d0436 100644
--- a/board/davinci/schmoogie/board_init.S
+++ b/board/davinci/schmoogie/board_init.S
@@ -2,7 +2,7 @@
  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  *
  * Board-specific low level initialization code. Called at the very end
- * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
+ * of arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
  * initialization required.
  *
  * This program is free software; you can redistribute it and/or
diff --git a/board/davinci/sffsdr/board_init.S b/board/davinci/sffsdr/board_init.S
index 22d8adc18c..81b23d0436 100644
--- a/board/davinci/sffsdr/board_init.S
+++ b/board/davinci/sffsdr/board_init.S
@@ -2,7 +2,7 @@
  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  *
  * Board-specific low level initialization code. Called at the very end
- * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
+ * of arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
  * initialization required.
  *
  * This program is free software; you can redistribute it and/or
diff --git a/board/davinci/sonata/board_init.S b/board/davinci/sonata/board_init.S
index fbb9ea73e9..3e4c7a2c54 100644
--- a/board/davinci/sonata/board_init.S
+++ b/board/davinci/sonata/board_init.S
@@ -2,7 +2,7 @@
  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  *
  * Board-specific low level initialization code. Called at the very end
- * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
+ * of arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
  * initialization required.
  *
  * For _OLDER_ Sonata boards sets up GPIO4 to control NAND WP line. Newer
diff --git a/board/dbau1x00/dbau1x00.c b/board/dbau1x00/dbau1x00.c
index 42756f5b82..b3c6d512e7 100644
--- a/board/dbau1x00/dbau1x00.c
+++ b/board/dbau1x00/dbau1x00.c
@@ -37,7 +37,7 @@ phys_size_t initdram(int board_type)
 #define BCSR_PCMCIA_PC0DRVEN		0x0010
 #define BCSR_PCMCIA_PC0RST		0x0080
 
-/* In cpu/mips/cpu.c */
+/* In arch/mips/cpu/cpu.c */
 void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 );
 
 int checkboard (void)
diff --git a/board/eNET/config.mk b/board/eNET/config.mk
index 5c64804fb2..dcde7fcedb 100644
--- a/board/eNET/config.mk
+++ b/board/eNET/config.mk
@@ -22,7 +22,7 @@
 #
 
 TEXT_BASE = 0x38040000
-CFLAGS_dlmalloc.o += -Wa,--no-warn -fno-strict-aliasing
+CFLAGS_common/dlmalloc.o += -Wa,--no-warn -fno-strict-aliasing
 PLATFORM_RELFLAGS += -fvisibility=hidden
 PLATFORM_CPPFLAGS += -fno-dwarf2-cfi-asm
 PLATFORM_LDFLAGS += -pic --emit-relocs -Bsymbolic -Bsymbolic-functions
diff --git a/board/edb93xx/config.mk b/board/edb93xx/config.mk
index b2fc6fac31..b627869c25 100644
--- a/board/edb93xx/config.mk
+++ b/board/edb93xx/config.mk
@@ -1,4 +1,4 @@
-LDSCRIPT := $(SRCTREE)/cpu/arm920t/ep93xx/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
 
 ifdef CONFIG_EDB9301
 TEXT_BASE = 0x05700000
diff --git a/board/eltec/bab7xx/u-boot.lds b/board/eltec/bab7xx/u-boot.lds
index d021331148..6dff003dc1 100644
--- a/board/eltec/bab7xx/u-boot.lds
+++ b/board/eltec/bab7xx/u-boot.lds
@@ -56,7 +56,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/74xx_7xx/start.o	(.text)
+    arch/ppc/cpu/74xx_7xx/start.o	(.text)
 
 /* store the environment in a seperate sector in the boot flash */
 /*    . = env_offset; */
diff --git a/board/eltec/elppc/u-boot.lds b/board/eltec/elppc/u-boot.lds
index d021331148..6dff003dc1 100644
--- a/board/eltec/elppc/u-boot.lds
+++ b/board/eltec/elppc/u-boot.lds
@@ -56,7 +56,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/74xx_7xx/start.o	(.text)
+    arch/ppc/cpu/74xx_7xx/start.o	(.text)
 
 /* store the environment in a seperate sector in the boot flash */
 /*    . = env_offset; */
diff --git a/board/eltec/mhpc/u-boot.lds b/board/eltec/mhpc/u-boot.lds
index 5c847fbf84..dc370eacf2 100644
--- a/board/eltec/mhpc/u-boot.lds
+++ b/board/eltec/mhpc/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/env_embedded.o(.text)
 
     *(.text)
diff --git a/board/eltec/mhpc/u-boot.lds.debug b/board/eltec/mhpc/u-boot.lds.debug
index ad36953915..e62f6be5aa 100644
--- a/board/eltec/mhpc/u-boot.lds.debug
+++ b/board/eltec/mhpc/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/emk/top860/u-boot.lds b/board/emk/top860/u-boot.lds
index 46dca96e60..3fb6d12692 100644
--- a/board/emk/top860/u-boot.lds
+++ b/board/emk/top860/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
 
     *(.text)
     *(.got1)
diff --git a/board/emk/top860/u-boot.lds.debug b/board/emk/top860/u-boot.lds.debug
index bfe85134e5..3229a23a3e 100644
--- a/board/emk/top860/u-boot.lds.debug
+++ b/board/emk/top860/u-boot.lds.debug
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    arch/ppc/lib/extable.o	(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/ep88x/u-boot.lds b/board/ep88x/u-boot.lds
index 70b84e4c8a..f9579a6430 100644
--- a/board/ep88x/u-boot.lds
+++ b/board/ep88x/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt           : { *(.plt)		}
   .text          :
   {
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     *(.text)
     *(.got1)
     . = ALIGN(16);
diff --git a/board/eric/eric.c b/board/eric/eric.c
index cfcfa525a9..96c0b8385d 100644
--- a/board/eric/eric.c
+++ b/board/eric/eric.c
@@ -132,7 +132,7 @@ phys_size_t initdram (int board_type)
 	/*
 	 * ToDo: Move the asm init routine sdram_init() to this C file,
 	 * or even better use some common ppc4xx code available
-	 * in cpu/ppc4xx
+	 * in arch/ppc/cpu/ppc4xx
 	 */
 	sdram_init();
 
diff --git a/board/esd/cpci5200/mt46v16m16-75.h b/board/esd/cpci5200/mt46v16m16-75.h
index 22d0a55444..cf63806a58 100644
--- a/board/esd/cpci5200/mt46v16m16-75.h
+++ b/board/esd/cpci5200/mt46v16m16-75.h
@@ -23,7 +23,6 @@
 
 #define SDRAM_DDR	1	/* is DDR */
 
-#if defined(CONFIG_MPC5200)
 /* Settings for XLB = 132 MHz */
 #define SDRAM_MODE	0x018D0000
 #define SDRAM_EMODE	0x40090000
@@ -31,7 +30,3 @@
 #define SDRAM_CONFIG1	0x73722930
 #define SDRAM_CONFIG2	0x47770000
 #define SDRAM_TAPDELAY	0x10000000
-
-#else
-#error CONFIG_MPC5200 not defined
-#endif
diff --git a/board/esd/cpci750/u-boot.lds b/board/esd/cpci750/u-boot.lds
index d021331148..6dff003dc1 100644
--- a/board/esd/cpci750/u-boot.lds
+++ b/board/esd/cpci750/u-boot.lds
@@ -56,7 +56,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/74xx_7xx/start.o	(.text)
+    arch/ppc/cpu/74xx_7xx/start.o	(.text)
 
 /* store the environment in a seperate sector in the boot flash */
 /*    . = env_offset; */
diff --git a/board/esd/dasa_sim/u-boot.lds b/board/esd/dasa_sim/u-boot.lds
index b044649ebf..3d33d0f022 100644
--- a/board/esd/dasa_sim/u-boot.lds
+++ b/board/esd/dasa_sim/u-boot.lds
@@ -57,7 +57,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/ppc4xx/start.o		(.text)
+    arch/ppc/cpu/ppc4xx/start.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/esd/du440/init.S b/board/esd/du440/init.S
index 3cac6b11bb..afcf9c4a53 100644
--- a/board/esd/du440/init.S
+++ b/board/esd/du440/init.S
@@ -22,7 +22,7 @@
  */
 
 #include <ppc_asm.tmpl>
-#include <asm-ppc/mmu.h>
+#include <asm/mmu.h>
 #include <config.h>
 
 /*
diff --git a/board/esd/mecp5200/mt46v16m16-75.h b/board/esd/mecp5200/mt46v16m16-75.h
index 22d0a55444..cf63806a58 100644
--- a/board/esd/mecp5200/mt46v16m16-75.h
+++ b/board/esd/mecp5200/mt46v16m16-75.h
@@ -23,7 +23,6 @@
 
 #define SDRAM_DDR	1	/* is DDR */
 
-#if defined(CONFIG_MPC5200)
 /* Settings for XLB = 132 MHz */
 #define SDRAM_MODE	0x018D0000
 #define SDRAM_EMODE	0x40090000
@@ -31,7 +30,3 @@
 #define SDRAM_CONFIG1	0x73722930
 #define SDRAM_CONFIG2	0x47770000
 #define SDRAM_TAPDELAY	0x10000000
-
-#else
-#error CONFIG_MPC5200 not defined
-#endif
diff --git a/board/esd/pf5200/mt46v16m16-75.h b/board/esd/pf5200/mt46v16m16-75.h
index 22d0a55444..cf63806a58 100644
--- a/board/esd/pf5200/mt46v16m16-75.h
+++ b/board/esd/pf5200/mt46v16m16-75.h
@@ -23,7 +23,6 @@
 
 #define SDRAM_DDR	1	/* is DDR */
 
-#if defined(CONFIG_MPC5200)
 /* Settings for XLB = 132 MHz */
 #define SDRAM_MODE	0x018D0000
 #define SDRAM_EMODE	0x40090000
@@ -31,7 +30,3 @@
 #define SDRAM_CONFIG1	0x73722930
 #define SDRAM_CONFIG2	0x47770000
 #define SDRAM_TAPDELAY	0x10000000
-
-#else
-#error CONFIG_MPC5200 not defined
-#endif
diff --git a/board/esd/pmc440/init.S b/board/esd/pmc440/init.S
index 6585fed664..d51cd0cf05 100644
--- a/board/esd/pmc440/init.S
+++ b/board/esd/pmc440/init.S
@@ -20,7 +20,7 @@
  */
 
 #include <ppc_asm.tmpl>
-#include <asm-ppc/mmu.h>
+#include <asm/mmu.h>
 #include <config.h>
 
 /*
diff --git a/board/esd/pmc440/u-boot-nand.lds b/board/esd/pmc440/u-boot-nand.lds
index fb629e0c5e..8a71bfa44e 100644
--- a/board/esd/pmc440/u-boot-nand.lds
+++ b/board/esd/pmc440/u-boot-nand.lds
@@ -53,7 +53,7 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
 
     /* Align to next NAND block */
     . = ALIGN(0x4000);
diff --git a/board/esd/tasreg/u-boot.lds b/board/esd/tasreg/u-boot.lds
index e3230b9f20..d4fd705ce1 100644
--- a/board/esd/tasreg/u-boot.lds
+++ b/board/esd/tasreg/u-boot.lds
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf52x2/start.o		(.text)
-    lib_m68k/traps.o		(.text)
-    cpu/mcf52x2/interrupts.o	(.text)
+    arch/m68k/cpu/mcf52x2/start.o		(.text)
+    arch/m68k/lib/traps.o		(.text)
+    arch/m68k/cpu/mcf52x2/interrupts.o	(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/zlib.o		(.text)
+    lib/zlib.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.text)
diff --git a/board/esteem192e/u-boot.lds b/board/esteem192e/u-boot.lds
index 3e4490ec49..4490f19a1f 100644
--- a/board/esteem192e/u-boot.lds
+++ b/board/esteem192e/u-boot.lds
@@ -55,12 +55,12 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/etx094/u-boot.lds b/board/etx094/u-boot.lds
index 1d34e68fd7..94b13422af 100644
--- a/board/etx094/u-boot.lds
+++ b/board/etx094/u-boot.lds
@@ -55,15 +55,15 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
-    cpu/mpc8xx/traps.o	(.text)
-    cpu/mpc8xx/interrupts.o	(.text)
-    cpu/mpc8xx/serial.o	(.text)
-    cpu/mpc8xx/cpu_init.o	(.text)
-    cpu/mpc8xx/speed.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/traps.o	(.text)
+    arch/ppc/cpu/mpc8xx/interrupts.o	(.text)
+    arch/ppc/cpu/mpc8xx/serial.o	(.text)
+    arch/ppc/cpu/mpc8xx/cpu_init.o	(.text)
+    arch/ppc/cpu/mpc8xx/speed.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/etx094/u-boot.lds.debug b/board/etx094/u-boot.lds.debug
index 1af61fb2b5..458d4e076c 100644
--- a/board/etx094/u-boot.lds.debug
+++ b/board/etx094/u-boot.lds.debug
@@ -55,17 +55,17 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
-    cpu/mpc8xx/traps.o	(.text)
-    cpu/mpc8xx/interrupts.o	(.text)
-    cpu/mpc8xx/cpu.o	(.text)
-    cpu/mpc8xx/cpu_init.o	(.text)
-    cpu/mpc8xx/speed.o	(.text)
-    cpu/mpc8xx/serial.o	(.text)
-    lib_ppc/extable.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    lib_generic/string.o	(.text)
-    lib_generic/crc32.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/traps.o	(.text)
+    arch/ppc/cpu/mpc8xx/interrupts.o	(.text)
+    arch/ppc/cpu/mpc8xx/cpu.o	(.text)
+    arch/ppc/cpu/mpc8xx/cpu_init.o	(.text)
+    arch/ppc/cpu/mpc8xx/speed.o	(.text)
+    arch/ppc/cpu/mpc8xx/serial.o	(.text)
+    arch/ppc/lib/extable.o	(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    lib/string.o	(.text)
+    lib/crc32.o		(.text)
     common/dlmalloc.o	(.text)
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/evb64260/u-boot.lds b/board/evb64260/u-boot.lds
index d021331148..6dff003dc1 100644
--- a/board/evb64260/u-boot.lds
+++ b/board/evb64260/u-boot.lds
@@ -56,7 +56,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/74xx_7xx/start.o	(.text)
+    arch/ppc/cpu/74xx_7xx/start.o	(.text)
 
 /* store the environment in a seperate sector in the boot flash */
 /*    . = env_offset; */
diff --git a/board/fads/u-boot.lds b/board/fads/u-boot.lds
index ce3e32e0d5..d6476cdb71 100644
--- a/board/fads/u-boot.lds
+++ b/board/fads/u-boot.lds
@@ -50,7 +50,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
 
     /*. = DEFINED(env_offset) ? env_offset : .;*/
     common/env_embedded.o	(.ppcenv)
diff --git a/board/fads/u-boot.lds.debug b/board/fads/u-boot.lds.debug
index 0a3b958fad..61c0d68d78 100644
--- a/board/fads/u-boot.lds.debug
+++ b/board/fads/u-boot.lds.debug
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    arch/ppc/lib/extable.o	(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/flagadm/u-boot.lds b/board/flagadm/u-boot.lds
index 877e82c84c..fbfba6ec9a 100644
--- a/board/flagadm/u-boot.lds
+++ b/board/flagadm/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
 
     *(.text)
     *(.got1)
diff --git a/board/flagadm/u-boot.lds.debug b/board/flagadm/u-boot.lds.debug
index ad36953915..e62f6be5aa 100644
--- a/board/flagadm/u-boot.lds.debug
+++ b/board/flagadm/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index 02a824d9f4..620eb16d44 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -33,6 +33,7 @@ COBJS-${CONFIG_FSL_CADMUS}	+= cadmus.o
 COBJS-${CONFIG_FSL_VIA}		+= cds_via.o
 COBJS-${CONFIG_FSL_DIU_FB}	+= fsl_diu_fb.o fsl_logo_bmp.o
 COBJS-${CONFIG_FSL_PIXIS}	+= pixis.o
+COBJS-${CONFIG_FSL_NGPIXIS}	+= ngpixis.o
 COBJS-${CONFIG_PQ_MDS_PIB}	+= pq-mds-pib.o
 COBJS-${CONFIG_ID_EEPROM}	+= sys_eeprom.o
 COBJS-${CONFIG_FSL_SGMII_RISER}	+= sgmii_riser.o
diff --git a/board/freescale/common/ngpixis.c b/board/freescale/common/ngpixis.c
new file mode 100644
index 0000000000..bb6794e859
--- /dev/null
+++ b/board/freescale/common/ngpixis.c
@@ -0,0 +1,136 @@
+/**
+ * Copyright 2010 Freescale Semiconductor
+ * Author: Timur Tabi <timur@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This file provides support for the ngPIXIS, a board-specific FPGA used on
+ * some Freescale reference boards.
+ *
+ * A "switch" is black rectangular block on the motherboard.  It contains
+ * eight "bits".  The ngPIXIS has a set of memory-mapped registers (SWx) that
+ * shadow the actual physical switches.  There is also another set of
+ * registers (ENx) that tell the ngPIXIS which bits of SWx should actually be
+ * used to override the values of the bits in the physical switches.
+ *
+ * The following macros need to be defined:
+ *
+ * PIXIS_BASE - The virtual address of the base of the PIXIS register map
+ *
+ * PIXIS_LBMAP_SWITCH - The switch number (i.e. the "x" in "SWx"). This value
+ *    is used in the PIXIS_SW() macro to determine which offset in
+ *    the PIXIS register map corresponds to the physical switch that controls
+ *    the boot bank.
+ *
+ * PIXIS_LBMAP_MASK - A bit mask the defines which bits in SWx to use.
+ *
+ * PIXIS_LBMAP_SHIFT - The shift value that corresponds to PIXIS_LBMAP_MASK.
+ *
+ * PIXIS_LBMAP_ALTBANK - The value to program into SWx to tell the ngPIXIS to
+ *    boot from the alternate bank.
+ */
+
+#include <common.h>
+#include <command.h>
+#include <watchdog.h>
+#include <asm/cache.h>
+#include <asm/io.h>
+
+#include "ngpixis.h"
+
+/*
+ * Reset the board. This ignores the ENx registers.
+ */
+void pixis_reset(void)
+{
+	out_8(&pixis->rst, 0);
+
+	while (1);
+}
+
+/*
+ * Reset the board.  Like pixis_reset(), but it honors the ENx registers.
+ */
+void pixis_bank_reset(void)
+{
+	out_8(&pixis->vctl, 0);
+	out_8(&pixis->vctl, 1);
+
+	while (1);
+}
+
+/**
+ * Set the boot bank to the power-on default bank
+ */
+void clear_altbank(void)
+{
+	/* Tell the ngPIXIS to use this the bits in the physical switch for the
+	 * boot bank value, instead of the SWx register.  We need to be careful
+	 * only to set the bits in SWx that correspond to the boot bank.
+	 */
+	clrbits_8(&PIXIS_EN(PIXIS_LBMAP_SWITCH), PIXIS_LBMAP_MASK);
+}
+
+/**
+ * Set the boot bank to the alternate bank
+ */
+void set_altbank(void)
+{
+	/* Program the alternate bank number into the SWx register.
+	 */
+	clrsetbits_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH), PIXIS_LBMAP_MASK,
+		     PIXIS_LBMAP_ALTBANK);
+
+	/* Tell the ngPIXIS to use this the bits in the SWx register for the
+	 * boot bank value, instead of the physical switch.  We need to be
+	 * careful only to set the bits in SWx that correspond to the boot bank.
+	 */
+	setbits_8(&PIXIS_EN(PIXIS_LBMAP_SWITCH), PIXIS_LBMAP_MASK);
+}
+
+
+int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	unsigned int i;
+	char *p_altbank = NULL;
+	char *unknown_param = NULL;
+
+	/* No args is a simple reset request.
+	 */
+	if (argc <= 1)
+		pixis_reset();
+
+	for (i = 1; i < argc; i++) {
+		if (strcmp(argv[i], "altbank") == 0) {
+			p_altbank = argv[i];
+			continue;
+		}
+
+		unknown_param = argv[i];
+	}
+
+	if (unknown_param) {
+		printf("Invalid option: %s\n", unknown_param);
+		return 1;
+	}
+
+	if (p_altbank)
+		set_altbank();
+	else
+		clear_altbank();
+
+	pixis_bank_reset();
+
+	/* Shouldn't be reached. */
+	return 0;
+}
+
+U_BOOT_CMD(
+	pixis_reset, CONFIG_SYS_MAXARGS, 1, pixis_reset_cmd,
+	"Reset the board using the FPGA sequencer",
+	"- hard reset to default bank\n"
+	"pixis_reset altbank - reset to alternate bank\n"
+	);
diff --git a/board/freescale/common/ngpixis.h b/board/freescale/common/ngpixis.h
new file mode 100644
index 0000000000..284d044c88
--- /dev/null
+++ b/board/freescale/common/ngpixis.h
@@ -0,0 +1,57 @@
+/**
+ * Copyright 2010 Freescale Semiconductor
+ * Author: Timur Tabi <timur@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This file provides support for the ngPIXIS, a board-specific FPGA used on
+ * some Freescale reference boards.
+ */
+
+/* ngPIXIS register set. Hopefully, this won't change too much over time.
+ * Feel free to add board-specific #ifdefs where necessary.
+ */
+typedef struct ngpixis {
+	u8 id;
+	u8 arch;
+	u8 scver;
+	u8 csr;
+	u8 rst;
+	u8 res1;
+	u8 aux;
+	u8 spd;
+	u8 brdcfg0;
+	u8 dma;
+	u8 addr;
+	u8 res2[2];
+	u8 data;
+	u8 led;
+	u8 res3;
+	u8 vctl;
+	u8 vstat;
+	u8 vcfgen0;
+	u8 res4;
+	u8 ocmcsr;
+	u8 ocmmsg;
+	u8 gmdbg;
+	u8 res5[2];
+	u8 sclk[3];
+	u8 dclk[3];
+	u8 watch;
+	struct {
+		u8 sw;
+		u8 en;
+	} s[8];
+} ngpixis_t  __attribute__ ((aligned(1)));
+
+/* Pointer to the PIXIS register set */
+#define pixis ((ngpixis_t *)PIXIS_BASE)
+
+/* The PIXIS SW register that corresponds to board switch X, where x >= 1 */
+#define PIXIS_SW(x)		(pixis->s[(x) - 1].sw)
+
+/* The PIXIS EN register that corresponds to board switch X, where x >= 1 */
+#define PIXIS_EN(x)		(pixis->s[(x) - 1].en)
diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c
index 7210512bfb..119eaf95af 100644
--- a/board/freescale/common/pixis.c
+++ b/board/freescale/common/pixis.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2006 Freescale Semiconductor
+ * Copyright 2006,2010 Freescale Semiconductor
  * Jeff Brown
  * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
  *
@@ -24,33 +24,26 @@
 
 #include <common.h>
 #include <command.h>
-#include <watchdog.h>
-#include <asm/cache.h>
 #include <asm/io.h>
 
-#include "pixis.h"
-
-
-static ulong strfractoint(uchar *strptr);
-
+#define pixis_base (u8 *)PIXIS_BASE
 
 /*
  * Simple board reset.
  */
 void pixis_reset(void)
 {
-	u8 *pixis_base = (u8 *)PIXIS_BASE;
 	out_8(pixis_base + PIXIS_RST, 0);
-}
 
+	while (1);
+}
 
 /*
  * Per table 27, page 58 of MPC8641HPCN spec.
  */
-int set_px_sysclk(ulong sysclk)
+static int set_px_sysclk(unsigned long sysclk)
 {
 	u8 sysclk_s, sysclk_r, sysclk_v, vclkh, vclkl, sysclk_aux;
-	u8 *pixis_base = (u8 *)PIXIS_BASE;
 
 	switch (sysclk) {
 	case 33:
@@ -117,13 +110,13 @@ int set_px_sysclk(ulong sysclk)
 	return 1;
 }
 
-
-int set_px_mpxpll(ulong mpxpll)
+/* Set the CFG_SYSPLL bits
+ *
+ * This only has effect if PX_VCFGEN0[SYSPLL]=1, which is true if
+ * read_from_px_regs() is called.
+ */
+static int set_px_mpxpll(unsigned long mpxpll)
 {
-	u8 tmp;
-	u8 val;
-	u8 *pixis_base = (u8 *)PIXIS_BASE;
-
 	switch (mpxpll) {
 	case 2:
 	case 4:
@@ -133,28 +126,19 @@ int set_px_mpxpll(ulong mpxpll)
 	case 12:
 	case 14:
 	case 16:
-		val = (u8) mpxpll;
-		break;
-	default:
-		printf("Unsupported MPXPLL ratio.\n");
-		return 0;
+		clrsetbits_8(pixis_base + PIXIS_VSPEED1, 0x1F, mpxpll);
+		return 1;
 	}
 
-	tmp = in_8(pixis_base + PIXIS_VSPEED1);
-	tmp = (tmp & 0xF0) | (val & 0x0F);
-	out_8(pixis_base + PIXIS_VSPEED1, tmp);
-
-	return 1;
+	printf("Unsupported MPXPLL ratio.\n");
+	return 0;
 }
 
-
-int set_px_corepll(ulong corepll)
+static int set_px_corepll(unsigned long corepll)
 {
-	u8 tmp;
 	u8 val;
-	u8 *pixis_base = (u8 *)PIXIS_BASE;
 
-	switch ((int)corepll) {
+	switch (corepll) {
 	case 20:
 		val = 0x08;
 		break;
@@ -178,113 +162,132 @@ int set_px_corepll(ulong corepll)
 		return 0;
 	}
 
-	tmp = in_8(pixis_base + PIXIS_VSPEED0);
-	tmp = (tmp & 0xE0) | (val & 0x1F);
-	out_8(pixis_base + PIXIS_VSPEED0, tmp);
-
+	clrsetbits_8(pixis_base + PIXIS_VSPEED0, 0x1F, val);
 	return 1;
 }
 
+#ifndef CONFIG_SYS_PIXIS_VCFGEN0_ENABLE
+#define CONFIG_SYS_PIXIS_VCFGEN0_ENABLE		0x1C
+#endif
 
-void read_from_px_regs(int set)
+/* Tell the PIXIS where to find the COREPLL, MPXPLL, SYSCLK values
+ *
+ * The PIXIS can be programmed to look at either the on-board dip switches
+ * or various other PIXIS registers to determine the values for COREPLL,
+ * MPXPLL, and SYSCLK.
+ *
+ * CONFIG_SYS_PIXIS_VCFGEN0_ENABLE is the value to write to the PIXIS_VCFGEN0
+ * register that tells the pixis to use the various PIXIS register.
+ */
+static void read_from_px_regs(int set)
 {
-	u8 *pixis_base = (u8 *)PIXIS_BASE;
-	u8 mask = 0x1C;	/* COREPLL, MPXPLL, SYSCLK controlled by PIXIS */
 	u8 tmp = in_8(pixis_base + PIXIS_VCFGEN0);
 
 	if (set)
-		tmp = tmp | mask;
+		tmp = tmp | CONFIG_SYS_PIXIS_VCFGEN0_ENABLE;
 	else
-		tmp = tmp & ~mask;
+		tmp = tmp & ~CONFIG_SYS_PIXIS_VCFGEN0_ENABLE;
+
 	out_8(pixis_base + PIXIS_VCFGEN0, tmp);
 }
 
+/* CONFIG_SYS_PIXIS_VBOOT_ENABLE is the value to write to the PX_VCFGEN1
+ * register that tells the pixis to use the PX_VBOOT[LBMAP] register.
+ */
+#ifndef CONFIG_SYS_PIXIS_VBOOT_ENABLE
+#define CONFIG_SYS_PIXIS_VBOOT_ENABLE	0x04
+#endif
 
-void read_from_px_regs_altbank(int set)
+/* Configure the source of the boot location
+ *
+ * The PIXIS can be programmed to look at either the on-board dip switches
+ * or the PX_VBOOT[LBMAP] register to determine where we should boot.
+ *
+ * If we want to boot from the alternate boot bank, we need to tell the PIXIS
+ * to ignore the on-board dip switches and use the PX_VBOOT[LBMAP] instead.
+ */
+static void read_from_px_regs_altbank(int set)
 {
-	u8 *pixis_base = (u8 *)PIXIS_BASE;
-	u8 mask = 0x04;	/* FLASHBANK and FLASHMAP controlled by PIXIS */
 	u8 tmp = in_8(pixis_base + PIXIS_VCFGEN1);
 
 	if (set)
-		tmp = tmp | mask;
+		tmp = tmp | CONFIG_SYS_PIXIS_VBOOT_ENABLE;
 	else
-		tmp = tmp & ~mask;
+		tmp = tmp & ~CONFIG_SYS_PIXIS_VBOOT_ENABLE;
+
 	out_8(pixis_base + PIXIS_VCFGEN1, tmp);
 }
 
+/* CONFIG_SYS_PIXIS_VBOOT_MASK contains the bits to set in VBOOT register that
+ * tells the PIXIS what the alternate flash bank is.
+ *
+ * Note that it's not really a mask.  It contains the actual LBMAP bits that
+ * must be set to select the alternate bank.  This code assumes that the
+ * primary bank has these bits set to 0, and the alternate bank has these
+ * bits set to 1.
+ */
 #ifndef CONFIG_SYS_PIXIS_VBOOT_MASK
 #define CONFIG_SYS_PIXIS_VBOOT_MASK	(0x40)
 #endif
 
-void clear_altbank(void)
+/* Tell the PIXIS to boot from the default flash bank
+ *
+ * Program the default flash bank into the VBOOT register.  This register is
+ * used only if PX_VCFGEN1[FLASH]=1.
+ */
+static void clear_altbank(void)
 {
-	u8 tmp;
-	u8 *pixis_base = (u8 *)PIXIS_BASE;
-
-	tmp = in_8(pixis_base + PIXIS_VBOOT);
-	tmp &= ~CONFIG_SYS_PIXIS_VBOOT_MASK;
-
-	out_8(pixis_base + PIXIS_VBOOT, tmp);
+	clrbits_8(pixis_base + PIXIS_VBOOT, CONFIG_SYS_PIXIS_VBOOT_MASK);
 }
 
-
-void set_altbank(void)
+/* Tell the PIXIS to boot from the alternate flash bank
+ *
+ * Program the alternate flash bank into the VBOOT register.  This register is
+ * used only if PX_VCFGEN1[FLASH]=1.
+ */
+static void set_altbank(void)
 {
-	u8 tmp;
-	u8 *pixis_base = (u8 *)PIXIS_BASE;
-
-	tmp = in_8(pixis_base + PIXIS_VBOOT);
-	tmp |= CONFIG_SYS_PIXIS_VBOOT_MASK;
-
-	out_8(pixis_base + PIXIS_VBOOT, tmp);
+	setbits_8(pixis_base + PIXIS_VBOOT, CONFIG_SYS_PIXIS_VBOOT_MASK);
 }
 
-
-void set_px_go(void)
+/* Reset the board with watchdog disabled.
+ *
+ * This respects the altbank setting.
+ */
+static void set_px_go(void)
 {
-	u8 tmp;
-	u8 *pixis_base = (u8 *)PIXIS_BASE;
+	/* Disable the VELA sequencer and watchdog */
+	clrbits_8(pixis_base + PIXIS_VCTL, 9);
 
-	tmp = in_8(pixis_base + PIXIS_VCTL);
-	tmp = tmp & 0x1E;			/* clear GO bit */
-	out_8(pixis_base + PIXIS_VCTL, tmp);
+	/* Reboot by starting the VELA sequencer */
+	setbits_8(pixis_base + PIXIS_VCTL, 0x1);
 
-	tmp = in_8(pixis_base + PIXIS_VCTL);
-	tmp = tmp | 0x01;	/* set GO bit - start reset sequencer */
-	out_8(pixis_base + PIXIS_VCTL, tmp);
+	while (1);
 }
 
-
-void set_px_go_with_watchdog(void)
+/* Reset the board with watchdog enabled.
+ *
+ * This respects the altbank setting.
+ */
+static void set_px_go_with_watchdog(void)
 {
-	u8 tmp;
-	u8 *pixis_base = (u8 *)PIXIS_BASE;
+	/* Disable the VELA sequencer */
+	clrbits_8(pixis_base + PIXIS_VCTL, 1);
 
-	tmp = in_8(pixis_base + PIXIS_VCTL);
-	tmp = tmp & 0x1E;
-	out_8(pixis_base + PIXIS_VCTL, tmp);
+	/* Enable the watchdog and reboot by starting the VELA sequencer */
+	setbits_8(pixis_base + PIXIS_VCTL, 0x9);
 
-	tmp = in_8(pixis_base + PIXIS_VCTL);
-	tmp = tmp | 0x09;
-	out_8(pixis_base + PIXIS_VCTL, tmp);
+	while (1);
 }
 
-
-int pixis_disable_watchdog_cmd(cmd_tbl_t *cmdtp,
-			       int flag, int argc, char *argv[])
+/* Disable the watchdog
+ *
+ */
+static int pixis_disable_watchdog_cmd(cmd_tbl_t *cmdtp, int flag, int argc,
+				      char *argv[])
 {
-	u8 tmp;
-	u8 *pixis_base = (u8 *)PIXIS_BASE;
-
-	tmp = in_8(pixis_base + PIXIS_VCTL);
-	tmp = tmp & 0x1E;
-	out_8(pixis_base + PIXIS_VCTL, tmp);
-
-	/* setting VCTL[WDEN] to 0 to disable watch dog */
-	tmp = in_8(pixis_base + PIXIS_VCTL);
-	tmp &= ~0x08;
-	out_8(pixis_base + PIXIS_VCTL, tmp);
+	/* Disable the VELA sequencer and the watchdog */
+	clrbits_8(pixis_base + PIXIS_VCTL, 9);
 
 	return 0;
 }
@@ -296,16 +299,17 @@ U_BOOT_CMD(
 );
 
 #ifdef CONFIG_PIXIS_SGMII_CMD
-int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+
+/* Enable or disable SGMII mode for a TSEC
+ */
+static int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
 	int which_tsec = -1;
-	u8 *pixis_base = (u8 *)PIXIS_BASE;
-	uchar mask;
-	uchar switch_mask;
+	unsigned char mask;
+	unsigned char switch_mask;
 
-	if (argc > 2)
-		if (strcmp(argv[1], "all") != 0)
-			which_tsec = simple_strtoul(argv[1], NULL, 0);
+	if ((argc > 2) && (strcmp(argv[1], "all") != 0))
+		which_tsec = simple_strtoul(argv[1], NULL, 0);
 
 	switch (which_tsec) {
 #ifdef CONFIG_TSEC1
@@ -363,6 +367,7 @@ U_BOOT_CMD(
 	"    off - disables SGMII\n"
 	"    switch - use switch settings"
 );
+
 #endif
 
 /*
@@ -371,14 +376,13 @@ U_BOOT_CMD(
  * FPGA register values.
  * input: strptr i.e. argv[2]
  */
-
-static ulong strfractoint(uchar *strptr)
+static unsigned long strfractoint(char *strptr)
 {
-	int i, j, retval;
+	int i, j;
 	int mulconst;
-	int intarr_len = 0, decarr_len = 0, no_dec = 0;
-	ulong intval = 0, decval = 0;
-	uchar intarr[3], decarr[3];
+	int intarr_len, no_dec = 0;
+	unsigned long intval = 0, decval = 0;
+	char intarr[3], decarr[3];
 
 	/* Assign the integer part to intarr[]
 	 * If there is no decimal point i.e.
@@ -412,26 +416,21 @@ static ulong strfractoint(uchar *strptr)
 			j++;
 		}
 
-		decarr_len = j;
 		decarr[j] = '\0';
 
 		mulconst = 1;
-		for (i = 0; i < decarr_len; i++)
+		for (i = 0; i < j; i++)
 			mulconst *= 10;
-		decval = simple_strtoul((char *)decarr, NULL, 10);
+		decval = simple_strtoul(decarr, NULL, 10);
 	}
 
-	intval = simple_strtoul((char *)intarr, NULL, 10);
+	intval = simple_strtoul(intarr, NULL, 10);
 	intval = intval * mulconst;
 
-	retval = intval + decval;
-
-	return retval;
+	return intval + decval;
 }
 
-
-int
-pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
 	unsigned int i;
 	char *p_cf = NULL;
@@ -440,7 +439,7 @@ pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	char *p_cf_mpxpll = NULL;
 	char *p_altbank = NULL;
 	char *p_wd = NULL;
-	unsigned int unknown_param = 0;
+	int unknown_param = 0;
 
 	/*
 	 * No args is a simple reset request.
@@ -493,9 +492,9 @@ pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	 */
 	read_from_px_regs(0);
 
-	if (p_altbank) {
+	if (p_altbank)
 		read_from_px_regs_altbank(0);
-	}
+
 	clear_altbank();
 
 	/*
@@ -507,7 +506,7 @@ pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		unsigned long mpxpll;
 
 		sysclk = simple_strtoul(p_cf_sysclk, NULL, 10);
-		corepll = strfractoint((uchar *) p_cf_corepll);
+		corepll = strfractoint(p_cf_corepll);
 		mpxpll = simple_strtoul(p_cf_mpxpll, NULL, 10);
 
 		if (!(set_px_sysclk(sysclk)
@@ -536,11 +535,10 @@ pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	/*
 	 * Reset with watchdog specified.
 	 */
-	if (p_wd) {
+	if (p_wd)
 		set_px_go_with_watchdog();
-	} else {
+	else
 		set_px_go();
-	}
 
 	/*
 	 * Shouldn't be reached.
diff --git a/board/freescale/common/pixis.h b/board/freescale/common/pixis.h
deleted file mode 100644
index ff62a62c74..0000000000
--- a/board/freescale/common/pixis.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * Copyright 2006 Freescale Semiconductor
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-extern void pixis_reset(void);
-extern int set_px_sysclk(ulong sysclk);
-extern int set_px_mpxpll(ulong mpxpll);
-extern int set_px_corepll(ulong corepll);
-extern void read_from_px_regs(int set);
-extern void read_from_px_regs_altbank(int set);
-extern void set_altbank(void);
-extern void set_px_go(void);
-extern void set_px_go_with_watchdog(void);
diff --git a/board/freescale/m5208evbe/u-boot.lds b/board/freescale/m5208evbe/u-boot.lds
index bc9d5cd0d6..507e21a03b 100644
--- a/board/freescale/m5208evbe/u-boot.lds
+++ b/board/freescale/m5208evbe/u-boot.lds
@@ -55,9 +55,9 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf52x2/start.o		(.text)
-    cpu/mcf52x2/libmcf52x2.a	(.text)
-    lib_m68k/libm68k.a		(.text)
+    arch/m68k/cpu/mcf52x2/start.o		(.text)
+    arch/m68k/cpu/mcf52x2/libmcf52x2.a	(.text)
+    arch/m68k/lib/libm68k.a		(.text)
     common/dlmalloc.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
diff --git a/board/freescale/m52277evb/u-boot.spa b/board/freescale/m52277evb/u-boot.spa
index 7ae70d455f..4591196e68 100644
--- a/board/freescale/m52277evb/u-boot.spa
+++ b/board/freescale/m52277evb/u-boot.spa
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf5227x/start.o	(.text)
-    cpu/mcf5227x/libmcf5227x.a	(.text)
-    lib_m68k/libm68k.a		(.text)
-    lib_generic/libgeneric.a	(.text)
+    arch/m68k/cpu/mcf5227x/start.o	(.text)
+    arch/m68k/cpu/mcf5227x/libmcf5227x.a	(.text)
+    arch/m68k/lib/libm68k.a		(.text)
+    lib/libgeneric.a	(.text)
     common/cmd_mem.o		(.text)
     common/main.o		(.text)
 
diff --git a/board/freescale/m52277evb/u-boot.stm b/board/freescale/m52277evb/u-boot.stm
index 03ff532964..1ec83e9490 100644
--- a/board/freescale/m52277evb/u-boot.stm
+++ b/board/freescale/m52277evb/u-boot.stm
@@ -55,7 +55,7 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf5227x/start.o		(.text)
+    arch/m68k/cpu/mcf5227x/start.o		(.text)
 
     *(.text)
     *(.fixup)
diff --git a/board/freescale/m5235evb/u-boot.16 b/board/freescale/m5235evb/u-boot.16
index c134884375..d7bd10fd96 100644
--- a/board/freescale/m5235evb/u-boot.16
+++ b/board/freescale/m5235evb/u-boot.16
@@ -55,12 +55,12 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf523x/start.o		(.text)
-    cpu/mcf523x/cpu_init.o	(.text)
-    lib_m68k/traps.o		(.text)
-    lib_m68k/interrupts.o	(.text)
+    arch/m68k/cpu/mcf523x/start.o		(.text)
+    arch/m68k/cpu/mcf523x/cpu_init.o	(.text)
+    arch/m68k/lib/traps.o		(.text)
+    arch/m68k/lib/interrupts.o	(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/zlib.o		(.text)
+    lib/zlib.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.text)
diff --git a/board/freescale/m5235evb/u-boot.32 b/board/freescale/m5235evb/u-boot.32
index 53c337df89..45ff158905 100644
--- a/board/freescale/m5235evb/u-boot.32
+++ b/board/freescale/m5235evb/u-boot.32
@@ -55,12 +55,12 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf523x/start.o		(.text)
-    cpu/mcf523x/cpu.o		(.text)
-    cpu/mcf523x/cpu_init.o	(.text)
-    cpu/mcf523x/interrupts.o	(.text)
-    cpu/mcf523x/speed.o		(.text)
-    lib_m68k/libm68k.a		(.text)
+    arch/m68k/cpu/mcf523x/start.o		(.text)
+    arch/m68k/cpu/mcf523x/cpu.o		(.text)
+    arch/m68k/cpu/mcf523x/cpu_init.o	(.text)
+    arch/m68k/cpu/mcf523x/interrupts.o	(.text)
+    arch/m68k/cpu/mcf523x/speed.o		(.text)
+    arch/m68k/lib/libm68k.a		(.text)
     common/dlmalloc.o		(.text)
     common/cmd_bootm.o		(.text)
     common/cmd_flash.o		(.text)
@@ -68,7 +68,7 @@ SECTIONS
     common/cmd_mem.o		(.text)
     common/console.o		(.text)
     common/main.o		(.text)
-    lib_generic/libgeneric.a	(.text)
+    lib/libgeneric.a	(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.text)
diff --git a/board/freescale/m5249evb/u-boot.lds b/board/freescale/m5249evb/u-boot.lds
index e3230b9f20..d4fd705ce1 100644
--- a/board/freescale/m5249evb/u-boot.lds
+++ b/board/freescale/m5249evb/u-boot.lds
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf52x2/start.o		(.text)
-    lib_m68k/traps.o		(.text)
-    cpu/mcf52x2/interrupts.o	(.text)
+    arch/m68k/cpu/mcf52x2/start.o		(.text)
+    arch/m68k/lib/traps.o		(.text)
+    arch/m68k/cpu/mcf52x2/interrupts.o	(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/zlib.o		(.text)
+    lib/zlib.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.text)
diff --git a/board/freescale/m5253demo/u-boot.lds b/board/freescale/m5253demo/u-boot.lds
index 6cb5ee05f3..4f8bb20d45 100644
--- a/board/freescale/m5253demo/u-boot.lds
+++ b/board/freescale/m5253demo/u-boot.lds
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf52x2/start.o		(.text)
-    lib_m68k/traps.o		(.text)
-    cpu/mcf52x2/interrupts.o	(.text)
+    arch/m68k/cpu/mcf52x2/start.o		(.text)
+    arch/m68k/lib/traps.o		(.text)
+    arch/m68k/cpu/mcf52x2/interrupts.o	(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/zlib.o		(.text)
+    lib/zlib.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.text)
diff --git a/board/freescale/m5253evbe/u-boot.lds b/board/freescale/m5253evbe/u-boot.lds
index 132fccf104..797c83785c 100644
--- a/board/freescale/m5253evbe/u-boot.lds
+++ b/board/freescale/m5253evbe/u-boot.lds
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf52x2/start.o		(.text)
-    lib_m68k/traps.o		(.text)
-    cpu/mcf52x2/interrupts.o	(.text)
+    arch/m68k/cpu/mcf52x2/start.o		(.text)
+    arch/m68k/lib/traps.o		(.text)
+    arch/m68k/cpu/mcf52x2/interrupts.o	(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/zlib.o		(.text)
+    lib/zlib.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.text)
diff --git a/board/freescale/m5271evb/m5271evb.c b/board/freescale/m5271evb/m5271evb.c
index 5505cc42c6..446f102e58 100644
--- a/board/freescale/m5271evb/m5271evb.c
+++ b/board/freescale/m5271evb/m5271evb.c
@@ -47,6 +47,7 @@ phys_size_t initdram (int board_type) {
 			MCF_GPIO_SDRAM_SDWE | MCF_GPIO_SDRAM_SCAS |
 			MCF_GPIO_SDRAM_SRAS | MCF_GPIO_SDRAM_SCKE |
 			MCF_GPIO_SDRAM_SDCS_11);
+	asm(" nop");
 
 	/*
 	 * Check to see if the SDRAM has already been initialized
@@ -55,8 +56,9 @@ phys_size_t initdram (int board_type) {
 	if (!(mbar_readLong(MCF_SDRAMC_DACR0) & MCF_SDRAMC_DACRn_RE)) {
 		/* Initialize DRAM Control Register: DCR */
 		mbar_writeShort(MCF_SDRAMC_DCR,
-				MCF_SDRAMC_DCR_RTIM(0x01)
-				| MCF_SDRAMC_DCR_RC(0x30));
+				MCF_SDRAMC_DCR_RTIM(2)
+				| MCF_SDRAMC_DCR_RC(0x2E));
+		asm(" nop");
 
 		/*
 		 * Initialize DACR0
@@ -70,15 +72,18 @@ phys_size_t initdram (int board_type) {
 				| MCF_SDRAMC_DACRn_CASL(1)
 				| MCF_SDRAMC_DACRn_CBM(3)
 				| MCF_SDRAMC_DACRn_PS(0));
+		asm(" nop");
 
 		/* Initialize DMR0 */
 		mbar_writeLong(MCF_SDRAMC_DMR0,
 				MCF_SDRAMC_DMRn_BAM_16M
 				| MCF_SDRAMC_DMRn_V);
+		asm(" nop");
 
 		/* Set IP bit in DACR */
 		mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
 				| MCF_SDRAMC_DACRn_IP);
+		asm(" nop");
 
 		/* Wait at least 20ns to allow banks to precharge */
 		for (i = 0; i < 5; i++)
@@ -86,6 +91,7 @@ phys_size_t initdram (int board_type) {
 
 		/* Write to this block to initiate precharge */
 		*(u32 *)(CONFIG_SYS_SDRAM_BASE) = 0xa5a5a5a5;
+		asm(" nop");
 
 		/* Set RE bit in DACR */
 		mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
@@ -98,6 +104,7 @@ phys_size_t initdram (int board_type) {
 		/* Finish the configuration by issuing the MRS */
 		mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
 				| MCF_SDRAMC_DACRn_MRS);
+		asm(" nop");
 
 		/*
 		 * Write to the SDRAM Mode Register A0-A11 = 0x400
@@ -109,6 +116,7 @@ phys_size_t initdram (int board_type) {
 		 * Burst Length = 1
 		 */
 		*(u32 *)(CONFIG_SYS_SDRAM_BASE + 0x400) = 0xa5a5a5a5;
+		asm(" nop");
 	}
 
 	return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
diff --git a/board/freescale/m5271evb/u-boot.lds b/board/freescale/m5271evb/u-boot.lds
index 00c1f2a52e..ca41232c64 100644
--- a/board/freescale/m5271evb/u-boot.lds
+++ b/board/freescale/m5271evb/u-boot.lds
@@ -56,11 +56,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf52x2/start.o		(.text)
-    lib_m68k/traps.o		(.text)
-    cpu/mcf52x2/interrupts.o	(.text)
+    arch/m68k/cpu/mcf52x2/start.o		(.text)
+    arch/m68k/lib/traps.o		(.text)
+    arch/m68k/cpu/mcf52x2/interrupts.o	(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/zlib.o		(.text)
+    lib/zlib.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.ppcenv)
diff --git a/board/freescale/m5272c3/u-boot.lds b/board/freescale/m5272c3/u-boot.lds
index 9d20b228cb..8b011df532 100644
--- a/board/freescale/m5272c3/u-boot.lds
+++ b/board/freescale/m5272c3/u-boot.lds
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf52x2/start.o		(.text)
-    lib_m68k/traps.o		(.text)
-    cpu/mcf52x2/interrupts.o	(.text)
+    arch/m68k/cpu/mcf52x2/start.o		(.text)
+    arch/m68k/lib/traps.o		(.text)
+    arch/m68k/cpu/mcf52x2/interrupts.o	(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/zlib.o		(.text)
+    lib/zlib.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.text)
diff --git a/board/freescale/m5275evb/u-boot.lds b/board/freescale/m5275evb/u-boot.lds
index daf8724ae2..cd17b0abf2 100644
--- a/board/freescale/m5275evb/u-boot.lds
+++ b/board/freescale/m5275evb/u-boot.lds
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf52x2/start.o		(.text)
+    arch/m68k/cpu/mcf52x2/start.o		(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/string.o	(.text)
-    lib_generic/zlib.o		(.text)
+    lib/string.o	(.text)
+    lib/zlib.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o(.text)
diff --git a/board/freescale/m5282evb/u-boot.lds b/board/freescale/m5282evb/u-boot.lds
index f46e0251ef..5ad0fad684 100644
--- a/board/freescale/m5282evb/u-boot.lds
+++ b/board/freescale/m5282evb/u-boot.lds
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf52x2/start.o	(.text)
+    arch/m68k/cpu/mcf52x2/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/string.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o	(.text)
+    lib/string.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o	(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o(.text)
diff --git a/board/freescale/m53017evb/u-boot.lds b/board/freescale/m53017evb/u-boot.lds
index c79d06c64a..6577299c25 100644
--- a/board/freescale/m53017evb/u-boot.lds
+++ b/board/freescale/m53017evb/u-boot.lds
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf532x/start.o		(.text)
-    cpu/mcf532x/libmcf532x.a	(.text)
-    lib_m68k/libm68k.a		(.text)
+    arch/m68k/cpu/mcf532x/start.o		(.text)
+    arch/m68k/cpu/mcf532x/libmcf532x.a	(.text)
+    arch/m68k/lib/libm68k.a		(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/zlib.o		(.text)
+    lib/zlib.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.text)
diff --git a/board/freescale/m5329evb/u-boot.lds b/board/freescale/m5329evb/u-boot.lds
index af310988ff..ba7ca27733 100644
--- a/board/freescale/m5329evb/u-boot.lds
+++ b/board/freescale/m5329evb/u-boot.lds
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf532x/start.o		(.text)
-    lib_m68k/traps.o		(.text)
-    lib_m68k/interrupts.o	(.text)
+    arch/m68k/cpu/mcf532x/start.o		(.text)
+    arch/m68k/lib/traps.o		(.text)
+    arch/m68k/lib/interrupts.o	(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/zlib.o		(.text)
+    lib/zlib.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.text)
diff --git a/board/freescale/m5373evb/u-boot.lds b/board/freescale/m5373evb/u-boot.lds
index dff74b6543..a2540bbc74 100644
--- a/board/freescale/m5373evb/u-boot.lds
+++ b/board/freescale/m5373evb/u-boot.lds
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf532x/start.o		(.text)
-    lib_m68k/traps.o		(.text)
-    lib_m68k/interrupts.o	(.text)
+    arch/m68k/cpu/mcf532x/start.o		(.text)
+    arch/m68k/lib/traps.o		(.text)
+    arch/m68k/lib/interrupts.o	(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/zlib.o		(.text)
+    lib/zlib.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.text)
diff --git a/board/freescale/m54451evb/u-boot.spa b/board/freescale/m54451evb/u-boot.spa
index d8caefad64..09ac481dd1 100644
--- a/board/freescale/m54451evb/u-boot.spa
+++ b/board/freescale/m54451evb/u-boot.spa
@@ -55,14 +55,14 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf5445x/start.o		(.text)
-    cpu/mcf5445x/libmcf5445x.a	(.text)
-    lib_m68k/libm68k.a		(.text)
+    arch/m68k/cpu/mcf5445x/start.o		(.text)
+    arch/m68k/cpu/mcf5445x/libmcf5445x.a	(.text)
+    arch/m68k/lib/libm68k.a		(.text)
     common/cmd_flash.o		(.text)
     common/dlmalloc.o		(.text)
     common/main.o		(.text)
     common/image.o		(.text)
-    lib_generic/libgeneric.a	(.text)
+    lib/libgeneric.a	(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.text)
diff --git a/board/freescale/m54451evb/u-boot.stm b/board/freescale/m54451evb/u-boot.stm
index e9eac67b90..e64a56c59b 100644
--- a/board/freescale/m54451evb/u-boot.stm
+++ b/board/freescale/m54451evb/u-boot.stm
@@ -55,16 +55,16 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf5445x/start.o		(.text)
-/*    cpu/mcf5445x/cpu_init.o		(.text)
-    cpu/mcf5445x/cpu.o			(.text)
-    cpu/mcf5445x/dspi.o			(.text)
-    cpu/mcf5445x/interrupt.o		(.text)
-    cpu/mcf5445x/speed.o		(.text)
-    lib_m68k/board.o			(.text)
+    arch/m68k/cpu/mcf5445x/start.o		(.text)
+/*    arch/m68k/cpu/mcf5445x/cpu_init.o		(.text)
+    arch/m68k/cpu/mcf5445x/cpu.o			(.text)
+    arch/m68k/cpu/mcf5445x/dspi.o			(.text)
+    arch/m68k/cpu/mcf5445x/interrupt.o		(.text)
+    arch/m68k/cpu/mcf5445x/speed.o		(.text)
+    arch/m68k/lib/board.o			(.text)
     common/serial.o			(.text)
     common/console.o			(.text)
-    lib_generic/display_options.o	(.text)
+    lib/display_options.o	(.text)
     board/freescale/m54455evb/m54455evb.o	(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
diff --git a/board/freescale/m54455evb/m54455evb.c b/board/freescale/m54455evb/m54455evb.c
index 293b5b0e41..2a84514a3d 100644
--- a/board/freescale/m54455evb/m54455evb.c
+++ b/board/freescale/m54455evb/m54455evb.c
@@ -107,7 +107,7 @@ int ide_preinit(void)
 {
 	volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
 
-	gpio->par_fec |= (gpio->par_fec & GPIO_PAR_FEC_FEC1_MASK) | 0x10;
+	gpio->par_fec |= (gpio->par_fec & GPIO_PAR_FEC_FEC1_UNMASK) | 0x10;
 	gpio->par_feci2c |=
 	    (gpio->par_feci2c & 0xF0FF) | (GPIO_PAR_FECI2C_MDC1_ATA_DIOR |
 					   GPIO_PAR_FECI2C_MDIO1_ATA_DIOW);
@@ -185,7 +185,7 @@ ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info)
 	info->flash_id          = 0x01000000;
 	info->portwidth         = 1;
 	info->chipwidth         = 1;
-	info->buffer_size       = 32;
+	info->buffer_size       = 1;
 	info->erase_blk_tout    = 16384;
 	info->write_tout        = 2;
 	info->buffer_write_tout = 5;
diff --git a/board/freescale/m54455evb/u-boot.atm b/board/freescale/m54455evb/u-boot.atm
index 08e184c1e6..ebf801ac71 100644
--- a/board/freescale/m54455evb/u-boot.atm
+++ b/board/freescale/m54455evb/u-boot.atm
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf5445x/start.o		(.text)
-    lib_m68k/traps.o		(.text)
-    lib_m68k/interrupts.o	(.text)
+    arch/m68k/cpu/mcf5445x/start.o		(.text)
+    arch/m68k/lib/traps.o		(.text)
+    arch/m68k/lib/interrupts.o	(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/zlib.o		(.text)
+    lib/zlib.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.text)
diff --git a/board/freescale/m54455evb/u-boot.int b/board/freescale/m54455evb/u-boot.int
index 4d504a22f1..153556fe9b 100644
--- a/board/freescale/m54455evb/u-boot.int
+++ b/board/freescale/m54455evb/u-boot.int
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf5445x/start.o		(.text)
-    lib_m68k/traps.o		(.text)
-    lib_m68k/interrupts.o	(.text)
+    arch/m68k/cpu/mcf5445x/start.o		(.text)
+    arch/m68k/lib/traps.o		(.text)
+    arch/m68k/lib/interrupts.o	(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/zlib.o		(.text)
+    lib/zlib.o		(.text)
 
     *(.text)
     *(.fixup)
diff --git a/board/freescale/m54455evb/u-boot.stm b/board/freescale/m54455evb/u-boot.stm
index 3dd9a6b047..9cda1029d3 100644
--- a/board/freescale/m54455evb/u-boot.stm
+++ b/board/freescale/m54455evb/u-boot.stm
@@ -55,7 +55,7 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf5445x/start.o		(.text)
+    arch/m68k/cpu/mcf5445x/start.o		(.text)
 
     *(.text)
     *(.fixup)
diff --git a/board/freescale/m547xevb/u-boot.lds b/board/freescale/m547xevb/u-boot.lds
index a3014bd104..54bf2785aa 100644
--- a/board/freescale/m547xevb/u-boot.lds
+++ b/board/freescale/m547xevb/u-boot.lds
@@ -55,9 +55,9 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf547x_8x/start.o		(.text)
-    lib_m68k/traps.o		(.text)
-    lib_m68k/interrupts.o	(.text)
+    arch/m68k/cpu/mcf547x_8x/start.o		(.text)
+    arch/m68k/lib/traps.o		(.text)
+    arch/m68k/lib/interrupts.o	(.text)
     common/dlmalloc.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
diff --git a/board/freescale/m548xevb/u-boot.lds b/board/freescale/m548xevb/u-boot.lds
index a3014bd104..54bf2785aa 100644
--- a/board/freescale/m548xevb/u-boot.lds
+++ b/board/freescale/m548xevb/u-boot.lds
@@ -55,9 +55,9 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf547x_8x/start.o		(.text)
-    lib_m68k/traps.o		(.text)
-    lib_m68k/interrupts.o	(.text)
+    arch/m68k/cpu/mcf547x_8x/start.o		(.text)
+    arch/m68k/lib/traps.o		(.text)
+    arch/m68k/lib/interrupts.o	(.text)
     common/dlmalloc.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
diff --git a/board/freescale/mpc7448hpc2/tsi108_init.c b/board/freescale/mpc7448hpc2/tsi108_init.c
index 74bb564ed9..c6a3ade2c3 100644
--- a/board/freescale/mpc7448hpc2/tsi108_init.c
+++ b/board/freescale/mpc7448hpc2/tsi108_init.c
@@ -323,7 +323,7 @@ int board_early_init_r (void)
 	 * We will over-ride the env_init called in board_init_f
 	 * This is really a work-around because, the HLP bank 1
 	 * where NVRAM resides is not visible during board_init_f
-	 * (lib_ppc/board.c)
+	 * (arch/ppc/lib/board.c)
 	 * Alternatively, we could use the I2C EEPROM at start-up to configure
 	 * and enable all HLP banks and not just HLP 0 as is being done for
 	 * Taiga Rev. 2.
diff --git a/board/freescale/mpc7448hpc2/u-boot.lds b/board/freescale/mpc7448hpc2/u-boot.lds
index 247779f6c2..c4266cec50 100644
--- a/board/freescale/mpc7448hpc2/u-boot.lds
+++ b/board/freescale/mpc7448hpc2/u-boot.lds
@@ -56,7 +56,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/74xx_7xx/start.o	(.text)
+    arch/ppc/cpu/74xx_7xx/start.o	(.text)
 
 /* store the environment in a seperate sector in the boot flash */
 /*    . = env_offset; */
diff --git a/board/freescale/mpc8536ds/config.mk b/board/freescale/mpc8536ds/config.mk
index e38af731be..3f5447a436 100644
--- a/board/freescale/mpc8536ds/config.mk
+++ b/board/freescale/mpc8536ds/config.mk
@@ -26,7 +26,7 @@
 ifndef NAND_SPL
 ifeq ($(CONFIG_MK_NAND), y)
 TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE)
-LDSCRIPT := $(TOPDIR)/cpu/$(CPU)/u-boot-nand.lds
+LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
 endif
 endif
 
diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c
index 81a56b55e0..253ed181fc 100644
--- a/board/freescale/mpc8536ds/mpc8536ds.c
+++ b/board/freescale/mpc8536ds/mpc8536ds.c
@@ -39,7 +39,6 @@
 #include <netdev.h>
 #include <sata.h>
 
-#include "../common/pixis.h"
 #include "../common/sgmii_riser.h"
 
 phys_size_t fixed_sdram(void);
diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index b35e02f685..0be2d892d3 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -35,7 +35,6 @@
 #include <tsec.h>
 #include <netdev.h>
 
-#include "../common/pixis.h"
 #include "../common/sgmii_riser.h"
 
 int checkboard (void)
diff --git a/board/freescale/mpc8569mds/config.mk b/board/freescale/mpc8569mds/config.mk
index 7de0f7cf7d..86f138c19c 100644
--- a/board/freescale/mpc8569mds/config.mk
+++ b/board/freescale/mpc8569mds/config.mk
@@ -26,7 +26,7 @@
 ifndef NAND_SPL
 ifeq ($(CONFIG_MK_NAND), y)
 TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE)
-LDSCRIPT := $(TOPDIR)/cpu/$(CPU)/u-boot-nand.lds
+LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
 endif
 endif
 
diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
index 74085c3260..6029a5185c 100644
--- a/board/freescale/mpc8572ds/mpc8572ds.c
+++ b/board/freescale/mpc8572ds/mpc8572ds.c
@@ -36,7 +36,6 @@
 #include <tsec.h>
 #include <netdev.h>
 
-#include "../common/pixis.h"
 #include "../common/sgmii_riser.h"
 
 long int fixed_sdram(void);
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index 784a2ed686..2ef7b2323d 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -34,8 +34,6 @@
 #include <spd_sdram.h>
 #include <netdev.h>
 
-#include "../common/pixis.h"
-
 void sdram_init(void);
 phys_size_t fixed_sdram(void);
 void mpc8610hpcd_diu_init(void);
@@ -127,6 +125,8 @@ initdram(int board_type)
 	dram_size = fixed_sdram();
 #endif
 
+	setup_ddr_bat(dram_size);
+
 	puts(" DDR: ");
 	return dram_size;
 }
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c
index 4186a2ecda..94fb1ebf8f 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c
@@ -29,7 +29,6 @@
 
 #ifdef CONFIG_FSL_DIU_FB
 
-#include "../common/pixis.h"
 #include "../common/fsl_diu_fb.h"
 
 #if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
diff --git a/board/freescale/mpc8610hpcd/u-boot.lds b/board/freescale/mpc8610hpcd/u-boot.lds
index b573807fe9..1f9f8eb949 100644
--- a/board/freescale/mpc8610hpcd/u-boot.lds
+++ b/board/freescale/mpc8610hpcd/u-boot.lds
@@ -50,16 +50,16 @@ SECTIONS
   .plt : { *(.plt) }
   .text :
   {
-    cpu/mpc86xx/start.o	(.text)
-    cpu/mpc86xx/traps.o (.text)
-    cpu/mpc86xx/interrupts.o (.text)
-    cpu/mpc86xx/cpu_init.o (.text)
-    cpu/mpc86xx/cpu.o (.text)
-    cpu/mpc86xx/speed.o (.text)
+    arch/ppc/cpu/mpc86xx/start.o	(.text)
+    arch/ppc/cpu/mpc86xx/traps.o (.text)
+    arch/ppc/cpu/mpc86xx/interrupts.o (.text)
+    arch/ppc/cpu/mpc86xx/cpu_init.o (.text)
+    arch/ppc/cpu/mpc86xx/cpu.o (.text)
+    arch/ppc/cpu/mpc86xx/speed.o (.text)
     common/dlmalloc.o (.text)
-    lib_generic/crc32.o (.text)
-    lib_ppc/extable.o (.text)
-    lib_generic/zlib.o (.text)
+    lib/crc32.o (.text)
+    arch/ppc/lib/extable.o (.text)
+    lib/zlib.o (.text)
     *(.text)
     *(.got1)
    }
diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
index c521527d89..b352c334cf 100644
--- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c
+++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
@@ -31,8 +31,6 @@
 #include <fdt_support.h>
 #include <netdev.h>
 
-#include "../common/pixis.h"
-
 phys_size_t fixed_sdram(void);
 
 int board_early_init_f(void)
@@ -74,6 +72,8 @@ initdram(int board_type)
 	dram_size = fixed_sdram();
 #endif
 
+	setup_ddr_bat(dram_size);
+
 	puts("    DDR: ");
 	return dram_size;
 }
diff --git a/board/freescale/mpc8641hpcn/u-boot.lds b/board/freescale/mpc8641hpcn/u-boot.lds
index 2b98b5a9cc..d7c65ce217 100644
--- a/board/freescale/mpc8641hpcn/u-boot.lds
+++ b/board/freescale/mpc8641hpcn/u-boot.lds
@@ -50,16 +50,16 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc86xx/start.o	(.text)
-    cpu/mpc86xx/traps.o (.text)
-    cpu/mpc86xx/interrupts.o (.text)
-    cpu/mpc86xx/cpu_init.o (.text)
-    cpu/mpc86xx/cpu.o (.text)
-    cpu/mpc86xx/speed.o (.text)
+    arch/ppc/cpu/mpc86xx/start.o	(.text)
+    arch/ppc/cpu/mpc86xx/traps.o (.text)
+    arch/ppc/cpu/mpc86xx/interrupts.o (.text)
+    arch/ppc/cpu/mpc86xx/cpu_init.o (.text)
+    arch/ppc/cpu/mpc86xx/cpu.o (.text)
+    arch/ppc/cpu/mpc86xx/speed.o (.text)
     common/dlmalloc.o (.text)
-    lib_generic/crc32.o (.text)
-    lib_ppc/extable.o (.text)
-    lib_generic/zlib.o (.text)
+    lib/crc32.o (.text)
+    arch/ppc/lib/extable.o (.text)
+    lib/zlib.o (.text)
     drivers/bios_emulator/atibios.o (.text)
     *(.text)
     *(.got1)
diff --git a/board/freescale/mx31ads/u-boot.lds b/board/freescale/mx31ads/u-boot.lds
index 3182aa675e..273129457b 100644
--- a/board/freescale/mx31ads/u-boot.lds
+++ b/board/freescale/mx31ads/u-boot.lds
@@ -37,9 +37,9 @@ SECTIONS
 	  /* WARNING - the following is hand-optimized to fit within	*/
 	  /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-	  cpu/arm1136/start.o			(.text)
+	  arch/arm/cpu/arm1136/start.o			(.text)
 	  board/freescale/mx31ads/libmx31ads.a	(.text)
-	  lib_arm/libarm.a			(.text)
+	  arch/arm/lib/libarm.a			(.text)
 	  net/libnet.a				(.text)
 	  drivers/mtd/libmtd.a			(.text)
 
diff --git a/board/freescale/mx51evk/config.mk b/board/freescale/mx51evk/config.mk
index c8279ec8cb..af70ec250f 100644
--- a/board/freescale/mx51evk/config.mk
+++ b/board/freescale/mx51evk/config.mk
@@ -20,6 +20,6 @@
 # MA 02111-1307 USA
 #
 
-LDSCRIPT = cpu/$(CPU)/$(SOC)/u-boot.lds
+LDSCRIPT = $(CPUDIR)/$(SOC)/u-boot.lds
 TEXT_BASE = 0x97800000
 IMX_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/imximage.cfg
diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c
index 8754563802..f0b7abcf52 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -72,72 +72,6 @@ static void setup_iomux_uart(void)
 	mxc_iomux_set_pad(MX51_PIN_UART1_CTS, pad);
 }
 
-static void setup_expio(void)
-{
-	u32 reg;
-	struct weim *pweim = (struct weim *)WEIM_BASE_ADDR;
-	struct clkctl *pclkctl = (struct clkctl *)CCM_BASE_ADDR;
-
-	/* CS5 setup */
-	mxc_request_iomux(MX51_PIN_EIM_CS5, IOMUX_CONFIG_ALT0);
-	writel(0x00410089, &pweim[5].csgcr1);
-	writel(0x00000002, &pweim[5].csgcr2);
-
-	/* RWSC=50, RADVA=2, RADVN=6, OEA=0, OEN=0, RCSA=0, RCSN=0 */
-	writel(0x32260000, &pweim[5].csrcr1);
-
-	/* APR = 0 */
-	writel(0x00000000, &pweim[5].csrcr2);
-
-	/*
-	 * WAL=0, WBED=1, WWSC=50, WADVA=2, WADVN=6, WEA=0, WEN=0,
-	 * WCSA=0, WCSN=0
-	 */
-	writel(0x72080F00, &pweim[5].cswcr1);
-
-	mx51_io_board = (struct io_board_ctrl *)(CS5_BASE_ADDR +
-						IO_BOARD_OFFSET);
-	if ((readw(&mx51_io_board->id1) == 0xAAAA) &&
-		(readw(&mx51_io_board->id2) == 0x5555)) {
-		if (is_soc_rev(CHIP_REV_2_0) < 0) {
-			reg = readl(&pclkctl->cbcdr);
-			reg = (reg & (~0x70000)) | 0x30000;
-			writel(reg, &pclkctl->cbcdr);
-			/* make sure divider effective */
-			while (readl(&pclkctl->cdhipr) != 0)
-				;
-			writel(0x0, &pclkctl->ccdr);
-		}
-	} else {
-		/* CS1 */
-		writel(0x00410089, &pweim[1].csgcr1);
-		writel(0x00000002, &pweim[1].csgcr2);
-		/*  RWSC=50, RADVA=2, RADVN=6, OEA=0, OEN=0, RCSA=0, RCSN=0 */
-		writel(0x32260000, &pweim[1].csrcr1);
-		/* APR=0 */
-		writel(0x00000000, &pweim[1].csrcr2);
-		/*
-		 * WAL=0, WBED=1, WWSC=50, WADVA=2, WADVN=6, WEA=0,
-		 * WEN=0, WCSA=0, WCSN=0
-		 */
-		writel(0x72080F00, &pweim[1].cswcr1);
-		mx51_io_board = (struct io_board_ctrl *)(CS1_BASE_ADDR +
-						IO_BOARD_OFFSET);
-	}
-
-	/* Reset interrupt status reg */
-	writew(0x1F, &(mx51_io_board->int_rest));
-	writew(0x00, &(mx51_io_board->int_rest));
-	writew(0xFFFF, &(mx51_io_board->int_mask));
-
-	/* Reset the XUART and Ethernet controllers */
-	reg = readw(&(mx51_io_board->sw_reset));
-	reg |= 0x9;
-	writew(reg, &(mx51_io_board->sw_reset));
-	reg &= ~0x9;
-	writew(reg, &(mx51_io_board->sw_reset));
-}
-
 static void setup_iomux_fec(void)
 {
 	/*FEC_MDIO*/
@@ -349,7 +283,6 @@ int board_init(void)
 	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
 
 	setup_iomux_uart();
-	setup_expio();
 	setup_iomux_fec();
 	return 0;
 }
diff --git a/board/freescale/mx51evk/mx51evk.h b/board/freescale/mx51evk/mx51evk.h
index 524cdcced4..2854e71e8d 100644
--- a/board/freescale/mx51evk/mx51evk.h
+++ b/board/freescale/mx51evk/mx51evk.h
@@ -47,5 +47,4 @@ struct io_board_ctrl {
 };
 #endif
 
-#define IO_BOARD_OFFSET		(0x20000)
 #endif
diff --git a/board/freescale/p1_p2_rdb/config.mk b/board/freescale/p1_p2_rdb/config.mk
index 0f7a0487e0..1f9f7b68a2 100644
--- a/board/freescale/p1_p2_rdb/config.mk
+++ b/board/freescale/p1_p2_rdb/config.mk
@@ -27,7 +27,7 @@
 ifndef NAND_SPL
 ifeq ($(CONFIG_MK_NAND), y)
 TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE)
-LDSCRIPT := $(TOPDIR)/cpu/$(CPU)/u-boot-nand.lds
+LDSCRIPT := $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds
 endif
 endif
 
diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c
index f6eae55d1d..f0ff209c0c 100644
--- a/board/freescale/p2020ds/p2020ds.c
+++ b/board/freescale/p2020ds/p2020ds.c
@@ -38,7 +38,7 @@
 #include <asm/mp.h>
 #include <netdev.h>
 
-#include "../common/pixis.h"
+#include "../common/ngpixis.h"
 #include "../common/sgmii_riser.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -47,30 +47,24 @@ phys_size_t fixed_sdram(void);
 
 int checkboard(void)
 {
-	u8 sw7;
-	u8 *pixis_base = (u8 *)PIXIS_BASE;
+	u8 sw;
 
 	puts("Board: P2020DS ");
 #ifdef CONFIG_PHYS_64BIT
 	puts("(36-bit addrmap) ");
 #endif
 
-	printf("Sys ID: 0x%02x, "
-		"Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
-		in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),
-		in_8(pixis_base + PIXIS_PVER));
+	printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
+		in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver));
 
-	sw7 = in_8(pixis_base + PIXIS_SW(7));
-	switch ((sw7 & PIXIS_SW7_LBMAP) >> 6) {
-		case 0:
-		case 1:
-			printf ("vBank: %d\n", ((sw7 & PIXIS_SW7_VBANK) >> 4));
-			break;
-		case 2:
-		case 3:
-			puts ("Promjet\n");
-			break;
-	}
+	sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH));
+	sw = (sw & PIXIS_LBMAP_MASK) >> PIXIS_LBMAP_SHIFT;
+
+	if (sw < 0x8)
+		/* The lower two bits are the actual vbank number */
+		printf("vBank: %d\n", sw & 3);
+	else
+		puts("Promjet\n");
 
 	return 0;
 }
@@ -371,30 +365,22 @@ unsigned long get_board_ddr_clk(ulong dummy)
 	return gd->mem_clk;
 }
 
-unsigned long
-calculate_board_sys_clk(ulong dummy)
+unsigned long calculate_board_sys_clk(ulong dummy)
 {
 	ulong val;
-	u8 *pixis_base = (u8 *)PIXIS_BASE;
 
-	val = ics307_clk_freq(
-	    in_8(pixis_base + PIXIS_VSYSCLK0),
-	    in_8(pixis_base + PIXIS_VSYSCLK1),
-	    in_8(pixis_base + PIXIS_VSYSCLK2));
+	val = ics307_clk_freq(in_8(&pixis->sclk[0]), in_8(&pixis->sclk[1]),
+			      in_8(&pixis->sclk[2]));
 	debug("sysclk val = %lu\n", val);
 	return val;
 }
 
-unsigned long
-calculate_board_ddr_clk(ulong dummy)
+unsigned long calculate_board_ddr_clk(ulong dummy)
 {
 	ulong val;
-	u8 *pixis_base = (u8 *)PIXIS_BASE;
 
-	val = ics307_clk_freq(
-	    in_8(pixis_base + PIXIS_VDDRCLK0),
-	    in_8(pixis_base + PIXIS_VDDRCLK1),
-	    in_8(pixis_base + PIXIS_VDDRCLK2));
+	val = ics307_clk_freq(in_8(&pixis->dclk[0]), in_8(&pixis->dclk[1]),
+			      in_8(&pixis->dclk[2]));
 	debug("ddrclk val = %lu\n", val);
 	return val;
 }
@@ -403,9 +389,8 @@ unsigned long get_board_sys_clk(ulong dummy)
 {
 	u8 i;
 	ulong val = 0;
-	u8 *pixis_base = (u8 *)PIXIS_BASE;
 
-	i = in_8(pixis_base + PIXIS_SPD);
+	i = in_8(&pixis->spd);
 	i &= 0x07;
 
 	switch (i) {
@@ -442,9 +427,8 @@ unsigned long get_board_ddr_clk(ulong dummy)
 {
 	u8 i;
 	ulong val = 0;
-	u8 *pixis_base = (u8 *)PIXIS_BASE;
 
-	i = in_8(pixis_base + PIXIS_SPD);
+	i = in_8(&pixis->spd);
 	i &= 0x38;
 	i >>= 3;
 
diff --git a/board/gaisler/gr_cpci_ax2000/u-boot.lds b/board/gaisler/gr_cpci_ax2000/u-boot.lds
index d5d7842157..22826823cc 100644
--- a/board/gaisler/gr_cpci_ax2000/u-boot.lds
+++ b/board/gaisler/gr_cpci_ax2000/u-boot.lds
@@ -60,7 +60,7 @@ SECTIONS
 		_text = .;
 
 		*(.start)
-		cpu/leon3/start.o (.text)
+		arch/sparc/cpu/leon3/start.o (.text)
 /* 8k is the same as the PROM offset from end of main memory, (CONFIG_SYS_PROM_SIZE) */
 		. = ALIGN(8192);
 /* PROM CODE, Will be relocated to the end of memory,
diff --git a/board/gaisler/gr_ep2s60/u-boot.lds b/board/gaisler/gr_ep2s60/u-boot.lds
index 99aa0addaf..0ca2651703 100644
--- a/board/gaisler/gr_ep2s60/u-boot.lds
+++ b/board/gaisler/gr_ep2s60/u-boot.lds
@@ -60,7 +60,7 @@ SECTIONS
 		_text = .;
 
 		*(.start)
-		cpu/leon3/start.o (.text)
+		arch/sparc/cpu/leon3/start.o (.text)
 /* 8k is the same as the PROM offset from end of main memory, (CONFIG_SYS_PROM_SIZE) */
 		. = ALIGN(8192);
 /* PROM CODE, Will be relocated to the end of memory,
diff --git a/board/gaisler/gr_xc3s_1500/u-boot.lds b/board/gaisler/gr_xc3s_1500/u-boot.lds
index 3b13190cb0..67222ac8e3 100644
--- a/board/gaisler/gr_xc3s_1500/u-boot.lds
+++ b/board/gaisler/gr_xc3s_1500/u-boot.lds
@@ -60,7 +60,7 @@ SECTIONS
 		_text = .;
 
 		*(.start)
-		cpu/leon3/start.o (.text)
+		arch/sparc/cpu/leon3/start.o (.text)
 /* 8k is the same as the PROM offset from end of main memory, (CONFIG_SYS_PROM_SIZE) */
 		. = ALIGN(8192);
 /* PROM CODE, Will be relocated to the end of memory,
diff --git a/board/gaisler/grsim/u-boot.lds b/board/gaisler/grsim/u-boot.lds
index 0fa6627df5..681fd8d01b 100644
--- a/board/gaisler/grsim/u-boot.lds
+++ b/board/gaisler/grsim/u-boot.lds
@@ -59,7 +59,7 @@ SECTIONS
 		_text = .;
 
 		*(.start)
-		cpu/leon3/start.o (.text)
+		arch/sparc/cpu/leon3/start.o (.text)
 /* 8k is the same as the PROM offset from end of main memory, (CONFIG_SYS_PROM_SIZE) */
 		. = ALIGN(8192);
 /* PROM CODE, Will be relocated to the end of memory,
diff --git a/board/gaisler/grsim_leon2/u-boot.lds b/board/gaisler/grsim_leon2/u-boot.lds
index c5311a6c1f..a12e7fb9ce 100644
--- a/board/gaisler/grsim_leon2/u-boot.lds
+++ b/board/gaisler/grsim_leon2/u-boot.lds
@@ -59,7 +59,7 @@ SECTIONS
 		_text = .;
 
 		*(.start)
-		cpu/leon2/start.o (.text)
+		arch/sparc/cpu/leon2/start.o (.text)
 /* 8k is the same as the PROM offset from end of main memory, (CONFIG_SYS_PROM_SIZE) */
 		. = ALIGN(8192);
 /* PROM CODE, Will be relocated to the end of memory,
diff --git a/board/galaxy5200/galaxy5200.c b/board/galaxy5200/galaxy5200.c
index 5aa9d3a6f1..d4a2245b2b 100644
--- a/board/galaxy5200/galaxy5200.c
+++ b/board/galaxy5200/galaxy5200.c
@@ -33,7 +33,7 @@
 #include <common.h>
 #include <mpc5xxx.h>
 #include <pci.h>
-#include <asm-ppc/io.h>
+#include <asm/io.h>
 
 #ifndef CONFIG_SYS_RAMBOOT
 static void sdram_start(int hi_addr)
diff --git a/board/gdsys/intip/init.S b/board/gdsys/intip/init.S
index e205c9d7e8..a8e8b6c1c2 100644
--- a/board/gdsys/intip/init.S
+++ b/board/gdsys/intip/init.S
@@ -27,7 +27,7 @@
 
 #include <ppc_asm.tmpl>
 #include <config.h>
-#include <asm-ppc/mmu.h>
+#include <asm/mmu.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/gen860t/ioport.c b/board/gen860t/ioport.c
index d8c3006a6b..146573e1df 100644
--- a/board/gen860t/ioport.c
+++ b/board/gen860t/ioport.c
@@ -197,7 +197,7 @@ const mpc8xx_iop_conf_t iop_conf_tab[NUM_PORTS][PORT_BITS] = {
 
 /*
  * Configure the MPC8XX I/O ports per the ioport configuration table
- * (taken from ./cpu/mpc8260/cpu_init.c)
+ * (taken from ./arch/ppc/cpu/mpc8260/cpu_init.c)
  */
 void config_mpc8xx_ioports (volatile immap_t * immr)
 {
diff --git a/board/gen860t/u-boot-flashenv.lds b/board/gen860t/u-boot-flashenv.lds
index 7b83b25b65..0e129253e7 100644
--- a/board/gen860t/u-boot-flashenv.lds
+++ b/board/gen860t/u-boot-flashenv.lds
@@ -55,7 +55,7 @@ SECTIONS
   .plt           : { *(.plt)		}
   .text :
   {
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     *(.text)
     *(.got1)
   }
diff --git a/board/gen860t/u-boot.lds b/board/gen860t/u-boot.lds
index 8f40b303bf..d184379dbc 100644
--- a/board/gen860t/u-boot.lds
+++ b/board/gen860t/u-boot.lds
@@ -54,7 +54,7 @@ SECTIONS
   .plt           : { *(.plt)		}
   .text :
   {
-    cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
     *(.text)
     *(.got1)
   }
diff --git a/board/genietv/u-boot.lds b/board/genietv/u-boot.lds
index 716efcdd0b..22ada9ae1d 100644
--- a/board/genietv/u-boot.lds
+++ b/board/genietv/u-boot.lds
@@ -55,12 +55,12 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/genietv/u-boot.lds.debug b/board/genietv/u-boot.lds.debug
index 3568e6de69..e5aa625b5c 100644
--- a/board/genietv/u-boot.lds.debug
+++ b/board/genietv/u-boot.lds.debug
@@ -55,12 +55,12 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/gth/u-boot.lds b/board/gth/u-boot.lds
index f6175d9d57..0e68e14142 100644
--- a/board/gth/u-boot.lds
+++ b/board/gth/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc8xx/start.o(.text)
+    arch/ppc/cpu/mpc8xx/start.o(.text)
     *(.text)
     common/env_embedded.o(.text)
     *(.got1)
diff --git a/board/gth2/gth2.c b/board/gth2/gth2.c
index 59873d5ef6..8c3b55af42 100644
--- a/board/gth2/gth2.c
+++ b/board/gth2/gth2.c
@@ -93,7 +93,7 @@ phys_size_t initdram(int board_type)
 	return (SDRAM_SIZE);
 }
 
-/* In cpu/mips/cpu.c */
+/* In arch/mips/cpu/cpu.c */
 void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 );
 
 void set_ledcard(u32 value){
diff --git a/board/hermes/u-boot.lds b/board/hermes/u-boot.lds
index 7b74cb7d5f..23e3e3bc5e 100644
--- a/board/hermes/u-boot.lds
+++ b/board/hermes/u-boot.lds
@@ -55,13 +55,13 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
     common/dlmalloc.o		(.text)
-    cpu/mpc8xx/interrupts.o	(.text)
-    lib_ppc/time.o		(.text)
-    lib_ppc/ticks.o		(.text)
-    lib_ppc/cache.o		(.text)
-    lib_generic/crc32.o		(.text)
+    arch/ppc/cpu/mpc8xx/interrupts.o	(.text)
+    arch/ppc/lib/time.o		(.text)
+    arch/ppc/lib/ticks.o		(.text)
+    arch/ppc/lib/cache.o		(.text)
+    lib/crc32.o		(.text)
     . = env_offset;
     common/env_embedded.o(.text)
 
diff --git a/board/hermes/u-boot.lds.debug b/board/hermes/u-boot.lds.debug
index 3801206931..47e3927ec6 100644
--- a/board/hermes/u-boot.lds.debug
+++ b/board/hermes/u-boot.lds.debug
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    cpu/mpc8xx/interrupts.o (.text)
-    lib_ppc/time.o		(.text)
-    lib_ppc/ticks.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    arch/ppc/cpu/mpc8xx/interrupts.o (.text)
+    arch/ppc/lib/time.o		(.text)
+    arch/ppc/lib/ticks.o		(.text)
     . = env_offset;
     common/env_embedded.o(.text)
 
diff --git a/board/hmi1001/config.mk b/board/hmi1001/config.mk
index 4fe18316e5..aebf30411e 100644
--- a/board/hmi1001/config.mk
+++ b/board/hmi1001/config.mk
@@ -39,4 +39,4 @@ TEXT_BASE = 0xFFF00000
 endif
 
 PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
-LDSCRIPT := $(SRCTREE)/cpu/mpc5xxx/u-boot-customlayout.lds
+LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc5xxx/u-boot-customlayout.lds
diff --git a/board/hymod/u-boot.lds b/board/hymod/u-boot.lds
index 52d66a2df3..7086ced348 100644
--- a/board/hymod/u-boot.lds
+++ b/board/hymod/u-boot.lds
@@ -55,13 +55,13 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8260/start.o	(.text)
+    arch/ppc/cpu/mpc8260/start.o	(.text)
 /*
     common/dlmalloc.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 
     . = env_offset;
 */
diff --git a/board/hymod/u-boot.lds.debug b/board/hymod/u-boot.lds.debug
index a2d940f048..57cc305868 100644
--- a/board/hymod/u-boot.lds.debug
+++ b/board/hymod/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c
index 75244610cf..47b2195557 100644
--- a/board/icecube/icecube.c
+++ b/board/icecube/icecube.c
@@ -134,7 +134,6 @@ static void sdram_start (int hi_addr)
  *            is something else than 0x00000000.
  */
 
-#if defined(CONFIG_MPC5200)
 phys_size_t initdram (int board_type)
 {
 	ulong dramsize = 0;
@@ -258,65 +257,12 @@ phys_size_t initdram (int board_type)
 	return dramsize + dramsize2;
 }
 
-#elif defined(CONFIG_MGT5100)
-
-phys_size_t initdram (int board_type)
-{
-	ulong dramsize = 0;
-#ifndef CONFIG_SYS_RAMBOOT
-	ulong test1, test2;
-
-	/* setup and enable SDRAM chip selects */
-	*(vu_long *)MPC5XXX_SDRAM_START = 0x00000000;
-	*(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */
-	*(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */
-	__asm__ volatile ("sync");
-
-	/* setup config registers */
-	*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
-	*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
-
-	/* address select register */
-	*(vu_long *)MPC5XXX_SDRAM_XLBSEL = SDRAM_ADDRSEL;
-	__asm__ volatile ("sync");
-
-	/* find RAM size */
-	sdram_start(0);
-	test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
-	sdram_start(1);
-	test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
-	if (test1 > test2) {
-		sdram_start(0);
-		dramsize = test1;
-	} else {
-		dramsize = test2;
-	}
-
-	/* set SDRAM end address according to size */
-	*(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15);
-
-#else /* CONFIG_SYS_RAMBOOT */
-
-	/* Retrieve amount of SDRAM available */
-	dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15);
-
-#endif /* CONFIG_SYS_RAMBOOT */
-
-	return dramsize;
-}
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
-
 int checkboard (void)
 {
 #if defined (CONFIG_LITE5200B)
 	puts ("Board: Freescale Lite5200B\n");
-#elif defined(CONFIG_MPC5200)
+#else
 	puts ("Board: Motorola MPC5200 (IceCube)\n");
-#elif defined(CONFIG_MGT5100)
-	puts ("Board: Motorola MGT5100 (IceCube)\n");
 #endif
 	return 0;
 }
@@ -329,10 +275,6 @@ void flash_preinit(void)
 	 * Note that CS_BOOT cannot be cleared when
 	 * executing in flash.
 	 */
-#if defined(CONFIG_MGT5100)
-	*(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */
-	*(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */
-#endif
 	*(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
 }
 
diff --git a/board/icecube/mt46v16m16-75.h b/board/icecube/mt46v16m16-75.h
index 4c0f9a7406..eb857404f1 100644
--- a/board/icecube/mt46v16m16-75.h
+++ b/board/icecube/mt46v16m16-75.h
@@ -23,7 +23,6 @@
 
 #define SDRAM_DDR	1		/* is DDR */
 
-#if defined(CONFIG_MPC5200)
 /* Settings for XLB = 132 MHz */
 #define SDRAM_MODE	0x018D0000
 #define SDRAM_EMODE	0x40090000
@@ -31,7 +30,3 @@
 #define SDRAM_CONFIG1	0x73722930
 #define SDRAM_CONFIG2	0x47770000
 #define SDRAM_TAPDELAY	0x10000000
-
-#else
-#error CONFIG_MPC5200 not defined
-#endif
diff --git a/board/icecube/mt46v32m16.h b/board/icecube/mt46v32m16.h
index de2b48bc60..519bf6d0f0 100644
--- a/board/icecube/mt46v32m16.h
+++ b/board/icecube/mt46v32m16.h
@@ -23,7 +23,6 @@
 
 #define SDRAM_DDR	1		/* is DDR */
 
-#if defined(CONFIG_MPC5200)
 /* Settings for XLB = 132 MHz */
 #define SDRAM_MODE	0x018D0000
 #define SDRAM_EMODE	0x40090000
@@ -31,7 +30,3 @@
 #define SDRAM_CONFIG1	0x73722930
 #define SDRAM_CONFIG2	0x47770000
 #define SDRAM_TAPDELAY	0x10000000
-
-#else
-#error CONFIG_MPC5200 not defined
-#endif
diff --git a/board/icecube/mt48lc16m16a2-75.h b/board/icecube/mt48lc16m16a2-75.h
index ffdf0396a5..15477259ca 100644
--- a/board/icecube/mt48lc16m16a2-75.h
+++ b/board/icecube/mt48lc16m16a2-75.h
@@ -23,21 +23,8 @@
 
 #define SDRAM_DDR	0		/* is SDR */
 
-#if defined(CONFIG_MPC5200)
 /* Settings for XLB = 132 MHz */
 #define SDRAM_MODE	0x00CD0000
 #define SDRAM_CONTROL	0x504F0000
 #define SDRAM_CONFIG1	0xD2322800
 #define SDRAM_CONFIG2	0x8AD70000
-
-#elif defined(CONFIG_MGT5100)
-/* Settings for XLB = 66 MHz */
-#define SDRAM_MODE	0x008D0000
-#define SDRAM_CONTROL	0x504F0000
-#define SDRAM_CONFIG1	0xC2222600
-#define SDRAM_CONFIG2	0x88B70004
-#define SDRAM_ADDRSEL	0x02000000
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
diff --git a/board/icu862/u-boot.lds b/board/icu862/u-boot.lds
index b43be81b69..d6837005f6 100644
--- a/board/icu862/u-boot.lds
+++ b/board/icu862/u-boot.lds
@@ -55,14 +55,14 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
 /*
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/icu862/u-boot.lds.debug b/board/icu862/u-boot.lds.debug
index 653e0be45c..b331d5afc1 100644
--- a/board/icu862/u-boot.lds.debug
+++ b/board/icu862/u-boot.lds.debug
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    arch/ppc/lib/extable.o	(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/idmr/u-boot.lds b/board/idmr/u-boot.lds
index 00c1f2a52e..ca41232c64 100644
--- a/board/idmr/u-boot.lds
+++ b/board/idmr/u-boot.lds
@@ -56,11 +56,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mcf52x2/start.o		(.text)
-    lib_m68k/traps.o		(.text)
-    cpu/mcf52x2/interrupts.o	(.text)
+    arch/m68k/cpu/mcf52x2/start.o		(.text)
+    arch/m68k/lib/traps.o		(.text)
+    arch/m68k/cpu/mcf52x2/interrupts.o	(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/zlib.o		(.text)
+    lib/zlib.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.ppcenv)
diff --git a/board/inka4x0/config.mk b/board/inka4x0/config.mk
index fc70efeeed..761efa1d17 100644
--- a/board/inka4x0/config.mk
+++ b/board/inka4x0/config.mk
@@ -39,4 +39,4 @@ TEXT_BASE = 0xFFE00000
 endif
 
 PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
-LDSCRIPT := $(SRCTREE)/cpu/mpc5xxx/u-boot-customlayout.lds
+LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc5xxx/u-boot-customlayout.lds
diff --git a/board/ip04/Makefile b/board/ip04/Makefile
new file mode 100644
index 0000000000..e7ce304f13
--- /dev/null
+++ b/board/ip04/Makefile
@@ -0,0 +1,54 @@
+#
+# U-boot - Makefile
+#
+# Copyright (c) 2005-2010 Analog Device Inc.
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS-y	:= $(BOARD).o
+
+SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS-y))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/ip04/config.mk b/board/ip04/config.mk
new file mode 100644
index 0000000000..bc14257489
--- /dev/null
+++ b/board/ip04/config.mk
@@ -0,0 +1,35 @@
+#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+# This is not actually used for Blackfin boards so do not change it
+#TEXT_BASE = do-not-use-me
+
+CFLAGS_lib_generic += -O2
+CFLAGS_lzma += -O2
+
+# Set some default LDR flags based on boot mode.
+LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
+LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6
+LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
diff --git a/board/ip04/ip04.c b/board/ip04/ip04.c
new file mode 100644
index 0000000000..c8ae5128b0
--- /dev/null
+++ b/board/ip04/ip04.c
@@ -0,0 +1,42 @@
+/*
+ * U-boot - main board file
+ *
+ * Copyright (c) 2007 David Rowe,
+ *           (c) 2006 Ivan Danov
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <net.h>
+#include <netdev.h>
+#include <asm/net.h>
+
+int checkboard(void)
+{
+	printf("Board: IP04 IP-PBX\n");
+	printf("       http://www.rowetel.com/ucasterisk/ip04.html\n");
+	return 0;
+}
+
+#ifdef CONFIG_DRIVER_DM9000
+int board_eth_init(bd_t *bis)
+{
+	return dm9000_initialize(bis);
+}
+
+int misc_init_r(void)
+{
+	uchar enetaddr[6];
+	if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
+		puts("Warning: Generating 'random' MAC address\n");
+		bfin_gen_rand_mac(enetaddr);
+		eth_setenv_enetaddr("ethaddr", enetaddr);
+	}
+
+	return 0;
+}
+#endif
diff --git a/board/ip860/u-boot.lds b/board/ip860/u-boot.lds
index a786bf23e1..d856042373 100644
--- a/board/ip860/u-boot.lds
+++ b/board/ip860/u-boot.lds
@@ -55,12 +55,12 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    cpu/mpc8xx/interrupts.o (.text)
-    lib_ppc/time.o		(.text)
-    lib_ppc/ticks.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    arch/ppc/cpu/mpc8xx/interrupts.o (.text)
+    arch/ppc/lib/time.o		(.text)
+    arch/ppc/lib/ticks.o		(.text)
 /**
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/ip860/u-boot.lds.debug b/board/ip860/u-boot.lds.debug
index dc2f6e12f5..dd39b9ac79 100644
--- a/board/ip860/u-boot.lds.debug
+++ b/board/ip860/u-boot.lds.debug
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    cpu/mpc8xx/interrupts.o (.text)
-    lib_ppc/time.o		(.text)
-    lib_ppc/ticks.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    arch/ppc/cpu/mpc8xx/interrupts.o (.text)
+    arch/ppc/lib/time.o		(.text)
+    arch/ppc/lib/ticks.o		(.text)
 /**
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/ivm/u-boot.lds b/board/ivm/u-boot.lds
index 8d7ff70117..767408b52b 100644
--- a/board/ivm/u-boot.lds
+++ b/board/ivm/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/env_embedded.o(.text)
     *(.text)
     *(.got1)
diff --git a/board/ivm/u-boot.lds.debug b/board/ivm/u-boot.lds.debug
index b5206c50fd..5ec82f441d 100644
--- a/board/ivm/u-boot.lds.debug
+++ b/board/ivm/u-boot.lds.debug
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    arch/ppc/lib/extable.o	(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/jse/jse.c b/board/jse/jse.c
index 1849ca47d7..e4c7b9dd94 100644
--- a/board/jse/jse.c
+++ b/board/jse/jse.c
@@ -26,7 +26,7 @@
 
 /*
  * This function is run very early, out of flash, and before devices are
- * initialized. It is called by lib_ppc/board.c:board_init_f by virtue
+ * initialized. It is called by arch/ppc/lib/board.c:board_init_f by virtue
  * of being in the init_sequence array.
  *
  * The SDRAM has been initialized already -- start.S:start called
@@ -85,7 +85,7 @@ int board_pre_init (void)
 #endif
 
 /*
- * This function is also called by lib_ppc/board.c:board_init_f (it is
+ * This function is also called by arch/ppc/lib/board.c:board_init_f (it is
  * also in the init_sequence array) but later. Many more things are
  * configured, but we are still running from flash.
  */
@@ -149,7 +149,7 @@ int checkboard (void)
 /* **** No more functions called by board_init_f. **** */
 
 /*
- * This function is called by lib_ppc/board.c:board_init_r. At this
+ * This function is called by arch/ppc/lib/board.c:board_init_r. At this
  * point, basic setup is done, U-Boot has been moved into SDRAM and
  * PCI has been set up. From here we done late setup.
  */
diff --git a/board/jse/sdram.c b/board/jse/sdram.c
index 88fdd84130..a12ebde236 100644
--- a/board/jse/sdram.c
+++ b/board/jse/sdram.c
@@ -27,7 +27,7 @@
 /*
  * this is even after checkboard. It returns the size of the SDRAM
  * that we have installed. This function is called by board_init_f
- * in lib_ppc/board.c to initialize the memory and return what I
+ * in arch/ppc/lib/board.c to initialize the memory and return what I
  * found.
  */
 phys_size_t initdram (int board_type)
diff --git a/board/jupiter/jupiter.c b/board/jupiter/jupiter.c
index 6e752c6554..967aabdcfa 100644
--- a/board/jupiter/jupiter.c
+++ b/board/jupiter/jupiter.c
@@ -227,10 +227,6 @@ void flash_preinit(void)
 	 * Note that CS_BOOT cannot be cleared when
 	 * executing in flash.
 	 */
-#if defined(CONFIG_MGT5100)
-	*(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */
-	*(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */
-#endif
 	*(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
 }
 
@@ -248,10 +244,8 @@ void flash_afterinit(ulong size)
 		*(vu_long *)MPC5XXX_BOOTCS_STOP = *(vu_long *)MPC5XXX_CS0_STOP =
 			STOP_REG(CONFIG_SYS_BOOTCS_START | size, size);
 	}
-#if defined(CONFIG_MPC5200)
 	*(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */
 	*(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */
-#endif
 }
 
 int update_flash_size (int flash_size)
diff --git a/board/keymile/common/keymile_hdlc_enet.c b/board/keymile/common/keymile_hdlc_enet.c
index 2e913adc55..ceddaf752e 100644
--- a/board/keymile/common/keymile_hdlc_enet.c
+++ b/board/keymile/common/keymile_hdlc_enet.c
@@ -2,7 +2,7 @@
  * (C) Copyright 2008
  * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de.
  *
- * Based in part on cpu/mpc8260/ether_scc.c.
+ * Based in part on arch/ppc/cpu/mpc8260/ether_scc.c.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
diff --git a/board/keymile/km8xx/km8xx_hdlc_enet.c b/board/keymile/km8xx/km8xx_hdlc_enet.c
index 9b93131f0c..543deafb9e 100644
--- a/board/keymile/km8xx/km8xx_hdlc_enet.c
+++ b/board/keymile/km8xx/km8xx_hdlc_enet.c
@@ -2,7 +2,7 @@
  * (C) Copyright 2008
  * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de.
  *
- * Based in part on cpu/mpc8xx/scc.c.
+ * Based in part on arch/ppc/cpu/mpc8xx/scc.c.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
diff --git a/board/keymile/km8xx/u-boot.lds b/board/keymile/km8xx/u-boot.lds
index a8057f225b..19936bd4b1 100644
--- a/board/keymile/km8xx/u-boot.lds
+++ b/board/keymile/km8xx/u-boot.lds
@@ -55,15 +55,15 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o		(.text)
-    cpu/mpc8xx/traps.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/traps.o		(.text)
     common/dlmalloc.o		(.text)
-    lib_ppc/ppcstring.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
-    lib_ppc/cache.o		(.text)
-    lib_ppc/time.o		(.text)
+    arch/ppc/lib/ppcstring.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
+    arch/ppc/lib/cache.o		(.text)
+    arch/ppc/lib/time.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.ppcenv)
diff --git a/board/keymile/mgcoge/mgcoge_hdlc_enet.c b/board/keymile/mgcoge/mgcoge_hdlc_enet.c
index 34f04f5626..6b8e7eaf7e 100644
--- a/board/keymile/mgcoge/mgcoge_hdlc_enet.c
+++ b/board/keymile/mgcoge/mgcoge_hdlc_enet.c
@@ -2,7 +2,7 @@
  * (C) Copyright 2008
  * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de.
  *
- * Based in part on cpu/mpc8260/ether_scc.c.
+ * Based in part on arch/ppc/cpu/mpc8260/ether_scc.c.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
diff --git a/board/korat/init.S b/board/korat/init.S
index ea43a1f898..c725bbbb44 100644
--- a/board/korat/init.S
+++ b/board/korat/init.S
@@ -20,7 +20,7 @@
  */
 
 #include <ppc_asm.tmpl>
-#include <asm-ppc/mmu.h>
+#include <asm/mmu.h>
 #include <config.h>
 
 /**************************************************************************
diff --git a/board/korat/u-boot-F7FC.lds b/board/korat/u-boot-F7FC.lds
index cbad8668e3..e483394539 100644
--- a/board/korat/u-boot-F7FC.lds
+++ b/board/korat/u-boot-F7FC.lds
@@ -33,7 +33,7 @@ SECTIONS
 
   .bootpg 0xF7FBF000 :
   {
-    cpu/ppc4xx/start.o	(.bootpg)
+    arch/ppc/cpu/ppc4xx/start.o	(.bootpg)
   } = 0xffff
 
   /* Read-only sections, merged into text segment: */
@@ -65,7 +65,7 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
 
     *(.text)
     *(.got1)
diff --git a/board/kup/kup4k/u-boot.lds b/board/kup/kup4k/u-boot.lds
index 79b886af21..18cecaf510 100644
--- a/board/kup/kup4k/u-boot.lds
+++ b/board/kup/kup4k/u-boot.lds
@@ -55,14 +55,14 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
 /*
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/kup/kup4k/u-boot.lds.debug b/board/kup/kup4k/u-boot.lds.debug
index 83fdc15011..723f562911 100644
--- a/board/kup/kup4k/u-boot.lds.debug
+++ b/board/kup/kup4k/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/kup/kup4x/u-boot.lds b/board/kup/kup4x/u-boot.lds
index 79b886af21..18cecaf510 100644
--- a/board/kup/kup4x/u-boot.lds
+++ b/board/kup/kup4x/u-boot.lds
@@ -55,14 +55,14 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
 /*
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/kup/kup4x/u-boot.lds.debug b/board/kup/kup4x/u-boot.lds.debug
index 83fdc15011..723f562911 100644
--- a/board/kup/kup4x/u-boot.lds.debug
+++ b/board/kup/kup4x/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/lantec/u-boot.lds b/board/lantec/u-boot.lds
index 854ed68932..160f5cf386 100644
--- a/board/lantec/u-boot.lds
+++ b/board/lantec/u-boot.lds
@@ -55,12 +55,12 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/lantec/u-boot.lds.debug b/board/lantec/u-boot.lds.debug
index 3b4799e1ef..172482f880 100644
--- a/board/lantec/u-boot.lds.debug
+++ b/board/lantec/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/logicpd/imx27lite/imx27lite.c b/board/logicpd/imx27lite/imx27lite.c
index 63375d5da0..442741547b 100644
--- a/board/logicpd/imx27lite/imx27lite.c
+++ b/board/logicpd/imx27lite/imx27lite.c
@@ -29,6 +29,10 @@ DECLARE_GLOBAL_DATA_PTR;
 int board_init (void)
 {
 	struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
+#if defined(CONFIG_SYS_NAND_LARGEPAGE)
+	struct system_control_regs *sc_regs =
+		(struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
+#endif
 
 	gd->bd->bi_arch_number = MACH_TYPE_IMX27LITE;
 	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
@@ -43,9 +47,20 @@ int board_init (void)
 				&regs->port[PORTC].dr);
 #endif
 #ifdef CONFIG_MXC_MMC
+#if defined(CONFIG_MAGNESIUM)
+	mx27_sd1_init_pins();
+#else
 	mx27_sd2_init_pins();
 #endif
+#endif
 
+#if defined(CONFIG_SYS_NAND_LARGEPAGE)
+	/*
+	 * set in FMCR NF_FMS Bit(5) to 1
+	 * (NAND Flash with 2 Kbyte page size)
+	 */
+	writel(readl(&sc_regs->fmcr) | (1 << 5), &sc_regs->fmcr);
+#endif
 	return 0;
 }
 
@@ -68,6 +83,7 @@ int dram_init (void)
 
 int checkboard(void)
 {
-	printf("LogicPD imx27lite\n");
+	puts ("Board: ");
+	puts(CONFIG_BOARDNAME);
 	return 0;
 }
diff --git a/board/logicpd/zoom2/zoom2.c b/board/logicpd/zoom2/zoom2.c
index 387ed2d396..6455d1dc3c 100644
--- a/board/logicpd/zoom2/zoom2.c
+++ b/board/logicpd/zoom2/zoom2.c
@@ -46,7 +46,7 @@
 /*
  * This the the zoom2, board specific, gpmc configuration for the
  * quad uart on the debug board.   The more general gpmc configurations
- * are setup at the cpu level in cpu/arm_cortexa8/omap3/mem.c
+ * are setup at the cpu level in arch/arm/cpu/arm_cortexa8/omap3/mem.c
  *
  * The details of the setting of the serial gpmc setup are not available.
  * The values were provided by another party.
diff --git a/board/logicpd/zoom2/zoom2_serial.c b/board/logicpd/zoom2/zoom2_serial.c
index ba58e39346..cfbad13478 100644
--- a/board/logicpd/zoom2/zoom2_serial.c
+++ b/board/logicpd/zoom2/zoom2_serial.c
@@ -17,7 +17,7 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
  *
- * This file was adapted from cpu/mpc5xxx/serial.c
+ * This file was adapted from arch/ppc/cpu/mpc5xxx/serial.c
  *
  */
 
diff --git a/board/lpc2292sodimm/flash.c b/board/lpc2292sodimm/flash.c
index a7e175d8ed..fd5389fb98 100644
--- a/board/lpc2292sodimm/flash.c
+++ b/board/lpc2292sodimm/flash.c
@@ -1,7 +1,7 @@
 /*
  * (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com>
  *
- * Modified to use the routines in cpu/arm720t/lpc2292/flash.c by
+ * Modified to use the routines in arch/arm/cpu/arm720t/lpc2292/flash.c by
  * Gary Jennejohn <garyj@denx,de>
  *
  * This program is free software; you can redistribute it and/or
diff --git a/board/lwmon/u-boot.lds b/board/lwmon/u-boot.lds
index cc8ad7d3db..ff2f56640b 100644
--- a/board/lwmon/u-boot.lds
+++ b/board/lwmon/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/env_embedded.o(.text)
     *(.text)
     *(.got1)
diff --git a/board/lwmon/u-boot.lds.debug b/board/lwmon/u-boot.lds.debug
index 987c4ddb9b..fcf2cbb96d 100644
--- a/board/lwmon/u-boot.lds.debug
+++ b/board/lwmon/u-boot.lds.debug
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    arch/ppc/lib/extable.o	(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/lwmon5/init.S b/board/lwmon5/init.S
index 718cec6af5..c714fb7ad9 100644
--- a/board/lwmon5/init.S
+++ b/board/lwmon5/init.S
@@ -25,7 +25,7 @@
 
 #include <ppc_asm.tmpl>
 #include <config.h>
-#include <asm-ppc/mmu.h>
+#include <asm/mmu.h>
 
 /**************************************************************************
  * TLB TABLE
diff --git a/board/m501sk/m501sk.h b/board/m501sk/m501sk.h
index 42a67573da..51d10f58a9 100644
--- a/board/m501sk/m501sk.h
+++ b/board/m501sk/m501sk.h
@@ -1,5 +1,5 @@
 /*
- * linux/include/asm-arm/arch-at91/hardware.h
+ * linux/include/asm/arch-at91/hardware.h
  *
  *  Copyright (C) 2003 SAN People
  *
@@ -21,9 +21,9 @@
 #define __M501SK_H
 
 #ifndef __ASSEMBLY__
-#include <asm-arm/arch-at91rm9200/AT91RM9200.h>
+#include <asm/arch-at91rm9200/AT91RM9200.h>
 #else
-#include <asm-arm/arch-at91rm9200/AT91RM9200_inc.h>
+#include <asm/arch-at91rm9200/AT91RM9200_inc.h>
 #endif
 
 #define AT91C_PIO_PA22 ((unsigned int) 1 << 22) /* Pin Controlled by PA22 */
diff --git a/board/matrix_vision/mvsmr/Makefile b/board/matrix_vision/mvsmr/Makefile
new file mode 100644
index 0000000000..b179e6d78f
--- /dev/null
+++ b/board/matrix_vision/mvsmr/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# (C) Copyright 2004-2008
+# Matrix-Vision GmbH, info@matrix-vision.de
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	:= $(BOARD).o fpga.o
+
+SRCS    := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS    := $(addprefix $(obj),$(COBJS))
+SOBJS   := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+	        $(AR) $(ARFLAGS) $@ $(OBJS)
+	@mkimage -T script -C none -n mvSMR_Script -d bootscript bootscript.img
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
diff --git a/board/matrix_vision/mvsmr/bootscript b/board/matrix_vision/mvsmr/bootscript
new file mode 100644
index 0000000000..02c802c8c7
--- /dev/null
+++ b/board/matrix_vision/mvsmr/bootscript
@@ -0,0 +1,42 @@
+echo
+echo "==== running autoscript ===="
+echo
+setenv boot24 'bootm ${kernel_boot} ${mv_initrd_addr_ram}'
+setenv ramkernel 'setenv kernel_boot ${loadaddr}'
+setenv flashkernel 'setenv kernel_boot ${mv_kernel_addr}'
+setenv cpird 'cp ${mv_initrd_addr} ${mv_initrd_addr_ram} ${mv_initrd_length}'
+setenv bootfromflash run flashkernel cpird addcons boot24
+setenv bootfromnet 'tftp ${mv_initrd_addr_ram} ${initrd_name};run ramkernel'
+if test ${console} = yes;
+then
+setenv addcons 'setenv bootargs ${bootargs} console=ttyS${console_nr},${baudrate}N8'
+else
+setenv addcons 'setenv bootargs ${bootargs} console=tty0'
+fi
+setenv set_static_ip 'setenv ipaddr ${static_ipaddr}'
+setenv set_static_nm 'setenv netmask ${static_netmask}'
+setenv set_static_gw 'setenv gatewayip ${static_gateway}'
+setenv set_ip 'setenv ip ${ipaddr}::${gatewayip}:${netmask}'
+if test ${servicemode} != yes;
+then
+  echo "=== forced flash mode ==="
+  run set_static_ip set_static_nm set_static_gw set_ip bootfromflash
+fi
+if test ${autoscript_boot} != no;
+then
+  if test ${netboot} = yes;
+  then
+    bootp
+    if test $? = 0;
+    then
+      echo "=== bootp succeeded -> netboot ==="
+      run set_ip bootfromnet addcons boot24
+    else
+      echo "=== netboot failed ==="
+    fi
+  fi
+  echo "=== bootfromflash ==="
+  run set_static_ip set_static_nm set_static_gw set_ip bootfromflash
+else
+  echo "=== boot stopped with autoscript_boot no ==="
+fi
diff --git a/board/matrix_vision/mvsmr/config.mk b/board/matrix_vision/mvsmr/config.mk
new file mode 100644
index 0000000000..b1da812c49
--- /dev/null
+++ b/board/matrix_vision/mvsmr/config.mk
@@ -0,0 +1,31 @@
+#
+# (C) Copyright 2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
+
+ifndef TEXT_BASE
+TEXT_BASE = 0xFF800000
+endif
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+LDSCRIPT := $(SRCTREE)/board/matrix_vision/mvsmr/u-boot.lds
diff --git a/board/matrix_vision/mvsmr/fpga.c b/board/matrix_vision/mvsmr/fpga.c
new file mode 100644
index 0000000000..6320a6903f
--- /dev/null
+++ b/board/matrix_vision/mvsmr/fpga.c
@@ -0,0 +1,129 @@
+/*
+ * (C) Copyright 2002
+ * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
+ * Keith Outwater, keith_outwater@mvis.com.
+ *
+ * (C) Copyright 2010
+ * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <spartan3.h>
+#include <command.h>
+#include <asm/io.h>
+#include "fpga.h"
+#include "mvsmr.h"
+
+Xilinx_Spartan3_Slave_Serial_fns fpga_fns = {
+	fpga_pre_config_fn,
+	fpga_pgm_fn,
+	fpga_clk_fn,
+	fpga_init_fn,
+	fpga_done_fn,
+	fpga_wr_fn,
+	0
+};
+
+Xilinx_desc spartan3 = {
+	Xilinx_Spartan2,
+	slave_serial,
+	XILINX_XC3S200_SIZE,
+	(void *) &fpga_fns,
+	0,
+};
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int mvsmr_init_fpga(void)
+{
+	fpga_init();
+	fpga_add(fpga_xilinx, &spartan3);
+
+	return 1;
+}
+
+int fpga_init_fn(int cookie)
+{
+	struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
+
+	if (in_be32(&gpio->simple_ival) & FPGA_CONFIG)
+		return 0;
+
+	return 1;
+}
+
+int fpga_done_fn(int cookie)
+{
+	struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
+	int result = 0;
+
+	udelay(10);
+	if (in_be32(&gpio->simple_ival) & FPGA_DONE)
+		result = 1;
+
+	return result;
+}
+
+int fpga_pgm_fn(int assert, int flush, int cookie)
+{
+	struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
+
+	if (!assert)
+		setbits_8(&gpio->sint_dvo, FPGA_STATUS);
+	else
+		clrbits_8(&gpio->sint_dvo, FPGA_STATUS);
+
+	return assert;
+}
+
+int fpga_clk_fn(int assert_clk, int flush, int cookie)
+{
+	struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
+
+	if (assert_clk)
+		setbits_be32(&gpio->simple_dvo, FPGA_CCLK);
+	else
+		clrbits_be32(&gpio->simple_dvo, FPGA_CCLK);
+
+	return assert_clk;
+}
+
+int fpga_wr_fn(int assert_write, int flush, int cookie)
+{
+	struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
+
+	if (assert_write)
+		setbits_be32(&gpio->simple_dvo, FPGA_DIN);
+	else
+		clrbits_be32(&gpio->simple_dvo, FPGA_DIN);
+
+	return assert_write;
+}
+
+int fpga_pre_config_fn(int cookie)
+{
+	struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
+
+	setbits_8(&gpio->sint_dvo, FPGA_STATUS);
+
+	return 0;
+}
diff --git a/lib_m68k/cache.c b/board/matrix_vision/mvsmr/fpga.h
index 84fb6c2fbc..ee690e6816 100644
--- a/lib_m68k/cache.c
+++ b/board/matrix_vision/mvsmr/fpga.h
@@ -1,6 +1,6 @@
 /*
- * (C) Copyright 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ * (C) Copyright 2008
+ * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -19,11 +19,14 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
+ *
  */
 
-#include <common.h>
+extern int mvsmr_init_fpga(void);
 
-void flush_cache (ulong start_addr, ulong size)
-{
-	/* Must be implemented for all M68k processors with copy-back data cache */
-}
+extern int fpga_pgm_fn(int assert_pgm, int flush, int cookie);
+extern int fpga_init_fn(int cookie);
+extern int fpga_clk_fn(int assert_clk, int flush, int cookie);
+extern int fpga_wr_fn(int assert_write, int flush, int cookie);
+extern int fpga_done_fn(int cookie);
+extern int fpga_pre_config_fn(int cookie);
diff --git a/board/matrix_vision/mvsmr/mvsmr.c b/board/matrix_vision/mvsmr/mvsmr.c
new file mode 100644
index 0000000000..69655c4cfe
--- /dev/null
+++ b/board/matrix_vision/mvsmr/mvsmr.c
@@ -0,0 +1,264 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2004
+ * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
+ *
+ * (C) Copyright 2005-2010
+ * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc5xxx.h>
+#include <malloc.h>
+#include <pci.h>
+#include <i2c.h>
+#include <fpga.h>
+#include <environment.h>
+#include <netdev.h>
+#include <asm/io.h>
+#include "fpga.h"
+#include "mvsmr.h"
+#include "../common/mv_common.h"
+
+#define SDRAM_DDR	1
+#define SDRAM_MODE	0x018D0000
+#define SDRAM_EMODE	0x40090000
+#define SDRAM_CONTROL	0x715f0f00
+#define SDRAM_CONFIG1	0xd3722930
+#define SDRAM_CONFIG2	0x46770000
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void sdram_start(int hi_addr)
+{
+	long hi_bit = hi_addr ? 0x01000000 : 0;
+
+	/* unlock mode register */
+	out_be32((u32 *)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000000 |
+		hi_bit);
+
+	/* precharge all banks */
+	out_be32((u32 *)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000002 |
+		hi_bit);
+
+	/* set mode register: extended mode */
+	out_be32((u32 *)MPC5XXX_SDRAM_MODE, SDRAM_EMODE);
+
+	/* set mode register: reset DLL */
+	out_be32((u32 *)MPC5XXX_SDRAM_MODE, SDRAM_MODE | 0x04000000);
+
+	/* precharge all banks */
+	out_be32((u32 *)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000002 |
+		hi_bit);
+
+	/* auto refresh */
+	out_be32((u32 *)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000004 |
+		hi_bit);
+
+	/* set mode register */
+	out_be32((u32 *)MPC5XXX_SDRAM_MODE, SDRAM_MODE);
+
+	/* normal operation */
+	out_be32((u32 *)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | hi_bit);
+}
+
+phys_addr_t initdram(int board_type)
+{
+	ulong dramsize = 0;
+	ulong test1,
+	      test2;
+
+	/* setup SDRAM chip selects */
+	out_be32((u32 *)MPC5XXX_SDRAM_CS0CFG, 0x0000001e);
+
+	/* setup config registers */
+	out_be32((u32 *)MPC5XXX_SDRAM_CONFIG1, SDRAM_CONFIG1);
+	out_be32((u32 *)MPC5XXX_SDRAM_CONFIG2, SDRAM_CONFIG2);
+
+	/* find RAM size using SDRAM CS0 only */
+	sdram_start(0);
+	test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
+	sdram_start(1);
+	test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
+	if (test1 > test2) {
+		sdram_start(0);
+		dramsize = test1;
+	} else
+		dramsize = test2;
+
+	if (dramsize < (1 << 20))
+		dramsize = 0;
+
+	if (dramsize > 0)
+		out_be32((u32 *)MPC5XXX_SDRAM_CS0CFG, 0x13 +
+			__builtin_ffs(dramsize >> 20) - 1);
+	else
+		out_be32((u32 *)MPC5XXX_SDRAM_CS0CFG, 0);
+
+	return dramsize;
+}
+
+void mvsmr_init_gpio(void)
+{
+	struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
+	struct mpc5xxx_wu_gpio *wu_gpio =
+		(struct mpc5xxx_wu_gpio *)MPC5XXX_WU_GPIO;
+	struct mpc5xxx_gpt_0_7 *timers = (struct mpc5xxx_gpt_0_7 *)MPC5XXX_GPT;
+
+	printf("Ports : 0x%08x\n", gpio->port_config);
+	printf("PORCFG: 0x%08x\n", in_be32((unsigned *)MPC5XXX_CDM_PORCFG));
+
+	out_be32(&gpio->simple_ddr, SIMPLE_DDR);
+	out_be32(&gpio->simple_dvo, SIMPLE_DVO);
+	out_be32(&gpio->simple_ode, SIMPLE_ODE);
+	out_be32(&gpio->simple_gpioe, SIMPLE_GPIOEN);
+
+	out_8(&gpio->sint_ode, SINT_ODE);
+	out_8(&gpio->sint_ddr, SINT_DDR);
+	out_8(&gpio->sint_dvo, SINT_DVO);
+	out_8(&gpio->sint_inten, SINT_INTEN);
+	out_be16(&gpio->sint_itype, SINT_ITYPE);
+	out_8(&gpio->sint_gpioe, SINT_GPIOEN);
+
+	out_8(&wu_gpio->ode, WKUP_ODE);
+	out_8(&wu_gpio->ddr, WKUP_DIR);
+	out_8(&wu_gpio->dvo, WKUP_DO);
+	out_8(&wu_gpio->enable, WKUP_EN);
+
+	out_be32(&timers->gpt0.emsr, 0x00000234); /* OD output high */
+	out_be32(&timers->gpt1.emsr, 0x00000234);
+	out_be32(&timers->gpt2.emsr, 0x00000234);
+	out_be32(&timers->gpt3.emsr, 0x00000234);
+	out_be32(&timers->gpt4.emsr, 0x00000234);
+	out_be32(&timers->gpt5.emsr, 0x00000234);
+	out_be32(&timers->gpt6.emsr, 0x00000024); /* push-pull output low */
+	out_be32(&timers->gpt7.emsr, 0x00000024);
+}
+
+int misc_init_r(void)
+{
+	char *s = getenv("reset_env");
+
+	if (s) {
+		printf(" === FACTORY RESET ===\n");
+		mv_reset_environment();
+		saveenv();
+	}
+
+	return -1;
+}
+
+void mvsmr_get_dbg_present(void)
+{
+	struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
+	struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)MPC5XXX_PSC1;
+
+	if (in_be32(&gpio->simple_ival) & COP_PRESENT) {
+		setenv("dbg_present", "no\0");
+		setenv("bootstopkey", "abcdefghijklmnopqrstuvwxyz\0");
+	} else {
+		setenv("dbg_present", "yes\0");
+		setenv("bootstopkey", "s\0");
+		setbits_8(&psc->command, PSC_RX_ENABLE);
+	}
+}
+
+void mvsmr_get_service_mode(void)
+{
+	struct mpc5xxx_wu_gpio *wu_gpio =
+		(struct mpc5xxx_wu_gpio *)MPC5XXX_WU_GPIO;
+
+	if (in_8(&wu_gpio->ival) & SERVICE_MODE)
+		setenv("servicemode", "no\0");
+	else
+		setenv("servicemode", "yes\0");
+}
+
+int mvsmr_get_mac(void)
+{
+	unsigned char mac[6];
+	struct mpc5xxx_wu_gpio *wu_gpio =
+		(struct mpc5xxx_wu_gpio *)MPC5XXX_WU_GPIO;
+
+	if (in_8(&wu_gpio->ival) & LAN_PRSNT) {
+		setenv("lan_present", "no\0");
+		return -1;
+	} else
+		setenv("lan_present", "yes\0");
+
+	i2c_read(0x50, 0, 1, mac, 6);
+
+	eth_setenv_enetaddr("ethaddr", mac);
+
+	return 0;
+}
+
+int checkboard(void)
+{
+	mvsmr_init_gpio();
+	printf("Board: Matrix Vision mvSMR\n");
+
+	return 0;
+}
+
+void flash_preinit(void)
+{
+	/*
+	 * Now, when we are in RAM, enable flash write
+	 * access for detection process.
+	 * Note that CS_BOOT cannot be cleared when
+	 * executing in flash.
+	 */
+	clrbits_be32((u32 *)MPC5XXX_BOOTCS_CFG, 0x1);
+}
+
+void flash_afterinit(ulong size)
+{
+	out_be32((u32 *)MPC5XXX_BOOTCS_START,
+		START_REG(CONFIG_SYS_BOOTCS_START | size));
+	out_be32((u32 *)MPC5XXX_CS0_START,
+		START_REG(CONFIG_SYS_BOOTCS_START | size));
+	out_be32((u32 *)MPC5XXX_BOOTCS_STOP,
+		STOP_REG(CONFIG_SYS_BOOTCS_START | size, size));
+	out_be32((u32 *)MPC5XXX_CS0_STOP,
+		STOP_REG(CONFIG_SYS_BOOTCS_START | size, size));
+}
+
+struct pci_controller hose;
+
+void pci_init_board(void)
+{
+	mvsmr_get_dbg_present();
+	mvsmr_get_service_mode();
+	mvsmr_init_fpga();
+	mv_load_fpga();
+	pci_mpc5xxx_init(&hose);
+}
+
+int board_eth_init(bd_t *bis)
+{
+	if (!mvsmr_get_mac())
+		return cpu_eth_init(bis);
+
+	return pci_eth_init(bis);
+}
diff --git a/board/matrix_vision/mvsmr/mvsmr.h b/board/matrix_vision/mvsmr/mvsmr.h
new file mode 100644
index 0000000000..b8320f1e6e
--- /dev/null
+++ b/board/matrix_vision/mvsmr/mvsmr.h
@@ -0,0 +1,43 @@
+#include <pci.h>
+
+extern void pci_mpc5xxx_init(struct pci_controller *);
+
+#define FPGA_DIN	MPC5XXX_GPIO_SIMPLE_PSC3_0
+#define FPGA_CCLK	MPC5XXX_GPIO_SIMPLE_PSC3_1
+#define FPGA_DONE	MPC5XXX_GPIO_SIMPLE_PSC3_2
+#define FPGA_CONFIG	MPC5XXX_GPIO_SIMPLE_PSC3_3
+#define FPGA_STATUS	MPC5XXX_GPIO_SINT_PSC3_4
+#define S_FPGA_DIN	MPC5XXX_GPIO_SINT_PSC3_5
+#define S_FPGA_CCLK	MPC5XXX_GPIO_SIMPLE_PSC3_6
+#define S_FPGA_DONE	MPC5XXX_GPIO_SIMPLE_PSC3_7
+#define S_FPGA_CONFIG	MPC5XXX_GPIO_SINT_PSC3_8
+#define S_FPGA_STATUS	MPC5XXX_GPIO_WKUP_PSC3_9
+
+#define MAN_RST		MPC5XXX_GPIO_WKUP_PSC6_0
+#define WD_TS		MPC5XXX_GPIO_WKUP_PSC6_1
+#define WD_WDI		MPC5XXX_GPIO_SIMPLE_PSC6_2
+#define COP_PRESENT	MPC5XXX_GPIO_SIMPLE_PSC6_3
+#define SERVICE_MODE	MPC5XXX_GPIO_WKUP_6
+#define FLASH_RBY	MPC5XXX_GPIO_WKUP_7
+#define UART_EN1	MPC5XXX_GPIO_WKUP_PSC1_4
+#define LAN_PRSNT	MPC5XXX_GPIO_WKUP_PSC2_4
+
+#define SIMPLE_DDR	(FPGA_DIN | FPGA_CCLK | FPGA_CONFIG | WD_WDI |\
+			 S_FPGA_CCLK)
+#define SIMPLE_DVO	(FPGA_CONFIG)
+#define SIMPLE_ODE	(FPGA_CONFIG)
+#define SIMPLE_GPIOEN	(FPGA_DIN | FPGA_CCLK | FPGA_DONE | FPGA_CONFIG |\
+			 S_FPGA_CCLK | S_FPGA_DONE | WD_WDI | COP_PRESENT)
+
+#define SINT_ODE	0x1
+#define SINT_DDR	0x3
+#define SINT_DVO	0x1
+#define SINT_INTEN	0
+#define SINT_ITYPE	0
+#define SINT_GPIOEN	(FPGA_STATUS | S_FPGA_DIN | S_FPGA_CONFIG)
+
+#define WKUP_ODE	(MAN_RST | S_FPGA_STATUS)
+#define WKUP_DIR	(MAN_RST | WD_TS | S_FPGA_STATUS)
+#define WKUP_DO		(MAN_RST | WD_TS | S_FPGA_STATUS)
+#define WKUP_EN		(MAN_RST | WD_TS | S_FPGA_STATUS | SERVICE_MODE |\
+			 FLASH_RBY | UART_EN1 | LAN_PRSNT)
diff --git a/board/matrix_vision/mvsmr/u-boot.lds b/board/matrix_vision/mvsmr/u-boot.lds
new file mode 100644
index 0000000000..cfbb6ef398
--- /dev/null
+++ b/board/matrix_vision/mvsmr/u-boot.lds
@@ -0,0 +1,138 @@
+/*
+ * (C) Copyright 2003-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ * (C) Copyright 2010
+ * André Schwarz, Matrix Vision GmbH, as@matrix-vision.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text)	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within  */
+    /* the first two sectors (=8KB) of our S29GL flash chip */
+    cpu/mpc5xxx/start.o          (.text)
+    cpu/mpc5xxx/traps.o          (.text)
+    lib_generic/crc32.o         (.text)
+    lib_ppc/cache.o             (.text)
+    lib_ppc/time.o              (.text)
+
+    /* This is only needed to force failure if size of above code will ever */
+    /* increase and grow into reserved space. */
+    . = ALIGN(0x2000);	/* location counter has to be 0x4000 now */
+    . += 0x4000;	/* ->0x8000, i.e. move to env_offset */
+
+    . = env_offset;	/* ld error as soon as above ALIGN misplaces lc */
+    common/env_embedded.o        (.ppcenv)
+
+    *(.text)
+    *(.got1)
+    . = ALIGN(16);
+    *(.eh_frame)
+    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  . = .;
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  . = .;
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(4096);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(4096);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss (NOLOAD)       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+   . = ALIGN(4);
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
diff --git a/board/mbx8xx/u-boot.lds b/board/mbx8xx/u-boot.lds
index dc3e580fb1..3572f1ad32 100644
--- a/board/mbx8xx/u-boot.lds
+++ b/board/mbx8xx/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
 
     *(.text)
     *(.got1)
diff --git a/board/mbx8xx/u-boot.lds.debug b/board/mbx8xx/u-boot.lds.debug
index 0a3b958fad..61c0d68d78 100644
--- a/board/mbx8xx/u-boot.lds.debug
+++ b/board/mbx8xx/u-boot.lds.debug
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    arch/ppc/lib/extable.o	(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/mcc200/mt46v16m16-75.h b/board/mcc200/mt46v16m16-75.h
index f650faaa10..423febe20a 100644
--- a/board/mcc200/mt46v16m16-75.h
+++ b/board/mcc200/mt46v16m16-75.h
@@ -23,7 +23,6 @@
 
 #define SDRAM_DDR	1		/* is DDR */
 
-#if defined(CONFIG_MPC5200)
 /* Settings for XLB = 132 MHz */
 #define SDRAM_MODE	0x018D0000
 #define SDRAM_EMODE	0x40090000
@@ -31,7 +30,3 @@
 #define SDRAM_CONFIG1	0x73722930
 #define SDRAM_CONFIG2	0x47770000
 #define SDRAM_TAPDELAY	0x10000000
-
-#else
-#error CONFIG_MPC5200 not defined
-#endif
diff --git a/board/mcc200/mt48lc16m16a2-75.h b/board/mcc200/mt48lc16m16a2-75.h
index ffdf0396a5..15477259ca 100644
--- a/board/mcc200/mt48lc16m16a2-75.h
+++ b/board/mcc200/mt48lc16m16a2-75.h
@@ -23,21 +23,8 @@
 
 #define SDRAM_DDR	0		/* is SDR */
 
-#if defined(CONFIG_MPC5200)
 /* Settings for XLB = 132 MHz */
 #define SDRAM_MODE	0x00CD0000
 #define SDRAM_CONTROL	0x504F0000
 #define SDRAM_CONFIG1	0xD2322800
 #define SDRAM_CONFIG2	0x8AD70000
-
-#elif defined(CONFIG_MGT5100)
-/* Settings for XLB = 66 MHz */
-#define SDRAM_MODE	0x008D0000
-#define SDRAM_CONTROL	0x504F0000
-#define SDRAM_CONFIG1	0xC2222600
-#define SDRAM_CONFIG2	0x88B70004
-#define SDRAM_ADDRSEL	0x02000000
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
diff --git a/board/mcc200/mt48lc16m32s2-75.h b/board/mcc200/mt48lc16m32s2-75.h
index ffdf0396a5..15477259ca 100644
--- a/board/mcc200/mt48lc16m32s2-75.h
+++ b/board/mcc200/mt48lc16m32s2-75.h
@@ -23,21 +23,8 @@
 
 #define SDRAM_DDR	0		/* is SDR */
 
-#if defined(CONFIG_MPC5200)
 /* Settings for XLB = 132 MHz */
 #define SDRAM_MODE	0x00CD0000
 #define SDRAM_CONTROL	0x504F0000
 #define SDRAM_CONFIG1	0xD2322800
 #define SDRAM_CONFIG2	0x8AD70000
-
-#elif defined(CONFIG_MGT5100)
-/* Settings for XLB = 66 MHz */
-#define SDRAM_MODE	0x008D0000
-#define SDRAM_CONTROL	0x504F0000
-#define SDRAM_CONFIG1	0xC2222600
-#define SDRAM_CONFIG2	0x88B70004
-#define SDRAM_ADDRSEL	0x02000000
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
diff --git a/board/mimc/mimc200/mimc200.c b/board/mimc/mimc200/mimc200.c
index 0dcacb9f1b..cc0f137121 100644
--- a/board/mimc/mimc200/mimc200.c
+++ b/board/mimc/mimc200/mimc200.c
@@ -31,7 +31,7 @@
 #include <atmel_lcdc.h>
 #include <lcd.h>
 
-#include "../../../cpu/at32ap/hsmc3.h"
+#include "../../../arch/avr32/cpu/hsmc3.h"
 
 #if defined(CONFIG_LCD)
 /* 480x272x16 @ 72 Hz */
diff --git a/board/ml2/u-boot.lds b/board/ml2/u-boot.lds
index 8fea3be41b..e382283ea2 100644
--- a/board/ml2/u-boot.lds
+++ b/board/ml2/u-boot.lds
@@ -55,18 +55,18 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
     board/ml2/init.o	(.text)
-    cpu/ppc4xx/kgdb.o	(.text)
-    cpu/ppc4xx/traps.o	(.text)
-    cpu/ppc4xx/interrupts.o	(.text)
-    cpu/ppc4xx/4xx_uart.o	(.text)
-    cpu/ppc4xx/cpu_init.o	(.text)
-    cpu/ppc4xx/speed.o	(.text)
+    arch/ppc/cpu/ppc4xx/kgdb.o	(.text)
+    arch/ppc/cpu/ppc4xx/traps.o	(.text)
+    arch/ppc/cpu/ppc4xx/interrupts.o	(.text)
+    arch/ppc/cpu/ppc4xx/4xx_uart.o	(.text)
+    arch/ppc/cpu/ppc4xx/cpu_init.o	(.text)
+    arch/ppc/cpu/ppc4xx/speed.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
-    lib_generic/zlib.o		(.text)
+    lib/crc32.o		(.text)
+    arch/ppc/lib/extable.o	(.text)
+    lib/zlib.o		(.text)
 
 /*    . = env_offset;*/
 /*    common/env_embedded.o(.text)*/
diff --git a/board/ml2/u-boot.lds.debug b/board/ml2/u-boot.lds.debug
index 970628d556..09c0191e5f 100644
--- a/board/ml2/u-boot.lds.debug
+++ b/board/ml2/u-boot.lds.debug
@@ -57,9 +57,9 @@ SECTIONS
 
     mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    arch/ppc/lib/extable.o	(.text)
 
     common/env_embedded.o(.text)
 
diff --git a/board/mousse/u-boot.lds b/board/mousse/u-boot.lds
index 5100542e73..ed5492d45e 100644
--- a/board/mousse/u-boot.lds
+++ b/board/mousse/u-boot.lds
@@ -52,12 +52,12 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc824x/start.o		(.text)
-    lib_ppc/board.o		(.text)
-    lib_ppc/ppcstring.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    arch/ppc/cpu/mpc824x/start.o		(.text)
+    arch/ppc/lib/board.o		(.text)
+    arch/ppc/lib/ppcstring.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 
     *(.got1)
     . = ALIGN(16);
diff --git a/board/mousse/u-boot.lds.ram b/board/mousse/u-boot.lds.ram
index d048e52d35..d3169489b5 100644
--- a/board/mousse/u-boot.lds.ram
+++ b/board/mousse/u-boot.lds.ram
@@ -37,7 +37,7 @@ SECTIONS
   PROVIDE(_f_init_rom = .);
 
   .init : {
-      cpu/mpc824x/start.o	(.text)
+      arch/ppc/cpu/mpc824x/start.o	(.text)
       *(.init)
   } > ram
   _init_size = SIZEOF(.init);
diff --git a/board/mousse/u-boot.lds.rom b/board/mousse/u-boot.lds.rom
index f79c39f716..2721fdc6f8 100644
--- a/board/mousse/u-boot.lds.rom
+++ b/board/mousse/u-boot.lds.rom
@@ -52,12 +52,12 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc824x/start.o	(.text)
+    arch/ppc/cpu/mpc824x/start.o	(.text)
 	 common/board.o (.text)
-    lib_ppc/ppcstring.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 
 		. = env_offset;
     common/env_embedded.o (.text)
diff --git a/board/mpl/pip405/u-boot.lds.debug b/board/mpl/pip405/u-boot.lds.debug
index 970628d556..09c0191e5f 100644
--- a/board/mpl/pip405/u-boot.lds.debug
+++ b/board/mpl/pip405/u-boot.lds.debug
@@ -57,9 +57,9 @@ SECTIONS
 
     mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    arch/ppc/lib/extable.o	(.text)
 
     common/env_embedded.o(.text)
 
diff --git a/board/mucmc52/config.mk b/board/mucmc52/config.mk
index 90d9ce2c9c..4e9ee73e6a 100644
--- a/board/mucmc52/config.mk
+++ b/board/mucmc52/config.mk
@@ -42,4 +42,4 @@ TEXT_BASE = 0xFFF00000
 endif
 
 PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
-LDSCRIPT := $(SRCTREE)/cpu/mpc5xxx/u-boot.lds
+LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc5xxx/u-boot.lds
diff --git a/board/munices/mt48lc16m16a2-75.h b/board/munices/mt48lc16m16a2-75.h
index ffdf0396a5..15477259ca 100644
--- a/board/munices/mt48lc16m16a2-75.h
+++ b/board/munices/mt48lc16m16a2-75.h
@@ -23,21 +23,8 @@
 
 #define SDRAM_DDR	0		/* is SDR */
 
-#if defined(CONFIG_MPC5200)
 /* Settings for XLB = 132 MHz */
 #define SDRAM_MODE	0x00CD0000
 #define SDRAM_CONTROL	0x504F0000
 #define SDRAM_CONFIG1	0xD2322800
 #define SDRAM_CONFIG2	0x8AD70000
-
-#elif defined(CONFIG_MGT5100)
-/* Settings for XLB = 66 MHz */
-#define SDRAM_MODE	0x008D0000
-#define SDRAM_CONTROL	0x504F0000
-#define SDRAM_CONFIG1	0xC2222600
-#define SDRAM_CONFIG2	0x88B70004
-#define SDRAM_ADDRSEL	0x02000000
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
diff --git a/board/munices/u-boot.lds b/board/munices/u-boot.lds
index 8db7f26a52..2cd6d3c1ad 100644
--- a/board/munices/u-boot.lds
+++ b/board/munices/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc5xxx/start.o	(.text)
+    arch/ppc/cpu/mpc5xxx/start.o	(.text)
     *(.text)
     *(.got1)
     . = ALIGN(16);
diff --git a/board/nc650/u-boot.lds b/board/nc650/u-boot.lds
index 21fed6262c..90ca165c44 100644
--- a/board/nc650/u-boot.lds
+++ b/board/nc650/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     *(.text)
     *(.got1)
   }
diff --git a/board/nc650/u-boot.lds.debug b/board/nc650/u-boot.lds.debug
index 5f8dc9d2c6..1405b1730b 100644
--- a/board/nc650/u-boot.lds.debug
+++ b/board/nc650/u-boot.lds.debug
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     *(.text)
     *(.got1)
   }
diff --git a/board/netphone/u-boot.lds b/board/netphone/u-boot.lds
index d64274b683..d6e2404f9a 100644
--- a/board/netphone/u-boot.lds
+++ b/board/netphone/u-boot.lds
@@ -52,15 +52,15 @@ SECTIONS
   .plt		: { *(.plt)		}
   .text	:
   {
-    cpu/mpc8xx/start.o		(.text)
-    cpu/mpc8xx/traps.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/traps.o		(.text)
     common/dlmalloc.o		(.text)
-    lib_ppc/ppcstring.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
-    lib_ppc/cache.o		(.text)
-    lib_ppc/time.o		(.text)
+    arch/ppc/lib/ppcstring.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
+    arch/ppc/lib/cache.o		(.text)
+    arch/ppc/lib/time.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.text)
diff --git a/board/netphone/u-boot.lds.debug b/board/netphone/u-boot.lds.debug
index 4ef16f1ffe..ec479b1533 100644
--- a/board/netphone/u-boot.lds.debug
+++ b/board/netphone/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/netstal/hcu4/hcu4.c b/board/netstal/hcu4/hcu4.c
index 8efbc23c89..1c99405bea 100644
--- a/board/netstal/hcu4/hcu4.c
+++ b/board/netstal/hcu4/hcu4.c
@@ -22,7 +22,7 @@
 #include  <ppc4xx.h>
 #include  <asm/processor.h>
 #include  <asm/io.h>
-#include  <asm-ppc/u-boot.h>
+#include  <asm/u-boot.h>
 #include  "../common/nm.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -34,7 +34,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * This function is run very early, out of flash, and before devices are
- * initialized. It is called by lib_ppc/board.c:board_init_f by virtue
+ * initialized. It is called by arch/ppc/lib/board.c:board_init_f by virtue
  * of being in the init_sequence array.
  *
  * The SDRAM has been initialized already -- start.S:start called
diff --git a/board/netstal/hcu5/README.txt b/board/netstal/hcu5/README.txt
index f64987637a..0be51925c1 100644
--- a/board/netstal/hcu5/README.txt
+++ b/board/netstal/hcu5/README.txt
@@ -83,11 +83,11 @@ System-LEDs ??? (Analog zu HCU4 ???)
 Startup sequence
 ----------------
 
-(cpu/ppc4xx/resetvec.S)
+(arch/ppc/cpu/ppc4xx/resetvec.S)
 depending on configs option
 call _start_440 _start_pci oder _start
 
-(cpu/ppc4xx/start.S)
+(arch/ppc/cpu/ppc4xx/start.S)
 
 _start_440:
 	initialize register like
@@ -109,7 +109,7 @@ _start:
 	call cpu_init_f	/* run low-level CPU init code	   (from Flash) */
 
     call cpu_init_f
-    board_init_f: (lib_ppc\board.c)
+    board_init_f: (arch/ppc/lib\board.c)
 	init_sequence defines a list of function to be called
 	    board_early_init_f: (board/netstal/hcu5/hcu5.c)
 		We are using Bootstrap-Option A
@@ -136,18 +136,18 @@ _start:
 	 *  - board info struct
 	Save local variables to board info struct
 	call relocate_code() does not return
-	relocate_code: (cpu/ppc4xx/start.S)
+	relocate_code: (arch/ppc/cpu/ppc4xx/start.S)
 -------------------------------------------------------
 From now on our copy is in RAM and we will run from there,
 	starting with board_init_r
 -------------------------------------------------------
-    board_init_r: (lib_ppc\board.c)
+    board_init_r: (arch/ppc/lib\board.c)
 	setup bd function pointers
 	trap_init
 	flash_init: (board/netstal/hcu5/flash.c)
 		/* setup for u-boot erase, update */
 	setup bd flash info
-	cpu_init_r: (cpu/ppc4xx/cpu_init.c)
+	cpu_init_r: (arch/ppc/cpu/ppc4xx/cpu_init.c)
 	    peripheral chip select in using defines like
 	    CONFIG_SYS_EBC_PB0A, CONFIG_SYS_EBC_PB0C from hcu5.h
 	mem_malloc_init
@@ -161,8 +161,8 @@ From now on our copy is in RAM and we will run from there,
 Most of the HW specific code for the HCU5 may be found in
 include/configs/hcu5.h
 board/netstal/hcu5/*
-cpu/ppc4xx/*
-lib_ppc/*
+arch/ppc/cpu/ppc4xx/*
+arch/ppc/lib/*
 include/ppc440.h
 
 Drivers for serial etc are found under drivers/
diff --git a/board/netstal/hcu5/hcu5.c b/board/netstal/hcu5/hcu5.c
index c545cc01ea..90433fe82d 100644
--- a/board/netstal/hcu5/hcu5.c
+++ b/board/netstal/hcu5/hcu5.c
@@ -49,7 +49,7 @@ extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
 
 /*
  * This function is run very early, out of flash, and before devices are
- * initialized. It is called by lib_ppc/board.c:board_init_f by virtue
+ * initialized. It is called by arch/ppc/lib/board.c:board_init_f by virtue
  * of being in the init_sequence array.
  *
  * The SDRAM has been initialized already -- start.S:start called
diff --git a/board/netstal/mcu25/mcu25.c b/board/netstal/mcu25/mcu25.c
index c66ab97ac5..87bc45edb4 100644
--- a/board/netstal/mcu25/mcu25.c
+++ b/board/netstal/mcu25/mcu25.c
@@ -22,7 +22,7 @@
 #include  <ppc4xx.h>
 #include  <asm/processor.h>
 #include  <asm/io.h>
-#include  <asm-ppc/u-boot.h>
+#include  <asm/u-boot.h>
 #include  "../common/nm.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -39,7 +39,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * This function is run very early, out of flash, and before devices are
- * initialized. It is called by lib_ppc/board.c:board_init_f by virtue
+ * initialized. It is called by arch/ppc/lib/board.c:board_init_f by virtue
  * of being in the init_sequence array.
  *
  * The SDRAM has been initialized already -- start.S:start called
diff --git a/board/netstar/Makefile b/board/netstar/Makefile
index c435762964..5773c13f4d 100644
--- a/board/netstar/Makefile
+++ b/board/netstar/Makefile
@@ -72,7 +72,7 @@ $(obj)crcit:		$(obj)crcit.o $(obj)crc32.o
 $(obj)crcit.o:		crcit.c
 	$(HOSTCC) $(HOSTCFLAGS) -o $@ -c $<
 
-$(obj)crc32.o:		$(SRCTREE)/lib_generic/crc32.c
+$(obj)crc32.o:		$(SRCTREE)/lib/crc32.c
 	$(HOSTCC) $(HOSTCFLAGS) -DUSE_HOSTCC -I$(TOPDIR)/include \
 		-o $@ -c $<
 
diff --git a/board/netta/u-boot.lds b/board/netta/u-boot.lds
index 860c887c25..c4df378c97 100644
--- a/board/netta/u-boot.lds
+++ b/board/netta/u-boot.lds
@@ -52,15 +52,15 @@ SECTIONS
   .plt		: { *(.plt)		}
   .text	:
   {
-    cpu/mpc8xx/start.o		(.text)
-    cpu/mpc8xx/traps.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/traps.o		(.text)
     common/dlmalloc.o		(.text)
-    lib_ppc/ppcstring.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
-    lib_ppc/cache.o		(.text)
-    lib_ppc/time.o		(.text)
+    arch/ppc/lib/ppcstring.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
+    arch/ppc/lib/cache.o		(.text)
+    arch/ppc/lib/time.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.text)
diff --git a/board/netta/u-boot.lds.debug b/board/netta/u-boot.lds.debug
index 4ef16f1ffe..ec479b1533 100644
--- a/board/netta/u-boot.lds.debug
+++ b/board/netta/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/netta2/u-boot.lds b/board/netta2/u-boot.lds
index 860c887c25..c4df378c97 100644
--- a/board/netta2/u-boot.lds
+++ b/board/netta2/u-boot.lds
@@ -52,15 +52,15 @@ SECTIONS
   .plt		: { *(.plt)		}
   .text	:
   {
-    cpu/mpc8xx/start.o		(.text)
-    cpu/mpc8xx/traps.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/traps.o		(.text)
     common/dlmalloc.o		(.text)
-    lib_ppc/ppcstring.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
-    lib_ppc/cache.o		(.text)
-    lib_ppc/time.o		(.text)
+    arch/ppc/lib/ppcstring.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
+    arch/ppc/lib/cache.o		(.text)
+    arch/ppc/lib/time.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.text)
diff --git a/board/netta2/u-boot.lds.debug b/board/netta2/u-boot.lds.debug
index 4ef16f1ffe..ec479b1533 100644
--- a/board/netta2/u-boot.lds.debug
+++ b/board/netta2/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/netvia/u-boot.lds b/board/netvia/u-boot.lds
index a7d290ae88..6683361ea4 100644
--- a/board/netvia/u-boot.lds
+++ b/board/netvia/u-boot.lds
@@ -52,15 +52,15 @@ SECTIONS
   .plt		: { *(.plt)		}
   .text	:
   {
-    cpu/mpc8xx/start.o		(.text)
-    cpu/mpc8xx/traps.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/traps.o		(.text)
     common/dlmalloc.o		(.text)
-    lib_ppc/ppcstring.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
-    lib_ppc/cache.o		(.text)
-    lib_ppc/time.o		(.text)
+    arch/ppc/lib/ppcstring.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
+    arch/ppc/lib/cache.o		(.text)
+    arch/ppc/lib/time.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.text)
diff --git a/board/netvia/u-boot.lds.debug b/board/netvia/u-boot.lds.debug
index c3c99b35c2..cef1a428bd 100644
--- a/board/netvia/u-boot.lds.debug
+++ b/board/netvia/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/nx823/u-boot.lds b/board/nx823/u-boot.lds
index 5c847fbf84..dc370eacf2 100644
--- a/board/nx823/u-boot.lds
+++ b/board/nx823/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/env_embedded.o(.text)
 
     *(.text)
diff --git a/board/nx823/u-boot.lds.debug b/board/nx823/u-boot.lds.debug
index ad36953915..e62f6be5aa 100644
--- a/board/nx823/u-boot.lds.debug
+++ b/board/nx823/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/pb1x00/pb1x00.c b/board/pb1x00/pb1x00.c
index 773e446c0c..2510ddfd69 100644
--- a/board/pb1x00/pb1x00.c
+++ b/board/pb1x00/pb1x00.c
@@ -37,7 +37,7 @@ phys_size_t initdram(int board_type)
 #define BCSR_PCMCIA_PC0DRVEN		0x0010
 #define BCSR_PCMCIA_PC0RST		0x0080
 
-/* In cpu/mips/cpu.c */
+/* In arch/mips/cpu/cpu.c */
 void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 );
 
 int checkboard (void)
diff --git a/board/pcippc2/u-boot.lds b/board/pcippc2/u-boot.lds
index d11bb056fb..b2be328124 100644
--- a/board/pcippc2/u-boot.lds
+++ b/board/pcippc2/u-boot.lds
@@ -59,7 +59,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/74xx_7xx/start.o	(.text)
+    arch/ppc/cpu/74xx_7xx/start.o	(.text)
 
 /* store the environment in a seperate sector in the boot flash */
 /*    . = env_offset; */
diff --git a/board/pcs440ep/pcs440ep.c b/board/pcs440ep/pcs440ep.c
index ce1e616679..bed385c44b 100644
--- a/board/pcs440ep/pcs440ep.c
+++ b/board/pcs440ep/pcs440ep.c
@@ -148,7 +148,7 @@ int board_early_init_f(void)
 	mtdcr(EBC0_CFGDATA, reg | 0x04000000);	/* Set ATC */
 
 	/*--------------------------------------------------------------------
-	 * GPIO's are alreay setup in cpu/ppc4xx/cpu_init.c
+	 * GPIO's are alreay setup in arch/ppc/cpu/ppc4xx/cpu_init.c
 	 * via define from board config file.
 	 *-------------------------------------------------------------------*/
 
diff --git a/board/phytec/pcm030/pcm030.c b/board/phytec/pcm030/pcm030.c
index 416d3070b5..77ce3899ef 100644
--- a/board/phytec/pcm030/pcm030.c
+++ b/board/phytec/pcm030/pcm030.c
@@ -30,7 +30,7 @@
 #include <common.h>
 #include <mpc5xxx.h>
 #include <pci.h>
-#include <asm-ppc/io.h>
+#include <asm/io.h>
 
 #include "mt46v32m16-75.h"
 
diff --git a/board/pleb2/pleb2.c b/board/pleb2/pleb2.c
index dc6fac46d3..97c37eaa39 100644
--- a/board/pleb2/pleb2.c
+++ b/board/pleb2/pleb2.c
@@ -26,7 +26,7 @@
  */
 
 #include <common.h>
-#include <asm-arm/mach-types.h>
+#include <asm/mach-types.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/pm520/mt46v16m16-75.h b/board/pm520/mt46v16m16-75.h
index f650faaa10..423febe20a 100644
--- a/board/pm520/mt46v16m16-75.h
+++ b/board/pm520/mt46v16m16-75.h
@@ -23,7 +23,6 @@
 
 #define SDRAM_DDR	1		/* is DDR */
 
-#if defined(CONFIG_MPC5200)
 /* Settings for XLB = 132 MHz */
 #define SDRAM_MODE	0x018D0000
 #define SDRAM_EMODE	0x40090000
@@ -31,7 +30,3 @@
 #define SDRAM_CONFIG1	0x73722930
 #define SDRAM_CONFIG2	0x47770000
 #define SDRAM_TAPDELAY	0x10000000
-
-#else
-#error CONFIG_MPC5200 not defined
-#endif
diff --git a/board/pm520/mt48lc16m16a2-75.h b/board/pm520/mt48lc16m16a2-75.h
index ffdf0396a5..15477259ca 100644
--- a/board/pm520/mt48lc16m16a2-75.h
+++ b/board/pm520/mt48lc16m16a2-75.h
@@ -23,21 +23,8 @@
 
 #define SDRAM_DDR	0		/* is SDR */
 
-#if defined(CONFIG_MPC5200)
 /* Settings for XLB = 132 MHz */
 #define SDRAM_MODE	0x00CD0000
 #define SDRAM_CONTROL	0x504F0000
 #define SDRAM_CONFIG1	0xD2322800
 #define SDRAM_CONFIG2	0x8AD70000
-
-#elif defined(CONFIG_MGT5100)
-/* Settings for XLB = 66 MHz */
-#define SDRAM_MODE	0x008D0000
-#define SDRAM_CONTROL	0x504F0000
-#define SDRAM_CONFIG1	0xC2222600
-#define SDRAM_CONFIG2	0x88B70004
-#define SDRAM_ADDRSEL	0x02000000
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
diff --git a/board/pm520/pm520.c b/board/pm520/pm520.c
index 9da1041733..d6914343fa 100644
--- a/board/pm520/pm520.c
+++ b/board/pm520/pm520.c
@@ -84,7 +84,6 @@ static void sdram_start (int hi_addr)
  *            is something else than 0x00000000.
  */
 
-#if defined(CONFIG_MPC5200)
 phys_size_t initdram (int board_type)
 {
 	ulong dramsize = 0;
@@ -186,64 +185,9 @@ phys_size_t initdram (int board_type)
 	return dramsize + dramsize2;
 }
 
-#elif defined(CONFIG_MGT5100)
-
-phys_size_t initdram (int board_type)
-{
-	ulong dramsize = 0;
-#ifndef CONFIG_SYS_RAMBOOT
-	ulong test1, test2;
-
-	/* setup and enable SDRAM chip selects */
-	*(vu_long *)MPC5XXX_SDRAM_START = 0x00000000;
-	*(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */
-	*(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */
-	__asm__ volatile ("sync");
-
-	/* setup config registers */
-	*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
-	*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
-
-	/* address select register */
-	*(vu_long *)MPC5XXX_SDRAM_XLBSEL = SDRAM_ADDRSEL;
-	__asm__ volatile ("sync");
-
-	/* find RAM size */
-	sdram_start(0);
-	test1 = get_ram_size((ulong *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
-	sdram_start(1);
-	test2 = get_ram_size((ulong *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
-	if (test1 > test2) {
-		sdram_start(0);
-		dramsize = test1;
-	} else {
-		dramsize = test2;
-	}
-
-	/* set SDRAM end address according to size */
-	*(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15);
-
-#else /* CONFIG_SYS_RAMBOOT */
-
-	/* Retrieve amount of SDRAM available */
-	dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15);
-
-#endif /* CONFIG_SYS_RAMBOOT */
-
-	return dramsize;
-}
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
-
 int checkboard (void)
 {
-#if defined(CONFIG_MPC5200)
 	puts ("Board: MicroSys PM520 \n");
-#elif defined(CONFIG_MGT5100)
-	puts ("Board: MicroSys PM510 \n");
-#endif
 	return 0;
 }
 
@@ -255,10 +199,6 @@ void flash_preinit(void)
 	 * Note that CS_BOOT cannot be cleared when
 	 * executing in flash.
 	 */
-#if defined(CONFIG_MGT5100)
-	*(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */
-	*(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */
-#endif
 	*(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
 }
 
diff --git a/board/ppmc7xx/u-boot.lds b/board/ppmc7xx/u-boot.lds
index 30e8972afa..aae1057160 100644
--- a/board/ppmc7xx/u-boot.lds
+++ b/board/ppmc7xx/u-boot.lds
@@ -56,7 +56,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/74xx_7xx/start.o	(.text)
+    arch/ppc/cpu/74xx_7xx/start.o	(.text)
 
 /* store the environment in a seperate sector in the boot flash */
 /*    . = env_offset; */
diff --git a/board/prodrive/alpr/fpga.c b/board/prodrive/alpr/fpga.c
index 7571cd950c..f3bc1fa7a1 100644
--- a/board/prodrive/alpr/fpga.c
+++ b/board/prodrive/alpr/fpga.c
@@ -30,7 +30,7 @@
 #include <altera.h>
 #include <ACEX1K.h>
 #include <command.h>
-#include <asm-ppc/processor.h>
+#include <asm/processor.h>
 #include <ppc440.h>
 #include "fpga.h"
 
diff --git a/board/prodrive/p3mx/u-boot.lds b/board/prodrive/p3mx/u-boot.lds
index d021331148..6dff003dc1 100644
--- a/board/prodrive/p3mx/u-boot.lds
+++ b/board/prodrive/p3mx/u-boot.lds
@@ -56,7 +56,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/74xx_7xx/start.o	(.text)
+    arch/ppc/cpu/74xx_7xx/start.o	(.text)
 
 /* store the environment in a seperate sector in the boot flash */
 /*    . = env_offset; */
diff --git a/board/psyent/common/AMDLV065D.c b/board/psyent/common/AMDLV065D.c
index 0fcf354cdc..72b0a9f807 100644
--- a/board/psyent/common/AMDLV065D.c
+++ b/board/psyent/common/AMDLV065D.c
@@ -122,12 +122,12 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
 	for (sect = s_first; sect <= s_last; sect++) {
 		if (info->protect[sect] == 0) {	/* not protected */
 			addr2 = (unsigned char *) info->start[sect];
-			writeb (addr, 0xaa);
-			writeb (addr,  0x55);
-			writeb (addr,  0x80);
-			writeb (addr,  0xaa);
-			writeb (addr,  0x55);
-			writeb (addr2, 0x30);
+			writeb (0xaa, addr);
+			writeb (0x55, addr);
+			writeb (0x80, addr);
+			writeb (0xaa, addr);
+			writeb (0x55, addr);
+			writeb (0x30, addr2);
 			/* Now just wait for 0xff & provide some user
 			 * feedback while we wait.
 			 */
@@ -169,9 +169,9 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 			return (2);
 		}
 
-		writeb (cmd,  0xaa);
-		writeb (cmd,  0x55);
-		writeb (cmd,  0xa0);
+		writeb (0xaa, cmd);
+		writeb (0x55, cmd);
+		writeb (0xa0, cmd);
 		writeb (dst, b);
 
 		/* Verify write */
diff --git a/board/psyent/pci5441/u-boot.lds b/board/psyent/pci5441/u-boot.lds
index b2d88a5586..f155800a64 100644
--- a/board/psyent/pci5441/u-boot.lds
+++ b/board/psyent/pci5441/u-boot.lds
@@ -30,7 +30,7 @@ SECTIONS
 {
 	.text :
 	{
-	  cpu/nios2/start.o (.text)
+	  arch/nios/cpu2/start.o (.text)
 	  *(.text)
 	  *(.text.*)
 	  *(.gnu.linkonce.t*)
diff --git a/board/psyent/pk1c20/led.c b/board/psyent/pk1c20/led.c
index e5e7705761..d0197358f4 100644
--- a/board/psyent/pk1c20/led.c
+++ b/board/psyent/pk1c20/led.c
@@ -39,7 +39,7 @@ void __led_init (led_id_t mask, int state)
 		val &= ~mask;
 	else
 		val |= mask;
-	writel (&pio->data, val);
+	writel (val, &pio->data);
 }
 
 void __led_set (led_id_t mask, int state)
@@ -50,7 +50,7 @@ void __led_set (led_id_t mask, int state)
 		val &= ~mask;
 	else
 		val |= mask;
-	writel (&pio->data, val);
+	writel (val, &pio->data);
 }
 
 void __led_toggle (led_id_t mask)
@@ -58,5 +58,5 @@ void __led_toggle (led_id_t mask)
 	nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LEDPIO_ADDR;
 
 	val ^= mask;
-	writel (&pio->data, val);
+	writel (val, &pio->data);
 }
diff --git a/board/psyent/pk1c20/u-boot.lds b/board/psyent/pk1c20/u-boot.lds
index b2d88a5586..f155800a64 100644
--- a/board/psyent/pk1c20/u-boot.lds
+++ b/board/psyent/pk1c20/u-boot.lds
@@ -30,7 +30,7 @@ SECTIONS
 {
 	.text :
 	{
-	  cpu/nios2/start.o (.text)
+	  arch/nios/cpu2/start.o (.text)
 	  *(.text)
 	  *(.text.*)
 	  *(.gnu.linkonce.t*)
diff --git a/board/purple/u-boot.lds b/board/purple/u-boot.lds
index 04a641a473..1881e651c0 100644
--- a/board/purple/u-boot.lds
+++ b/board/purple/u-boot.lds
@@ -34,13 +34,13 @@ SECTIONS
 	. = ALIGN(4);
 	.text       :
 	{
-	  cpu/mips/start.o		(.text)
+	  arch/mips/cpu/start.o		(.text)
 	  board/purple/lowlevel_init.o	(.text)
-	  cpu/mips/cache.o		(.text)
+	  arch/mips/cpu/cache.o		(.text)
 	  common/main.o			(.text)
 	  common/dlmalloc.o		(.text)
 	  common/cmd_boot.o		(.text)
-	  lib_generic/zlib.o		(.text)
+	  lib/zlib.o		(.text)
 	  . = DEFINED(env_offset) ? env_offset : .;
 	  common/env_embedded.o	(.ppcenv)
 
diff --git a/board/quantum/u-boot.lds b/board/quantum/u-boot.lds
index 47247ec813..f7de95dc87 100644
--- a/board/quantum/u-boot.lds
+++ b/board/quantum/u-boot.lds
@@ -55,12 +55,12 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 /* XXX ?
     . = env_offset;
 */
diff --git a/board/quantum/u-boot.lds.debug b/board/quantum/u-boot.lds.debug
index ec01fe256b..a2b7bc70d9 100644
--- a/board/quantum/u-boot.lds.debug
+++ b/board/quantum/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/r360mpi/u-boot.lds b/board/r360mpi/u-boot.lds
index 9089f7d6b6..4fc18fcf2d 100644
--- a/board/r360mpi/u-boot.lds
+++ b/board/r360mpi/u-boot.lds
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o		(.text)
-    cpu/mpc8xx/cpu_init.o	(.text)
-    cpu/mpc8xx/interrupts.o	(.text)
-    cpu/mpc8xx/traps.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/cpu_init.o	(.text)
+    arch/ppc/cpu/mpc8xx/interrupts.o	(.text)
+    arch/ppc/cpu/mpc8xx/traps.o		(.text)
 /***
     . = env_offset;
     common/env_embedded.o	(.text)
diff --git a/board/rbc823/u-boot.lds b/board/rbc823/u-boot.lds
index e0ea600d28..2161501fff 100644
--- a/board/rbc823/u-boot.lds
+++ b/board/rbc823/u-boot.lds
@@ -55,12 +55,12 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/rmu/u-boot.lds b/board/rmu/u-boot.lds
index 47247ec813..f7de95dc87 100644
--- a/board/rmu/u-boot.lds
+++ b/board/rmu/u-boot.lds
@@ -55,12 +55,12 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 /* XXX ?
     . = env_offset;
 */
diff --git a/board/rmu/u-boot.lds.debug b/board/rmu/u-boot.lds.debug
index ec01fe256b..a2b7bc70d9 100644
--- a/board/rmu/u-boot.lds.debug
+++ b/board/rmu/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/ronetix/pm9261/led.c b/board/ronetix/pm9261/led.c
index 396c3e7340..ff21ce667b 100644
--- a/board/ronetix/pm9261/led.c
+++ b/board/ronetix/pm9261/led.c
@@ -26,19 +26,21 @@
 #include <common.h>
 #include <asm/arch/at91sam9261.h>
 #include <asm/arch/at91_pmc.h>
-#include <asm/arch/gpio.h>
+#include <asm/arch/at91_pio.h>
 #include <asm/arch/io.h>
 
 void coloured_LED_init(void)
 {
+	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+
 	/* Enable clock */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC);
+	writel(1 << AT91SAM9261_ID_PIOC, &pmc->pcer);
 
-	at91_set_gpio_output(CONFIG_RED_LED, 1);
-	at91_set_gpio_output(CONFIG_GREEN_LED, 1);
-	at91_set_gpio_output(CONFIG_YELLOW_LED, 1);
+	at91_set_pio_output(CONFIG_RED_LED, 1);
+	at91_set_pio_output(CONFIG_GREEN_LED, 1);
+	at91_set_pio_output(CONFIG_YELLOW_LED, 1);
 
-	at91_set_gpio_value(CONFIG_RED_LED, 0);
-	at91_set_gpio_value(CONFIG_GREEN_LED, 1);
-	at91_set_gpio_value(CONFIG_YELLOW_LED, 1);
+	at91_set_pio_value(CONFIG_RED_LED, 0);
+	at91_set_pio_value(CONFIG_GREEN_LED, 1);
+	at91_set_pio_value(CONFIG_YELLOW_LED, 1);
 }
diff --git a/board/ronetix/pm9261/pm9261.c b/board/ronetix/pm9261/pm9261.c
index 8662339581..53d8c48281 100644
--- a/board/ronetix/pm9261/pm9261.c
+++ b/board/ronetix/pm9261/pm9261.c
@@ -27,13 +27,14 @@
 #include <common.h>
 #include <asm/sizes.h>
 #include <asm/arch/at91sam9261.h>
-#include <asm/arch/at91sam9261_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
+#include <asm/arch/at91_matrix.h>
+#include <asm/arch/at91_pio.h>
 #include <asm/arch/clk.h>
-#include <asm/arch/gpio.h>
+#include <asm/arch/at91_pio.h>
 #include <asm/arch/io.h>
 #include <asm/arch/hardware.h>
 #include <lcd.h>
@@ -55,39 +56,48 @@ DECLARE_GLOBAL_DATA_PTR;
 static void pm9261_nand_hw_init(void)
 {
 	unsigned long csa;
+	at91_smc_t 	*smc 	= (at91_smc_t *) AT91_SMC_BASE;
+	at91_matrix_t 	*matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
 
 	/* Enable CS3 */
-	csa = at91_sys_read(AT91_MATRIX_EBICSA);
-	at91_sys_write(AT91_MATRIX_EBICSA,
-		       csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+	csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A;
+	writel(csa, &matrix->csa);
 
 	/* Configure SMC CS3 for NAND/SmartMedia */
-	at91_sys_write(AT91_SMC_SETUP(3),
-		       AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
-		       AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
-	at91_sys_write(AT91_SMC_PULSE(3),
-		       AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
-		       AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
-	at91_sys_write(AT91_SMC_CYCLE(3),
-		       AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
-	at91_sys_write(AT91_SMC_MODE(3),
-		       AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
-		       AT91_SMC_EXNWMODE_DISABLE |
+	writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
+		AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
+		&smc->cs[3].setup);
+
+	writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
+		AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
+		&smc->cs[3].pulse);
+
+	writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+		&smc->cs[3].cycle);
+
+	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+		AT91_SMC_MODE_EXNW_DISABLE |
 #ifdef CONFIG_SYS_NAND_DBW_16
-		       AT91_SMC_DBW_16 |
+		AT91_SMC_MODE_DBW_16 |
 #else /* CONFIG_SYS_NAND_DBW_8 */
-		       AT91_SMC_DBW_8 |
+		AT91_SMC_MODE_DBW_8 |
 #endif
-		       AT91_SMC_TDF_(2));
+		AT91_SMC_MODE_TDF_CYCLE(2),
+		&smc->cs[3].mode);
+
+	writel(1 << AT91SAM9261_ID_PIOA |
+		1 << AT91SAM9261_ID_PIOC,
+		&pmc->pcer);
 
 	/* Configure RDY/BSY */
-	at91_set_gpio_input(AT91_PIN_PA16, 1);
+	at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 
 	/* Enable NandFlash */
-	at91_set_gpio_output(AT91_PIN_PC14, 1);
+	at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
 
-	at91_set_A_periph(AT91_PIN_PC0, 0);	/* NANDOE */
-	at91_set_A_periph(AT91_PIN_PC1, 0);	/* NANDWE */
+	at91_set_a_periph(AT91_PIO_PORTC, 0, 0);	/* NANDOE */
+	at91_set_a_periph(AT91_PIO_PORTC, 1, 0);	/* NANDWE */
 }
 #endif
 
@@ -95,23 +105,30 @@ static void pm9261_nand_hw_init(void)
 #ifdef CONFIG_DRIVER_DM9000
 static void pm9261_dm9000_hw_init(void)
 {
+	at91_smc_t 	*smc 	= (at91_smc_t *) AT91_SMC_BASE;
+	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+
 	/* Configure SMC CS2 for DM9000 */
-	at91_sys_write(AT91_SMC_SETUP(2),
-		       AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) |
-		       AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
-	at91_sys_write(AT91_SMC_PULSE(2),
-		       AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) |
-		       AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8));
-	at91_sys_write(AT91_SMC_CYCLE(2),
-		       AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
-	at91_sys_write(AT91_SMC_MODE(2),
-		       AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
-		       AT91_SMC_EXNWMODE_DISABLE |
-		       AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 |
-		       AT91_SMC_TDF_(1));
+	writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
+		AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
+		&smc->cs[2].setup);
+
+	writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(8) |
+		AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(8),
+		&smc->cs[2].pulse);
+
+	writel(AT91_SMC_CYCLE_NWE(16) | AT91_SMC_CYCLE_NRD(16),
+		&smc->cs[2].cycle);
+
+	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+		AT91_SMC_MODE_EXNW_DISABLE |
+		AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 |
+		AT91_SMC_MODE_TDF_CYCLE(1),
+		&smc->cs[2].mode);
 
 	/* Configure Interrupt pin as input, no pull-up */
-	at91_set_gpio_input(AT91_PIN_PA24, 0);
+	writel(1 << AT91SAM9261_ID_PIOA, &pmc->pcer);
+	at91_set_pio_input(AT91_PIO_PORTA, 24, 0);
 }
 #endif
 
@@ -135,40 +152,42 @@ vidinfo_t panel_info = {
 
 void lcd_enable(void)
 {
-	at91_set_gpio_value(AT91_PIN_PA22, 0);  /* power up */
+	at91_set_pio_value(AT91_PIO_PORTA, 22, 0);  /* power up */
 }
 
 void lcd_disable(void)
 {
-	at91_set_gpio_value(AT91_PIN_PA22, 1);  /* power down */
+	at91_set_pio_value(AT91_PIO_PORTA, 22, 1);  /* power down */
 }
 
 static void pm9261_lcd_hw_init(void)
 {
-	at91_set_A_periph(AT91_PIN_PB1, 0);	/* LCDHSYNC */
-	at91_set_A_periph(AT91_PIN_PB2, 0);	/* LCDDOTCK */
-	at91_set_A_periph(AT91_PIN_PB3, 0);	/* LCDDEN */
-	at91_set_A_periph(AT91_PIN_PB4, 0);	/* LCDCC */
-	at91_set_A_periph(AT91_PIN_PB7, 0);	/* LCDD2 */
-	at91_set_A_periph(AT91_PIN_PB8, 0);	/* LCDD3 */
-	at91_set_A_periph(AT91_PIN_PB9, 0);	/* LCDD4 */
-	at91_set_A_periph(AT91_PIN_PB10, 0);	/* LCDD5 */
-	at91_set_A_periph(AT91_PIN_PB11, 0);	/* LCDD6 */
-	at91_set_A_periph(AT91_PIN_PB12, 0);	/* LCDD7 */
-	at91_set_A_periph(AT91_PIN_PB15, 0);	/* LCDD10 */
-	at91_set_A_periph(AT91_PIN_PB16, 0);	/* LCDD11 */
-	at91_set_A_periph(AT91_PIN_PB17, 0);	/* LCDD12 */
-	at91_set_A_periph(AT91_PIN_PB18, 0);	/* LCDD13 */
-	at91_set_A_periph(AT91_PIN_PB19, 0);	/* LCDD14 */
-	at91_set_A_periph(AT91_PIN_PB20, 0);	/* LCDD15 */
-	at91_set_B_periph(AT91_PIN_PB23, 0);	/* LCDD18 */
-	at91_set_B_periph(AT91_PIN_PB24, 0);	/* LCDD19 */
-	at91_set_B_periph(AT91_PIN_PB25, 0);	/* LCDD20 */
-	at91_set_B_periph(AT91_PIN_PB26, 0);	/* LCDD21 */
-	at91_set_B_periph(AT91_PIN_PB27, 0);	/* LCDD22 */
-	at91_set_B_periph(AT91_PIN_PB28, 0);	/* LCDD23 */
-
-	at91_sys_write(AT91_PMC_SCER, AT91_PMC_HCK1);
+	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+
+	at91_set_a_periph(AT91_PIO_PORTB, 1, 0);	/* LCDHSYNC */
+	at91_set_a_periph(AT91_PIO_PORTB, 2, 0);	/* LCDDOTCK */
+	at91_set_a_periph(AT91_PIO_PORTB, 3, 0);	/* LCDDEN */
+	at91_set_a_periph(AT91_PIO_PORTB, 4, 0);	/* LCDCC */
+	at91_set_a_periph(AT91_PIO_PORTB, 7, 0);	/* LCDD2 */
+	at91_set_a_periph(AT91_PIO_PORTB, 8, 0);	/* LCDD3 */
+	at91_set_a_periph(AT91_PIO_PORTB, 9, 0);	/* LCDD4 */
+	at91_set_a_periph(AT91_PIO_PORTB, 10, 0);	/* LCDD5 */
+	at91_set_a_periph(AT91_PIO_PORTB, 11, 0);	/* LCDD6 */
+	at91_set_a_periph(AT91_PIO_PORTB, 12, 0);	/* LCDD7 */
+	at91_set_a_periph(AT91_PIO_PORTB, 15, 0);	/* LCDD10 */
+	at91_set_a_periph(AT91_PIO_PORTB, 16, 0);	/* LCDD11 */
+	at91_set_a_periph(AT91_PIO_PORTB, 17, 0);	/* LCDD12 */
+	at91_set_a_periph(AT91_PIO_PORTB, 18, 0);	/* LCDD13 */
+	at91_set_a_periph(AT91_PIO_PORTB, 19, 0);	/* LCDD14 */
+	at91_set_a_periph(AT91_PIO_PORTB, 20, 0);	/* LCDD15 */
+	at91_set_b_periph(AT91_PIO_PORTB, 23, 0);	/* LCDD18 */
+	at91_set_b_periph(AT91_PIO_PORTB, 24, 0);	/* LCDD19 */
+	at91_set_b_periph(AT91_PIO_PORTB, 25, 0);	/* LCDD20 */
+	at91_set_b_periph(AT91_PIO_PORTB, 26, 0);	/* LCDD21 */
+	at91_set_b_periph(AT91_PIO_PORTB, 27, 0);	/* LCDD22 */
+	at91_set_b_periph(AT91_PIO_PORTB, 28, 0);	/* LCDD23 */
+
+	writel(1 << 17, &pmc->scer); /* LCD controller Clock, AT91SAM9261 only */
 
 	gd->fb_base = AT91SAM9261_SRAM_BASE;
 }
@@ -222,11 +241,14 @@ void lcd_show_board_info(void)
 
 int board_init(void)
 {
+	at91_pmc_t	*pmc	= (at91_pmc_t *) AT91_PMC_BASE;
+
 	/* Enable Ctrlc */
 	console_init_f();
 
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOA);
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC);
+	writel(1 << AT91SAM9261_ID_PIOA |
+		1 << AT91SAM9261_ID_PIOC,
+		&pmc->pcer);
 
 	/* arch number of PM9261-Board */
 	gd->bd->bi_arch_number = MACH_TYPE_PM9261;
diff --git a/board/rsdproto/u-boot.lds b/board/rsdproto/u-boot.lds
index 0d4a9efb79..0c51d48127 100644
--- a/board/rsdproto/u-boot.lds
+++ b/board/rsdproto/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc8260/start.o	(.text)
+    arch/ppc/cpu/mpc8260/start.o	(.text)
     *(.text)
     *(.got1)
     /*. = env_offset; */
diff --git a/board/samsung/smdk6400/u-boot-nand.lds b/board/samsung/smdk6400/u-boot-nand.lds
index a074420c15..29a4f61e36 100644
--- a/board/samsung/smdk6400/u-boot-nand.lds
+++ b/board/samsung/smdk6400/u-boot-nand.lds
@@ -34,8 +34,8 @@ SECTIONS
 	. = ALIGN(4);
 	.text      :
 	{
-	  cpu/arm1176/start.o	(.text)
-	  cpu/arm1176/s3c64xx/cpu_init.o	(.text)
+	  arch/arm/cpu/arm1176/start.o	(.text)
+	  arch/arm/cpu/arm1176/s3c64xx/cpu_init.o	(.text)
 	  *(.text)
 	}
 
diff --git a/board/sandburst/common/ppc440gx_i2c.c b/board/sandburst/common/ppc440gx_i2c.c
index 35c4e60b5a..007f875f0f 100644
--- a/board/sandburst/common/ppc440gx_i2c.c
+++ b/board/sandburst/common/ppc440gx_i2c.c
@@ -21,7 +21,7 @@
  */
 
 /*
- * Ported from cpu/ppc4xx/i2c.c by AS HARNOIS by
+ * Ported from arch/ppc/cpu/ppc4xx/i2c.c by AS HARNOIS by
  * Travis B. Sawyer
  * Sandburst Corporation.
  */
@@ -31,7 +31,7 @@
 #include <i2c.h>
 #include <command.h>
 #include "ppc440gx_i2c.h"
-#include <asm-ppc/io.h>
+#include <asm/io.h>
 
 #ifdef CONFIG_I2C_BUS1
 
diff --git a/board/sandburst/karef/u-boot.lds.debug b/board/sandburst/karef/u-boot.lds.debug
index 48fd579162..c174398537 100644
--- a/board/sandburst/karef/u-boot.lds.debug
+++ b/board/sandburst/karef/u-boot.lds.debug
@@ -56,19 +56,19 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
     board/sandburst/karef/init.o (.text)
-    cpu/ppc4xx/kgdb.o	(.text)
-    cpu/ppc4xx/traps.o	(.text)
-    cpu/ppc4xx/interrupts.o	(.text)
-    cpu/ppc4xx/4xx_uart.o	(.text)
-    cpu/ppc4xx/cpu_init.o	(.text)
-    cpu/ppc4xx/speed.o	(.text)
+    arch/ppc/cpu/ppc4xx/kgdb.o	(.text)
+    arch/ppc/cpu/ppc4xx/traps.o	(.text)
+    arch/ppc/cpu/ppc4xx/interrupts.o	(.text)
+    arch/ppc/cpu/ppc4xx/4xx_uart.o	(.text)
+    arch/ppc/cpu/ppc4xx/cpu_init.o	(.text)
+    arch/ppc/cpu/ppc4xx/speed.o	(.text)
     drivers/net/4xx_enet.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
-    lib_generic/zlib.o		(.text)
+    lib/crc32.o		(.text)
+    arch/ppc/lib/extable.o	(.text)
+    lib/zlib.o		(.text)
 
 /*    common/env_embedded.o(.text) */
 
diff --git a/board/sandburst/metrobox/u-boot.lds.debug b/board/sandburst/metrobox/u-boot.lds.debug
index 4bc5ceac02..845841607c 100644
--- a/board/sandburst/metrobox/u-boot.lds.debug
+++ b/board/sandburst/metrobox/u-boot.lds.debug
@@ -56,19 +56,19 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
     board/sandburst/metrobox/init.o (.text)
-    cpu/ppc4xx/kgdb.o	(.text)
-    cpu/ppc4xx/traps.o	(.text)
-    cpu/ppc4xx/interrupts.o	(.text)
-    cpu/ppc4xx/4xx_uart.o	(.text)
-    cpu/ppc4xx/cpu_init.o	(.text)
-    cpu/ppc4xx/speed.o	(.text)
+    arch/ppc/cpu/ppc4xx/kgdb.o	(.text)
+    arch/ppc/cpu/ppc4xx/traps.o	(.text)
+    arch/ppc/cpu/ppc4xx/interrupts.o	(.text)
+    arch/ppc/cpu/ppc4xx/4xx_uart.o	(.text)
+    arch/ppc/cpu/ppc4xx/cpu_init.o	(.text)
+    arch/ppc/cpu/ppc4xx/speed.o	(.text)
     drivers/net/4xx_enet.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
-    lib_generic/zlib.o		(.text)
+    lib/crc32.o		(.text)
+    arch/ppc/lib/extable.o	(.text)
+    lib/zlib.o		(.text)
 
 /*    common/env_embedded.o(.text) */
 
diff --git a/board/sbc8641d/u-boot.lds b/board/sbc8641d/u-boot.lds
index b71a7d6e58..2f8730bf2b 100644
--- a/board/sbc8641d/u-boot.lds
+++ b/board/sbc8641d/u-boot.lds
@@ -50,16 +50,16 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc86xx/start.o	(.text)
-    cpu/mpc86xx/traps.o (.text)
-    cpu/mpc86xx/interrupts.o (.text)
-    cpu/mpc86xx/cpu_init.o (.text)
-    cpu/mpc86xx/cpu.o (.text)
-    cpu/mpc86xx/speed.o (.text)
+    arch/ppc/cpu/mpc86xx/start.o	(.text)
+    arch/ppc/cpu/mpc86xx/traps.o (.text)
+    arch/ppc/cpu/mpc86xx/interrupts.o (.text)
+    arch/ppc/cpu/mpc86xx/cpu_init.o (.text)
+    arch/ppc/cpu/mpc86xx/cpu.o (.text)
+    arch/ppc/cpu/mpc86xx/speed.o (.text)
     common/dlmalloc.o (.text)
-    lib_generic/crc32.o (.text)
-    lib_ppc/extable.o (.text)
-    lib_generic/zlib.o (.text)
+    lib/crc32.o (.text)
+    arch/ppc/lib/extable.o (.text)
+    lib/zlib.o (.text)
     *(.text)
     *(.got1)
    }
diff --git a/board/sc3/u-boot.lds b/board/sc3/u-boot.lds
index 16dc384015..573fbee937 100644
--- a/board/sc3/u-boot.lds
+++ b/board/sc3/u-boot.lds
@@ -60,18 +60,18 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
     board/sc3/init.o	(.text)
-    cpu/ppc4xx/kgdb.o	(.text)
-    cpu/ppc4xx/traps.o	(.text)
-    cpu/ppc4xx/interrupts.o	(.text)
-    cpu/ppc4xx/4xx_uart.o	(.text)
-    cpu/ppc4xx/cpu_init.o	(.text)
-    cpu/ppc4xx/speed.o	(.text)
+    arch/ppc/cpu/ppc4xx/kgdb.o	(.text)
+    arch/ppc/cpu/ppc4xx/traps.o	(.text)
+    arch/ppc/cpu/ppc4xx/interrupts.o	(.text)
+    arch/ppc/cpu/ppc4xx/4xx_uart.o	(.text)
+    arch/ppc/cpu/ppc4xx/cpu_init.o	(.text)
+    arch/ppc/cpu/ppc4xx/speed.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
-    lib_generic/zlib.o		(.text)
+    lib/crc32.o		(.text)
+    arch/ppc/lib/extable.o	(.text)
+    lib/zlib.o		(.text)
 
 /*    . = env_offset;*/
 /*    common/env_embedded.o(.text)*/
diff --git a/board/siemens/CCM/u-boot.lds b/board/siemens/CCM/u-boot.lds
index 2d0efb3161..5bd5a75c61 100644
--- a/board/siemens/CCM/u-boot.lds
+++ b/board/siemens/CCM/u-boot.lds
@@ -55,12 +55,12 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/siemens/CCM/u-boot.lds.debug b/board/siemens/CCM/u-boot.lds.debug
index 29657e93ef..460a983215 100644
--- a/board/siemens/CCM/u-boot.lds.debug
+++ b/board/siemens/CCM/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 /*
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/siemens/IAD210/u-boot.lds b/board/siemens/IAD210/u-boot.lds
index 104b44ccff..904d45fccc 100644
--- a/board/siemens/IAD210/u-boot.lds
+++ b/board/siemens/IAD210/u-boot.lds
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    cpu/mpc8xx/interrupts.o (.text)
-    lib_ppc/time.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    arch/ppc/cpu/mpc8xx/interrupts.o (.text)
+    arch/ppc/lib/time.o		(.text)
     . = env_offset;
     common/env_embedded.o(.text)
 
diff --git a/board/siemens/SMN42/flash.c b/board/siemens/SMN42/flash.c
index 8cf17b8576..fc91574f85 100644
--- a/board/siemens/SMN42/flash.c
+++ b/board/siemens/SMN42/flash.c
@@ -2,7 +2,7 @@
  * (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com>
  *
  * (C) Copyright 2007 Gary Jennejohn garyj@denx.de
- * Modified to use the routines in cpu/arm720t/lpc2292/flash.c.
+ * Modified to use the routines in arch/arm/cpu/arm720t/lpc2292/flash.c.
  * Heavily modified to support the SMN42 board from Siemens
  *
  * This program is free software; you can redistribute it and/or
diff --git a/board/siemens/pcu_e/u-boot.lds b/board/siemens/pcu_e/u-boot.lds
index cc8ad7d3db..ff2f56640b 100644
--- a/board/siemens/pcu_e/u-boot.lds
+++ b/board/siemens/pcu_e/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/env_embedded.o(.text)
     *(.text)
     *(.got1)
diff --git a/board/siemens/pcu_e/u-boot.lds.debug b/board/siemens/pcu_e/u-boot.lds.debug
index 987c4ddb9b..fcf2cbb96d 100644
--- a/board/siemens/pcu_e/u-boot.lds.debug
+++ b/board/siemens/pcu_e/u-boot.lds.debug
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    arch/ppc/lib/extable.o	(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/sixnet/u-boot.lds b/board/sixnet/u-boot.lds
index dd632a44ce..c3e7f501cb 100644
--- a/board/sixnet/u-boot.lds
+++ b/board/sixnet/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/env_embedded.o(.text)
     *(.text)
     *(.got1)
diff --git a/board/snmc/qs850/u-boot.lds b/board/snmc/qs850/u-boot.lds
index 9ef2c201a2..f2154c429b 100644
--- a/board/snmc/qs850/u-boot.lds
+++ b/board/snmc/qs850/u-boot.lds
@@ -55,15 +55,15 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-	cpu/mpc8xx/start.o		(.text)
-	cpu/mpc8xx/traps.o		(.text)
+	arch/ppc/cpu/mpc8xx/start.o		(.text)
+	arch/ppc/cpu/mpc8xx/traps.o		(.text)
 	common/dlmalloc.o		(.text)
-	lib_ppc/ppcstring.o		(.text)
-	lib_generic/vsprintf.o	(.text)
-	lib_generic/crc32.o		(.text)
-	lib_generic/zlib.o		(.text)
-	lib_ppc/cache.o		(.text)
-	lib_ppc/time.o		(.text)
+	arch/ppc/lib/ppcstring.o		(.text)
+	lib/vsprintf.o	(.text)
+	lib/crc32.o		(.text)
+	lib/zlib.o		(.text)
+	arch/ppc/lib/cache.o		(.text)
+	arch/ppc/lib/time.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
 	common/env_embedded.o	(.ppcenv)
diff --git a/board/snmc/qs860t/u-boot.lds b/board/snmc/qs860t/u-boot.lds
index 9ef2c201a2..f2154c429b 100644
--- a/board/snmc/qs860t/u-boot.lds
+++ b/board/snmc/qs860t/u-boot.lds
@@ -55,15 +55,15 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-	cpu/mpc8xx/start.o		(.text)
-	cpu/mpc8xx/traps.o		(.text)
+	arch/ppc/cpu/mpc8xx/start.o		(.text)
+	arch/ppc/cpu/mpc8xx/traps.o		(.text)
 	common/dlmalloc.o		(.text)
-	lib_ppc/ppcstring.o		(.text)
-	lib_generic/vsprintf.o	(.text)
-	lib_generic/crc32.o		(.text)
-	lib_generic/zlib.o		(.text)
-	lib_ppc/cache.o		(.text)
-	lib_ppc/time.o		(.text)
+	arch/ppc/lib/ppcstring.o		(.text)
+	lib/vsprintf.o	(.text)
+	lib/crc32.o		(.text)
+	lib/zlib.o		(.text)
+	arch/ppc/lib/cache.o		(.text)
+	arch/ppc/lib/time.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
 	common/env_embedded.o	(.ppcenv)
diff --git a/board/spc1920/u-boot.lds b/board/spc1920/u-boot.lds
index d6711b5bf2..c000746c54 100644
--- a/board/spc1920/u-boot.lds
+++ b/board/spc1920/u-boot.lds
@@ -55,15 +55,15 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o		(.text)
-    cpu/mpc8xx/traps.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/traps.o		(.text)
     common/dlmalloc.o		(.text)
-    lib_ppc/ppcstring.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
-    lib_ppc/cache.o		(.text)
-    lib_ppc/time.o		(.text)
+    arch/ppc/lib/ppcstring.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
+    arch/ppc/lib/cache.o		(.text)
+    arch/ppc/lib/time.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.ppcenv)
diff --git a/board/spd8xx/u-boot.lds b/board/spd8xx/u-boot.lds
index 7b9455b252..c4d83574d6 100644
--- a/board/spd8xx/u-boot.lds
+++ b/board/spd8xx/u-boot.lds
@@ -52,7 +52,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/env_embedded.o(.text)
     *(.text)
     *(.got1)
diff --git a/board/spd8xx/u-boot.lds.debug b/board/spd8xx/u-boot.lds.debug
index 0a3b958fad..61c0d68d78 100644
--- a/board/spd8xx/u-boot.lds.debug
+++ b/board/spd8xx/u-boot.lds.debug
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    arch/ppc/lib/extable.o	(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/ssv/adnpesc1/u-boot.lds b/board/ssv/adnpesc1/u-boot.lds
index 98ee8f8323..50c3fe75a0 100644
--- a/board/ssv/adnpesc1/u-boot.lds
+++ b/board/ssv/adnpesc1/u-boot.lds
@@ -30,7 +30,7 @@ SECTIONS
 {
 	.text :
 	{
-	  cpu/nios/start.o (.text)
+	  arch/nios/cpu/start.o (.text)
 	  *(.text)
 	}
 	__text_end = .;
diff --git a/board/stx/stxssa/stxssa.c b/board/stx/stxssa/stxssa.c
index 73dddf3e0c..678ec5850f 100644
--- a/board/stx/stxssa/stxssa.c
+++ b/board/stx/stxssa/stxssa.c
@@ -259,7 +259,7 @@ board_early_init_f(void)
 #endif
 
 	/* Why is the phy reset done _after_ the ethernet
-	 * initialization in lib_ppc/board.c?
+	 * initialization in arch/ppc/lib/board.c?
 	 * Do it here so it's done before the TSECs are used.
 	 */
 	reset_phy();
diff --git a/board/stx/stxxtc/u-boot.lds b/board/stx/stxxtc/u-boot.lds
index 860c887c25..c4df378c97 100644
--- a/board/stx/stxxtc/u-boot.lds
+++ b/board/stx/stxxtc/u-boot.lds
@@ -52,15 +52,15 @@ SECTIONS
   .plt		: { *(.plt)		}
   .text	:
   {
-    cpu/mpc8xx/start.o		(.text)
-    cpu/mpc8xx/traps.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/traps.o		(.text)
     common/dlmalloc.o		(.text)
-    lib_ppc/ppcstring.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
-    lib_ppc/cache.o		(.text)
-    lib_ppc/time.o		(.text)
+    arch/ppc/lib/ppcstring.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
+    arch/ppc/lib/cache.o		(.text)
+    arch/ppc/lib/time.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.text)
diff --git a/board/stx/stxxtc/u-boot.lds.debug b/board/stx/stxxtc/u-boot.lds.debug
index 4ef16f1ffe..ec479b1533 100644
--- a/board/stx/stxxtc/u-boot.lds.debug
+++ b/board/stx/stxxtc/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
     common/dlmalloc.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/svm_sc8xx/u-boot.lds b/board/svm_sc8xx/u-boot.lds
index 02aa9dd987..90270954e4 100644
--- a/board/svm_sc8xx/u-boot.lds
+++ b/board/svm_sc8xx/u-boot.lds
@@ -55,15 +55,15 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o		(.text)
-    cpu/mpc8xx/traps.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/traps.o		(.text)
     common/dlmalloc.o		(.text)
-    lib_ppc/ppcstring.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
-    lib_ppc/cache.o		(.text)
-    lib_ppc/time.o		(.text)
+    arch/ppc/lib/ppcstring.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
+    arch/ppc/lib/cache.o		(.text)
+    arch/ppc/lib/time.o		(.text)
 
     . = env_offset;
     common/env_embedded.o	(.ppcenv)
diff --git a/board/svm_sc8xx/u-boot.lds.debug b/board/svm_sc8xx/u-boot.lds.debug
index ec01fe256b..a2b7bc70d9 100644
--- a/board/svm_sc8xx/u-boot.lds.debug
+++ b/board/svm_sc8xx/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/tcm-bf518/config.mk b/board/tcm-bf518/config.mk
index f85bef5e2a..3f9d41f371 100644
--- a/board/tcm-bf518/config.mk
+++ b/board/tcm-bf518/config.mk
@@ -26,8 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
-CFLAGS_lib_generic += -O2
-CFLAGS_lzma += -O2
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
 
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
diff --git a/board/tcm-bf537/config.mk b/board/tcm-bf537/config.mk
index 3c0b46f721..bc046f129f 100644
--- a/board/tcm-bf537/config.mk
+++ b/board/tcm-bf537/config.mk
@@ -26,8 +26,8 @@
 # This is not actually used for Blackfin boards so do not change it
 #TEXT_BASE = do-not-use-me
 
-CFLAGS_lib_generic += -O2
-CFLAGS_lzma += -O2
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
 
 # Set some default LDR flags based on boot mode.
 LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
diff --git a/board/total5200/mt48lc16m16a2-75.h b/board/total5200/mt48lc16m16a2-75.h
index 5b0923e3e8..ae237c6cab 100644
--- a/board/total5200/mt48lc16m16a2-75.h
+++ b/board/total5200/mt48lc16m16a2-75.h
@@ -23,21 +23,8 @@
 
 #define SDRAM_DDR	0		/* is SDR */
 
-#if defined(CONFIG_MPC5200)
 /* Settings for XLB = 132 MHz */
 #define SDRAM_MODE	0x00CD0000
 #define SDRAM_CONTROL	0x504F0000
 #define SDRAM_CONFIG1	0xD2322800
 #define SDRAM_CONFIG2	0x8AD70000
-
-#elif defined(CONFIG_MGT5100)
-/* Settings for XLB = 66 MHz */
-#define SDRAM_MODE	0x008D0000
-#define SDRAM_CONTROL	0x504F0000
-#define SDRAM_CONFIG1	0xC2222600
-#define SDRAM_CONFIG2	0x88B70004
-#define SDRAM_ADDRSEL	0x02000000
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
diff --git a/board/total5200/mt48lc32m16a2-75.h b/board/total5200/mt48lc32m16a2-75.h
index 4b5ac80b35..cb4b43d63e 100644
--- a/board/total5200/mt48lc32m16a2-75.h
+++ b/board/total5200/mt48lc32m16a2-75.h
@@ -28,13 +28,8 @@
 
 #define SDRAM_DDR	0		/* is SDR */
 
-#if defined(CONFIG_MPC5200)
 /* Settings for XLB = 132 MHz */
 #define SDRAM_MODE	0x00CD0000
 #define SDRAM_CONTROL	0x514F0000
 #define SDRAM_CONFIG1	0xD2322800
 #define SDRAM_CONFIG2	0x8AD70000
-
-#else
-#error CONFIG_MPC5200 is not defined
-#endif
diff --git a/board/total5200/sdram.c b/board/total5200/sdram.c
index dc4c6f18c2..d883eb656d 100644
--- a/board/total5200/sdram.c
+++ b/board/total5200/sdram.c
@@ -76,7 +76,6 @@ static void mpc5xxx_sdram_start (sdram_conf_t *sdram_conf, int hi_addr)
  *            is something else than 0x00000000.
  */
 
-#if defined(CONFIG_MPC5200)
 long int mpc5xxx_sdram_init (sdram_conf_t *sdram_conf)
 {
 	ulong dramsize = 0;
@@ -174,54 +173,3 @@ long int mpc5xxx_sdram_init (sdram_conf_t *sdram_conf)
 
 	return dramsize + dramsize2;
 }
-
-#elif defined(CONFIG_MGT5100)
-
-long int mpc5xxx_sdram_init (sdram_conf_t *sdram_conf)
-{
-	ulong dramsize = 0;
-#ifndef CONFIG_SYS_RAMBOOT
-	ulong test1, test2;
-
-	/* setup and enable SDRAM chip selects */
-	*(vu_long *)MPC5XXX_SDRAM_START = 0x00000000;
-	*(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */
-	*(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */
-	__asm__ volatile ("sync");
-
-	/* setup config registers */
-	*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = sdram_conf->config1;
-	*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = sdram_conf->config2;
-
-	/* address select register */
-	*(vu_long *)MPC5XXX_SDRAM_XLBSEL = sdram_conf->addrsel;
-	__asm__ volatile ("sync");
-
-	/* find RAM size */
-	mpc5xxx_sdram_start(sdram_conf, 0);
-	test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
-	mpc5xxx_sdram_start(sdram_conf, 1);
-	test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
-	if (test1 > test2) {
-		mpc5xxx_sdram_start(sdram_conf, 0);
-		dramsize = test1;
-	} else {
-		dramsize = test2;
-	}
-
-	/* set SDRAM end address according to size */
-	*(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15);
-
-#else /* CONFIG_SYS_RAMBOOT */
-
-	/* Retrieve amount of SDRAM available */
-	dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15);
-
-#endif /* CONFIG_SYS_RAMBOOT */
-
-	return dramsize;
-}
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
diff --git a/board/total5200/sdram.h b/board/total5200/sdram.h
index bc21e1d300..396a190145 100644
--- a/board/total5200/sdram.h
+++ b/board/total5200/sdram.h
@@ -28,12 +28,7 @@ typedef struct {
 	ulong control;
 	ulong config1;
 	ulong config2;
-#if defined(CONFIG_MPC5200)
 	ulong tapdelay;
-#endif
-#if defined(CONFIG_MGT5100)
-	ulong addrsel;
-#endif
 } sdram_conf_t;
 
 long int mpc5xxx_sdram_init (sdram_conf_t *sdram_conf);
diff --git a/board/total5200/total5200.c b/board/total5200/total5200.c
index c524d63f93..61b5b807af 100644
--- a/board/total5200/total5200.c
+++ b/board/total5200/total5200.c
@@ -47,26 +47,17 @@ phys_size_t initdram (int board_type)
 	sdram_conf.control = SDRAM_CONTROL;
 	sdram_conf.config1 = SDRAM_CONFIG1;
 	sdram_conf.config2 = SDRAM_CONFIG2;
-#if defined(CONFIG_MPC5200)
 	sdram_conf.tapdelay = 0;
-#endif
-#if defined(CONFIG_MGT5100)
-	sdram_conf.addrsel = SDRAM_ADDRSEL;
-#endif
 	return mpc5xxx_sdram_init (&sdram_conf);
 }
 
 int checkboard (void)
 {
-#if defined(CONFIG_MPC5200)
 #if CONFIG_TOTAL5200_REV==2
 	puts ("Board: Total5200 Rev.2 ");
 #else
 	puts ("Board: Total5200 ");
 #endif
-#elif defined(CONFIG_MGT5100)
-	puts ("Board: Total5100 ");
-#endif
 
 	/*
 	 * Retrieve FPGA Revision.
@@ -85,20 +76,6 @@ int checkboard (void)
 	return 0;
 }
 
-#if defined(CONFIG_MGT5100)
-int board_early_init_r(void)
-{
-	/*
-	 * Now, when we are in RAM, enable CS0
-	 * because CS_BOOT cannot be written.
-	 */
-	*(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */
-	*(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */
-
-	return 0;
-}
-#endif
-
 #ifdef	CONFIG_PCI
 static struct pci_controller hose;
 
@@ -266,9 +243,7 @@ static const S1D_REGS init_regs [] =
 void video_get_info_str (int line_number, char *info)
 {
 	if (line_number == 1) {
-#ifdef CONFIG_MGT5100
-		strcpy (info, " Total5100");
-#elif CONFIG_TOTAL5200_REV==1
+#if CONFIG_TOTAL5200_REV==1
 		strcpy (info, " Total5200");
 #elif CONFIG_TOTAL5200_REV==2
 		strcpy (info, " Total5200 Rev.2");
diff --git a/board/tqc/tqm5200/mt48lc16m16a2-75.h b/board/tqc/tqm5200/mt48lc16m16a2-75.h
index 3f1e1691bb..48b43213dc 100644
--- a/board/tqc/tqm5200/mt48lc16m16a2-75.h
+++ b/board/tqc/tqm5200/mt48lc16m16a2-75.h
@@ -23,7 +23,6 @@
 
 #define SDRAM_DDR	0		/* is SDR */
 
-#if defined(CONFIG_MPC5200)
 /* Settings for XLB = 132 MHz */
 #define SDRAM_MODE	0x00CD0000
 /* #define SDRAM_MODE	0x008D0000 */ /* CAS latency 2 */
@@ -33,15 +32,3 @@
 /*#define SDRAM_CONFIG1	0xD7322800 */ /* SDRAM controller bug workaround */
 #define SDRAM_CONFIG2	0x8AD70000
 /*#define SDRAM_CONFIG2	0xDDD70000 */ /* SDRAM controller bug workaround */
-
-#elif defined(CONFIG_MGT5100)
-/* Settings for XLB = 66 MHz */
-#define SDRAM_MODE	0x008D0000
-#define SDRAM_CONTROL	0x504F0000
-#define SDRAM_CONFIG1	0xC2222600
-#define SDRAM_CONFIG2	0x88B70004
-#define SDRAM_ADDRSEL	0x02000000
-
-#else
-#error Neither CONFIG_MPC5200 or CONFIG_MGT5100 defined
-#endif
diff --git a/board/tqc/tqm834x/tqm834x.c b/board/tqc/tqm834x/tqm834x.c
index 4fd8cd6969..e5648799a6 100644
--- a/board/tqc/tqm834x/tqm834x.c
+++ b/board/tqc/tqm834x/tqm834x.c
@@ -28,7 +28,7 @@
 #include <asm/mpc8349_pci.h>
 #include <i2c.h>
 #include <miiphy.h>
-#include <asm-ppc/mmu.h>
+#include <asm/mmu.h>
 #include <pci.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/tqc/tqm8xx/u-boot.lds b/board/tqc/tqm8xx/u-boot.lds
index 2df8d8459c..a2277c260d 100644
--- a/board/tqc/tqm8xx/u-boot.lds
+++ b/board/tqc/tqm8xx/u-boot.lds
@@ -55,14 +55,14 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o		(.text)
-    cpu/mpc8xx/traps.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/traps.o		(.text)
     common/dlmalloc.o		(.text)
-    lib_ppc/ppcstring.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
-    lib_ppc/cache.o		(.text)
+    arch/ppc/lib/ppcstring.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
+    arch/ppc/lib/cache.o		(.text)
 
     . = DEFINED(env_offset) ? env_offset : .;
     common/env_embedded.o	(.ppcenv)
diff --git a/board/tqc/tqm8xx/u-boot.lds.debug b/board/tqc/tqm8xx/u-boot.lds.debug
index a2d940f048..57cc305868 100644
--- a/board/tqc/tqm8xx/u-boot.lds.debug
+++ b/board/tqc/tqm8xx/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/trab/Makefile b/board/trab/Makefile
index 27d75f3a00..0b13dc475e 100644
--- a/board/trab/Makefile
+++ b/board/trab/Makefile
@@ -48,7 +48,7 @@ $(LIB):	$(obj).depend $(OBJS) $(SOBJS)
 $(obj)trab_fkt.srec:	$(OBJS_FKT) $(LIB)
 	$(LD) -g -Ttext $(LOAD_ADDR) -o $(<:.o=) -e trab_fkt $^ $(LIB) \
 		-L$(obj)../../examples/standalone -lstubs \
-		-L$(obj)../../lib_generic -lgeneric \
+		-L$(obj)../../lib -lgeneric \
 		$(PLATFORM_LIBS)
 	$(OBJCOPY) -O srec $(<:.o=) $@
 
diff --git a/board/trab/rs485.c b/board/trab/rs485.c
index ad0c13665e..6a3a4cda9c 100644
--- a/board/trab/rs485.c
+++ b/board/trab/rs485.c
@@ -2,7 +2,7 @@
  * (C) Copyright 2003
  * Martin Krause, TQ-Systems GmbH, <martin.krause@tqs.de>
  *
- * Based on cpu/arm920t/serial.c, by Gary Jennejohn
+ * Based on arch/arm/cpu/arm920t/serial.c, by Gary Jennejohn
  * (C) Copyright 2002 Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
  *
  * This program is free software; you can redistribute it and/or modify
diff --git a/board/trab/rs485.h b/board/trab/rs485.h
index 16d69bbd5c..19e32446c3 100644
--- a/board/trab/rs485.h
+++ b/board/trab/rs485.h
@@ -2,7 +2,7 @@
  * (C) Copyright 2003
  * Martin Krause, TQ-Systems GmbH, <martin.krause@tqs.de>
  *
- * Based on cpu/arm920t/serial.c, by Gary Jennejohn
+ * Based on arch/arm/cpu/arm920t/serial.c, by Gary Jennejohn
  * (C) Copyright 2002 Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
  *
  * This program is free software; you can redistribute it and/or modify
diff --git a/board/trab/u-boot.lds b/board/trab/u-boot.lds
index c3d5c49a9b..cd50e85242 100644
--- a/board/trab/u-boot.lds
+++ b/board/trab/u-boot.lds
@@ -32,10 +32,10 @@ SECTIONS
 	. = ALIGN(4);
 	.text      :
 	{
-	  cpu/arm920t/start.o	(.text)
-	  lib_generic/zlib.o	(.text)
-	  lib_generic/crc32.o	(.text)
-	  lib_generic/string.o	(.text)
+	  arch/arm/cpu/arm920t/start.o	(.text)
+	  lib/zlib.o	(.text)
+	  lib/crc32.o	(.text)
+	  lib/string.o	(.text)
 
 	. = DEFINED(env_offset) ? env_offset : .;
 	  common/env_embedded.o	(.ppcenv)
diff --git a/board/uc100/u-boot.lds b/board/uc100/u-boot.lds
index e3ea52aede..f67b1d9c19 100644
--- a/board/uc100/u-boot.lds
+++ b/board/uc100/u-boot.lds
@@ -55,15 +55,15 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o		(.text)
-    cpu/mpc8xx/traps.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/traps.o		(.text)
     common/dlmalloc.o		(.text)
-    lib_ppc/ppcstring.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
-    lib_ppc/cache.o		(.text)
-    lib_ppc/time.o		(.text)
+    arch/ppc/lib/ppcstring.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
+    arch/ppc/lib/cache.o		(.text)
+    arch/ppc/lib/time.o		(.text)
 
     common/env_embedded.o	(.text)
 
diff --git a/board/uc100/u-boot.lds.debug b/board/uc100/u-boot.lds.debug
index edaa4020a9..84b338a75d 100644
--- a/board/uc100/u-boot.lds.debug
+++ b/board/uc100/u-boot.lds.debug
@@ -55,10 +55,10 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
 
     common/env_embedded.o(.text)
 
diff --git a/board/uc101/config.mk b/board/uc101/config.mk
index 4fe18316e5..aebf30411e 100644
--- a/board/uc101/config.mk
+++ b/board/uc101/config.mk
@@ -39,4 +39,4 @@ TEXT_BASE = 0xFFF00000
 endif
 
 PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
-LDSCRIPT := $(SRCTREE)/cpu/mpc5xxx/u-boot-customlayout.lds
+LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc5xxx/u-boot-customlayout.lds
diff --git a/board/v37/u-boot.lds b/board/v37/u-boot.lds
index 6f2ea9a613..bc47060f25 100644
--- a/board/v37/u-boot.lds
+++ b/board/v37/u-boot.lds
@@ -55,15 +55,15 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o		(.text)
-    cpu/mpc8xx/traps.o		(.text)
+    arch/ppc/cpu/mpc8xx/start.o		(.text)
+    arch/ppc/cpu/mpc8xx/traps.o		(.text)
     common/dlmalloc.o		(.text)
-    lib_ppc/ppcstring.o		(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
-    lib_ppc/cache.o		(.text)
-    lib_ppc/time.o		(.text)
+    arch/ppc/lib/ppcstring.o		(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
+    arch/ppc/lib/cache.o		(.text)
+    arch/ppc/lib/time.o		(.text)
 
 /*
     . = env_offset;
diff --git a/board/w7o/u-boot.lds.debug b/board/w7o/u-boot.lds.debug
index 8bb4929a46..369c15a18c 100644
--- a/board/w7o/u-boot.lds.debug
+++ b/board/w7o/u-boot.lds.debug
@@ -57,9 +57,9 @@ SECTIONS
 
     mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    arch/ppc/lib/extable.o	(.text)
 
     common/env_embedded.o(.text)
 
diff --git a/board/w7o/w7o.c b/board/w7o/w7o.c
index a818808ba0..96a12d73e5 100644
--- a/board/w7o/w7o.c
+++ b/board/w7o/w7o.c
@@ -157,7 +157,7 @@ phys_size_t initdram (int board_type)
 	/*
 	 * ToDo: Move the asm init routine sdram_init() to this C file,
 	 * or even better use some common ppc4xx code available
-	 * in cpu/ppc4xx
+	 * in arch/ppc/cpu/ppc4xx
 	 */
 	sdram_init();
 
diff --git a/board/westel/amx860/u-boot.lds b/board/westel/amx860/u-boot.lds
index 2d0efb3161..5bd5a75c61 100644
--- a/board/westel/amx860/u-boot.lds
+++ b/board/westel/amx860/u-boot.lds
@@ -55,12 +55,12 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_ppc/ppcstring.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_generic/zlib.o		(.text)
+    arch/ppc/lib/ppcstring.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    lib/zlib.o		(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/westel/amx860/u-boot.lds.debug b/board/westel/amx860/u-boot.lds.debug
index 653e0be45c..b331d5afc1 100644
--- a/board/westel/amx860/u-boot.lds.debug
+++ b/board/westel/amx860/u-boot.lds.debug
@@ -55,11 +55,11 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/mpc8xx/start.o	(.text)
+    arch/ppc/cpu/mpc8xx/start.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/vsprintf.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
+    lib/vsprintf.o	(.text)
+    lib/crc32.o		(.text)
+    arch/ppc/lib/extable.o	(.text)
 
     . = env_offset;
     common/env_embedded.o(.text)
diff --git a/board/xes/xpedite1000/u-boot.lds.debug b/board/xes/xpedite1000/u-boot.lds.debug
index d00834eef3..c3f6fefb45 100644
--- a/board/xes/xpedite1000/u-boot.lds.debug
+++ b/board/xes/xpedite1000/u-boot.lds.debug
@@ -55,18 +55,18 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
     board/xes/xpedite1000/init.o (.text)
-    cpu/ppc4xx/kgdb.o	(.text)
-    cpu/ppc4xx/traps.o	(.text)
-    cpu/ppc4xx/interrupts.o	(.text)
-    cpu/ppc4xx/4xx_uart.o	(.text)
-    cpu/ppc4xx/cpu_init.o	(.text)
-    cpu/ppc4xx/speed.o	(.text)
+    arch/ppc/cpu/ppc4xx/kgdb.o	(.text)
+    arch/ppc/cpu/ppc4xx/traps.o	(.text)
+    arch/ppc/cpu/ppc4xx/interrupts.o	(.text)
+    arch/ppc/cpu/ppc4xx/4xx_uart.o	(.text)
+    arch/ppc/cpu/ppc4xx/cpu_init.o	(.text)
+    arch/ppc/cpu/ppc4xx/speed.o	(.text)
     common/dlmalloc.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
-    lib_generic/zlib.o		(.text)
+    lib/crc32.o		(.text)
+    arch/ppc/lib/extable.o	(.text)
+    lib/zlib.o		(.text)
 
 /*    common/env_embedded.o(.text) */
 
diff --git a/board/xes/xpedite5170/u-boot.lds b/board/xes/xpedite5170/u-boot.lds
index b71a7d6e58..2f8730bf2b 100644
--- a/board/xes/xpedite5170/u-boot.lds
+++ b/board/xes/xpedite5170/u-boot.lds
@@ -50,16 +50,16 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/mpc86xx/start.o	(.text)
-    cpu/mpc86xx/traps.o (.text)
-    cpu/mpc86xx/interrupts.o (.text)
-    cpu/mpc86xx/cpu_init.o (.text)
-    cpu/mpc86xx/cpu.o (.text)
-    cpu/mpc86xx/speed.o (.text)
+    arch/ppc/cpu/mpc86xx/start.o	(.text)
+    arch/ppc/cpu/mpc86xx/traps.o (.text)
+    arch/ppc/cpu/mpc86xx/interrupts.o (.text)
+    arch/ppc/cpu/mpc86xx/cpu_init.o (.text)
+    arch/ppc/cpu/mpc86xx/cpu.o (.text)
+    arch/ppc/cpu/mpc86xx/speed.o (.text)
     common/dlmalloc.o (.text)
-    lib_generic/crc32.o (.text)
-    lib_ppc/extable.o (.text)
-    lib_generic/zlib.o (.text)
+    lib/crc32.o (.text)
+    arch/ppc/lib/extable.o (.text)
+    lib/zlib.o (.text)
     *(.text)
     *(.got1)
    }
diff --git a/board/xilinx/microblaze-generic/u-boot.lds b/board/xilinx/microblaze-generic/u-boot.lds
index c20c6dd1d6..ee41145bb5 100644
--- a/board/xilinx/microblaze-generic/u-boot.lds
+++ b/board/xilinx/microblaze-generic/u-boot.lds
@@ -30,7 +30,7 @@ SECTIONS
 	.text ALIGN(0x4):
 	{
 		__text_start = .;
-		cpu/microblaze/start.o (.text)
+		arch/microblaze/cpu/start.o (.text)
 		*(.text)
 		__text_end = .;
 	}
diff --git a/board/xilinx/ml300/Makefile b/board/xilinx/ml300/Makefile
deleted file mode 100644
index b8a2d64c4f..0000000000
--- a/board/xilinx/ml300/Makefile
+++ /dev/null
@@ -1,70 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)../common)
-$(shell mkdir -p $(obj)../xilinx_enet)
-$(shell mkdir -p $(obj)../xilinx_iic)
-endif
-
-INCS		:= -I../common -I../xilinx_enet -I../xilinx_iic
-CFLAGS		+= $(INCS)
-HOSTCFLAGS	+= $(INCS)
-
-LIB	= $(obj)lib$(BOARD).a
-
-COBJS	= $(BOARD).o \
-	  serial.o \
-	  ../xilinx_enet/emac_adapter.o  ../xilinx_enet/xemac.o \
-	  ../xilinx_enet/xemac_options.o ../xilinx_enet/xemac_polled.o \
-	  ../xilinx_enet/xemac_intr.o ../xilinx_enet/xemac_g.o \
-	  ../xilinx_enet/xemac_intr_dma.o ../xilinx_iic/iic_adapter.o \
-	  ../xilinx_iic/xiic_l.o ../common/xipif_v1_23_b.o \
-	  ../common/xbasic_types.o ../common/xdma_channel.o \
-	  ../common/xdma_channel_sg.o ../common/xpacket_fifo_v1_00_b.o \
-	  ../common/xversion.o \
-
-SOBJS	= init.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
-
-$(LIB):	$(OBJS) $(SOBJS)
-	$(AR) $(ARFLAGS) $@ $^
-
-clean:
-	rm -f $(SOBJS) $(OBJS)
-
-distclean:	clean
-	rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/xilinx/ml300/init.S b/board/xilinx/ml300/init.S
deleted file mode 100644
index a282c9ae22..0000000000
--- a/board/xilinx/ml300/init.S
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * init.S: Stubs for U-Boot initialization
- *
- *     Author: Xilinx, Inc.
- *
- *
- *     This program is free software; you can redistribute it and/or modify it
- *     under the terms of the GNU General Public License as published by the
- *     Free Software Foundation; either version 2 of the License, or (at your
- *     option) any later version.
- *
- *
- *     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
- *     COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
- *     ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
- *     XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
- *     FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
- *     ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
- *     XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
- *     THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
- *     WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
- *     CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
- *     FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- *     Xilinx hardware products are not intended for use in life support
- *     appliances, devices, or systems. Use in such applications is
- *     expressly prohibited.
- *
- *
- *     (c) Copyright 2002-2004 Xilinx Inc.
- *     All rights reserved.
- *
- *
- *     You should have received a copy of the GNU General Public License along
- *     with this program; if not, write to the Free Software Foundation, Inc.,
- *     675 Mass Ave, Cambridge, MA 02139, USA.
- *
- *
- */
-
-	.globl ext_bus_cntlr_init
-ext_bus_cntlr_init:
-	blr
diff --git a/board/xilinx/ml300/ml300.c b/board/xilinx/ml300/ml300.c
deleted file mode 100644
index e64beccc1c..0000000000
--- a/board/xilinx/ml300/ml300.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * ml300.c: U-Boot platform support for Xilinx ML300 board
- *
- *     Author: Xilinx, Inc.
- *
- *
- *     This program is free software; you can redistribute it and/or modify it
- *     under the terms of the GNU General Public License as published by the
- *     Free Software Foundation; either version 2 of the License, or (at your
- *     option) any later version.
- *
- *
- *     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
- *     COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
- *     ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
- *     XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
- *     FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
- *     ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
- *     XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
- *     THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
- *     WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
- *     CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
- *     FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- *     Xilinx hardware products are not intended for use in life support
- *     appliances, devices, or systems. Use in such applications is
- *     expressly prohibited.
- *
- *
- *     (c) Copyright 2002-2004 Xilinx Inc.
- *     All rights reserved.
- *
- *
- *     You should have received a copy of the GNU General Public License along
- *     with this program; if not, write to the Free Software Foundation, Inc.,
- *     675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#include <config.h>
-#include <common.h>
-#include <asm/processor.h>
-
-#ifdef CONFIG_ENV_IS_IN_EEPROM
-extern void convert_env(void);
-#endif
-
-int
-board_pre_init(void)
-{
-	return 0;
-}
-
-int
-checkboard(void)
-{
-	char tmp[64];		/* long enough for environment variables */
-	char *s, *e;
-	int i = getenv_r("L", tmp, sizeof (tmp));
-
-	if (i < 0) {
-		printf("### No HW ID - assuming ML300");
-	} else {
-		for (e = tmp; *e; ++e) {
-			if (*e == ' ')
-				break;
-		}
-
-		printf("### Board Serial# is ");
-
-		for (s = tmp; s < e; ++s) {
-			putc(*s);
-		}
-
-	}
-	putc('\n');
-
-	return (0);
-}
-
-phys_size_t
-initdram(int board_type)
-{
-	return 128 * 1024 * 1024;
-}
-
-int
-testdram(void)
-{
-	printf("test: xxx MB - ok\n");
-
-	return (0);
-}
-
-/* implement functions originally in cpu/ppc4xx/speed.c */
-void
-get_sys_info(sys_info_t * sysInfo)
-{
-	sysInfo->freqProcessor = XPAR_CORE_CLOCK_FREQ_HZ;
-
-	/* only correct if the PLB and OPB run at the same frequency */
-	sysInfo->freqPLB = XPAR_UARTNS550_0_CLOCK_FREQ_HZ;
-	sysInfo->freqPCI = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 3;
-}
-
-ulong
-get_PCI_freq(void)
-{
-	ulong val;
-	PPC4xx_SYS_INFO sys_info;
-
-	get_sys_info(&sys_info);
-	val = sys_info.freqPCI;
-	return val;
-}
-
-#ifdef CONFIG_MISC_INIT_R
-
-int
-misc_init_r()
-{
-	/* convert env name and value to u-boot standard */
-	convert_env();
-	return 0;
-}
-
-#endif
diff --git a/board/xilinx/ml300/serial.c b/board/xilinx/ml300/serial.c
deleted file mode 100644
index 4215513375..0000000000
--- a/board/xilinx/ml300/serial.c
+++ /dev/null
@@ -1,154 +0,0 @@
-/*
- *     Author: Xilinx, Inc.
- *
- *
- *     This program is free software; you can redistribute it and/or modify it
- *     under the terms of the GNU General Public License as published by the
- *     Free Software Foundation; either version 2 of the License, or (at your
- *     option) any later version.
- *
- *
- *     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
- *     COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
- *     ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
- *     XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
- *     FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
- *     ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
- *     XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
- *     THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
- *     WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
- *     CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
- *     FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- *     Xilinx hardware products are not intended for use in life support
- *     appliances, devices, or systems. Use in such applications is
- *     expressly prohibited.
- *
- *
- *     (c) Copyright 2002-2004 Xilinx Inc.
- *     All rights reserved.
- *
- *
- *     You should have received a copy of the GNU General Public License along
- *     with this program; if not, write to the Free Software Foundation, Inc.,
- *     675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#include <common.h>
-#include <asm/u-boot.h>
-#include <asm/processor.h>
-#include <command.h>
-#include <config.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define USE_CHAN1 \
-	((defined XPAR_UARTNS550_0_BASEADDR) && (defined CONFIG_SYS_INIT_CHAN1))
-#define USE_CHAN2 \
-	((defined XPAR_UARTNS550_1_BASEADDR) && (defined CONFIG_SYS_INIT_CHAN2))
-
-#if USE_CHAN1
-#include <ns16550.h>
-#endif
-
-#if USE_CHAN1
-const NS16550_t COM_PORTS[] = { (NS16550_t) (XPAR_UARTNS550_0_BASEADDR + 3)
-#if USE_CHAN2
-	    , (NS16550_t) (XPAR_UARTNS550_1_BASEADDR + 3)
-#endif
-};
-#endif
-
-int
-serial_init(void)
-{
-#if USE_CHAN1
-	int clock_divisor;
-
-	clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate;
-	(void) NS16550_init(COM_PORTS[0], clock_divisor);
-#if USE_CHAN2
-	clock_divisor = XPAR_UARTNS550_1_CLOCK_FREQ_HZ / 16 / gd->baudrate;
-	(void) NS16550_init(COM_PORTS[1], clock_divisor);
-#endif
-#endif
-	return 0;
-
-}
-
-void
-serial_putc(const char c)
-{
-	if (c == '\n')
-		NS16550_putc(COM_PORTS[CONFIG_SYS_DUART_CHAN], '\r');
-
-	NS16550_putc(COM_PORTS[CONFIG_SYS_DUART_CHAN], c);
-}
-
-int
-serial_getc(void)
-{
-	return NS16550_getc(COM_PORTS[CONFIG_SYS_DUART_CHAN]);
-}
-
-int
-serial_tstc(void)
-{
-	return NS16550_tstc(COM_PORTS[CONFIG_SYS_DUART_CHAN]);
-}
-
-void
-serial_setbrg(void)
-{
-#if USE_CHAN1
-	int clock_divisor;
-
-	clock_divisor = XPAR_UARTNS550_0_CLOCK_FREQ_HZ / 16 / gd->baudrate;
-	NS16550_reinit(COM_PORTS[0], clock_divisor);
-#if USE_CHAN2
-	clock_divisor = XPAR_UARTNS550_1_CLOCK_FREQ_HZ / 16 / gd->baudrate;
-	NS16550_reinit(COM_PORTS[1], clock_divisor);
-#endif
-#endif
-}
-
-void
-serial_puts(const char *s)
-{
-	while (*s) {
-		serial_putc(*s++);
-	}
-}
-
-#if defined(CONFIG_CMD_KGDB)
-void
-kgdb_serial_init(void)
-{
-}
-
-void
-putDebugChar(int c)
-{
-	serial_putc(c);
-}
-
-void
-putDebugStr(const char *str)
-{
-	serial_puts(str);
-}
-
-int
-getDebugChar(void)
-{
-	return serial_getc();
-}
-
-void
-kgdb_interruptible(int yes)
-{
-	return;
-}
-#endif
diff --git a/board/xilinx/ml300/u-boot.lds b/board/xilinx/ml300/u-boot.lds
deleted file mode 100644
index b9899408d8..0000000000
--- a/board/xilinx/ml300/u-boot.lds
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-ENTRY(_start)
-/* Do we need any of these for elf?
-   __DYNAMIC = 0;    */
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text)	}
-  .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data)	}
-  .rel.rodata    : { *(.rel.rodata)	}
-  .rela.rodata   : { *(.rela.rodata)	}
-  .rel.got       : { *(.rel.got)		}
-  .rela.got      : { *(.rela.got)		}
-  .rel.ctors     : { *(.rel.ctors)	}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rel.dtors     : { *(.rel.dtors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rel.bss       : { *(.rel.bss)		}
-  .rela.bss      : { *(.rela.bss)		}
-  .rel.plt       : { *(.rel.plt)		}
-  .rela.plt      : { *(.rela.plt)		}
-  .init          : { *(.init)	}
-  .plt : { *(.plt) }
-  .text      :
-  {
-    /* WARNING - the following is hand-optimized to fit within	*/
-    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
-/*
-    cpu/ppc4xx/start.o	(.text)
-    board/xilinx/ml300/init.o	(.text)
-    cpu/ppc4xx/kgdb.o	(.text)
-    cpu/ppc4xx/traps.o	(.text)
-    cpu/ppc4xx/interrupts.o	(.text)
-    cpu/ppc4xx/4xx_uart.o	(.text)
-    cpu/ppc4xx/cpu_init.o	(.text)
-    cpu/ppc4xx/speed.o	(.text)
-    drivers/net/4xx_enet.o	(.text)
-    common/dlmalloc.o	(.text)
-    lib_generic/crc32.o		(.text)
-    lib_ppc/extable.o	(.text)
-    lib_generic/zlib.o		(.text)
-*/
-/*    . = env_offset;*/
-/*    common/env_embedded.o(.text)*/
-
-    *(.text)
-    *(.got1)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(.eh_frame)
-    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-  }
-  .fini      : { *(.fini)    } =0
-  .ctors     : { *(.ctors)   }
-  .dtors     : { *(.dtors)   }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF) & 0xFFFFFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    *(.got)
-    _GOT2_TABLE_ = .;
-    *(.got2)
-    _FIXUP_TABLE_ = .;
-    *(.fixup)
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data)
-    *(.data1)
-    *(.sdata)
-    *(.sdata2)
-    *(.dynamic)
-    CONSTRUCTORS
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-  __u_boot_cmd_start = .;
-  .u_boot_cmd : { *(.u_boot_cmd) }
-  __u_boot_cmd_end = .;
-
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)       :
-  {
-   *(.sbss) *(.scommon)
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-   . = ALIGN(4);
-  }
-  _end = . ;
-  PROVIDE (end = .);
-}
diff --git a/board/xilinx/ml300/xparameters.h b/board/xilinx/ml300/xparameters.h
deleted file mode 100644
index 2c56737dc5..0000000000
--- a/board/xilinx/ml300/xparameters.h
+++ /dev/null
@@ -1,196 +0,0 @@
-/*******************************************************************
-*
-* CAUTION: This file is automatically generated by libgen.
-* Version: Xilinx EDK 6.2 EDK_Gm.11
-* DO NOT EDIT.
-*
-* Copyright (c) 2003 Xilinx, Inc.  All rights reserved.
-*
-* Description: Driver parameters
-*
-*******************************************************************/
-
-/******************************************************************/
-
-/* U-Boot Redefines */
-
-/******************************************************************/
-
-#define XPAR_UARTNS550_0_BASEADDR (XPAR_OPB_UART16550_0_BASEADDR+0x1000)
-#define XPAR_UARTNS550_0_HIGHADDR XPAR_OPB_UART16550_0_HIGHADDR
-#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ
-#define XPAR_UARTNS550_0_DEVICE_ID XPAR_OPB_UART16550_0_DEVICE_ID
-#define XPAR_UARTNS550_1_BASEADDR (XPAR_OPB_UART16550_1_BASEADDR+0x1000)
-#define XPAR_UARTNS550_1_HIGHADDR XPAR_OPB_UART16550_1_HIGHADDR
-#define XPAR_UARTNS550_1_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ
-#define XPAR_UARTNS550_1_DEVICE_ID XPAR_OPB_UART16550_1_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_IIC_0_BASEADDR XPAR_OPB_IIC_0_BASEADDR
-#define XPAR_IIC_0_HIGHADDR XPAR_OPB_IIC_0_HIGHADDR
-#define XPAR_IIC_0_TEN_BIT_ADR XPAR_OPB_IIC_0_TEN_BIT_ADR
-#define XPAR_IIC_0_DEVICE_ID XPAR_OPB_IIC_0_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_EMAC_0_BASEADDR XPAR_OPB_ETHERNET_0_BASEADDR
-#define XPAR_EMAC_0_HIGHADDR XPAR_OPB_ETHERNET_0_HIGHADDR
-#define XPAR_EMAC_0_DMA_PRESENT XPAR_OPB_ETHERNET_0_DMA_PRESENT
-#define XPAR_EMAC_0_MII_EXIST XPAR_OPB_ETHERNET_0_MII_EXIST
-#define XPAR_EMAC_0_ERR_COUNT_EXIST XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST
-#define XPAR_EMAC_0_DEVICE_ID XPAR_OPB_ETHERNET_0_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_CORE_CLOCK_FREQ_HZ XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ
-
-/******************************************************************/
-
-#define XPAR_PERSISTENT_0_IIC_0_BASEADDR 0x00000400
-#define XPAR_PERSISTENT_0_IIC_0_HIGHADDR 0x000007FF
-#define XPAR_PERSISTENT_0_IIC_0_EEPROMADDR 0xA0
-
-/******************************************************************/
-
-#define XPAR_XPCI_NUM_INSTANCES 1
-#define XPAR_XPCI_CLOCK_HZ 33333333
-#define XPAR_OPB_PCI_REF_0_DEVICE_ID 0
-#define XPAR_OPB_PCI_REF_0_BASEADDR 0x20000000
-#define XPAR_OPB_PCI_REF_0_HIGHADDR 0x3FFFFFFF
-#define XPAR_OPB_PCI_REF_0_CONFIG_ADDR 0x3C000000
-#define XPAR_OPB_PCI_REF_0_CONFIG_DATA 0x3C000004
-#define XPAR_OPB_PCI_REF_0_LCONFIG_ADDR 0x3E000000
-#define XPAR_OPB_PCI_REF_0_MEM_BASEADDR 0x20000000
-#define XPAR_OPB_PCI_REF_0_MEM_HIGHADDR 0x37FFFFFF
-#define XPAR_OPB_PCI_REF_0_IO_BASEADDR 0x38000000
-#define XPAR_OPB_PCI_REF_0_IO_HIGHADDR 0x3BFFFFFF
-
-/******************************************************************/
-
-#define XPAR_XEMAC_NUM_INSTANCES 1
-#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000
-#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF
-#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0
-#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1
-#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1
-#define XPAR_OPB_ETHERNET_0_MII_EXIST 1
-
-/******************************************************************/
-
-#define XPAR_MY_OPB_GPIO_0_DEVICE_ID_0 0
-#define XPAR_MY_OPB_GPIO_0_BASEADDR_0 0x90000000
-#define XPAR_MY_OPB_GPIO_0_HIGHADDR_0 (0x90000000+0x7)
-#define XPAR_MY_OPB_GPIO_0_DEVICE_ID_1 1
-#define XPAR_MY_OPB_GPIO_0_BASEADDR_1 (0x90000000+0x8)
-#define XPAR_MY_OPB_GPIO_0_HIGHADDR_1 (0x90000000+0x1F)
-#define XPAR_XGPIO_NUM_INSTANCES 2
-
-/******************************************************************/
-
-#define XPAR_XIIC_NUM_INSTANCES 1
-#define XPAR_OPB_IIC_0_BASEADDR 0xA8000000
-#define XPAR_OPB_IIC_0_HIGHADDR 0xA80001FF
-#define XPAR_OPB_IIC_0_DEVICE_ID 0
-#define XPAR_OPB_IIC_0_TEN_BIT_ADR 0
-
-/******************************************************************/
-
-#define XPAR_XUARTNS550_NUM_INSTANCES 2
-#define XPAR_XUARTNS550_CLOCK_HZ 100000000
-#define XPAR_OPB_UART16550_0_BASEADDR 0xA0000000
-#define XPAR_OPB_UART16550_0_HIGHADDR 0xA0001FFF
-#define XPAR_OPB_UART16550_0_DEVICE_ID 0
-#define XPAR_OPB_UART16550_1_BASEADDR 0xA0010000
-#define XPAR_OPB_UART16550_1_HIGHADDR 0xA0011FFF
-#define XPAR_OPB_UART16550_1_DEVICE_ID 1
-
-/******************************************************************/
-
-#define XPAR_XSPI_NUM_INSTANCES 1
-#define XPAR_OPB_SPI_0_BASEADDR 0xA4000000
-#define XPAR_OPB_SPI_0_HIGHADDR 0xA400007F
-#define XPAR_OPB_SPI_0_DEVICE_ID 0
-#define XPAR_OPB_SPI_0_FIFO_EXIST 1
-#define XPAR_OPB_SPI_0_SPI_SLAVE_ONLY 0
-#define XPAR_OPB_SPI_0_NUM_SS_BITS 1
-
-/******************************************************************/
-
-#define XPAR_XPS2_NUM_INSTANCES 2
-#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_0 0
-#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_0 0xA9000000
-#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_0 (0xA9000000+0x3F)
-#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_1 1
-#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_1 (0xA9000000+0x1000)
-#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_1 (0xA9000000+0x103F)
-
-/******************************************************************/
-
-#define XPAR_XTOUCHSCREEN_NUM_INSTANCES 1
-#define XPAR_OPB_TSD_REF_0_BASEADDR 0xAA000000
-#define XPAR_OPB_TSD_REF_0_HIGHADDR 0xAA000007
-#define XPAR_OPB_TSD_REF_0_DEVICE_ID 0
-
-/******************************************************************/
-
-#define XPAR_OPB_AC97_CONTROLLER_REF_0_BASEADDR 0xA6000000
-#define XPAR_OPB_AC97_CONTROLLER_REF_0_HIGHADDR 0xA60000FF
-#define XPAR_OPB_PAR_PORT_REF_0_BASEADDR 0x90010000
-#define XPAR_OPB_PAR_PORT_REF_0_HIGHADDR 0x900100FF
-#define XPAR_PLB_DDR_0_BASEADDR 0x00000000
-#define XPAR_PLB_DDR_0_HIGHADDR 0x0FFFFFFF
-
-/******************************************************************/
-
-#define XPAR_XINTC_HAS_IPR 1
-#define XPAR_INTC_MAX_NUM_INTR_INPUTS 18
-#define XPAR_XINTC_USE_DCR 0
-#define XPAR_XINTC_NUM_INSTANCES 1
-#define XPAR_DCR_INTC_0_BASEADDR 0xD0000FC0
-#define XPAR_DCR_INTC_0_HIGHADDR 0xD0000FDF
-#define XPAR_DCR_INTC_0_DEVICE_ID 0
-#define XPAR_DCR_INTC_0_KIND_OF_INTR 0x00038000
-
-/******************************************************************/
-
-#define XPAR_DCR_INTC_0_MISC_LOGIC_0_PHY_MII_INT_INTR 0
-#define XPAR_DCR_INTC_0_OPB_ETHERNET_0_IP2INTC_IRPT_INTR 1
-#define XPAR_DCR_INTC_0_MISC_LOGIC_0_IIC_TEMP_CRIT_INTR 2
-#define XPAR_DCR_INTC_0_MISC_LOGIC_0_IIC_IRQ_INTR 3
-#define XPAR_DCR_INTC_0_OPB_IIC_0_IP2INTC_IRPT_INTR 4
-#define XPAR_DCR_INTC_0_OPB_SYSACE_0_SYSACE_IRQ_INTR 5
-#define XPAR_DCR_INTC_0_OPB_UART16550_0_IP2INTC_IRPT_INTR 6
-#define XPAR_DCR_INTC_0_OPB_UART16550_1_IP2INTC_IRPT_INTR 7
-#define XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR1_INTR 8
-#define XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR2_INTR 9
-#define XPAR_DCR_INTC_0_OPB_SPI_0_IP2INTC_IRPT_INTR 10
-#define XPAR_DCR_INTC_0_OPB_TSD_REF_0_INTR_INTR 11
-#define XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_INTR 12
-#define XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_INTR 13
-#define XPAR_DCR_INTC_0_OPB_PCI_REF_0_INTR_OUT_INTR 14
-#define XPAR_DCR_INTC_0_PLB2OPB_BRIDGE_0_BUS_ERROR_DET_INTR 15
-#define XPAR_DCR_INTC_0_PLB_V34_0_BUS_ERROR_DET_INTR 16
-#define XPAR_DCR_INTC_0_OPB2PLB_BRIDGE_0_BUS_ERROR_DET_INTR 17
-
-/******************************************************************/
-
-#define XPAR_XTFT_NUM_INSTANCES 1
-#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_BASEADDR 0xD0000200
-#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_HIGHADDR 0xD0000207
-#define XPAR_PLB_TFT_CNTLR_REF_0_DEVICE_ID 0
-
-/******************************************************************/
-
-#define XPAR_XSYSACE_MEM_WIDTH 8
-#define XPAR_XSYSACE_NUM_INSTANCES 1
-#define XPAR_OPB_SYSACE_0_BASEADDR 0xCF000000
-#define XPAR_OPB_SYSACE_0_HIGHADDR 0xCF0001FF
-#define XPAR_OPB_SYSACE_0_DEVICE_ID 0
-#define XPAR_OPB_SYSACE_0_MEM_WIDTH 8
-
-/******************************************************************/
-
-#define XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ 300000000
-
-/******************************************************************/
diff --git a/board/xilinx/ppc405-generic/u-boot-rom.lds b/board/xilinx/ppc405-generic/u-boot-rom.lds
index 02044e43d5..8fafbd59c0 100644
--- a/board/xilinx/ppc405-generic/u-boot-rom.lds
+++ b/board/xilinx/ppc405-generic/u-boot-rom.lds
@@ -33,7 +33,7 @@ SECTIONS
 
   .bootpg 0xFFFFF000 :
   {
-    cpu/ppc4xx/start.o	(.bootpg)
+    arch/ppc/cpu/ppc4xx/start.o	(.bootpg)
   } = 0xffff
 
   /* Read-only sections, merged into text segment: */
diff --git a/board/xilinx/ppc440-generic/init.S b/board/xilinx/ppc440-generic/init.S
index 1409467ea0..54f2d7fbc1 100644
--- a/board/xilinx/ppc440-generic/init.S
+++ b/board/xilinx/ppc440-generic/init.S
@@ -19,7 +19,7 @@
 
 #include <ppc_asm.tmpl>
 #include <config.h>
-#include <asm-ppc/mmu.h>
+#include <asm/mmu.h>
 
 .section .bootpg,"ax"
 .globl tlbtab
diff --git a/board/xilinx/ppc440-generic/u-boot-rom.lds b/board/xilinx/ppc440-generic/u-boot-rom.lds
index 57c809e4cb..0cbed8ea57 100644
--- a/board/xilinx/ppc440-generic/u-boot-rom.lds
+++ b/board/xilinx/ppc440-generic/u-boot-rom.lds
@@ -33,7 +33,7 @@ SECTIONS
 
   .bootpg 0xFFFFF000 :
   {
-    cpu/ppc4xx/start.o	(.bootpg)
+    arch/ppc/cpu/ppc4xx/start.o	(.bootpg)
   } = 0xffff
 
   /* Read-only sections, merged into text segment: */
diff --git a/board/xilinx/xilinx_iic/iic_adapter.c b/board/xilinx/xilinx_iic/iic_adapter.c
deleted file mode 100644
index 58aaeb7695..0000000000
--- a/board/xilinx/xilinx_iic/iic_adapter.c
+++ /dev/null
@@ -1,529 +0,0 @@
-/******************************************************************************
-*
-*     Author: Xilinx, Inc.
-*
-*
-*     This program is free software; you can redistribute it and/or modify it
-*     under the terms of the GNU General Public License as published by the
-*     Free Software Foundation; either version 2 of the License, or (at your
-*     option) any later version.
-*
-*
-*     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-*     COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-*     ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-*     XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-*     FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-*     ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-*     XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-*     THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-*     WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-*     CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-*     FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-*     Xilinx hardware products are not intended for use in life support
-*     appliances, devices, or systems. Use in such applications is
-*     expressly prohibited.
-*
-*
-*     (c) Copyright 2002-2004 Xilinx Inc.
-*     All rights reserved.
-*
-*
-*     You should have received a copy of the GNU General Public License along
-*     with this program; if not, write to the Free Software Foundation, Inc.,
-*     675 Mass Ave, Cambridge, MA 02139, USA.
-*
-******************************************************************************/
-
-#include <config.h>
-#include <common.h>
-#include <environment.h>
-#include <net.h>
-
-#ifdef CONFIG_ENV_IS_IN_EEPROM
-#include <i2c.h>
-#include "xiic_l.h"
-
-#define IIC_DELAY     5000
-
-static u8 envStep = 0;		/* 0 means crc has not been read */
-const u8 hex[] = "0123456789ABCDEF"; /* lookup table for ML300 CRC */
-
-/************************************************************************
- * Use Xilinx provided driver to send data to EEPROM using iic bus.
- */
-static void
-send(u32 adr, u8 * data, u32 len)
-{
-	u8 sendBuf[34];		/* first 2-bit is address and others are data */
-	u32 pos, wlen;
-	u32 ret;
-
-	wlen = 32;
-	for (pos = 0; pos < len; pos += 32) {
-		if ((len - pos) < 32)
-			wlen = len - pos;
-
-		/* Put address and data bits together */
-		sendBuf[0] = (u8) ((adr + pos) >> 8);
-		sendBuf[1] = (u8) (adr + pos);
-		memcpy(&sendBuf[2], &data[pos], wlen);
-
-		/* Send to EEPROM through iic bus */
-		ret = XIic_Send(XPAR_IIC_0_BASEADDR, CONFIG_SYS_I2C_EEPROM_ADDR >> 1,
-				sendBuf, wlen + 2);
-
-		udelay(IIC_DELAY);
-	}
-}
-
-/************************************************************************
- * Use Xilinx provided driver to read data from EEPROM using the iic bus.
- */
-static void
-receive(u32 adr, u8 * data, u32 len)
-{
-	u8 address[2];
-	u32 ret;
-
-	address[0] = (u8) (adr >> 8);
-	address[1] = (u8) adr;
-
-	/* Provide EEPROM address */
-	ret =
-	    XIic_Send(XPAR_IIC_0_BASEADDR, CONFIG_SYS_I2C_EEPROM_ADDR >> 1, address,
-		      2);
-	/* Receive data from EEPROM */
-	ret =
-	    XIic_Recv(XPAR_IIC_0_BASEADDR, CONFIG_SYS_I2C_EEPROM_ADDR >> 1, data, len);
-}
-
-/************************************************************************
- * Convert a hexadecimal string to its equivalent integer value.
- */
-static u8
-axtoi(u8 * hexStg)
-{
-	u8 n;			/* position in string */
-	u8 m;			/* position in digit[] to shift */
-	u8 count;		/* loop index */
-	u8 intValue;		/* integer value of hex string */
-	u8 digit[2];		/* hold values to convert */
-
-	for (n = 0; n < 2; n++) {
-		if (hexStg[n] == '\0')
-			break;
-		if (hexStg[n] > 0x29 && hexStg[n] < 0x40)
-			digit[n] = hexStg[n] & 0x0f;
-		else if (hexStg[n] >= 'a' && hexStg[n] <= 'f')
-			digit[n] = (hexStg[n] & 0x0f) + 9;
-		else if (hexStg[n] >= 'A' && hexStg[n] <= 'F')
-			digit[n] = (hexStg[n] & 0x0f) + 9;
-		else
-			break;
-	}
-
-	intValue = 0;
-	count = n;
-	m = n - 1;
-	n = 0;
-	while (n < count) {
-		intValue = intValue | (digit[n] << (m << 2));
-		m--;		/* adjust the position to set */
-		n++;		/* next digit to process */
-	}
-
-	return (intValue);
-}
-
-/************************************************************************
- * Convert an integer string to its equivalent value.
- */
-static u8
-atoi(uchar * string)
-{
-	u8 res = 0;
-	while (*string >= '0' && *string <= '9') {
-		res *= 10;
-		res += *string - '0';
-		string++;
-	}
-
-	return res;
-}
-
-/************************************************************************
- * Key-value pairs are separated by "=" sign.
- */
-static void
-findKey(uchar * buffer, int *loc, u8 len)
-{
-	u32 i;
-
-	for (i = 0; i < len; i++)
-		if (buffer[i] == '=') {
-			*loc = i;
-			return;
-		}
-
-	/* return -1 is no "=" sign found */
-	*loc = -1;
-}
-
-/************************************************************************
- * Compute a new ML300 CRC when user calls the saveenv command.
- * Also update EEPROM with new CRC value.
- */
-static u8
-update_crc(u32 len, uchar * data)
-{
-	uchar temp[6] = { 'C', '=', 0x00, 0x00, 0x00, 0x00 };
-	u32 crc;		/* new crc value */
-	u32 i;
-
-	crc = 0;
-
-	/* calculate new CRC */
-	for (i = 0; i < len; i++)
-		crc += data[i];
-
-	/* CRC includes key for check sum */
-	crc += 'C' + '=';
-
-	/* compose new CRC to be updated */
-	temp[2] = hex[(crc >> 4) & 0xf];
-	temp[3] = hex[crc & 0xf];
-
-	/* check to see if env size exceeded */
-	if (len + 6 > ENV_SIZE) {
-		printf("ERROR: not enough space to store CRC on EEPROM");
-		return 1;
-	}
-
-	memcpy(data + len, temp, 6);
-	return 0;
-}
-
-/************************************************************************
- * Read out ML300 CRC and compare it with a runtime calculated ML300 CRC.
- * If equal, then pass back a u-boot CRC value, otherwise pass back
- * junk to indicate CRC error.
-*/
-static void
-read_crc(uchar * buffer, int len)
-{
-	u32 addr, n;
-	u32 crc;		/* runtime crc */
-	u8 old[2] = { 0xff, 0xff };	/* current CRC in EEPROM */
-	u8 stop;		/* indication of end of env data */
-	u8 pre;			/* previous EEPROM data bit */
-	int i, loc;
-
-	addr = CONFIG_ENV_OFFSET;	/* start from first env address */
-	n = 0;
-	pre = 1;
-	stop = 1;
-	crc = 0;
-
-	/* calculate runtime CRC according to ML300 and read back
-	   old CRC stored in the EEPROM */
-	while (n < CONFIG_ENV_SIZE) {
-		receive(addr, buffer, len);
-
-		/* found two null chars, end of env */
-		if ((pre || buffer[0]) == 0)
-			break;
-
-		findKey(buffer, &loc, len);
-
-		/* found old check sum, read and store old CRC */
-		if ((loc == 0 && pre == 'C')
-		    || (loc > 0 && buffer[loc - 1] == 'C'))
-			receive(addr + loc + 1, old, 2);
-
-		pre = buffer[len - 1];
-
-		/* calculate runtime ML300 CRC */
-		crc += buffer[0];
-		i = 1;
-		do {
-			crc += buffer[i];
-			stop = buffer[i] || buffer[i - 1];
-			i++;
-		} while (stop && (i < len));
-
-		if (stop == 0)
-			break;
-
-		n += len;
-		addr += len;
-	}
-
-	/* exclude old CRC from runtime calculation */
-	crc -= (old[0] + old[1]);
-
-	/* match CRC values, send back u-boot CRC */
-	if ((old[0] == hex[(crc >> 4) & 0xf])
-	    && (old[1] == hex[crc & 0xf])) {
-		crc = 0;
-		n = 0;
-		addr =
-		    CONFIG_ENV_OFFSET - offsetof(env_t, crc) + offsetof(env_t,
-								     data);
-		/* calculate u-boot crc */
-		while (n < ENV_SIZE) {
-			receive(addr, buffer, len);
-			crc = crc32(crc, buffer, len);
-			n += len;
-			addr += len;
-		}
-
-		memcpy(buffer, &crc, 4);
-	}
-}
-
-/************************************************************************
- * Convert IP address to hexadecimals.
- */
-static void
-ip_ml300(uchar * s, uchar * res)
-{
-	char temp[2];
-	u8 i;
-
-	res[0] = 0x00;
-
-	for (i = 0; i < 4; i++) {
-		sprintf(temp, "%02x", atoi(s));
-		s = (uchar *)strchr((char *)s, '.') + 1;
-		strcat((char *)res, temp);
-	}
-}
-
-/************************************************************************
- * Change 0xff (255), a dummy null char to 0x00.
- */
-static void
-change_null(uchar * s)
-{
-	if (s != NULL) {
-		change_null((uchar *)strchr((char *)s + 1, 255));
-		*(strchr((char *)s, 255)) = '\0';
-	}
-}
-
-/************************************************************************
- * Update environment variable name and values to u-boot standard.
- */
-void
-convert_env(void)
-{
-	char *s;		/* pointer to env value */
-	char temp[20];		/* temp storage for addresses */
-
-	/* E -> ethaddr */
-	s = getenv("E");
-	if (s != NULL) {
-		sprintf(temp, "%c%c.%c%c.%c%c.%c%c.%c%c.%c%c",
-			s[0], s[1],  s[ 2], s[ 3],
-			s[4], s[5],  s[ 6], s[ 7],
-			s[8], s[9],  s[10], s[11] );
-		setenv("ethaddr", temp);
-		setenv("E", NULL);
-	}
-
-	/* L -> serial# */
-	s = getenv("L");
-	if (s != NULL) {
-		setenv("serial#", s);
-		setenv("L", NULL);
-	}
-
-	/* I -> ipaddr */
-	s = getenv("I");
-	if (s != NULL) {
-		sprintf(temp, "%d.%d.%d.%d", axtoi((u8 *)s), axtoi((u8 *)(s + 2)),
-			axtoi((u8 *)(s + 4)), axtoi((u8 *)(s + 6)));
-		setenv("ipaddr", temp);
-		setenv("I", NULL);
-	}
-
-	/* S -> serverip */
-	s = getenv("S");
-	if (s != NULL) {
-		sprintf(temp, "%d.%d.%d.%d", axtoi((u8 *)s), axtoi((u8 *)(s + 2)),
-			axtoi((u8 *)(s + 4)), axtoi((u8 *)(s + 6)));
-		setenv("serverip", temp);
-		setenv("S", NULL);
-	}
-
-	/* A -> bootargs */
-	s = getenv("A");
-	if (s != NULL) {
-		setenv("bootargs", s);
-		setenv("A", NULL);
-	}
-
-	/* F -> bootfile */
-	s = getenv("F");
-	if (s != NULL) {
-		setenv("bootfile", s);
-		setenv("F", NULL);
-	}
-
-	/* M -> bootcmd */
-	s = getenv("M");
-	if (s != NULL) {
-		setenv("bootcmd", s);
-		setenv("M", NULL);
-	}
-
-	/* Don't include C (CRC) */
-	setenv("C", NULL);
-}
-
-/************************************************************************
- * Save user modified environment values back to EEPROM.
- */
-static void
-save_env(void)
-{
-	char eprom[ENV_SIZE];	/* buffer to be written back to EEPROM */
-	char *s, temp[20];
-	char ff[] = { 0xff, 0x00 };	/* dummy null value */
-	u32 len;		/* length of env to be written to EEPROM */
-
-	eprom[0] = 0x00;
-
-	/* ethaddr -> E */
-	s = getenv("ethaddr");
-	if (s != NULL) {
-		strcat(eprom, "E=");
-		sprintf(temp, "%c%c%c%c%c%c%c%c%c%c%c%c",
-			*s, *(s + 1), *(s + 3), *(s + 4), *(s + 6), *(s + 7),
-			*(s + 9), *(s + 10), *(s + 12), *(s + 13), *(s + 15),
-			*(s + 16));
-		strcat(eprom, temp);
-		strcat(eprom, ff);
-	}
-
-	/* serial# -> L */
-	s = getenv("serial#");
-	if (s != NULL) {
-		strcat(eprom, "L=");
-		strcat(eprom, s);
-		strcat(eprom, ff);
-	}
-
-	/* ipaddr -> I */
-	s = getenv("ipaddr");
-	if (s != NULL) {
-		strcat(eprom, "I=");
-		ip_ml300((uchar *)s, (uchar *)temp);
-		strcat(eprom, temp);
-		strcat(eprom, ff);
-	}
-
-	/* serverip -> S */
-	s = getenv("serverip");
-	if (s != NULL) {
-		strcat(eprom, "S=");
-		ip_ml300((uchar *)s, (uchar *)temp);
-		strcat(eprom, temp);
-		strcat(eprom, ff);
-	}
-
-	/* bootargs -> A */
-	s = getenv("bootargs");
-	if (s != NULL) {
-		strcat(eprom, "A=");
-		strcat(eprom, s);
-		strcat(eprom, ff);
-	}
-
-	/* bootfile -> F */
-	s = getenv("bootfile");
-	if (s != NULL) {
-		strcat(eprom, "F=");
-		strcat(eprom, s);
-		strcat(eprom, ff);
-	}
-
-	/* bootcmd -> M */
-	s = getenv("bootcmd");
-	if (s != NULL) {
-		strcat(eprom, "M=");
-		strcat(eprom, s);
-		strcat(eprom, ff);
-	}
-
-	len = strlen(eprom);	/* find env length without crc */
-	change_null((uchar *)eprom);	/* change 0xff to 0x00 */
-
-	/* update EEPROM env values if there is enough space */
-	if (update_crc(len, (uchar *)eprom) == 0)
-		send(CONFIG_ENV_OFFSET, (uchar *)eprom, len + 6);
-}
-
-/************************************************************************
- * U-boot call for EEPROM read associated activities.
- */
-int
-i2c_read(uchar chip, uint addr, int alen, uchar * buffer, int len)
-{
-
-	if (envStep == 0) {
-		/* first read call is for crc */
-		read_crc(buffer, len);
-		++envStep;
-		return 0;
-	} else if (envStep == 1) {
-		/* then read out EEPROM content for runtime u-boot CRC calculation */
-		receive(addr, buffer, len);
-
-		if (addr + len - CONFIG_ENV_OFFSET == CONFIG_ENV_SIZE)
-			/* end of runtime crc read */
-			++envStep;
-		return 0;
-	}
-
-	if (len < 2) {
-		/* when call getenv_r */
-		receive(addr, buffer, len);
-	} else if (addr + len < CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) {
-		/* calling env_relocate(), but don't read out
-		   crc value from EEPROM */
-		receive(addr, buffer + 4, len);
-	} else {
-		receive(addr, buffer + 4, len - 4);
-	}
-
-	return 0;
-
-}
-
-/************************************************************************
- * U-boot call for EEPROM write acativities.
- */
-int
-i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len)
-{
-	/* save env on last page write called by u-boot */
-	if (addr + len >= CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
-		save_env();
-
-	return 0;
-}
-
-/************************************************************************
- * Dummy function.
- */
-int
-i2c_probe(uchar chip)
-{
-	return 1;
-}
-
-#endif
diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
index f8400bcc04..d22eb6634a 100644
--- a/common/cmd_bdinfo.c
+++ b/common/cmd_bdinfo.c
@@ -31,7 +31,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 static void print_num(const char *, ulong);
 
-#if !defined(CONFIG_ARM) || defined(CONFIG_CMD_NET)
+#if !(defined(CONFIG_ARM) || defined(CONFIG_M68K)) || defined(CONFIG_CMD_NET)
 static void print_eth(int idx);
 #endif
 
@@ -350,7 +350,7 @@ static void print_num(const char *name, ulong value)
 	printf ("%-12s= 0x%08lX\n", name, value);
 }
 
-#if !defined(CONFIG_ARM) || defined(CONFIG_CMD_NET)
+#if !(defined(CONFIG_ARM) || defined(CONFIG_M68K)) || defined(CONFIG_CMD_NET)
 static void print_eth(int idx)
 {
 	char name[10], *val;
diff --git a/common/cmd_bmp.c b/common/cmd_bmp.c
index 74ab24ca94..583b0090cb 100644
--- a/common/cmd_bmp.c
+++ b/common/cmd_bmp.c
@@ -90,46 +90,77 @@ bmp_image_t *gunzip_bmp(unsigned long addr, unsigned long *lenp)
 }
 #endif
 
+static int do_bmp_info(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+	ulong addr;
 
-/*
- * Subroutine:  do_bmp
- *
- * Description: Handler for 'bmp' command..
- *
- * Inputs:	argv[1] contains the subcommand
- *
- * Return:      None
- *
- */
-int do_bmp(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+	switch (argc) {
+	case 1:		/* use load_addr as default address */
+		addr = load_addr;
+		break;
+	case 2:		/* use argument */
+		addr = simple_strtoul(argv[1], NULL, 16);
+		break;
+	default:
+		cmd_usage(cmdtp);
+		return 1;
+	}
+
+	return (bmp_info(addr));
+}
+
+static int do_bmp_display(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 {
 	ulong addr;
 	int x = 0, y = 0;
 
 	switch (argc) {
-	case 2:		/* use load_addr as default address */
+	case 1:		/* use load_addr as default address */
 		addr = load_addr;
 		break;
-	case 3:		/* use argument */
-		addr = simple_strtoul(argv[2], NULL, 16);
+	case 2:		/* use argument */
+		addr = simple_strtoul(argv[1], NULL, 16);
 		break;
-	case 5:
-		addr = simple_strtoul(argv[2], NULL, 16);
-	        x = simple_strtoul(argv[3], NULL, 10);
-	        y = simple_strtoul(argv[4], NULL, 10);
+	case 4:
+		addr = simple_strtoul(argv[1], NULL, 16);
+	        x = simple_strtoul(argv[2], NULL, 10);
+	        y = simple_strtoul(argv[3], NULL, 10);
 	        break;
 	default:
 		cmd_usage(cmdtp);
 		return 1;
 	}
 
-	/* Allow for short names
-	 * Adjust length if more sub-commands get added
-	 */
-	if (strncmp(argv[1],"info",1) == 0) {
-		return (bmp_info(addr));
-	} else if (strncmp(argv[1],"display",1) == 0) {
-	    return (bmp_display(addr, x, y));
+	 return (bmp_display(addr, x, y));
+}
+
+static cmd_tbl_t cmd_bmp_sub[] = {
+	U_BOOT_CMD_MKENT(info, 3, 0, do_bmp_info, "", ""),
+	U_BOOT_CMD_MKENT(display, 5, 0, do_bmp_display, "", ""),
+};
+
+/*
+ * Subroutine:  do_bmp
+ *
+ * Description: Handler for 'bmp' command..
+ *
+ * Inputs:	argv[1] contains the subcommand
+ *
+ * Return:      None
+ *
+ */
+static int do_bmp(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	cmd_tbl_t *c;
+
+	/* Strip off leading 'bmp' command argument */
+	argc--;
+	argv++;
+
+	c = find_cmd_tbl(argv[0], &cmd_bmp_sub[0], ARRAY_SIZE(cmd_bmp_sub));
+
+	if (c) {
+		return  c->cmd(cmdtp, flag, argc, argv);
 	} else {
 		cmd_usage(cmdtp);
 		return 1;
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 23ab0c4aae..452686dd3d 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -291,7 +291,8 @@ static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		return 1;
 	}
 
-	if ((images.os.type == IH_TYPE_KERNEL) &&
+	if (((images.os.type == IH_TYPE_KERNEL) ||
+	     (images.os.type == IH_TYPE_MULTI)) &&
 	    (images.os.os == IH_OS_LINUX)) {
 		/* find ramdisk */
 		ret = boot_get_ramdisk (argc, argv, &images, IH_INITRD_ARCH,
@@ -462,7 +463,7 @@ static int bootm_start_standalone(ulong iflag, int argc, char *argv[])
 
 /* we overload the cmd field with our state machine info instead of a
  * function pointer */
-cmd_tbl_t cmd_bootm_sub[] = {
+static cmd_tbl_t cmd_bootm_sub[] = {
 	U_BOOT_CMD_MKENT(start, 0, 1, (void *)BOOTM_STATE_START, "", ""),
 	U_BOOT_CMD_MKENT(loados, 0, 1, (void *)BOOTM_STATE_LOADOS, "", ""),
 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC)
diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c
index 62cbd335e5..8b9c2c9490 100644
--- a/common/cmd_i2c.c
+++ b/common/cmd_i2c.c
@@ -130,6 +130,8 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #endif
 
+#define DISP_LINE_LEN	16
+
 /* TODO: Implement architecture-specific get/set functions */
 unsigned int __def_i2c_get_bus_speed(void)
 {
@@ -149,12 +151,82 @@ int i2c_set_bus_speed(unsigned int)
 	__attribute__((weak, alias("__def_i2c_set_bus_speed")));
 
 /*
+ * get_alen: small parser helper function to get address length
+ * returns the address length,or 0 on error
+ */
+static uint get_alen(char *arg)
+{
+	int	j;
+	int	alen;
+
+	alen = 1;
+	for (j = 0; j < 8; j++) {
+		if (arg[j] == '.') {
+			alen = arg[j+1] - '0';
+			if (alen > 3) {
+				return 0;
+			}
+			break;
+		} else if (arg[j] == '\0')
+			break;
+	}
+	return alen;
+}
+
+/*
  * Syntax:
- *	i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
+ *	i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr}
  */
-#define DISP_LINE_LEN	16
 
-int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	u_char	chip;
+	uint	devaddr, alen, length;
+	u_char  *memaddr;
+
+	if (argc != 5) {
+		cmd_usage(cmdtp);
+		return 1;
+	}
+
+	/*
+	 * I2C chip address
+	 */
+	chip = simple_strtoul(argv[1], NULL, 16);
+
+	/*
+	 * I2C data address within the chip.  This can be 1 or
+	 * 2 bytes long.  Some day it might be 3 bytes long :-).
+	 */
+	devaddr = simple_strtoul(argv[2], NULL, 16);
+	alen = get_alen(argv[2]);
+	if (alen == 0) {
+		cmd_usage(cmdtp);
+		return 1;
+	}
+
+	/*
+	 * Length is the number of objects, not number of bytes.
+	 */
+	length = simple_strtoul(argv[3], NULL, 16);
+
+	/*
+	 * memaddr is the address where to store things in memory
+	 */
+	memaddr = (u_char *)simple_strtoul(argv[4], NULL, 16);
+
+	if (i2c_read(chip, devaddr, alen, memaddr, length) != 0) {
+		puts ("Error reading the chip.\n");
+		return 1;
+	}
+	return 0;
+}
+
+/*
+ * Syntax:
+ *	i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
+ */
+static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
 	u_char	chip;
 	uint	addr, alen, length;
@@ -177,7 +249,6 @@ int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		/*
 		 * New command specified.
 		 */
-		alen = 1;
 
 		/*
 		 * I2C chip address
@@ -189,17 +260,10 @@ int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		 * 2 bytes long.  Some day it might be 3 bytes long :-).
 		 */
 		addr = simple_strtoul(argv[2], NULL, 16);
-		alen = 1;
-		for (j = 0; j < 8; j++) {
-			if (argv[2][j] == '.') {
-				alen = argv[2][j+1] - '0';
-				if (alen > 4) {
-					cmd_usage(cmdtp);
-					return 1;
-				}
-				break;
-			} else if (argv[2][j] == '\0')
-				break;
+		alen = get_alen(argv[2]);
+		if (alen == 0) {
+			cmd_usage(cmdtp);
+			return 1;
 		}
 
 		/*
@@ -260,14 +324,13 @@ int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  * Syntax:
  *	i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
  */
-int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
 	uchar	chip;
 	ulong	addr;
 	uint	alen;
 	uchar	byte;
 	int	count;
-	int	j;
 
 	if ((argc < 4) || (argc > 5)) {
 		cmd_usage(cmdtp);
@@ -283,17 +346,10 @@ int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	 * Address is always specified.
 	 */
 	addr = simple_strtoul(argv[2], NULL, 16);
-	alen = 1;
-	for (j = 0; j < 8; j++) {
-		if (argv[2][j] == '.') {
-			alen = argv[2][j+1] - '0';
-			if (alen > 4) {
-				cmd_usage(cmdtp);
-				return 1;
-			}
-			break;
-		} else if (argv[2][j] == '\0')
-			break;
+	alen = get_alen(argv[2]);
+	if (alen == 0) {
+		cmd_usage(cmdtp);
+		return 1;
 	}
 
 	/*
@@ -332,7 +388,7 @@ int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  * Syntax:
  *	i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count}
  */
-int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
 	uchar	chip;
 	ulong	addr;
@@ -341,7 +397,6 @@ int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	uchar	byte;
 	ulong	crc;
 	ulong	err;
-	int	j;
 
 	if (argc < 4) {
 		cmd_usage(cmdtp);
@@ -357,17 +412,10 @@ int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	 * Address is always specified.
 	 */
 	addr = simple_strtoul(argv[2], NULL, 16);
-	alen = 1;
-	for (j = 0; j < 8; j++) {
-		if (argv[2][j] == '.') {
-			alen = argv[2][j+1] - '0';
-			if (alen > 4) {
-				cmd_usage(cmdtp);
-				return 1;
-			}
-			break;
-		} else if (argv[2][j] == '\0')
-			break;
+	alen = get_alen(argv[2]);
+	if (alen == 0) {
+		cmd_usage(cmdtp);
+		return 1;
 	}
 
 	/*
@@ -412,7 +460,6 @@ mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
 	ulong	data;
 	int	size = 1;
 	int	nbytes;
-	int	j;
 	extern char console_buffer[];
 
 	if (argc != 3) {
@@ -447,17 +494,10 @@ mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
 		 * Address is always specified.
 		 */
 		addr = simple_strtoul(argv[2], NULL, 16);
-		alen = 1;
-		for (j = 0; j < 8; j++) {
-			if (argv[2][j] == '.') {
-				alen = argv[2][j+1] - '0';
-				if (alen > 4) {
-					cmd_usage(cmdtp);
-					return 1;
-				}
-				break;
-			} else if (argv[2][j] == '\0')
-				break;
+		alen = get_alen(argv[2]);
+		if (alen == 0) {
+			cmd_usage(cmdtp);
+			return 1;
 		}
 	}
 
@@ -535,7 +575,7 @@ mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
  * Syntax:
  *	i2c probe {addr}{.0, .1, .2}
  */
-int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
 	int j;
 #if defined(CONFIG_SYS_I2C_NOPROBES)
@@ -579,7 +619,7 @@ int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  *	{length} - Number of bytes to read
  *	{delay}  - A DECIMAL number and defaults to 1000 uSec
  */
-int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
 	u_char	chip;
 	ulong	alen;
@@ -587,7 +627,6 @@ int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	uint	length;
 	u_char	bytes[16];
 	int	delay;
-	int	j;
 
 	if (argc < 3) {
 		cmd_usage(cmdtp);
@@ -603,17 +642,10 @@ int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	 * Address is always specified.
 	 */
 	addr = simple_strtoul(argv[2], NULL, 16);
-	alen = 1;
-	for (j = 0; j < 8; j++) {
-		if (argv[2][j] == '.') {
-			alen = argv[2][j+1] - '0';
-			if (alen > 4) {
-				cmd_usage(cmdtp);
-				return 1;
-			}
-			break;
-		} else if (argv[2][j] == '\0')
-			break;
+	alen = get_alen(argv[2]);
+	if (alen == 0) {
+		cmd_usage(cmdtp);
+		return 1;
 	}
 
 	/*
@@ -699,7 +731,7 @@ static void decode_bits (u_char const b, char const *str[], int const do_once)
  * Syntax:
  *	i2c sdram {i2c_chip}
  */
-int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 {
 	enum { unknown, EDO, SDRAM, DDR2 } type;
 
@@ -1176,7 +1208,7 @@ int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 #endif
 
 #if defined(CONFIG_I2C_MUX)
-int do_i2c_add_bus(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_add_bus(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 {
 	int ret=0;
 
@@ -1207,7 +1239,7 @@ int do_i2c_add_bus(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 #endif  /* CONFIG_I2C_MUX */
 
 #if defined(CONFIG_I2C_MULTI_BUS)
-int do_i2c_bus_num(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_bus_num(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 {
 	int bus_idx, ret=0;
 
@@ -1225,7 +1257,7 @@ int do_i2c_bus_num(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 }
 #endif  /* CONFIG_I2C_MULTI_BUS */
 
-int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 {
 	int speed, ret=0;
 
@@ -1242,46 +1274,60 @@ int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 	return ret;
 }
 
-int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 {
-	/* Strip off leading 'i2c' command argument */
-	argc--;
-	argv++;
+	return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
+}
 
+static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+	return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
+}
+
+static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+	return 0;
+}
+
+static cmd_tbl_t cmd_i2c_sub[] = {
 #if defined(CONFIG_I2C_MUX)
-	if (!strncmp(argv[0], "bu", 2))
-		return do_i2c_add_bus(cmdtp, flag, argc, argv);
+	U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_add_bus, "", ""),
 #endif  /* CONFIG_I2C_MUX */
-	if (!strncmp(argv[0], "sp", 2))
-		return do_i2c_bus_speed(cmdtp, flag, argc, argv);
+	U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
 #if defined(CONFIG_I2C_MULTI_BUS)
-	if (!strncmp(argv[0], "de", 2))
-		return do_i2c_bus_num(cmdtp, flag, argc, argv);
+	U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
 #endif  /* CONFIG_I2C_MULTI_BUS */
-	if (!strncmp(argv[0], "md", 2))
-		return do_i2c_md(cmdtp, flag, argc, argv);
-	if (!strncmp(argv[0], "mm", 2))
-		return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
-	if (!strncmp(argv[0], "mw", 2))
-		return do_i2c_mw(cmdtp, flag, argc, argv);
-	if (!strncmp(argv[0], "nm", 2))
-		return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
-	if (!strncmp(argv[0], "cr", 2))
-		return do_i2c_crc(cmdtp, flag, argc, argv);
-	if (!strncmp(argv[0], "pr", 2))
-		return do_i2c_probe(cmdtp, flag, argc, argv);
-	if (!strncmp(argv[0], "re", 2)) {
-		i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-		return 0;
-	}
-	if (!strncmp(argv[0], "lo", 2))
-		return do_i2c_loop(cmdtp, flag, argc, argv);
+	U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""),
+	U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""),
+	U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""),
+	U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""),
+	U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""),
+	U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""),
+	U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""),
+	U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""),
 #if defined(CONFIG_CMD_SDRAM)
-	if (!strncmp(argv[0], "sd", 2))
-		return do_sdram(cmdtp, flag, argc, argv);
+	U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""),
 #endif
-	cmd_usage(cmdtp);
-	return 0;
+	U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""),
+};
+
+static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+	cmd_tbl_t *c;
+
+	/* Strip off leading 'i2c' command argument */
+	argc--;
+	argv++;
+
+	c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub));
+
+	if (c) {
+		return  c->cmd(cmdtp, flag, argc, argv);
+	} else {
+		cmd_usage(cmdtp);
+		return 1;
+	}
 }
 
 /***************************************************/
@@ -1289,30 +1335,29 @@ int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 U_BOOT_CMD(
 	i2c, 6, 1, do_i2c,
 	"I2C sub-system",
-	"speed [speed] - show or set I2C bus speed\n"
 #if defined(CONFIG_I2C_MUX)
-	"i2c bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes\n"
+	"bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes\ni2c "
 #endif  /* CONFIG_I2C_MUX */
+	"crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
 #if defined(CONFIG_I2C_MULTI_BUS)
 	"i2c dev [dev] - show or set current I2C bus\n"
 #endif  /* CONFIG_I2C_MULTI_BUS */
+	"i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n"
 	"i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n"
 	"i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n"
 	"i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n"
 	"i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
-	"i2c crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
 	"i2c probe - show devices on the I2C bus\n"
+	"i2c read chip address[.0, .1, .2] length memaddress - read to memory \n"
 	"i2c reset - re-init the I2C Controller\n"
-	"i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device"
 #if defined(CONFIG_CMD_SDRAM)
-	"\n"
-	"i2c sdram chip - print SDRAM configuration information"
+	"i2c sdram chip - print SDRAM configuration information\n"
 #endif
+	"i2c speed [speed] - show or set I2C bus speed"
 );
 
 #if defined(CONFIG_I2C_MUX)
-
-int i2c_mux_add_device(I2C_MUX_DEVICE *dev)
+static int i2c_mux_add_device(I2C_MUX_DEVICE *dev)
 {
 	I2C_MUX_DEVICE	*devtmp = i2c_mux_devices;
 
diff --git a/common/cmd_mtdparts.c b/common/cmd_mtdparts.c
index 20fed2aadc..0b5f747141 100644
--- a/common/cmd_mtdparts.c
+++ b/common/cmd_mtdparts.c
@@ -776,7 +776,7 @@ static int device_del(struct mtd_device *dev)
  * @param num device number
  * @return NULL if requested device does not exist
  */
-static struct mtd_device* device_find(u8 type, u8 num)
+struct mtd_device *device_find(u8 type, u8 num)
 {
 	struct list_head *entry;
 	struct mtd_device *dev_tmp;
diff --git a/common/cmd_nand.c b/common/cmd_nand.c
index 075a8afb60..9b0c930530 100644
--- a/common/cmd_nand.c
+++ b/common/cmd_nand.c
@@ -327,8 +327,14 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 			     "are sure of what you are doing!\n"
 			     "\nReally scrub this NAND flash? <y/N>\n");
 
-			if (getc() == 'y' && getc() == '\r') {
-				opts.scrub = 1;
+			if (getc() == 'y') {
+				puts("y");
+				if (getc() == '\r')
+					opts.scrub = 1;
+				else {
+					puts("scrub aborted\n");
+					return -1;
+				}
 			} else {
 				puts("scrub aborted\n");
 				return -1;
diff --git a/common/cmd_setexpr.c b/common/cmd_setexpr.c
index f8b5d4dcfe..2d3719755e 100644
--- a/common/cmd_setexpr.c
+++ b/common/cmd_setexpr.c
@@ -28,10 +28,33 @@
 #include <config.h>
 #include <command.h>
 
+static ulong get_arg(char *s, int w)
+{
+	ulong *p;
+
+        /*
+	 * if the parameter starts with a '*' then assume
+	 * it is a pointer to the value we want
+	 */
+
+	if (s[0] == '*') {
+		p = (ulong *)simple_strtoul(&s[1], NULL, 16);
+		switch (w) {
+		case 1: return((ulong)(*(uchar *)p));
+		case 2: return((ulong)(*(ushort *)p));
+		case 4:
+		default: return(*p);
+		}
+	} else {
+		return simple_strtoul(s, NULL, 16);
+	}
+}
+
 int do_setexpr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
 	ulong a, b;
 	char buf[16];
+	int w;
 
 	/* Validate arguments */
 	if ((argc != 5) || (strlen(argv[3]) != 1)) {
@@ -39,8 +62,10 @@ int do_setexpr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		return 1;
 	}
 
-	a = simple_strtoul(argv[2], NULL, 16);
-	b = simple_strtoul(argv[4], NULL, 16);
+	w = cmd_get_data_size(argv[0], 4);
+
+	a = get_arg(argv[2], w);
+	b = get_arg(argv[4], w);
 
 	switch (argv[3][0]) {
 	case '|': sprintf(buf, "%lx", (a | b)); break;
@@ -64,7 +89,8 @@ int do_setexpr(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 U_BOOT_CMD(
 	setexpr, 5, 0, do_setexpr,
 	"set environment variable as the result of eval expression",
-	"name value1 <op> value2\n"
+	"[.b, .w, .l] name value1 <op> value2\n"
 	"    - set environment variable 'name' to the result of the evaluated\n"
-	"      express specified by <op>.  <op> can be &, |, ^, +, -, *, /, %"
+	"      express specified by <op>.  <op> can be &, |, ^, +, -, *, /, %\n"
+	"      size argument is only meaningful if value1 and/or value2 are memory addresses"
 );
diff --git a/common/cmd_ubi.c b/common/cmd_ubi.c
index 54faac1c93..2484b40491 100644
--- a/common/cmd_ubi.c
+++ b/common/cmd_ubi.c
@@ -190,7 +190,7 @@ static int ubi_remove_vol(char *volume)
 {
 	int i, err, reserved_pebs;
 	int found = 0, vol_id = 0;
-	struct ubi_volume *vol;
+	struct ubi_volume *vol = NULL;
 
 	for (i = 0; i < ubi->vtbl_slots; i++) {
 		vol = ubi->volumes[i];
diff --git a/common/cmd_usb.c b/common/cmd_usb.c
index 9de515c323..ee3755c121 100644
--- a/common/cmd_usb.c
+++ b/common/cmd_usb.c
@@ -387,7 +387,7 @@ int do_usbboot(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 
 	dev = simple_strtoul(boot_device, &ep, 16);
 	stor_dev = usb_stor_get_dev(dev);
-	if (stor_dev->type == DEV_TYPE_UNKNOWN) {
+	if (stor_dev == NULL || stor_dev->type == DEV_TYPE_UNKNOWN) {
 		printf("\n** Device %d not available\n", dev);
 		return 1;
 	}
@@ -595,22 +595,25 @@ int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	if (strncmp(argv[1], "part", 4) == 0) {
 		int devno, ok = 0;
 		if (argc == 2) {
-			for (devno = 0; devno < USB_MAX_STOR_DEV; ++devno) {
+			for (devno = 0; ; ++devno) {
 				stor_dev = usb_stor_get_dev(devno);
+				if (stor_dev == NULL)
+					break;
 				if (stor_dev->type != DEV_TYPE_UNKNOWN) {
 					ok++;
 					if (devno)
 						printf("\n");
-					printf("print_part of %x\n", devno);
+					debug("print_part of %x\n", devno);
 					print_part(stor_dev);
 				}
 			}
 		} else {
 			devno = simple_strtoul(argv[2], NULL, 16);
 			stor_dev = usb_stor_get_dev(devno);
-			if (stor_dev->type != DEV_TYPE_UNKNOWN) {
+			if (stor_dev != NULL &&
+			    stor_dev->type != DEV_TYPE_UNKNOWN) {
 				ok++;
-				printf("print_part of %x\n", devno);
+				debug("print_part of %x\n", devno);
 				print_part(stor_dev);
 			}
 		}
@@ -668,12 +671,12 @@ int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		if (argc == 3) {
 			int dev = (int)simple_strtoul(argv[2], NULL, 10);
 			printf("\nUSB device %d: ", dev);
-			if (dev >= USB_MAX_STOR_DEV) {
+			stor_dev = usb_stor_get_dev(dev);
+			if (stor_dev == NULL) {
 				printf("unknown device\n");
 				return 1;
 			}
 			printf("\n    Device %d: ", dev);
-			stor_dev = usb_stor_get_dev(dev);
 			dev_print(stor_dev);
 			if (stor_dev->type == DEV_TYPE_UNKNOWN)
 				return 1;
diff --git a/common/dlmalloc.c b/common/dlmalloc.c
index 205fc40ac8..2276532da7 100644
--- a/common/dlmalloc.c
+++ b/common/dlmalloc.c
@@ -1515,7 +1515,7 @@ void *sbrk(ptrdiff_t increment)
 	ulong new = old + increment;
 
 	if ((new < mem_malloc_start) || (new > mem_malloc_end))
-		return NULL;
+		return (void *)MORECORE_FAILURE;
 
 	mem_malloc_brk = new;
 
diff --git a/common/fdt_support.c b/common/fdt_support.c
index f89a3eef66..b6f252a87b 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -757,3 +757,235 @@ int fdt_fixup_nor_flash_size(void *blob, int cs, u32 size)
 	return -1;
 }
 #endif
+
+#ifdef CONFIG_FDT_FIXUP_PARTITIONS
+#include <jffs2/load_kernel.h>
+#include <mtd_node.h>
+
+struct reg_cell {
+	unsigned int r0;
+	unsigned int r1;
+};
+
+int fdt_del_subnodes(const void *blob, int parent_offset)
+{
+	int off, ndepth;
+	int ret;
+
+	for (ndepth = 0, off = fdt_next_node(blob, parent_offset, &ndepth);
+	     (off >= 0) && (ndepth > 0);
+	     off = fdt_next_node(blob, off, &ndepth)) {
+		if (ndepth == 1) {
+			debug("delete %s: offset: %x\n",
+				fdt_get_name(blob, off, 0), off);
+			ret = fdt_del_node((void *)blob, off);
+			if (ret < 0) {
+				printf("Can't delete node: %s\n",
+					fdt_strerror(ret));
+				return ret;
+			} else {
+				ndepth = 0;
+				off = parent_offset;
+			}
+		}
+	}
+	return 0;
+}
+
+int fdt_increase_size(void *fdt, int add_len)
+{
+	int newlen;
+
+	newlen = fdt_totalsize(fdt) + add_len;
+
+	/* Open in place with a new len */
+	return fdt_open_into(fdt, fdt, newlen);
+}
+
+int fdt_del_partitions(void *blob, int parent_offset)
+{
+	const void *prop;
+	int ndepth = 0;
+	int off;
+	int ret;
+
+	off = fdt_next_node(blob, parent_offset, &ndepth);
+	if (off > 0 && ndepth == 1) {
+		prop = fdt_getprop(blob, off, "label", NULL);
+		if (prop == NULL) {
+			/*
+			 * Could not find label property, nand {}; node?
+			 * Check subnode, delete partitions there if any.
+			 */
+			return fdt_del_partitions(blob, off);
+		} else {
+			ret = fdt_del_subnodes(blob, parent_offset);
+			if (ret < 0) {
+				printf("Can't remove subnodes: %s\n",
+					fdt_strerror(ret));
+				return ret;
+			}
+		}
+	}
+	return 0;
+}
+
+int fdt_node_set_part_info(void *blob, int parent_offset,
+			   struct mtd_device *dev)
+{
+	struct list_head *pentry;
+	struct part_info *part;
+	struct reg_cell cell;
+	int off, ndepth = 0;
+	int part_num, ret;
+	char buf[64];
+
+	ret = fdt_del_partitions(blob, parent_offset);
+	if (ret < 0)
+		return ret;
+
+	/*
+	 * Check if it is nand {}; subnode, adjust
+	 * the offset in this case
+	 */
+	off = fdt_next_node(blob, parent_offset, &ndepth);
+	if (off > 0 && ndepth == 1)
+		parent_offset = off;
+
+	part_num = 0;
+	list_for_each_prev(pentry, &dev->parts) {
+		int newoff;
+
+		part = list_entry(pentry, struct part_info, link);
+
+		debug("%2d: %-20s0x%08x\t0x%08x\t%d\n",
+			part_num, part->name, part->size,
+			part->offset, part->mask_flags);
+
+		sprintf(buf, "partition@%x", part->offset);
+add_sub:
+		ret = fdt_add_subnode(blob, parent_offset, buf);
+		if (ret == -FDT_ERR_NOSPACE) {
+			ret = fdt_increase_size(blob, 512);
+			if (!ret)
+				goto add_sub;
+			else
+				goto err_size;
+		} else if (ret < 0) {
+			printf("Can't add partition node: %s\n",
+				fdt_strerror(ret));
+			return ret;
+		}
+		newoff = ret;
+
+		/* Check MTD_WRITEABLE_CMD flag */
+		if (part->mask_flags & 1) {
+add_ro:
+			ret = fdt_setprop(blob, newoff, "read_only", NULL, 0);
+			if (ret == -FDT_ERR_NOSPACE) {
+				ret = fdt_increase_size(blob, 512);
+				if (!ret)
+					goto add_ro;
+				else
+					goto err_size;
+			} else if (ret < 0)
+				goto err_prop;
+		}
+
+		cell.r0 = cpu_to_fdt32(part->offset);
+		cell.r1 = cpu_to_fdt32(part->size);
+add_reg:
+		ret = fdt_setprop(blob, newoff, "reg", &cell, sizeof(cell));
+		if (ret == -FDT_ERR_NOSPACE) {
+			ret = fdt_increase_size(blob, 512);
+			if (!ret)
+				goto add_reg;
+			else
+				goto err_size;
+		} else if (ret < 0)
+			goto err_prop;
+
+add_label:
+		ret = fdt_setprop_string(blob, newoff, "label", part->name);
+		if (ret == -FDT_ERR_NOSPACE) {
+			ret = fdt_increase_size(blob, 512);
+			if (!ret)
+				goto add_label;
+			else
+				goto err_size;
+		} else if (ret < 0)
+			goto err_prop;
+
+		part_num++;
+	}
+	return 0;
+err_size:
+	printf("Can't increase blob size: %s\n", fdt_strerror(ret));
+	return ret;
+err_prop:
+	printf("Can't add property: %s\n", fdt_strerror(ret));
+	return ret;
+}
+
+/*
+ * Update partitions in nor/nand nodes using info from
+ * mtdparts environment variable. The nodes to update are
+ * specified by node_info structure which contains mtd device
+ * type and compatible string: E. g. the board code in
+ * ft_board_setup() could use:
+ *
+ *	struct node_info nodes[] = {
+ *		{ "fsl,mpc5121-nfc",    MTD_DEV_TYPE_NAND, },
+ *		{ "cfi-flash",          MTD_DEV_TYPE_NOR,  },
+ *	};
+ *
+ *	fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
+ */
+void fdt_fixup_mtdparts(void *blob, void *node_info, int node_info_size)
+{
+	struct node_info *ni = node_info;
+	struct mtd_device *dev;
+	char *parts;
+	int i, idx;
+	int noff;
+
+	parts = getenv("mtdparts");
+	if (!parts)
+		return;
+
+	if (mtdparts_init() != 0)
+		return;
+
+	for (i = 0; i < node_info_size; i++) {
+		idx = 0;
+		noff = fdt_node_offset_by_compatible(blob, -1, ni[i].compat);
+		while (noff != -FDT_ERR_NOTFOUND) {
+			debug("%s: %s, mtd dev type %d\n",
+				fdt_get_name(blob, noff, 0),
+				ni[i].compat, ni[i].type);
+			dev = device_find(ni[i].type, idx++);
+			if (dev) {
+				if (fdt_node_set_part_info(blob, noff, dev))
+					return; /* return on error */
+			}
+
+			/* Jump to next flash node */
+			noff = fdt_node_offset_by_compatible(blob, noff,
+							     ni[i].compat);
+		}
+	}
+}
+#endif
+
+void fdt_del_node_and_alias(void *blob, const char *alias)
+{
+	int off = fdt_path_offset(blob, alias);
+
+	if (off < 0)
+		return;
+
+	fdt_del_node(blob, off);
+
+	off = fdt_path_offset(blob, "/aliases");
+	fdt_delprop(blob, off, alias);
+}
diff --git a/common/lcd.c b/common/lcd.c
index db799db6b2..64fb1c6408 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -63,7 +63,7 @@
 /************************************************************************/
 #ifdef CONFIG_LCD_LOGO
 # include <bmp_logo.h>		/* Get logo data, width and height	*/
-# if (CONSOLE_COLOR_WHITE >= BMP_LOGO_OFFSET)
+# if (CONSOLE_COLOR_WHITE >= BMP_LOGO_OFFSET) && (LCD_BPP != LCD_COLOR16)
 #  error Default Color Map overlaps with Logo Color Map
 # endif
 #endif
@@ -218,8 +218,12 @@ static void lcd_drawchars (ushort x, ushort y, uchar *str, int count)
 
 	for (row=0;  row < VIDEO_FONT_HEIGHT;  ++row, dest += lcd_line_length)  {
 		uchar *s = str;
-		uchar *d = dest;
 		int i;
+#if LCD_BPP == LCD_COLOR16
+		ushort *d = (ushort *)dest;
+#else
+		uchar *d = dest;
+#endif
 
 #if LCD_BPP == LCD_MONOCHROME
 		uchar rest = *d & -(1 << (8-off));
@@ -244,7 +248,7 @@ static void lcd_drawchars (ushort x, ushort y, uchar *str, int count)
 				bits <<= 1;
 			}
 #elif LCD_BPP == LCD_COLOR16
-			for (c=0; c<16; ++c) {
+			for (c=0; c<8; ++c) {
 				*d++ = (bits & 0x80) ?
 						lcd_color_fg : lcd_color_bg;
 				bits <<= 1;
@@ -521,6 +525,13 @@ void bitmap_plot (int x, int y)
 		cmap = (ushort *)&(cp->lcd_cmap[BMP_LOGO_OFFSET*sizeof(ushort)]);
 #elif defined(CONFIG_ATMEL_LCD)
 		cmap = (uint *) (panel_info.mmio + ATMEL_LCDC_LUT(0));
+#else
+		/*
+		 * default case: generic system with no cmap (most likely 16bpp)
+		 * We set cmap to the source palette, so no change is done.
+		 * This avoids even more ifdef in the next stanza
+		 */
+		cmap = bmp_logo_palette;
 #endif
 
 		WATCHDOG_RESET();
@@ -559,10 +570,15 @@ void bitmap_plot (int x, int y)
 		}
 	}
 	else { /* true color mode */
+		u16 col16;
 		fb16 = (ushort *)(lcd_base + y * lcd_line_length + x);
 		for (i=0; i<BMP_LOGO_HEIGHT; ++i) {
 			for (j=0; j<BMP_LOGO_WIDTH; j++) {
-				fb16[j] = bmp_logo_palette[(bmap[j])];
+				col16 = bmp_logo_palette[(bmap[j]-16)];
+				fb16[j] =
+					((col16 & 0x000F) << 1) |
+					((col16 & 0x00F0) << 3) |
+					((col16 & 0x0F00) << 4);
 				}
 			bmap += BMP_LOGO_WIDTH;
 			fb16 += panel_info.vl_col;
diff --git a/common/main.c b/common/main.c
index c860b0b0e5..f7e7c1c326 100644
--- a/common/main.c
+++ b/common/main.c
@@ -68,7 +68,7 @@ static int abortboot(int);
 
 #undef DEBUG_PARSER
 
-char        console_buffer[CONFIG_SYS_CBSIZE];		/* console I/O buffer	*/
+char        console_buffer[CONFIG_SYS_CBSIZE + 1];	/* console I/O buffer	*/
 
 static char * delete_char (char *buffer, char *p, int *colp, int *np, int plen);
 static char erase_seq[] = "\b \b";		/* erase sequence	*/
@@ -526,7 +526,7 @@ void reset_cmd_timeout(void)
 
 #define CTL_CH(c)		((c) - 'a' + 1)
 
-#define MAX_CMDBUF_SIZE		256
+#define MAX_CMDBUF_SIZE		CONFIG_SYS_CBSIZE
 
 #define CTL_BACKSPACE		('\b')
 #define DEL			((char)255)
@@ -546,7 +546,7 @@ static int hist_cur = -1;
 unsigned hist_num = 0;
 
 char* hist_list[HIST_MAX];
-char hist_lines[HIST_MAX][HIST_SIZE];
+char hist_lines[HIST_MAX][HIST_SIZE + 1];	 /* Save room for NULL */
 
 #define add_idx_minus_one() ((hist_add_idx == 0) ? hist_max : hist_add_idx-1)
 
@@ -730,6 +730,7 @@ static int cread_line(const char *const prompt, char *buf, unsigned int *len)
 		while (!tstc()) {	/* while no incoming data */
 			if (retry_time >= 0 && get_ticks() > endtime)
 				return (-2);	/* timed out */
+			WATCHDOG_RESET();
 		}
 #endif
 
@@ -997,6 +998,7 @@ int readline_into_buffer (const char *const prompt, char * buffer)
 		while (!tstc()) {	/* while no incoming data */
 			if (retry_time >= 0 && get_ticks() > endtime)
 				return (-2);	/* timed out */
+			WATCHDOG_RESET();
 		}
 #endif
 		WATCHDOG_RESET();		/* Trigger watchdog, if needed */
@@ -1005,6 +1007,7 @@ int readline_into_buffer (const char *const prompt, char * buffer)
 		while (!tstc()) {
 			extern void show_activity(int arg);
 			show_activity(0);
+			WATCHDOG_RESET();
 		}
 #endif
 		c = getc();
diff --git a/common/usb_storage.c b/common/usb_storage.c
index a8642c9cc5..4fc01a22b4 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -175,7 +175,7 @@ void uhci_show_temp_int_td(void);
 
 block_dev_desc_t *usb_stor_get_dev(int index)
 {
-	return (index < USB_MAX_STOR_DEV) ? &usb_dev_desc[index] : NULL;
+	return (index < usb_max_devs) ? &usb_dev_desc[index] : NULL;
 }
 
 
@@ -244,7 +244,7 @@ int usb_stor_scan(int mode)
 			 * get info and fill it in
 			 */
 			if (usb_stor_get_info(dev, &usb_stor[usb_max_devs],
-						&usb_dev_desc[usb_max_devs]))
+						&usb_dev_desc[usb_max_devs]) == 1)
 				usb_max_devs++;
 		}
 		/* if storage device */
@@ -888,7 +888,7 @@ static int usb_inquiry(ccb *srb, struct us_data *ss)
 		USB_STOR_PRINTF("inquiry returns %d\n", i);
 		if (i == 0)
 			break;
-	} while (retry--);
+	} while (--retry);
 
 	if (!retry) {
 		printf("error in inquiry\n");
diff --git a/config.mk b/config.mk
index cb1c4af977..73b5195cb6 100644
--- a/config.mk
+++ b/config.mk
@@ -110,14 +110,20 @@ RANLIB	= $(CROSS_COMPILE)RANLIB
 # Load generated board configuration
 sinclude $(OBJTREE)/include/autoconf.mk
 
-ifdef	ARCH
-sinclude $(TOPDIR)/lib_$(ARCH)/config.mk	# include architecture dependend rules
-endif
-ifdef	CPU
-sinclude $(TOPDIR)/cpu/$(CPU)/config.mk		# include  CPU	specific rules
+# Some architecture config.mk files need to know what CPUDIR is set to,
+# so calculate CPUDIR before including ARCH/SOC/CPU config.mk files.
+# Check if arch/$ARCH/cpu/$CPU exists, otherwise assume arch/$ARCH/cpu contains
+# CPU-specific code.
+CPUDIR=arch/$(ARCH)/cpu/$(CPU)
+ifneq ($(SRCTREE)/$(CPUDIR),$(wildcard $(SRCTREE)/$(CPUDIR)))
+CPUDIR=arch/$(ARCH)/cpu
 endif
+
+sinclude $(TOPDIR)/arch/$(ARCH)/config.mk	# include architecture dependend rules
+sinclude $(TOPDIR)/$(CPUDIR)/config.mk		# include  CPU	specific rules
+
 ifdef	SOC
-sinclude $(TOPDIR)/cpu/$(CPU)/$(SOC)/config.mk	# include  SoC	specific rules
+sinclude $(TOPDIR)/$(CPUDIR)/$(SOC)/config.mk	# include  SoC	specific rules
 endif
 ifdef	VENDOR
 BOARDDIR = $(VENDOR)/$(BOARD)
@@ -235,16 +241,21 @@ export	TEXT_BASE PLATFORM_CPPFLAGS PLATFORM_RELFLAGS CPPFLAGS CFLAGS AFLAGS
 #########################################################################
 
 # Allow boards to use custom optimize flags on a per dir/file basis
-BCURDIR := $(notdir $(CURDIR))
+BCURDIR = $(subst $(SRCTREE)/,,$(CURDIR:$(obj)%=%))
 $(obj)%.s:	%.S
-	$(CPP) $(AFLAGS) $(AFLAGS_$(@F)) $(AFLAGS_$(BCURDIR)) -o $@ $<
+	$(CPP) $(AFLAGS) $(AFLAGS_$(BCURDIR)/$(@F)) $(AFLAGS_$(BCURDIR)) \
+		-o $@ $<
 $(obj)%.o:	%.S
-	$(CC)  $(AFLAGS) $(AFLAGS_$(@F)) $(AFLAGS_$(BCURDIR)) -o $@ $< -c
+	$(CC)  $(AFLAGS) $(AFLAGS_$(BCURDIR)/$(@F)) $(AFLAGS_$(BCURDIR)) \
+		-o $@ $< -c
 $(obj)%.o:	%.c
-	$(CC)  $(CFLAGS) $(CFLAGS_$(@F)) $(CFLAGS_$(BCURDIR)) -o $@ $< -c
+	$(CC)  $(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR)) \
+		-o $@ $< -c
 $(obj)%.i:	%.c
-	$(CPP) $(CFLAGS) $(CFLAGS_$(@F)) $(CFLAGS_$(BCURDIR)) -o $@ $< -c
+	$(CPP) $(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR)) \
+		-o $@ $< -c
 $(obj)%.s:	%.c
-	$(CC)  $(CFLAGS) $(CFLAGS_$(@F)) $(CFLAGS_$(BCURDIR)) -o $@ $< -c -S
+	$(CC)  $(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR)) \
+		-o $@ $< -c -S
 
 #########################################################################
diff --git a/cpu/mpc5xxx/firmware_sc_task.impl.S b/cpu/mpc5xxx/firmware_sc_task.impl.S
deleted file mode 100644
index b668ee5cf8..0000000000
--- a/cpu/mpc5xxx/firmware_sc_task.impl.S
+++ /dev/null
@@ -1,364 +0,0 @@
-/*
- * Copyright (C) 2001, Software Center, Motorola China.
- *
- * This file contains microcode for the FEC controller of the MGT5100 CPU.
- */
-
-#include <config.h>
-
-#if defined(CONFIG_MGT5100)
-
-/* sas/sccg, gas target */
-.section	smartdmaInitData,"aw",@progbits	/* Initialized data for task variables */
-.section	smartdmaTaskTable,"aw",@progbits	/* Task tables */
-.globl taskTable
-taskTable:
-.globl scEthernetRecv_Entry
-scEthernetRecv_Entry:		/* Task 0 */
-.long	scEthernetRecv_TDT - taskTable	/* Task 0 Descriptor Table */
-.long	scEthernetRecv_TDT - taskTable + 0x000000a4
-.long	scEthernetRecv_VarTab - taskTable	/* Task 0 Variable Table */
-.long	scEthernetRecv_FDT - taskTable + 0x03	/* Task 0 Function Descriptor Table & Flags */
-.long	0x00000000
-.long	0x00000000
-.long	scEthernetRecv_CSave - taskTable	/* Task 0 context save space */
-.long	0xf0000000
-.globl scEthernetXmit_Entry
-scEthernetXmit_Entry:		/* Task 1 */
-.long	scEthernetXmit_TDT - taskTable	/* Task 1 Descriptor Table */
-.long	scEthernetXmit_TDT - taskTable + 0x000000d0
-.long	scEthernetXmit_VarTab - taskTable	/* Task 1 Variable Table */
-.long	scEthernetXmit_FDT - taskTable + 0x03	/* Task 1 Function Descriptor Table & Flags */
-.long	0x00000000
-.long	0x00000000
-.long	scEthernetXmit_CSave - taskTable	/* Task 1 context save space */
-.long	0xf0000000
-
-
-.globl scEthernetRecv_TDT
-scEthernetRecv_TDT:	/* Task 0 Descriptor Table */
-.long	0xc4c50000	/* 0000:  LCDEXT: idx0 = var9 + var10; idx0 once var0; idx0 += inc0 */
-.long	0x84c5e000	/* 0004:  LCD: idx1 = var9 + var11; ; idx1 += inc0 */
-.long	0x10001f08	/* 0008:    DRD1A: var7 = idx1; FN=0 MORE init=0 WS=0 RS=0 */
-.long	0x10000380	/* 000C:    DRD1A: var0 = *idx0; FN=0 MORE init=0 WS=0 RS=0 */
-.long	0x00000f88	/* 0010:    DRD1A: var3 = *idx1; FN=0 init=0 WS=0 RS=0 */
-.long	0x81980000	/* 0014:  LCD: idx0 = var3; idx0 once var0; idx0 += inc0 */
-.long	0x10000780	/* 0018:    DRD1A: var1 = *idx0; FN=0 MORE init=0 WS=0 RS=0 */
-.long	0x60000000	/* 001C:    DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT init=0 WS=0 RS=0 */
-.long	0x010c504c	/* 0020:    DRD2B1: var4 = EU1(); EU1(var1,var12)  */
-.long	0x82180349	/* 0024:  LCD: idx0 = var4; idx0 != var13; idx0 += inc1 */
-.long	0x81c68004	/* 0028:    LCD: idx1 = var3 + var13 + 4; idx1 once var0; idx1 += inc0 */
-.long	0x70000000	/* 002C:      DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT MORE init=0 WS=0 RS=0 */
-.long	0x018c504e	/* 0030:      DRD2B1: var6 = EU1(); EU1(var1,var14)  */
-.long	0x70000000	/* 0034:      DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT MORE init=0 WS=0 RS=0 */
-.long	0x020c504f	/* 0038:      DRD2B1: var8 = EU1(); EU1(var1,var15)  */
-.long	0x00000b88	/* 003C:      DRD1A: var2 = *idx1; FN=0 init=0 WS=0 RS=0 */
-.long	0x8000d184	/* 0040:    LCDEXT: idx1 = 0xf0003184; ; */
-.long	0xc6990452	/* 0044:    LCDEXT: idx2 = var13; idx2 < var17; idx2 += inc2 */
-.long	0x81486010	/* 0048:    LCD: idx3 = var2 + var16; ; idx3 += inc2 */
-.long	0x006acf88	/* 004C:      DRD1A: *idx3 = *idx1; FN=0 init=3 WS=1 RS=1 */
-.long	0x8000d184	/* 0050:    LCDEXT: idx1 = 0xf0003184; ; */
-.long	0x86810492	/* 0054:    LCD: idx2 = var13, idx3 = var2; idx2 < var18; idx2 += inc2, idx3 += inc2 */
-.long	0x006acf88	/* 0058:      DRD1A: *idx3 = *idx1; FN=0 init=3 WS=1 RS=1 */
-.long	0x8000d184	/* 005C:    LCDEXT: idx1 = 0xf0003184; ; */
-.long	0x868184d2	/* 0060:    LCD: idx2 = var13, idx3 = var3; idx2 < var19; idx2 += inc2, idx3 += inc2 */
-.long	0x000acf88	/* 0064:      DRD1A: *idx3 = *idx1; FN=0 init=0 WS=1 RS=1 */
-.long	0xc318839b	/* 0068:    LCDEXT: idx1 = var6; idx1 == var14; idx1 += inc3 */
-.long	0x80190000	/* 006C:    LCD: idx2 = var0; idx2 once var0; idx2 += inc0 */
-.long	0x04008468	/* 0070:      DRD1A: idx1 = var13; FN=0 INT init=0 WS=0 RS=0 */
-.long	0xc4038358	/* 0074:    LCDEXT: idx1 = var8, idx2 = var7; idx1 == var13; idx1 += inc3, idx2 += inc0 */
-.long	0x81c50000	/* 0078:    LCD: idx3 = var3 + var10; idx3 once var0; idx3 += inc0 */
-.long	0x1000cb18	/* 007C:      DRD1A: *idx2 = idx3; FN=0 MORE init=0 WS=0 RS=0 */
-.long	0x00000f18	/* 0080:      DRD1A: var3 = idx3; FN=0 init=0 WS=0 RS=0 */
-.long	0xc4188364	/* 0084:    LCDEXT: idx1 = var8; idx1 > var13; idx1 += inc4 */
-.long	0x83990000	/* 0088:    LCD: idx2 = var7; idx2 once var0; idx2 += inc0 */
-.long	0x10000c00	/* 008C:      DRD1A: var3 = var0; FN=0 MORE init=0 WS=0 RS=0 */
-.long	0x0000c800	/* 0090:      DRD1A: *idx2 = var0; FN=0 init=0 WS=0 RS=0 */
-.long	0x81988000	/* 0094:    LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */
-.long	0x10000788	/* 0098:      DRD1A: var1 = *idx1; FN=0 MORE init=0 WS=0 RS=0 */
-.long	0x60000000	/* 009C:      DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT init=0 WS=0 RS=0 */
-.long	0x080c504c	/* 00A0:      DRD2B1: idx0 = EU1(); EU1(var1,var12)  */
-.long	0x000001f8	/* 00A4(:0):    NOP */
-
-
-.globl scEthernetXmit_TDT
-scEthernetXmit_TDT:	/* Task 1 Descriptor Table */
-.long	0x80014800	/* 0000:  LCDEXT: idx0 = 0xf0004800; ; */
-.long	0x85c60004	/* 0004:  LCD: idx1 = var11 + var12 + 4; idx1 once var0; idx1 += inc0 */
-.long	0x10002308	/* 0008:    DRD1A: var8 = idx1; FN=0 MORE init=0 WS=0 RS=0 */
-.long	0x10000f88	/* 000C:    DRD1A: var3 = *idx1; FN=0 MORE init=0 WS=0 RS=0 */
-.long	0x00000380	/* 0010:    DRD1A: var0 = *idx0; FN=0 init=0 WS=0 RS=0 */
-.long	0x81980000	/* 0014:  LCD: idx0 = var3; idx0 once var0; idx0 += inc0 */
-.long	0x10000780	/* 0018:    DRD1A: var1 = *idx0; FN=0 MORE init=0 WS=0 RS=0 */
-.long	0x60000000	/* 001C:    DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT init=0 WS=0 RS=0 */
-.long	0x024c504d	/* 0020:    DRD2B1: var9 = EU1(); EU1(var1,var13)  */
-.long	0x84980309	/* 0024:  LCD: idx0 = var9; idx0 != var12; idx0 += inc1 */
-.long	0xc0004003	/* 0028:    LCDEXT: idx1 = 0x00000003; ; */
-.long	0x81c60004	/* 002C:    LCD: idx2 = var3 + var12 + 4; idx2 once var0; idx2 += inc0 */
-.long	0x70000000	/* 0030:      DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT MORE init=0 WS=0 RS=0 */
-.long	0x010c504e	/* 0034:      DRD2B1: var4 = EU1(); EU1(var1,var14)  */
-.long	0x70000000	/* 0038:      DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT MORE init=0 WS=0 RS=0 */
-.long	0x014c504f	/* 003C:      DRD2B1: var5 = EU1(); EU1(var1,var15)  */
-.long	0x70000000	/* 0040:      DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT MORE init=0 WS=0 RS=0 */
-.long	0x028c5050	/* 0044:      DRD2B1: var10 = EU1(); EU1(var1,var16)  */
-.long	0x70000000	/* 0048:      DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT MORE init=0 WS=0 RS=0 */
-.long	0x018c5051	/* 004C:      DRD2B1: var6 = EU1(); EU1(var1,var17)  */
-.long	0x10000b90	/* 0050:      DRD1A: var2 = *idx2; FN=0 MORE init=0 WS=0 RS=0 */
-.long	0x60000000	/* 0054:      DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT init=0 WS=0 RS=0 */
-.long	0x01cc50a1	/* 0058:      DRD2B1: var7 = EU1(); EU1(var2,idx1)  */
-.long	0xc2988312	/* 005C:    LCDEXT: idx1 = var5; idx1 > var12; idx1 += inc2 */
-.long	0x83490000	/* 0060:    LCD: idx2 = var6 + var18; idx2 once var0; idx2 += inc0 */
-.long	0x00001b10	/* 0064:      DRD1A: var6 = idx2; FN=0 init=0 WS=0 RS=0 */
-.long	0x8000d1a4	/* 0068:    LCDEXT: idx1 = 0xf00031a4; ; */
-.long	0x8301031c	/* 006C:    LCD: idx2 = var6, idx3 = var2; idx2 > var12; idx2 += inc3, idx3 += inc4 */
-.long	0x008ac798	/* 0070:      DRD1A: *idx1 = *idx3; FN=0 init=4 WS=1 RS=1 */
-.long	0x8000d1a4	/* 0074:    LCDEXT: idx1 = 0xf00031a4; ; */
-.long	0xc1430000	/* 0078:    LCDEXT: idx2 = var2 + var6; idx2 once var0; idx2 += inc0 */
-.long	0x82998312	/* 007C:    LCD: idx3 = var5; idx3 > var12; idx3 += inc2 */
-.long	0x088ac790	/* 0080:      DRD1A: *idx1 = *idx2; FN=0 TFD init=4 WS=1 RS=1 */
-.long	0x81988000	/* 0084:    LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */
-.long	0x60000100	/* 0088:      DRD2A: EU0=0 EU1=1 EU2=0 EU3=0 EXT init=0 WS=0 RS=0 */
-.long	0x0c4c5c4d	/* 008C:      DRD2B1: *idx1 = EU1(); EU1(*idx1,var13)  */
-.long	0xc21883ad	/* 0090:    LCDEXT: idx1 = var4; idx1 == var14; idx1 += inc5 */
-.long	0x80190000	/* 0094:    LCD: idx2 = var0; idx2 once var0; idx2 += inc0 */
-.long	0x04008460	/* 0098:      DRD1A: idx1 = var12; FN=0 INT init=0 WS=0 RS=0 */
-.long	0xc4052305	/* 009C:    LCDEXT: idx1 = var8, idx2 = var10; idx2 == var12; idx1 += inc0, idx2 += inc5 */
-.long	0x81c98000	/* 00A0:    LCD: idx3 = var3 + var19; idx3 once var0; idx3 += inc0 */
-.long	0x1000c718	/* 00A4:      DRD1A: *idx1 = idx3; FN=0 MORE init=0 WS=0 RS=0 */
-.long	0x00000f18	/* 00A8:      DRD1A: var3 = idx3; FN=0 init=0 WS=0 RS=0 */
-.long	0xc4188000	/* 00AC:    LCDEXT: idx1 = var8; idx1 once var0; idx1 += inc0 */
-.long	0x85190312	/* 00B0:    LCD: idx2 = var10; idx2 > var12; idx2 += inc2 */
-.long	0x10000c00	/* 00B4:      DRD1A: var3 = var0; FN=0 MORE init=0 WS=0 RS=0 */
-.long	0x1000c400	/* 00B8:      DRD1A: *idx1 = var0; FN=0 MORE init=0 WS=0 RS=0 */
-.long	0x00008860	/* 00BC:      DRD1A: idx2 = var12; FN=0 init=0 WS=0 RS=0 */
-.long	0x81988000	/* 00C0:    LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */
-.long	0x10000788	/* 00C4:      DRD1A: var1 = *idx1; FN=0 MORE init=0 WS=0 RS=0 */
-.long	0x60000000	/* 00C8:      DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT init=0 WS=0 RS=0 */
-.long	0x080c504d	/* 00CC:      DRD2B1: idx0 = EU1(); EU1(var1,var13)  */
-.long	0x000001f8	/* 00D0(:0):    NOP */
-
-.align	8
-
-.globl scEthernetRecv_VarTab
-scEthernetRecv_VarTab:	/* Task 0 Variable Table */
-.long	0x00000000	/* var[0] */
-.long	0x00000000	/* var[1] */
-.long	0x00000000	/* var[2] */
-.long	0x00000000	/* var[3] */
-.long	0x00000000	/* var[4] */
-.long	0x00000000	/* var[5] */
-.long	0x00000000	/* var[6] */
-.long	0x00000000	/* var[7] */
-.long	0x00000000	/* var[8] */
-.long	0xf0004800	/* var[9] */
-.long	0x00000008	/* var[10] */
-.long	0x0000000c	/* var[11] */
-.long	0x80000000	/* var[12] */
-.long	0x00000000	/* var[13] */
-.long	0x10000000	/* var[14] */
-.long	0x20000000	/* var[15] */
-.long	0x000005e4	/* var[16] */
-.long	0x0000000e	/* var[17] */
-.long	0x000005e0	/* var[18] */
-.long	0x00000004	/* var[19] */
-.long	0x00000000	/* var[20] */
-.long	0x00000000	/* var[21] */
-.long	0x00000000	/* var[22] */
-.long	0x00000000	/* var[23] */
-.long	0x00000000	/* inc[0] */
-.long	0x60000000	/* inc[1] */
-.long	0x20000001	/* inc[2] */
-.long	0x80000000	/* inc[3] */
-.long	0x40000000	/* inc[4] */
-.long	0x00000000	/* inc[5] */
-.long	0x00000000	/* inc[6] */
-.long	0x00000000	/* inc[7] */
-
-.align	8
-
-.globl scEthernetXmit_VarTab
-scEthernetXmit_VarTab:	/* Task 1 Variable Table */
-.long	0x00000000	/* var[0] */
-.long	0x00000000	/* var[1] */
-.long	0x00000000	/* var[2] */
-.long	0x00000000	/* var[3] */
-.long	0x00000000	/* var[4] */
-.long	0x00000000	/* var[5] */
-.long	0x00000000	/* var[6] */
-.long	0x00000000	/* var[7] */
-.long	0x00000000	/* var[8] */
-.long	0x00000000	/* var[9] */
-.long	0x00000000	/* var[10] */
-.long	0xf0004800	/* var[11] */
-.long	0x00000000	/* var[12] */
-.long	0x80000000	/* var[13] */
-.long	0x10000000	/* var[14] */
-.long	0x08000000	/* var[15] */
-.long	0x20000000	/* var[16] */
-.long	0x0000ffff	/* var[17] */
-.long	0xffffffff	/* var[18] */
-.long	0x00000008	/* var[19] */
-.long	0x00000000	/* var[20] */
-.long	0x00000000	/* var[21] */
-.long	0x00000000	/* var[22] */
-.long	0x00000000	/* var[23] */
-.long	0x00000000	/* inc[0] */
-.long	0x60000000	/* inc[1] */
-.long	0x40000000	/* inc[2] */
-.long	0x4000ffff	/* inc[3] */
-.long	0xe0000001	/* inc[4] */
-.long	0x80000000	/* inc[5] */
-.long	0x00000000	/* inc[6] */
-.long	0x00000000	/* inc[7] */
-
-.align	8
-
-.globl scEthernetRecv_FDT
-scEthernetRecv_FDT:	/* Task 0 Function Descriptor Table */
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x05800000	/* and(), EU# 1 */
-.long	0x05400000	/* andn(), EU# 1 */
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-
-.align	8
-
-.globl scEthernetXmit_FDT
-scEthernetXmit_FDT:	/* Task 1 Function Descriptor Table */
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x05800000	/* and(), EU# 1 */
-.long	0x05400000	/* andn(), EU# 1 */
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-.long	0x00000000
-
-
-.align	8
-.globl scEthernetRecv_CSave
-scEthernetRecv_CSave:	/* Task 0 context save space */
-.space	256, 0x0
-
-
-.align	8
-.globl scEthernetXmit_CSave
-scEthernetXmit_CSave:	/* Task 1 context save space */
-.space	256, 0x0
-
-#endif /* CONFIG_MGT5100 */
diff --git a/doc/README-integrator b/doc/README-integrator
index 4daf3413aa..5a0e934924 100644
--- a/doc/README-integrator
+++ b/doc/README-integrator
@@ -52,7 +52,7 @@ cpu/arm<>/start.S so that it may be used by other boards.
 However, to avoid duplicating code through all processor files, a generic core
 for ARM Integrator CMs has been added
 
-	cpu/arm_intcm
+	arch/arm/cpu/arm_intcm
 
 Otherwise. for example,  the standard CM reset via the CM control register would
 need placing in each CM processor file......
diff --git a/doc/README.ARM-SoC b/doc/README.ARM-SoC
index 0f2677f88b..d6bd624886 100644
--- a/doc/README.ARM-SoC
+++ b/doc/README.ARM-SoC
@@ -1,24 +1,24 @@
 [By Steven Scholz <steven.scholz@imc-berlin.de>, 16 Aug 2004]
 
 Since the cpu/ directory gets clobbered with peripheral driver code I
-started cleaning up cpu/arm920t.
+started cleaning up arch/arm/cpu/arm920t.
 
 I introduced the concept of Soc (system on a chip) into the ./cpu
 directory. That means that code that is cpu (i.e. core) specific
 resides in
 
-	cpu/$(CPU)/
+	$(CPUDIR)/
 
 and code that is specific to some SoC (i.e. vendor specific
 peripherals around the core) is moved into
 
-	cpu/$(CPU)/$(SOC)/
+	$(CPUDIR)/$(SOC)/
 
-Thus a library/archive "cpu/$(CPU)/$(SOC)/lib$(SOC).a" will be build
+Thus a library/archive "$(CPUDIR)/$(SOC)/lib$(SOC).a" will be build
 and linked. Examples will be
 
-	cpu/arm920t/imx/
-	cpu/arm920t/s3c24x0
+	arch/arm/cpu/arm920t/imx/
+	arch/arm/cpu/arm920t/s3c24x0
 
 One can select an SoC by passing the name of it to ./mkconfig just
 like
diff --git a/doc/README.LED b/doc/README.LED
index 94e552aa03..c3bcb3ac80 100644
--- a/doc/README.LED
+++ b/doc/README.LED
@@ -69,7 +69,7 @@ yellow_LED_off
 blue_LED_on
 blue_LED_off
 
-These are weakly defined in lib_arm/board.c to noops. Where applicable, define
+These are weakly defined in arch/arm/lib/board.c to noops. Where applicable, define
 these functions in the board specific source.
 
 TBD : Describe older board dependent macros similar to what is done for
diff --git a/doc/README.PIP405 b/doc/README.PIP405
index d8b3f9c012..e8a654128d 100644
--- a/doc/README.PIP405
+++ b/doc/README.PIP405
@@ -17,11 +17,11 @@ Changed files:
 				added console settings from environment
 - common/devices.c		added ISA keyboard init
 - common/main.c			corrected the read of bootdelay
-- cpu/ppc4xx/405gp_pci.c	excluded file from PIP405
-- cpu/ppc4xx/i2c.c		added 16bit read write I2C support
+- arch/ppc/cpu/ppc4xx/405gp_pci.c	excluded file from PIP405
+- arch/ppc/cpu/ppc4xx/i2c.c		added 16bit read write I2C support
 				added page write
-- cpu/ppc4xx/speed.c		added get_PCI_freq
-- cpu/ppc4xx/start.S		added CONFIG_IDENT_STRING
+- arch/ppc/cpu/ppc4xx/speed.c		added get_PCI_freq
+- arch/ppc/cpu/ppc4xx/start.S		added CONFIG_IDENT_STRING
 - disk/Makefile			added part_iso for CD support
 - disk/part.c			changed to work with block device description
 				added ISO CD support
@@ -275,7 +275,7 @@ Added the config variable CONFIG_IDENT_STRING which will be added to the
 "U_BOOT_VERSION __TIME__ DATE___ " String, to allows to identify intermidiate
 and custom versions.
 Changed files:
-- cpu/ppc4xx/start.s
+- arch/ppc/cpu/ppc4xx/start.s
 
 Firmware Image:
 ---------------
@@ -288,11 +288,11 @@ Changed files:
 
 Correct PCI Frequency for PPC405:
 ---------------------------------
-Added function (in cpu/ppc4xx/speed.c) to get the PCI frequency for PPC405 CPU.
+Added function (in arch/ppc/cpu/ppc4xx/speed.c) to get the PCI frequency for PPC405 CPU.
 The PCI Frequency will now be set correct in the board description in common/board.c.
 (was set to the busfreq before).
 Changed files:
-- cpu/ppc4xx/speed.c
+- arch/ppc/cpu/ppc4xx/speed.c
 - common/board.c
 
 I2C Stuff:
@@ -301,7 +301,7 @@ Added defined(CONFIG_PIP405) at several points in common/cmd_i2c.c.
 Added 16bit read/write support for I2C (PPC405), and page write to
 I2C EEPROM if defined CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE.
 Changed files:
-- cpu/ppc4xx/i2c.c
+- arch/ppc/cpu/ppc4xx/i2c.c
 - common/cmd_i2c.c
 
 Environment / Console:
diff --git a/doc/README.POST b/doc/README.POST
index a81e07926d..0d5e20e977 100644
--- a/doc/README.POST
+++ b/doc/README.POST
@@ -713,7 +713,7 @@ use external loopback for testing. That will need appropriate
 reconfiguration of the physical interface chip.
 
 The test routines for the SCC ethernet tests will be located in
-cpu/mpc8xx/scc.c.
+arch/ppc/cpu/mpc8xx/scc.c.
 
 2.2.3.2. UART tests (SMC/SCC)
 
@@ -725,7 +725,7 @@ will be transmitted. These tests may be enhanced to make to perform
 test will be executed manually.
 
 The test routine for the SMC/SCC UART tests will be located in
-cpu/mpc8xx/serial.c.
+arch/ppc/cpu/mpc8xx/serial.c.
 
 2.2.3.3. USB test
 
diff --git a/doc/README.RPXlite b/doc/README.RPXlite
index c0238ae213..0aa4d11303 100644
--- a/doc/README.RPXlite
+++ b/doc/README.RPXlite
@@ -116,7 +116,7 @@
 	board/RPXLITE/RPXLITE.c		/* DRAM-related routines */
 	board/RPXLITE/flash.c		/* flash-related routines */
 	board/RPXLITE/config.mk		/* set text base address */
-	cpu/mpc8xx/serial.c			/* board specific register setting */
+	arch/ppc/cpu/mpc8xx/serial.c			/* board specific register setting */
 	include/config_RPXLITE.h	/* board specific registers */
 
 	See 'reg_config.txt' for register values in detail.
diff --git a/doc/README.TQM8260 b/doc/README.TQM8260
index b93a1cb948..e64e64a3e2 100644
--- a/doc/README.TQM8260
+++ b/doc/README.TQM8260
@@ -14,10 +14,10 @@ The following common files have been modified by this project:
 
 MAKEALL			- TQM8260 entry added
 Makefile		- TQM8260_config entry added
-cpu/mpc8260/Makefile	- soft_i2c.o module added
-cpu/mpc8260/ether_scc.c	- TQM8260-specific definitions added, an obvious
+arch/ppc/cpu/mpc8260/Makefile	- soft_i2c.o module added
+arch/ppc/cpu/mpc8260/ether_scc.c	- TQM8260-specific definitions added, an obvious
 			  bug fixed (fcr -> scr)
-cpu/mpc8260/ether_fcc.c	- TQM8260-specific definitions added
+arch/ppc/cpu/mpc8260/ether_fcc.c	- TQM8260-specific definitions added
 include/flash.h		- added definitions for the AM29LV640D Flash chip
 
 
@@ -33,7 +33,7 @@ board/tqm8260/config.mk	  - config file
 board/tqm8260/flash.c	  - flash driver (for AM29LV640D)
 board/tqm8260/ppcboot.lds - linker script
 board/tqm8260/tqm8260.c	  - ioport and memory initialization
-cpu/mpc8260/soft_i2c.c	  - software i2c EEPROM driver
+arch/ppc/cpu/mpc8260/soft_i2c.c	  - software i2c EEPROM driver
 include/config_TQM8260.h  - main configuration file
 
 
diff --git a/doc/README.alaska8220 b/doc/README.alaska8220
index 0bd68d9628..9249cfb31e 100644
--- a/doc/README.alaska8220
+++ b/doc/README.alaska8220
@@ -22,7 +22,7 @@ Changed files:
 - include/asm-ppc/global_data.h added global variables - inp_clk, pci_clk,
 			    vco_clk, pev_clk, flb_clk, and bExtUart
 
-- lib_ppc/board.c	    added CONFIG_MPC8220 support
+- arch/ppc/lib/board.c	    added CONFIG_MPC8220 support
 
 - net/eth.c		    added FEC support for MPC8220
 
@@ -37,24 +37,24 @@ Added files:
 - board/alaska/config.mk    config make
 - board/alaska/u-boot.lds   Linker description
 
-- cpu/mpc8220/dma.h	    multi-channel dma header file
-- cpu/mpc8220/dramSetup.h   dram setup header file
-- cpu/mpc8220/fec.h	    MPC8220 FEC header file
-- cpu/mpc8220/cpu.c	    cpu specific code
-- cpu/mpc8220/cpu_init.c    Flexbus ChipSelect and Mux pins setup
-- cpu/mpc8220/dramSetup.c   MPC8220 DDR SDRAM setup
-- cpu/mpc8220/fec.c	    MPC8220 FEC driver
-- cpu/mpc8220/i2c.c	    MPC8220 I2C driver
-- cpu/mpc8220/interrupts.c  interrupt support (not enable)
-- cpu/mpc8220/loadtask.c    load dma
-- cpu/mpc8220/speed.c	    system, pci, flexbus, pev, and cpu clock
-- cpu/mpc8220/traps.c	    exception
-- cpu/mpc8220/uart.c	    MPC8220 UART driver
-- cpu/mpc8220/Makefile	    Makefile
-- cpu/mpc8220/config.mk	    config make
-- cpu/mpc8220/fec_dma_task.S MPC8220 FEC multi-channel dma program
-- cpu/mpc8220/io.S	    io functions
-- cpu/mpc8220/start.S	    start up
+- arch/ppc/cpu/mpc8220/dma.h	    multi-channel dma header file
+- arch/ppc/cpu/mpc8220/dramSetup.h   dram setup header file
+- arch/ppc/cpu/mpc8220/fec.h	    MPC8220 FEC header file
+- arch/ppc/cpu/mpc8220/cpu.c	    cpu specific code
+- arch/ppc/cpu/mpc8220/cpu_init.c    Flexbus ChipSelect and Mux pins setup
+- arch/ppc/cpu/mpc8220/dramSetup.c   MPC8220 DDR SDRAM setup
+- arch/ppc/cpu/mpc8220/fec.c	    MPC8220 FEC driver
+- arch/ppc/cpu/mpc8220/i2c.c	    MPC8220 I2C driver
+- arch/ppc/cpu/mpc8220/interrupts.c  interrupt support (not enable)
+- arch/ppc/cpu/mpc8220/loadtask.c    load dma
+- arch/ppc/cpu/mpc8220/speed.c	    system, pci, flexbus, pev, and cpu clock
+- arch/ppc/cpu/mpc8220/traps.c	    exception
+- arch/ppc/cpu/mpc8220/uart.c	    MPC8220 UART driver
+- arch/ppc/cpu/mpc8220/Makefile	    Makefile
+- arch/ppc/cpu/mpc8220/config.mk	    config make
+- arch/ppc/cpu/mpc8220/fec_dma_task.S MPC8220 FEC multi-channel dma program
+- arch/ppc/cpu/mpc8220/io.S	    io functions
+- arch/ppc/cpu/mpc8220/start.S	    start up
 
 - include/mpc8220.h
 
diff --git a/doc/README.bedbug b/doc/README.bedbug
index 2616acc653..4c1e6c4d5b 100644
--- a/doc/README.bedbug
+++ b/doc/README.bedbug
@@ -18,15 +18,15 @@ can be easily implemented.
 ./common/board.c
 	Added call to initialize debugger on startup.
 
-./cpu/ppc4xx/Makefile
+./arch/ppc/cpu/ppc4xx/Makefile
 	Added bedbug_405.c to the Makefile.
 
-./cpu/ppc4xx/start.S
+./arch/ppc/cpu/ppc4xx/start.S
 	Added code to handle the debug exception (0x2000) on the 405.
 	Also added code to handle critical exceptions since the debug
 	is treated as critical on the 405.
 
-./cpu/ppc4xx/traps.c
+./arch/ppc/cpu/ppc4xx/traps.c
 	Added more detailed output for the program exception to tell
 	if it is an illegal instruction, privileged instruction or
 	a trap. Also added debug trap handler.
@@ -51,7 +51,7 @@ can be easily implemented.
 	hardware breakpoints and stepping through code.  These
 	routines are common to all PowerPC processors.
 
-./cpu/ppc4xx/bedbug_405.c
+./arch/ppc/cpu/ppc4xx/bedbug_405.c
 	AMCC  PPC405 specific debugger routines.
 
 
@@ -63,16 +63,16 @@ Changes:
 	common/cmd_bedbug.c
 		Added call to initialize 860 debugger.
 
-	cpu/mpc8xx/Makefile
+	arch/ppc/cpu/mpc8xx/Makefile
 		Added new file "bedbug_860.c" to the makefile
 
-	cpu/mpc8xx/start.S
+	arch/ppc/cpu/mpc8xx/start.S
 		Added handler for InstructionBreakpoint (0xfd00)
 
-	cpu/mpc8xx/traps.c
+	arch/ppc/cpu/mpc8xx/traps.c
 		Added new routine DebugException()
 
 New Files:
 
-	cpu/mpc8xx/bedbug_860.c
+	arch/ppc/cpu/mpc8xx/bedbug_860.c
 		CPU-specific routines for 860 debug registers.
diff --git a/doc/README.enetaddr b/doc/README.enetaddr
index 1d75aa3876..94d800a02a 100644
--- a/doc/README.enetaddr
+++ b/doc/README.enetaddr
@@ -28,6 +28,17 @@ Here are the places where MAC addresses might be stored:
 	      purpose of passing this information to an OS kernel we are about
 	      to boot
 
+Correct flow of setting up the MAC address (summarized):
+
+1. Read from hardware in initialize() function
+2. Read from environment in net/eth.c after initialize()
+3. Give priority to the value in the environment if a conflict
+4. Program hardware in the device's init() function.
+
+If somebody wants to subvert the design philosophy, this can be done
+in the board-specific board_eth_init() function by calling eth_init()
+after all the NICs have been registered.
+
 -------
  Usage
 -------
diff --git a/doc/README.m52277evb b/doc/README.m52277evb
index 40f9028c6f..b6e955bcad 100644
--- a/doc/README.m52277evb
+++ b/doc/README.m52277evb
@@ -14,13 +14,13 @@ Changed files:
 - board/freescale/m52277evb/config.mk	config make
 - board/freescale/m52277evb/u-boot.lds	Linker description
 
-- cpu/mcf5227x/cpu.c		cpu specific code
-- cpu/mcf5227x/cpu_init.c	FBCS, Mux pins, icache and RTC extra regs
-- cpu/mcf5227x/interrupts.c	cpu specific interrupt support
-- cpu/mcf5227x/speed.c		system, flexbus, and cpu clock
-- cpu/mcf5227x/Makefile		Makefile
-- cpu/mcf5227x/config.mk	config make
-- cpu/mcf5227x/start.S		start up assembly code
+- arch/m68k/cpu/mcf5227x/cpu.c		cpu specific code
+- arch/m68k/cpu/mcf5227x/cpu_init.c	FBCS, Mux pins, icache and RTC extra regs
+- arch/m68k/cpu/mcf5227x/interrupts.c	cpu specific interrupt support
+- arch/m68k/cpu/mcf5227x/speed.c		system, flexbus, and cpu clock
+- arch/m68k/cpu/mcf5227x/Makefile		Makefile
+- arch/m68k/cpu/mcf5227x/config.mk	config make
+- arch/m68k/cpu/mcf5227x/start.S		start up assembly code
 
 - doc/README.m52277evb		This readme file
 
@@ -53,12 +53,12 @@ Changed files:
 
 - include/configs/M52277EVB.h		Board specific configuration file
 
-- lib_m68k/board.c			board init function
-- lib_m68k/cache.c
-- lib_m68k/interrupts			Coldfire common interrupt functions
-- lib_m68k/m68k_linux.c
-- lib_m68k/time.c			Timer functions (Dma timer and PIT)
-- lib_m68k/traps.c			Exception init code
+- arch/m68k/lib/board.c			board init function
+- arch/m68k/lib/cache.c
+- arch/m68k/lib/interrupts			Coldfire common interrupt functions
+- arch/m68k/lib/m68k_linux.c
+- arch/m68k/lib/time.c			Timer functions (Dma timer and PIT)
+- arch/m68k/lib/traps.c			Exception init code
 
 1 MCF52277 specific Options/Settings
 ====================================
diff --git a/doc/README.m53017evb b/doc/README.m53017evb
index 60cfa95af3..42798c2000 100644
--- a/doc/README.m53017evb
+++ b/doc/README.m53017evb
@@ -15,13 +15,13 @@ Changed files:
 - board/freescale/m53017evb/config.mk	config make
 - board/freescale/m53017evb/u-boot.lds	Linker description
 
-- cpu/mcf532x/cpu.c			cpu specific code
-- cpu/mcf532x/cpu_init.c		FBCS, Mux pins, icache and RTC extra regs
-- cpu/mcf532x/interrupts.c		cpu specific interrupt support
-- cpu/mcf532x/speed.c			system, flexbus, and cpu clock
-- cpu/mcf532x/Makefile			Makefile
-- cpu/mcf532x/config.mk			config make
-- cpu/mcf532x/start.S			start up assembly code
+- arch/m68k/cpu/mcf532x/cpu.c			cpu specific code
+- arch/m68k/cpu/mcf532x/cpu_init.c		FBCS, Mux pins, icache and RTC extra regs
+- arch/m68k/cpu/mcf532x/interrupts.c		cpu specific interrupt support
+- arch/m68k/cpu/mcf532x/speed.c			system, flexbus, and cpu clock
+- arch/m68k/cpu/mcf532x/Makefile			Makefile
+- arch/m68k/cpu/mcf532x/config.mk			config make
+- arch/m68k/cpu/mcf532x/start.S			start up assembly code
 
 - doc/README.m53017evb			This readme file
 
@@ -51,12 +51,12 @@ Changed files:
 
 - include/configs/M53017EVB.h		Board specific configuration file
 
-- lib_m68k/board.c			board init function
-- lib_m68k/cache.c
-- lib_m68k/interrupts			Coldfire common interrupt functions
-- lib_m68k/m68k_linux.c
-- lib_m68k/time.c			Timer functions (Dma timer and PIT)
-- lib_m68k/traps.c			Exception init code
+- arch/m68k/lib/board.c			board init function
+- arch/m68k/lib/cache.c
+- arch/m68k/lib/interrupts			Coldfire common interrupt functions
+- arch/m68k/lib/m68k_linux.c
+- arch/m68k/lib/time.c			Timer functions (Dma timer and PIT)
+- arch/m68k/lib/traps.c			Exception init code
 
 1 MCF5301x specific Options/Settings
 ====================================
diff --git a/doc/README.m5373evb b/doc/README.m5373evb
index 5591748933..e90a320ee5 100644
--- a/doc/README.m5373evb
+++ b/doc/README.m5373evb
@@ -15,13 +15,13 @@ Changed files:
 - board/freescale/m5373evb/config.mk	config make
 - board/freescale/m5373evb/u-boot.lds	Linker description
 
-- cpu/mcf532x/cpu.c		cpu specific code
-- cpu/mcf532x/cpu_init.c	FBCS, Mux pins, icache and RTC extra regs
-- cpu/mcf532x/interrupts.c	cpu specific interrupt support
-- cpu/mcf532x/speed.c		system, pci, flexbus, and cpu clock
-- cpu/mcf532x/Makefile		Makefile
-- cpu/mcf532x/config.mk		config make
-- cpu/mcf532x/start.S		start up assembly code
+- arch/m68k/cpu/mcf532x/cpu.c		cpu specific code
+- arch/m68k/cpu/mcf532x/cpu_init.c	FBCS, Mux pins, icache and RTC extra regs
+- arch/m68k/cpu/mcf532x/interrupts.c	cpu specific interrupt support
+- arch/m68k/cpu/mcf532x/speed.c		system, pci, flexbus, and cpu clock
+- arch/m68k/cpu/mcf532x/Makefile		Makefile
+- arch/m68k/cpu/mcf532x/config.mk		config make
+- arch/m68k/cpu/mcf532x/start.S		start up assembly code
 
 - doc/README.m5373evb		This readme file
 
@@ -50,12 +50,12 @@ Changed files:
 
 - include/configs/M5373EVB.h		Board specific configuration file
 
-- lib_m68k/board.c			board init function
-- lib_m68k/cache.c
-- lib_m68k/interrupts			Coldfire common interrupt functions
-- lib_m68k/m68k_linux.c
-- lib_m68k/time.c			Timer functions (Dma timer and PIT)
-- lib_m68k/traps.c			Exception init code
+- arch/m68k/lib/board.c			board init function
+- arch/m68k/lib/cache.c
+- arch/m68k/lib/interrupts			Coldfire common interrupt functions
+- arch/m68k/lib/m68k_linux.c
+- arch/m68k/lib/time.c			Timer functions (Dma timer and PIT)
+- arch/m68k/lib/traps.c			Exception init code
 
 1 MCF5373 specific Options/Settings
 ====================================
diff --git a/doc/README.m54455evb b/doc/README.m54455evb
index 1888e16625..918a746eb8 100644
--- a/doc/README.m54455evb
+++ b/doc/README.m54455evb
@@ -18,13 +18,13 @@ Changed files:
 - common/cmd_bdinfo.c		Clock frequencies output
 - common/cmd_mii.c		mii support
 
-- cpu/mcf5445x/cpu.c		cpu specific code
-- cpu/mcf5445x/cpu_init.c	Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs
-- cpu/mcf5445x/interrupts.c	cpu specific interrupt support
-- cpu/mcf5445x/speed.c		system, pci, flexbus, and cpu clock
-- cpu/mcf5445x/Makefile		Makefile
-- cpu/mcf5445x/config.mk	config make
-- cpu/mcf5445x/start.S		start up assembly code
+- arch/m68k/cpu/mcf5445x/cpu.c		cpu specific code
+- arch/m68k/cpu/mcf5445x/cpu_init.c	Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs
+- arch/m68k/cpu/mcf5445x/interrupts.c	cpu specific interrupt support
+- arch/m68k/cpu/mcf5445x/speed.c		system, pci, flexbus, and cpu clock
+- arch/m68k/cpu/mcf5445x/Makefile		Makefile
+- arch/m68k/cpu/mcf5445x/config.mk	config make
+- arch/m68k/cpu/mcf5445x/start.S		start up assembly code
 
 - doc/README.m54455evb	This readme file
 
@@ -52,12 +52,12 @@ Changed files:
 
 - include/configs/M54455EVB.h	Board specific configuration file
 
-- lib_m68k/board.c			board init function
-- lib_m68k/cache.c
-- lib_m68k/interrupts			Coldfire common interrupt functions
-- lib_m68k/m68k_linux.c
-- lib_m68k/time.c			Timer functions (Dma timer and PIT)
-- lib_m68k/traps.c			Exception init code
+- arch/m68k/lib/board.c			board init function
+- arch/m68k/lib/cache.c
+- arch/m68k/lib/interrupts			Coldfire common interrupt functions
+- arch/m68k/lib/m68k_linux.c
+- arch/m68k/lib/time.c			Timer functions (Dma timer and PIT)
+- arch/m68k/lib/traps.c			Exception init code
 
 - rtc/mcfrtc.c				Realtime clock Driver
 
diff --git a/doc/README.m5475evb b/doc/README.m5475evb
index f3a1d7b28b..f5658ea486 100644
--- a/doc/README.m5475evb
+++ b/doc/README.m5475evb
@@ -15,14 +15,14 @@ Changed files:
 - board/freescale/m547xevb/config.mk	config make
 - board/freescale/m547xevb/u-boot.lds	Linker description
 
-- cpu/mcf547x_8x/cpu.c			cpu specific code
-- cpu/mcf547x_8x/cpu_init.c		Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs
-- cpu/mcf547x_8x/interrupts.c		cpu specific interrupt support
-- cpu/mcf547x_8x/slicetimer.c		Timer support
-- cpu/mcf547x_8x/speed.c		system, pci, flexbus, and cpu clock
-- cpu/mcf547x_8x/Makefile		Makefile
-- cpu/mcf547x_8x/config.mk		config make
-- cpu/mcf547x_8x/start.S		start up assembly code
+- arch/m68k/cpu/mcf547x_8x/cpu.c			cpu specific code
+- arch/m68k/cpu/mcf547x_8x/cpu_init.c		Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs
+- arch/m68k/cpu/mcf547x_8x/interrupts.c		cpu specific interrupt support
+- arch/m68k/cpu/mcf547x_8x/slicetimer.c		Timer support
+- arch/m68k/cpu/mcf547x_8x/speed.c		system, pci, flexbus, and cpu clock
+- arch/m68k/cpu/mcf547x_8x/Makefile		Makefile
+- arch/m68k/cpu/mcf547x_8x/config.mk		config make
+- arch/m68k/cpu/mcf547x_8x/start.S		start up assembly code
 
 - doc/README.m5475evb			This readme file
 
@@ -58,11 +58,11 @@ Changed files:
 
 - include/configs/M5475EVB.h		Board specific configuration file
 
-- lib_m68k/board.c			board init function
-- lib_m68k/cache.c
-- lib_m68k/interrupts			Coldfire common interrupt functions
-- lib_m68k/m68k_linux.c
-- lib_m68k/traps.c			Exception init code
+- arch/m68k/lib/board.c			board init function
+- arch/m68k/lib/cache.c
+- arch/m68k/lib/interrupts			Coldfire common interrupt functions
+- arch/m68k/lib/m68k_linux.c
+- arch/m68k/lib/traps.c			Exception init code
 
 1 MCF547x specific Options/Settings
 ====================================
diff --git a/doc/README.m68k b/doc/README.m68k
index e6c33a7d96..a00ab69b6f 100644
--- a/doc/README.m68k
+++ b/doc/README.m68k
@@ -31,12 +31,12 @@ hopefully added soon!
 
 2.1 Motorola Coldfire MCF5272
 -----------------------------
-CPU specific code is located in: cpu/mcf52x2
+CPU specific code is located in: arch/m68k/cpu/mcf52x2
 
 
 2.1 Motorola Coldfire MCF5282
 -----------------------------
-CPU specific code is located in: cpu/mcf52x2
+CPU specific code is located in: arch/m68k/cpu/mcf52x2
 
 The MCF5282 Port no longer needs a preloader and can place in external or
 internal FLASH.
diff --git a/doc/README.ml300 b/doc/README.ml300
deleted file mode 100644
index 27c5b92783..0000000000
--- a/doc/README.ml300
+++ /dev/null
@@ -1,128 +0,0 @@
-Xilinx ML300 platform
-=====================
-
-0. Introduction
----------------
-
-The Xilinx ML300 board is based on the Virtex-II Pro FPGA with
-integrated AMCC PowerPC 405 core. The board is normally booted from
-System ACE CF. U-Boot is then run out of main memory.
-
-An FPGA is a configurable and thus very flexible device. To
-accommodate for this flexibility this port of U-Boot includes the
-required means to regenerate the drivers and configuration files if
-you decide to change the hardware design. The required steps are
-described below.
-
-
-1. Requirements
----------------
-
-To compile and run U-Boot on the Xilinx ML300 platform you need the
-following items.
-
-- A Xilinx ML300 platform (see http://www.xilinx.com/ml300)
-- EDK and ISE development tools (shipping with ML300)
-- Parallel4 cable (shipping with ML300)
-- The EDK reference design for ML300. You can get this as design #6 from
-  http://www.xilinx.com/ise/embedded/edk_examples.htm
-- A BOOTP/TFTP server
-
-
-2. Quick Start
---------------
-
-To compile and run U-Boot on ML300 follow the steps below. Make sure
-to consult the documentation for U-Boot, EDK, and the EDK reference
-design for ML300 if you have any questions.
-
-1. Implement the EDK reference design for ML300. You can use any of
-   the project files, for example from a xygwin shell:
-   $ xps -nw system_linux.xmp
-   XPS% run init_bram
-2. Configure and compile U-Boot. Change into the root directory of
-   U-Boot and run:
-   $ export CROSS_COMPILE=powerpc-eabi-
-   $ make ml300_config
-   $ make
-3. Set up the ML300, connect the Parallel4 and the serial cable. Start
-   a terminal on your host computer and set the communication
-   parameters to 9600,8N1,no handshake.
-4. Set up the BOOTP/TFTP server on your host machine. U-Boot is
-   preconfigured to use a fixed HW MAC address of 00:0A:35:00:22:01.
-5. Download the bitstream to the ML300.
-6. Use XMD to download and run U-Boot on the ML300:
-   $ xmd
-   XMD% ppcconnect
-   XMD% dow u-boot
-   XMD% run
-
-You can now make an ACE file out of bitstream and U-Boot:
-   $ xmd genace.tcl -jprog -board ml300 -hw  \
-     implementation/download.bit -elf u-boot -ace top.ace
-
-Put the ACE file onto the MicroDrive, for example into xilinx/myace,
-and reboot ML300.
-
-
-3. Generating a Custom BSP for U-Boot
--------------------------------------
-
-If you decide to change the EDK reference design for ML300 or if you
-build a new design from scratch either with the Base System Builder in
-XPS or all by hand you most likely will change the base addresses for
-the Uart and the Ethernet peripheral. If you do so you will have two
-options:
-
-1. Edit boards/xilinx/ml300/xparameters.h to reflect the changes you
-   made to your hardware.
-2. Use the MLD technology provided by Xilinx Platform Studio to make
-   the changes automatically. To do so go to the root directory of the
-   EDK reference design for ML300. Copy the Linux project file and the
-   Linux software configuration file:
-   $ cp system_linux.xmp system_uboot.xmp
-   $ cp system_linux.mss system_uboot.mss
-
-   Edit system_uboot.xmp and and have it point to system_uboot.mss for
-   the software configuration.
-
-   Then, copy the sw_services directory in
-   boards/xilinx/ml300/sw_services to the root directory of the EDK
-   reference design for ML300.
-   $ cp -R <uboot dir>/boards/xilinx/ml300/sw_services <edk dir>
-
-   Modify system_uboot.mss. Look for the Linux library definition
-   and change it to generate a BSP for U-Boot. An example, might look
-   like this:
-
-   BEGIN LIBRARY
-    PARAMETER LIBRARY_NAME = uboot
-    PARAMETER LIBRARY_VER = 1.00.a
-    PARAMETER CONNECTED_PERIPHS = (opb_uart16550_0,opb_ethernet_0)
-    PARAMETER TARGET_DIR = <uboot dir>
-   END
-
-   Now, you are ready to generate the Xilinx ML300 BSP for U-Boot:
-   $ xps -nw system_uboot.xmp
-   XPS% run libs
-
-   If all goes well the new configuration has been copied into the
-   right places within the U-Boot source tree. Recompile U-Boot and
-   run it on the ML300.
-
-
-4. ToDo
--------
-
-- Add support for all other peripherals on ML300.
-- Read the MAC address out of the IIC EEPROM.
-- Store the bootargs in the IIC EEPROM.
-
-
-5. References
--------------
-
-ML300:			http://www.xilinx.com/ml300
-EDK:			http://www.xilinx.com/edk
-ISE:			http://www.xilinx.com/ise
-Reference Design:	http://www.xilinx.com/ise/embedded/edk_examples.htm
diff --git a/doc/README.modnet50 b/doc/README.modnet50
index f7bb254e16..2ac3c8fbe3 100644
--- a/doc/README.modnet50
+++ b/doc/README.modnet50
@@ -45,7 +45,7 @@ flash.
 
 Files:
 
-cpu/arm720t/serial_netarm.c .. serial I/O for the cpu
+arch/arm/cpu/arm720t/serial_netarm.c .. serial I/O for the cpu
 
 board/modnet50/lowlevel_init.S   .. memory setup for ModNET50
 board/modnet50/flash.c	    .. flash routines
diff --git a/doc/README.mpc5xx b/doc/README.mpc5xx
index 07be8637fa..26fb0c27dc 100644
--- a/doc/README.mpc5xx
+++ b/doc/README.mpc5xx
@@ -25,7 +25,7 @@ Added or Changed Files:
 u-boot-0.2.0/common/cmd_boot.c
 u-boot-0.2.0/common/cmd_reginfo.c
 u-boot-0.2.0/common/environment.c
-u-boot-0.2.0/cpu/mpc5xx/*
+u-boot-0.2.0/arch/ppc/cpu/mpc5xx/*
 u-boot-0.2.0/include/cmd_reginfo.h
 u-boot-0.2.0/include/common.h
 u-boot-0.2.0/include/ppc_asm.tmpl
@@ -34,9 +34,9 @@ u-boot-0.2.0/include/mpc5xx.h
 u-boot-0.2.0/include/status_led.h
 u-boot-0.2.0/include/asm-ppc/u-boot.h
 u-boot-0.2.0/include/asm-ppc/5xx_immap.h
-u-boot-0.2.0/lib_ppc/board.c
-u-boot-0.2.0/lib_ppc/cache.c
-u-boot-0.2.0/lib_ppc/time.c
+u-boot-0.2.0/arch/ppc/lib/board.c
+u-boot-0.2.0/arch/ppc/lib/cache.c
+u-boot-0.2.0/arch/ppc/lib/time.c
 u-boot-0.2.0/Makefile
 u-boot-0.2.0/CREDITS
 u-boot-0.2.0/doc/README.mpc5xx
diff --git a/doc/README.mvsmr b/doc/README.mvsmr
new file mode 100644
index 0000000000..d729ea6fbe
--- /dev/null
+++ b/doc/README.mvsmr
@@ -0,0 +1,55 @@
+Matrix Vision mvSMR
+-------------------
+
+1.	Board Description
+
+	The mvSMR is a 75x130mm single image processing board used
+	in automation. Power Supply is 24VDC.
+
+2	System Components
+
+2.1	CPU
+	Freescale MPC5200B CPU running at 400MHz core and 133MHz XLB/IPB.
+	64MB DDR-I @ 133MHz.
+	8 MByte Nor Flash on local bus.
+	2 serial ports. Console running on ttyS0 @ 115200 8N1.
+
+2.2	PCI
+	PCI clock fixed at 33MHz due to old'n'slow Xilinx PCI core.
+
+2.3	FPGA
+	Xilinx Spartan-3 XC3S200 with PCI DMA engine.
+	Connects to Matrix Vision specific CCD/CMOS sensor interface.
+
+2.4	I2C
+	EEPROM @ 0xA0 for vendor specifics.
+	image sensor interface (slave adresses depend on sensor)
+
+3	Flash layout.
+
+	reset vector is 0x00000100, i.e. "LOWBOOT".
+
+	FF800000	u-boot
+	FF806000	u-boot script image
+	FF808000	u-boot environment
+	FF840000	FPGA raw bit file
+	FF880000	root FS
+	FFF00000	kernel
+
+4	Booting
+
+	On startup the bootscript @ FF806000 is executed. This script can be
+	exchanged easily. Default boot mode is "boot from flash", i.e. system
+	works stand-alone.
+
+	This behaviour depends on some environment variables :
+
+	"netboot" : yes ->try dhcp/bootp and boot from network.
+	A "dhcp_client_id" and "dhcp_vendor-class-identifier" can be used for
+	DHCP server configuration, e.g. to provide different images to
+	different devices.
+
+	During netboot the system tries to get 3 image files:
+	1. Kernel - name + data is given during BOOTP.
+	2. Initrd - name is stored in "initrd_name"
+	Fallback files are the flash versions.
diff --git a/doc/README.nios b/doc/README.nios
index 7f34938081..5628144600 100644
--- a/doc/README.nios
+++ b/doc/README.nios
@@ -243,8 +243,8 @@ cover most of the individual functions to get you started.
 	following commands, then close the console window:
 
 		(gdb) directory common
-		(gdb) directory cpu/nios
-		(gdb) directory lib_nios
+		(gdb) directory arch/nios/cpu
+		(gdb) directory arch/nios/lib
 		(gdb) directory board/altera/dk1c20
 
 	Note that the last command is for the DK1C20 board only. If you
diff --git a/doc/TODO-i386 b/doc/TODO-i386
index 84113f8112..9b6c5d41ab 100644
--- a/doc/TODO-i386
+++ b/doc/TODO-i386
@@ -4,11 +4,11 @@ i386 port missing features:
 * setup the BIOS data area and BIOS equipment word to reflect machine config. 
 * Make reset work (from Linux and from the boot prompt)
 * DMA, FDC, RTC, KBC initialization
-* split of part of cpu/i386/interrupt.c to cpu/i385/entry.c?
+* split of part of arch/i386/cpu/interrupt.c to cpu/i385/entry.c?
 * re-entry of protected mode from real mode, should be added to realmode_switch.S 
   (and used by INT 10h and INT 16h handlers for console I/O during early
    linux boot...) 
-* missing functions in lib_i386 and cpu/i386
+* missing functions in arch/i386/lib and arch/i386/cpu
 * speaker beep interface
 
 
diff --git a/doc/uImage.FIT/multi.its b/doc/uImage.FIT/multi.its
index a120da038f..881b74952d 100644
--- a/doc/uImage.FIT/multi.its
+++ b/doc/uImage.FIT/multi.its
@@ -61,6 +61,8 @@
 			arch = "ppc";
 			os = "linux";
 			compression = "gzip";
+			load = <00000000>;
+			entry = <00000000>;
 			hash@1 {
 				algo = "sha1";
 			};
@@ -73,6 +75,8 @@
 			arch = "ppc";
 			os = "linux";
 			compression = "gzip";
+			load = <00000000>;
+			entry = <00000000>;
 			hash@1 {
 				algo = "crc32";
 			};
diff --git a/drivers/bios_emulator/atibios.c b/drivers/bios_emulator/atibios.c
index 5f9bd101d6..dbb5e8cce5 100644
--- a/drivers/bios_emulator/atibios.c
+++ b/drivers/bios_emulator/atibios.c
@@ -173,7 +173,7 @@ Maps a pointer to the BIOS image on the graphics card on the PCI bus.
 ****************************************************************************/
 void *PCI_mapBIOSImage(pci_dev_t pcidev)
 {
-	u32 BIOSImagePhys;
+	u32 BIOSImageBus;
 	int BIOSImageBAR;
 	u8 *BIOSImage;
 
@@ -195,16 +195,18 @@ void *PCI_mapBIOSImage(pci_dev_t pcidev)
 	 specific programming for different cards to solve this problem.
 	*/
 
-	if ((BIOSImagePhys = PCI_findBIOSAddr(pcidev, &BIOSImageBAR)) == 0) {
+	BIOSImageBus = PCI_findBIOSAddr(pcidev, &BIOSImageBAR);
+	if (BIOSImageBus == 0) {
 		printf("Find bios addr error\n");
 		return NULL;
 	}
 
-	BIOSImage = (u8 *) BIOSImagePhys;
+	BIOSImage = pci_bus_to_virt(pcidev, BIOSImageBus,
+				    PCI_REGION_MEM, 0, MAP_NOCACHE);
 
 	/*Change the PCI BAR registers to map it onto the bus.*/
 	pci_write_config_dword(pcidev, BIOSImageBAR, 0);
-	pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, BIOSImagePhys | 0x1);
+	pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1);
 
 	udelay(1);
 
@@ -315,7 +317,8 @@ int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo ** pVGAInfo, int cleanUp)
 	BE_init(0, 65536, VGAInfo, 0);
 
 	/*Post all the display controller BIOS'es*/
-	PCI_postController(pcidev, VGAInfo);
+	if (!PCI_postController(pcidev, VGAInfo))
+		return false;
 
 	/*Cleanup and exit the emulator if requested. If the BIOS emulator
 	is needed after booting the card, we will not call BE_exit and
diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c
index 0fe30410a6..7a89b5692c 100644
--- a/drivers/fpga/spartan3.c
+++ b/drivers/fpga/spartan3.c
@@ -385,34 +385,38 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
 		} while ((*fn->init) (cookie));
 
 		/* Load the data */
-		while (bytecount < bsize) {
-
-			/* Xilinx detects an error if INIT goes low (active)
-			   while DONE is low (inactive) */
-			if ((*fn->done) (cookie) == 0 && (*fn->init) (cookie)) {
-				puts ("** CRC error during FPGA load.\n");
-				return (FPGA_FAIL);
-			}
-			val = data [bytecount ++];
-			i = 8;
-			do {
-				/* Deassert the clock */
-				(*fn->clk) (FALSE, TRUE, cookie);
-				CONFIG_FPGA_DELAY ();
-				/* Write data */
-				(*fn->wr) ((val & 0x80), TRUE, cookie);
-				CONFIG_FPGA_DELAY ();
-				/* Assert the clock */
-				(*fn->clk) (TRUE, TRUE, cookie);
-				CONFIG_FPGA_DELAY ();
-				val <<= 1;
-				i --;
-			} while (i > 0);
+		if(*fn->bwr)
+			(*fn->bwr) (data, bsize, TRUE, cookie);
+		else {
+			while (bytecount < bsize) {
+
+				/* Xilinx detects an error if INIT goes low (active)
+				   while DONE is low (inactive) */
+				if ((*fn->done) (cookie) == 0 && (*fn->init) (cookie)) {
+					puts ("** CRC error during FPGA load.\n");
+					return (FPGA_FAIL);
+				}
+				val = data [bytecount ++];
+				i = 8;
+				do {
+					/* Deassert the clock */
+					(*fn->clk) (FALSE, TRUE, cookie);
+					CONFIG_FPGA_DELAY ();
+					/* Write data */
+					(*fn->wr) ((val & 0x80), TRUE, cookie);
+					CONFIG_FPGA_DELAY ();
+					/* Assert the clock */
+					(*fn->clk) (TRUE, TRUE, cookie);
+					CONFIG_FPGA_DELAY ();
+					val <<= 1;
+					i --;
+				} while (i > 0);
 
 #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
-			if (bytecount % (bsize / 40) == 0)
-				putc ('.');		/* let them know we are alive */
+				if (bytecount % (bsize / 40) == 0)
+					putc ('.');		/* let them know we are alive */
 #endif
+			}
 		}
 
 		CONFIG_FPGA_DELAY ();
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 29bda85dbd..d2c251546a 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -34,6 +34,7 @@ COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
 COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
 COBJS-$(CONFIG_DRIVER_OMAP34XX_I2C) += omap24xx_i2c.o
 COBJS-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o
+COBJS-$(CONFIG_PPC4XX_I2C) += ppc4xx_i2c.o
 COBJS-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o
 COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o
 COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o
diff --git a/cpu/ppc4xx/i2c.c b/drivers/i2c/ppc4xx_i2c.c
index 7976e75e0b..e9548f1a68 100644
--- a/cpu/ppc4xx/i2c.c
+++ b/drivers/i2c/ppc4xx_i2c.c
@@ -30,7 +30,7 @@
 #include <ppc4xx.h>
 #include <4xx_i2c.h>
 #include <i2c.h>
-#include <asm-ppc/io.h>
+#include <asm/io.h>
 
 #ifdef CONFIG_HARD_I2C
 
@@ -93,7 +93,7 @@ static void _i2c_bus_reset(void)
 
 void i2c_init(int speed, int slaveaddr)
 {
-	struct ppc4xx_i2c *i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR;
+	struct ppc4xx_i2c *i2c;
 	int val, divisor;
 	int bus;
 
@@ -109,6 +109,9 @@ void i2c_init(int speed, int slaveaddr)
 	for (bus = 0; bus < CONFIG_SYS_MAX_I2C_BUS; bus++) {
 		I2C_SET_BUS(bus);
 
+		/* Set i2c pointer after calling I2C_SET_BUS() */
+		i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR;
+
 		/* Handle possible failed I2C state */
 		/* FIXME: put this into i2c_init_board()? */
 		_i2c_bus_reset();
diff --git a/drivers/input/ps2ser.c b/drivers/input/ps2ser.c
index 1b20a76c4c..8d0b6d6042 100644
--- a/drivers/input/ps2ser.c
+++ b/drivers/input/ps2ser.c
@@ -36,8 +36,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PSC_BASE MPC5XXX_PSC2
 #elif CONFIG_PS2SERIAL == 3
 #define PSC_BASE MPC5XXX_PSC3
-#elif defined(CONFIG_MGT5100)
-#error CONFIG_PS2SERIAL must be in 1, 2 or 3
 #elif CONFIG_PS2SERIAL == 4
 #define PSC_BASE MPC5XXX_PSC4
 #elif CONFIG_PS2SERIAL == 5
@@ -87,23 +85,14 @@ int ps2ser_init(void)
 	psc->command = PSC_SEL_MODE_REG_1;
 
 	/* select clock sources */
-#if defined(CONFIG_MGT5100)
-	psc->psc_clock_select = 0xdd00;
-	baseclk = (CONFIG_SYS_MPC5XXX_CLKIN + 16) / 32;
-#elif defined(CONFIG_MPC5200)
 	psc->psc_clock_select = 0;
 	baseclk = (gd->ipb_clk + 16) / 32;
-#endif
 
 	/* switch to UART mode */
 	psc->sicr = 0;
 
 	/* configure parity, bit length and so on */
-#if defined(CONFIG_MGT5100)
-	psc->mode = PSC_MODE_ERR | PSC_MODE_8_BITS | PSC_MODE_PARNONE;
-#elif defined(CONFIG_MPC5200)
 	psc->mode = PSC_MODE_8_BITS | PSC_MODE_PARNONE;
-#endif
 	psc->mode = PSC_MODE_ONE_STOP;
 
 	/* set up UART divisor */
diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index 287e555900..8255175d2a 100644
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2008-2009 Freescale Semiconductor, Inc.
+ * Copyright 2008-2010 Freescale Semiconductor, Inc.
  *
  * (C) Copyright 2000
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
@@ -39,6 +39,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define FSL_HW_NUM_LAWS 10
 #elif defined(CONFIG_MPC8536) || defined(CONFIG_MPC8572) || \
       defined(CONFIG_P1011) || defined(CONFIG_P1020) || \
+      defined(CONFIG_P1012) || defined(CONFIG_P1021) || \
+      defined(CONFIG_P1013) || defined(CONFIG_P1022) || \
       defined(CONFIG_P2010) || defined(CONFIG_P2020)
 #define FSL_HW_NUM_LAWS 12
 #elif defined(CONFIG_PPC_P4080)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index e665b5ebd8..0f6f8b161c 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2007, Freescale Semiconductor, Inc
+ * Copyright 2007,2010 Freescale Semiconductor, Inc
  * Andy Fleming
  *
  * Based vaguely on the pxa mmc code:
@@ -110,8 +110,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
 		if (wml_value > 0x10)
 			wml_value = 0x10;
 
-		wml_value = 0x100000 | wml_value;
-
+		esdhc_clrsetbits32(&regs->wml, WML_RD_WML_MASK, wml_value);
 		esdhc_write32(&regs->dsaddr, (u32)data->dest);
 	} else {
 		if (wml_value > 0x80)
@@ -120,12 +119,12 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
 			printf("\nThe SD card is locked. Can not write to a locked card.\n\n");
 			return TIMEOUT;
 		}
-		wml_value = wml_value << 16 | 0x10;
+
+		esdhc_clrsetbits32(&regs->wml, WML_WR_WML_MASK,
+					wml_value << 16);
 		esdhc_write32(&regs->dsaddr, (u32)data->src);
 	}
 
-	esdhc_write32(&regs->wml, wml_value);
-
 	esdhc_write32(&regs->blkattr, data->blocks << 16 | data->blocksize);
 
 	/* Calculate the timeout period for data transactions */
@@ -265,18 +264,13 @@ void set_sysctl(struct mmc *mmc, uint clock)
 
 	clk = (pre_div << 8) | (div << 4);
 
-	/* On imx the clock must be stopped before changing frequency */
-	if (cfg->clk_enable)
-		esdhc_clrbits32(&regs->sysctl, SYSCTL_CKEN);
+	esdhc_clrbits32(&regs->sysctl, SYSCTL_CKEN);
 
 	esdhc_clrsetbits32(&regs->sysctl, SYSCTL_CLOCK_MASK, clk);
 
 	udelay(10000);
 
-	clk = SYSCTL_PEREN;
-	/* On imx systems the clock must be explicitely enabled */
-	if (cfg->clk_enable)
-		clk |= SYSCTL_CKEN;
+	clk = SYSCTL_PEREN | SYSCTL_CKEN;
 
 	esdhc_setbits32(&regs->sysctl, clk);
 }
@@ -349,6 +343,20 @@ static int esdhc_init(struct mmc *mmc)
 	return ret;
 }
 
+static void esdhc_reset(struct fsl_esdhc *regs)
+{
+	unsigned long timeout = 100; /* wait max 100 ms */
+
+	/* reset the controller */
+	esdhc_write32(&regs->sysctl, SYSCTL_RSTA);
+
+	/* hardware clears the bit when it is done */
+	while ((esdhc_read32(&regs->sysctl) & SYSCTL_RSTA) && --timeout)
+		udelay(1000);
+	if (!timeout)
+		printf("MMC/SD: Reset never completed.\n");
+}
+
 int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
 {
 	struct fsl_esdhc *regs;
@@ -363,6 +371,9 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
 	sprintf(mmc->name, "FSL_ESDHC");
 	regs = (struct fsl_esdhc *)cfg->esdhc_base;
 
+	/* First reset the eSDHC controller */
+	esdhc_reset(regs);
+
 	mmc->priv = cfg;
 	mmc->send_cmd = esdhc_send_cmd;
 	mmc->set_ios = esdhc_set_ios;
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index fdba297c88..3267c5de36 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -537,10 +537,14 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 	ulong start;
 
 #if CONFIG_SYS_HZ != 1000
-	tout *= CONFIG_SYS_HZ/1000;
+	if ((ulong)CONFIG_SYS_HZ > 100000)
+		tout *= (ulong)CONFIG_SYS_HZ / 1000;  /* for a big HZ, avoid overflow */
+	else
+		tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 #endif
 
 	/* Wait for command completion */
+	reset_timer();
 	start = get_timer (0);
 	while (flash_is_busy (info, sector)) {
 		if (get_timer (start) > tout) {
@@ -602,6 +606,64 @@ static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 	return retcode;
 }
 
+static int use_flash_status_poll(flash_info_t *info)
+{
+#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
+	if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
+	    info->vendor == CFI_CMDSET_AMD_STANDARD)
+		return 1;
+#endif
+	return 0;
+}
+
+static int flash_status_poll(flash_info_t *info, void *src, void *dst,
+			     ulong tout, char *prompt)
+{
+#ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
+	ulong start;
+	int ready;
+
+#if CONFIG_SYS_HZ != 1000
+	if ((ulong)CONFIG_SYS_HZ > 100000)
+		tout *= (ulong)CONFIG_SYS_HZ / 1000;  /* for a big HZ, avoid overflow */
+	else
+		tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
+#endif
+
+	/* Wait for command completion */
+	reset_timer();
+	start = get_timer(0);
+	while (1) {
+		switch (info->portwidth) {
+		case FLASH_CFI_8BIT:
+			ready = flash_read8(dst) == flash_read8(src);
+			break;
+		case FLASH_CFI_16BIT:
+			ready = flash_read16(dst) == flash_read16(src);
+			break;
+		case FLASH_CFI_32BIT:
+			ready = flash_read32(dst) == flash_read32(src);
+			break;
+		case FLASH_CFI_64BIT:
+			ready = flash_read64(dst) == flash_read64(src);
+			break;
+		default:
+			ready = 0;
+			break;
+		}
+		if (ready)
+			break;
+		if (get_timer(start) > tout) {
+			printf("Flash %s timeout at address %lx data %lx\n",
+			       prompt, (ulong)dst, (ulong)flash_read8(dst));
+			return ERR_TIMOUT;
+		}
+		udelay(1);		/* also triggers watchdog */
+	}
+#endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
+	return ERR_OK;
+}
+
 /*-----------------------------------------------------------------------
  */
 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
@@ -749,7 +811,12 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest,
 	if (!sect_found)
 		sect = find_sector (info, dest);
 
-	return flash_full_status_check (info, sect, info->write_tout, "write");
+	if (use_flash_status_poll(info))
+		return flash_status_poll(info, &cword, dstaddr,
+					 info->write_tout, "write");
+	else
+		return flash_full_status_check(info, sect,
+					       info->write_tout, "write");
 }
 
 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
@@ -911,9 +978,15 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
 		}
 
 		flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
-		retcode = flash_full_status_check (info, sector,
-						   info->buffer_write_tout,
-						   "buffer write");
+		if (use_flash_status_poll(info))
+			retcode = flash_status_poll(info, src - (1 << shift),
+						    dst - (1 << shift),
+						    info->buffer_write_tout,
+						    "buffer write");
+		else
+			retcode = flash_full_status_check(info, sector,
+							  info->buffer_write_tout,
+							  "buffer write");
 		break;
 
 	default:
@@ -935,6 +1008,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
 	int rcode = 0;
 	int prot;
 	flash_sect_t sect;
+	int st;
 
 	if (info->flash_id != FLASH_MAN_CFI) {
 		puts ("Can't erase unknown flash type - aborted\n");
@@ -998,10 +1072,20 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
 				break;
 			}
 
-			if (flash_full_status_check
-			    (info, sect, info->erase_blk_tout, "erase")) {
+			if (use_flash_status_poll(info)) {
+				cfiword_t cword = (cfiword_t)0xffffffffffffffffULL;
+				void *dest;
+				dest = flash_map(info, sect, 0);
+				st = flash_status_poll(info, &cword, dest,
+						       info->erase_blk_tout, "erase");
+				flash_unmap(info, sect, 0, dest);
+			} else
+				st = flash_full_status_check(info, sect,
+							     info->erase_blk_tout,
+							     "erase");
+			if (st)
 				rcode = 1;
-			} else if (flash_verbose)
+			else if (flash_verbose)
 				putc ('.');
 		}
 	}
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 40002be417..d5eb54ad84 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -31,6 +31,209 @@
 
 #include <nand.h>
 
+#ifdef CONFIG_ATMEL_NAND_HWECC
+
+/* Register access macros */
+#define ecc_readl(add, reg)				\
+	readl(AT91_BASE_SYS + add + ATMEL_ECC_##reg)
+#define ecc_writel(add, reg, value)			\
+	writel((value), AT91_BASE_SYS + add + ATMEL_ECC_##reg)
+
+#include "atmel_nand_ecc.h"	/* Hardware ECC registers */
+
+/* oob layout for large page size
+ * bad block info is on bytes 0 and 1
+ * the bytes have to be consecutives to avoid
+ * several NAND_CMD_RNDOUT during read
+ */
+static struct nand_ecclayout atmel_oobinfo_large = {
+	.eccbytes = 4,
+	.eccpos = {60, 61, 62, 63},
+	.oobfree = {
+		{2, 58}
+	},
+};
+
+/* oob layout for small page size
+ * bad block info is on bytes 4 and 5
+ * the bytes have to be consecutives to avoid
+ * several NAND_CMD_RNDOUT during read
+ */
+static struct nand_ecclayout atmel_oobinfo_small = {
+	.eccbytes = 4,
+	.eccpos = {0, 1, 2, 3},
+	.oobfree = {
+		{6, 10}
+	},
+};
+
+/*
+ * Calculate HW ECC
+ *
+ * function called after a write
+ *
+ * mtd:        MTD block structure
+ * dat:        raw data (unused)
+ * ecc_code:   buffer for ECC
+ */
+static int atmel_nand_calculate(struct mtd_info *mtd,
+		const u_char *dat, unsigned char *ecc_code)
+{
+	struct nand_chip *nand_chip = mtd->priv;
+	unsigned int ecc_value;
+
+	/* get the first 2 ECC bytes */
+	ecc_value = ecc_readl(CONFIG_SYS_NAND_ECC_BASE, PR);
+
+	ecc_code[0] = ecc_value & 0xFF;
+	ecc_code[1] = (ecc_value >> 8) & 0xFF;
+
+	/* get the last 2 ECC bytes */
+	ecc_value = ecc_readl(CONFIG_SYS_NAND_ECC_BASE, NPR) & ATMEL_ECC_NPARITY;
+
+	ecc_code[2] = ecc_value & 0xFF;
+	ecc_code[3] = (ecc_value >> 8) & 0xFF;
+
+	return 0;
+}
+
+/*
+ * HW ECC read page function
+ *
+ * mtd:        mtd info structure
+ * chip:       nand chip info structure
+ * buf:        buffer to store read data
+ */
+static int atmel_nand_read_page(struct mtd_info *mtd,
+		struct nand_chip *chip, uint8_t *buf, int page)
+{
+	int eccsize = chip->ecc.size;
+	int eccbytes = chip->ecc.bytes;
+	uint32_t *eccpos = chip->ecc.layout->eccpos;
+	uint8_t *p = buf;
+	uint8_t *oob = chip->oob_poi;
+	uint8_t *ecc_pos;
+	int stat;
+
+	/* read the page */
+	chip->read_buf(mtd, p, eccsize);
+
+	/* move to ECC position if needed */
+	if (eccpos[0] != 0) {
+		/* This only works on large pages
+		 * because the ECC controller waits for
+		 * NAND_CMD_RNDOUTSTART after the
+		 * NAND_CMD_RNDOUT.
+		 * anyway, for small pages, the eccpos[0] == 0
+		 */
+		chip->cmdfunc(mtd, NAND_CMD_RNDOUT,
+				mtd->writesize + eccpos[0], -1);
+	}
+
+	/* the ECC controller needs to read the ECC just after the data */
+	ecc_pos = oob + eccpos[0];
+	chip->read_buf(mtd, ecc_pos, eccbytes);
+
+	/* check if there's an error */
+	stat = chip->ecc.correct(mtd, p, oob, NULL);
+
+	if (stat < 0)
+		mtd->ecc_stats.failed++;
+	else
+		mtd->ecc_stats.corrected += stat;
+
+	/* get back to oob start (end of page) */
+	chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1);
+
+	/* read the oob */
+	chip->read_buf(mtd, oob, mtd->oobsize);
+
+	return 0;
+}
+
+/*
+ * HW ECC Correction
+ *
+ * function called after a read
+ *
+ * mtd:        MTD block structure
+ * dat:        raw data read from the chip
+ * read_ecc:   ECC from the chip (unused)
+ * isnull:     unused
+ *
+ * Detect and correct a 1 bit error for a page
+ */
+static int atmel_nand_correct(struct mtd_info *mtd, u_char *dat,
+		u_char *read_ecc, u_char *isnull)
+{
+	struct nand_chip *nand_chip = mtd->priv;
+	unsigned int ecc_status, ecc_parity, ecc_mode;
+	unsigned int ecc_word, ecc_bit;
+
+	/* get the status from the Status Register */
+	ecc_status = ecc_readl(CONFIG_SYS_NAND_ECC_BASE, SR);
+
+	/* if there's no error */
+	if (likely(!(ecc_status & ATMEL_ECC_RECERR)))
+		return 0;
+
+	/* get error bit offset (4 bits) */
+	ecc_bit = ecc_readl(CONFIG_SYS_NAND_ECC_BASE, PR) & ATMEL_ECC_BITADDR;
+	/* get word address (12 bits) */
+	ecc_word = ecc_readl(CONFIG_SYS_NAND_ECC_BASE, PR) & ATMEL_ECC_WORDADDR;
+	ecc_word >>= 4;
+
+	/* if there are multiple errors */
+	if (ecc_status & ATMEL_ECC_MULERR) {
+		/* check if it is a freshly erased block
+		 * (filled with 0xff) */
+		if ((ecc_bit == ATMEL_ECC_BITADDR)
+				&& (ecc_word == (ATMEL_ECC_WORDADDR >> 4))) {
+			/* the block has just been erased, return OK */
+			return 0;
+		}
+		/* it doesn't seems to be a freshly
+		 * erased block.
+		 * We can't correct so many errors */
+		printk(KERN_WARNING "atmel_nand : multiple errors detected."
+				" Unable to correct.\n");
+		return -EIO;
+	}
+
+	/* if there's a single bit error : we can correct it */
+	if (ecc_status & ATMEL_ECC_ECCERR) {
+		/* there's nothing much to do here.
+		 * the bit error is on the ECC itself.
+		 */
+		printk(KERN_WARNING "atmel_nand : one bit error on ECC code."
+				" Nothing to correct\n");
+		return 0;
+	}
+
+	printk(KERN_WARNING "atmel_nand : one bit error on data."
+			" (word offset in the page :"
+			" 0x%x bit offset : 0x%x)\n",
+			ecc_word, ecc_bit);
+	/* correct the error */
+	if (nand_chip->options & NAND_BUSWIDTH_16) {
+		/* 16 bits words */
+		((unsigned short *) dat)[ecc_word] ^= (1 << ecc_bit);
+	} else {
+		/* 8 bits words */
+		dat[ecc_word] ^= (1 << ecc_bit);
+	}
+	printk(KERN_WARNING "atmel_nand : error corrected\n");
+	return 1;
+}
+
+/*
+ * Enable HW ECC : unused on most chips
+ */
+static void atmel_nand_hwctl(struct mtd_info *mtd, int mode)
+{
+}
+#endif
+
 static void at91_nand_hwcontrol(struct mtd_info *mtd,
 					 int cmd, unsigned int ctrl)
 {
@@ -64,6 +267,11 @@ static int at91_nand_ready(struct mtd_info *mtd)
 
 int board_nand_init(struct nand_chip *nand)
 {
+#ifdef CONFIG_ATMEL_NAND_HWECC
+	static int chip_nr = 0;
+	struct mtd_info *mtd;
+#endif
+
 	nand->ecc.mode = NAND_ECC_SOFT;
 #ifdef CONFIG_SYS_NAND_DBW_16
 	nand->options = NAND_BUSWIDTH_16;
@@ -74,5 +282,62 @@ int board_nand_init(struct nand_chip *nand)
 #endif
 	nand->chip_delay = 20;
 
+#ifdef CONFIG_ATMEL_NAND_HWECC
+	nand->ecc.mode = NAND_ECC_HW;
+	nand->ecc.calculate = atmel_nand_calculate;
+	nand->ecc.correct = atmel_nand_correct;
+	nand->ecc.hwctl = atmel_nand_hwctl;
+	nand->ecc.read_page = atmel_nand_read_page;
+	nand->ecc.bytes = 4;
+#endif
+
+#ifdef CONFIG_ATMEL_NAND_HWECC
+	mtd = &nand_info[chip_nr++];
+	mtd->priv = nand;
+
+	/* Detect NAND chips */
+	if (nand_scan_ident(mtd, 1)) {
+		printk(KERN_WARNING "NAND Flash not found !\n");
+		return -ENXIO;
+	}
+
+	if (nand->ecc.mode == NAND_ECC_HW) {
+		/* ECC is calculated for the whole page (1 step) */
+		nand->ecc.size = mtd->writesize;
+
+		/* set ECC page size and oob layout */
+		switch (mtd->writesize) {
+		case 512:
+			nand->ecc.layout = &atmel_oobinfo_small;
+			ecc_writel(CONFIG_SYS_NAND_ECC_BASE, MR, ATMEL_ECC_PAGESIZE_528);
+			break;
+		case 1024:
+			nand->ecc.layout = &atmel_oobinfo_large;
+			ecc_writel(CONFIG_SYS_NAND_ECC_BASE, MR, ATMEL_ECC_PAGESIZE_1056);
+			break;
+		case 2048:
+			nand->ecc.layout = &atmel_oobinfo_large;
+			ecc_writel(CONFIG_SYS_NAND_ECC_BASE, MR, ATMEL_ECC_PAGESIZE_2112);
+			break;
+		case 4096:
+			nand->ecc.layout = &atmel_oobinfo_large;
+			ecc_writel(CONFIG_SYS_NAND_ECC_BASE, MR, ATMEL_ECC_PAGESIZE_4224);
+			break;
+		default:
+			/* page size not handled by HW ECC */
+			/* switching back to soft ECC */
+			nand->ecc.mode = NAND_ECC_SOFT;
+			nand->ecc.calculate = NULL;
+			nand->ecc.correct = NULL;
+			nand->ecc.hwctl = NULL;
+			nand->ecc.read_page = NULL;
+			nand->ecc.postpad = 0;
+			nand->ecc.prepad = 0;
+			nand->ecc.bytes = 0;
+			break;
+		}
+	}
+#endif
+
 	return 0;
 }
diff --git a/drivers/mtd/nand/atmel_nand_ecc.h b/drivers/mtd/nand/atmel_nand_ecc.h
new file mode 100644
index 0000000000..1ee7f993db
--- /dev/null
+++ b/drivers/mtd/nand/atmel_nand_ecc.h
@@ -0,0 +1,36 @@
+/*
+ * Error Corrected Code Controller (ECC) - System peripherals regsters.
+ * Based on AT91SAM9260 datasheet revision B.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifndef ATMEL_NAND_ECC_H
+#define ATMEL_NAND_ECC_H
+
+#define ATMEL_ECC_CR		0x00			/* Control register */
+#define		ATMEL_ECC_RST		(1 << 0)		/* Reset parity */
+
+#define ATMEL_ECC_MR		0x04			/* Mode register */
+#define		ATMEL_ECC_PAGESIZE	(3 << 0)		/* Page Size */
+#define			ATMEL_ECC_PAGESIZE_528		(0)
+#define			ATMEL_ECC_PAGESIZE_1056		(1)
+#define			ATMEL_ECC_PAGESIZE_2112		(2)
+#define			ATMEL_ECC_PAGESIZE_4224		(3)
+
+#define ATMEL_ECC_SR		0x08			/* Status register */
+#define		ATMEL_ECC_RECERR		(1 << 0)		/* Recoverable Error */
+#define		ATMEL_ECC_ECCERR		(1 << 1)		/* ECC Single Bit Error */
+#define		ATMEL_ECC_MULERR		(1 << 2)		/* Multiple Errors */
+
+#define ATMEL_ECC_PR		0x0c			/* Parity register */
+#define		ATMEL_ECC_BITADDR	(0xf << 0)		/* Bit Error Address */
+#define		ATMEL_ECC_WORDADDR	(0xfff << 4)		/* Word Error Address */
+
+#define ATMEL_ECC_NPR		0x10			/* NParity register */
+#define		ATMEL_ECC_NPARITY	(0xffff << 0)		/* NParity */
+
+#endif
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index bfc2acf59e..4ca738e451 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -57,8 +57,6 @@
 #define ECC_STATE_ERR_CORR_COMP_P	0x2
 #define ECC_STATE_ERR_CORR_COMP_N	0x3
 
-static emif_registers *const emif_regs = (void *) DAVINCI_ASYNC_EMIF_CNTRL_BASE;
-
 /*
  * Exploit the little endianness of the ARM to do multi-byte transfers
  * per device read. This can perform over twice as quickly as individual
@@ -93,7 +91,7 @@ static void nand_davinci_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
 
 	/* copy aligned data */
 	while (len >= 4) {
-		*(u32 *)buf = readl(nand);
+		*(u32 *)buf = __raw_readl(nand);
 		buf += 4;
 		len -= 4;
 	}
@@ -138,7 +136,7 @@ static void nand_davinci_write_buf(struct mtd_info *mtd, const uint8_t *buf,
 
 	/* copy aligned data */
 	while (len >= 4) {
-		writel(*(u32 *)buf, nand);
+		__raw_writel(*(u32 *)buf, nand);
 		buf += 4;
 		len -= 4;
 	}
@@ -156,7 +154,8 @@ static void nand_davinci_write_buf(struct mtd_info *mtd, const uint8_t *buf,
 	}
 }
 
-static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd,
+		unsigned int ctrl)
 {
 	struct		nand_chip *this = mtd->priv;
 	u_int32_t	IO_ADDR_W = (u_int32_t)this->IO_ADDR_W;
@@ -164,9 +163,9 @@ static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int c
 	if (ctrl & NAND_CTRL_CHANGE) {
 		IO_ADDR_W &= ~(MASK_ALE|MASK_CLE);
 
-		if ( ctrl & NAND_CLE )
+		if (ctrl & NAND_CLE)
 			IO_ADDR_W |= MASK_CLE;
-		if ( ctrl & NAND_ALE )
+		if (ctrl & NAND_ALE)
 			IO_ADDR_W |= MASK_ALE;
 		this->IO_ADDR_W = (void __iomem *) IO_ADDR_W;
 	}
@@ -181,24 +180,26 @@ static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode)
 {
 	u_int32_t	val;
 
-	(void)readl(&(emif_regs->NANDFECC[CONFIG_SYS_NAND_CS - 2]));
+	(void)__raw_readl(&(davinci_emif_regs->nandfecc[
+				CONFIG_SYS_NAND_CS - 2]));
 
-	val = readl(&emif_regs->NANDFCR);
+	val = __raw_readl(&davinci_emif_regs->nandfcr);
 	val |= DAVINCI_NANDFCR_NAND_ENABLE(CONFIG_SYS_NAND_CS);
 	val |= DAVINCI_NANDFCR_1BIT_ECC_START(CONFIG_SYS_NAND_CS);
-	writel(val, &emif_regs->NANDFCR);
+	__raw_writel(val, &davinci_emif_regs->nandfcr);
 }
 
 static u_int32_t nand_davinci_readecc(struct mtd_info *mtd, u_int32_t region)
 {
 	u_int32_t	ecc = 0;
 
-	ecc = readl(&(emif_regs->NANDFECC[region - 1]));
+	ecc = __raw_readl(&(davinci_emif_regs->nandfecc[region - 1]));
 
-	return(ecc);
+	return ecc;
 }
 
-static int nand_davinci_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
+static int nand_davinci_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
+		u_char *ecc_code)
 {
 	u_int32_t		tmp;
 	const int region = 1;
@@ -232,7 +233,8 @@ static int nand_davinci_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u
 	return 0;
 }
 
-static int nand_davinci_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc)
+static int nand_davinci_correct_data(struct mtd_info *mtd, u_char *dat,
+		u_char *read_ecc, u_char *calc_ecc)
 {
 	struct nand_chip *this = mtd->priv;
 	u_int32_t ecc_nand = read_ecc[0] | (read_ecc[1] << 8) |
@@ -268,7 +270,7 @@ static int nand_davinci_correct_data(struct mtd_info *mtd, u_char *dat, u_char *
 			return -1;
 		}
 	}
-	return(0);
+	return 0;
 }
 #endif /* CONFIG_SYS_NAND_HW_ECC */
 
@@ -315,15 +317,15 @@ static void nand_davinci_4bit_enable_hwecc(struct mtd_info *mtd, int mode)
 		 * Start a new ECC calculation for reading or writing 512 bytes
 		 * of data.
 		 */
-		val = readl(&emif_regs->NANDFCR);
+		val = __raw_readl(&davinci_emif_regs->nandfcr);
 		val &= ~DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK;
 		val |= DAVINCI_NANDFCR_NAND_ENABLE(CONFIG_SYS_NAND_CS);
 		val |= DAVINCI_NANDFCR_4BIT_ECC_SEL(CONFIG_SYS_NAND_CS);
 		val |= DAVINCI_NANDFCR_4BIT_ECC_START;
-		writel(val, &emif_regs->NANDFCR);
+		__raw_writel(val, &davinci_emif_regs->nandfcr);
 		break;
 	case NAND_ECC_READSYN:
-		val = emif_regs->NAND4BITECC1;
+		val = __raw_readl(&davinci_emif_regs->nand4bitecc[0]);
 		break;
 	default:
 		break;
@@ -332,10 +334,12 @@ static void nand_davinci_4bit_enable_hwecc(struct mtd_info *mtd, int mode)
 
 static u32 nand_davinci_4bit_readecc(struct mtd_info *mtd, unsigned int ecc[4])
 {
-	ecc[0] = emif_regs->NAND4BITECC1 & NAND_4BITECC_MASK;
-	ecc[1] = emif_regs->NAND4BITECC2 & NAND_4BITECC_MASK;
-	ecc[2] = emif_regs->NAND4BITECC3 & NAND_4BITECC_MASK;
-	ecc[3] = emif_regs->NAND4BITECC4 & NAND_4BITECC_MASK;
+	int i;
+
+	for (i = 0; i < 4; i++) {
+		ecc[i] = __raw_readl(&davinci_emif_regs->nand4bitecc[i]) &
+			NAND_4BITECC_MASK;
+	}
 
 	return 0;
 }
@@ -418,32 +422,36 @@ static int nand_davinci_4bit_correct_data(struct mtd_info *mtd, uint8_t *dat,
 	 */
 
 	/*Take 2 bits from 8th byte and 8 bits from 9th byte */
-	writel(((ecc16[4]) >> 6) & 0x3FF, &emif_regs->NAND4BITECCLOAD);
+	__raw_writel(((ecc16[4]) >> 6) & 0x3FF,
+			&davinci_emif_regs->nand4biteccload);
 
 	/* Take 4 bits from 7th byte and 6 bits from 8th byte */
-	writel((((ecc16[3]) >> 12) & 0xF) | ((((ecc16[4])) << 4) & 0x3F0),
-	       &emif_regs->NAND4BITECCLOAD);
+	__raw_writel((((ecc16[3]) >> 12) & 0xF) | ((((ecc16[4])) << 4) & 0x3F0),
+			&davinci_emif_regs->nand4biteccload);
 
 	/* Take 6 bits from 6th byte and 4 bits from 7th byte */
-	writel((ecc16[3] >> 2) & 0x3FF, &emif_regs->NAND4BITECCLOAD);
+	__raw_writel((ecc16[3] >> 2) & 0x3FF,
+			&davinci_emif_regs->nand4biteccload);
 
 	/* Take 8 bits from 5th byte and 2 bits from 6th byte */
-	writel(((ecc16[2]) >> 8) | ((((ecc16[3])) << 8) & 0x300),
-	       &emif_regs->NAND4BITECCLOAD);
+	__raw_writel(((ecc16[2]) >> 8) | ((((ecc16[3])) << 8) & 0x300),
+			&davinci_emif_regs->nand4biteccload);
 
 	/*Take 2 bits from 3rd byte and 8 bits from 4th byte */
-	writel((((ecc16[1]) >> 14) & 0x3) | ((((ecc16[2])) << 2) & 0x3FC),
-	       &emif_regs->NAND4BITECCLOAD);
+	__raw_writel((((ecc16[1]) >> 14) & 0x3) | ((((ecc16[2])) << 2) & 0x3FC),
+			&davinci_emif_regs->nand4biteccload);
 
 	/* Take 4 bits form 2nd bytes and 6 bits from 3rd bytes */
-	writel(((ecc16[1]) >> 4) & 0x3FF, &emif_regs->NAND4BITECCLOAD);
+	__raw_writel(((ecc16[1]) >> 4) & 0x3FF,
+			&davinci_emif_regs->nand4biteccload);
 
 	/* Take 6 bits from 1st byte and 4 bits from 2nd byte */
-	writel((((ecc16[0]) >> 10) & 0x3F) | (((ecc16[1]) << 6) & 0x3C0),
-	       &emif_regs->NAND4BITECCLOAD);
+	__raw_writel((((ecc16[0]) >> 10) & 0x3F) | (((ecc16[1]) << 6) & 0x3C0),
+			&davinci_emif_regs->nand4biteccload);
 
 	/* Take 10 bits from 0th and 1st bytes */
-	writel((ecc16[0]) & 0x3FF, &emif_regs->NAND4BITECCLOAD);
+	__raw_writel((ecc16[0]) & 0x3FF,
+			&davinci_emif_regs->nand4biteccload);
 
 	/*
 	 * Perform a dummy read to the EMIF Revision Code and Status register.
@@ -451,7 +459,7 @@ static int nand_davinci_4bit_correct_data(struct mtd_info *mtd, uint8_t *dat,
 	 * writing the ECC values in previous step.
 	 */
 
-	val = emif_regs->NANDFSR;
+	val = __raw_readl(&davinci_emif_regs->nandfsr);
 
 	/*
 	 * Read the syndrome from the NAND Flash 4-Bit ECC 1-4 registers.
@@ -467,13 +475,13 @@ static int nand_davinci_4bit_correct_data(struct mtd_info *mtd, uint8_t *dat,
 	 * Clear any previous address calculation by doing a dummy read of an
 	 * error address register.
 	 */
-	val = emif_regs->NANDERRADD1;
+	val = __raw_readl(&davinci_emif_regs->nanderradd1);
 
 	/*
 	 * Set the addr_calc_st bit(bit no 13) in the NAND Flash Control
 	 * register to 1.
 	 */
-	emif_regs->NANDFCR |= 1 << 13;
+	__raw_writel(1 << 13, &davinci_emif_regs->nandfcr);
 
 	/*
 	 * Wait for the corr_state field (bits 8 to 11)in the
@@ -481,12 +489,12 @@ static int nand_davinci_4bit_correct_data(struct mtd_info *mtd, uint8_t *dat,
 	 */
 	i = NAND_TIMEOUT;
 	do {
-		val = emif_regs->NANDFSR;
+		val = __raw_readl(&davinci_emif_regs->nandfsr);
 		val &= 0xc00;
 		i--;
 	} while ((i > 0) && val);
 
-	iserror = emif_regs->NANDFSR;
+	iserror = __raw_readl(&davinci_emif_regs->nandfsr);
 	iserror &= EMIF_NANDFSR_ECC_STATE_MASK;
 	iserror = iserror >> 8;
 
@@ -501,32 +509,33 @@ static int nand_davinci_4bit_correct_data(struct mtd_info *mtd, uint8_t *dat,
 	 */
 
 	if (iserror == ECC_STATE_NO_ERR) {
-		val = emif_regs->NANDERRVAL1;
+		val = __raw_readl(&davinci_emif_regs->nanderrval1);
 		return 0;
 	} else if (iserror == ECC_STATE_TOO_MANY_ERRS) {
-		val = emif_regs->NANDERRVAL1;
+		val = __raw_readl(&davinci_emif_regs->nanderrval1);
 		return -1;
 	}
 
-	numerrors = ((emif_regs->NANDFSR >> 16) & 0x3) + 1;
+	numerrors = ((__raw_readl(&davinci_emif_regs->nandfsr) >> 16)
+			& 0x3) + 1;
 
 	/* Read the error address, error value and correct */
 	for (i = 0; i < numerrors; i++) {
 		if (i > 1) {
 			erroraddress =
-			    ((emif_regs->NANDERRADD2 >>
+			    ((__raw_readl(&davinci_emif_regs->nanderradd2) >>
 			      (16 * (i & 1))) & 0x3FF);
 			erroraddress = ((512 + 7) - erroraddress);
 			errorvalue =
-			    ((emif_regs->NANDERRVAL2 >>
+			    ((__raw_readl(&davinci_emif_regs->nanderrval2) >>
 			      (16 * (i & 1))) & 0xFF);
 		} else {
 			erroraddress =
-			    ((emif_regs->NANDERRADD1 >>
+			    ((__raw_readl(&davinci_emif_regs->nanderradd1) >>
 			      (16 * (i & 1))) & 0x3FF);
 			erroraddress = ((512 + 7) - erroraddress);
 			errorvalue =
-			    ((emif_regs->NANDERRVAL1 >>
+			    ((__raw_readl(&davinci_emif_regs->nanderrval1) >>
 			      (16 * (i & 1))) & 0xFF);
 		}
 		/* xor the corrupt data with error value */
@@ -540,7 +549,7 @@ static int nand_davinci_4bit_correct_data(struct mtd_info *mtd, uint8_t *dat,
 
 static int nand_davinci_dev_ready(struct mtd_info *mtd)
 {
-	return emif_regs->NANDFSR & 0x1;
+	return __raw_readl(&davinci_emif_regs->nandfsr) & 0x1;
 }
 
 static void nand_flash_init(void)
@@ -561,21 +570,22 @@ static void nand_flash_init(void)
 	 *                                                                  *
 	 *------------------------------------------------------------------*/
 	 acfg1 = 0
-		| (0 << 31 )	/* selectStrobe */
-		| (0 << 30 )	/* extWait */
-		| (1 << 26 )	/* writeSetup	10 ns */
-		| (3 << 20 )	/* writeStrobe	40 ns */
-		| (1 << 17 )	/* writeHold	10 ns */
-		| (1 << 13 )	/* readSetup	10 ns */
-		| (5 << 7 )	/* readStrobe	60 ns */
-		| (1 << 4 )	/* readHold	10 ns */
-		| (3 << 2 )	/* turnAround	?? ns */
-		| (0 << 0 )	/* asyncSize	8-bit bus */
+		| (0 << 31)	/* selectStrobe */
+		| (0 << 30)	/* extWait */
+		| (1 << 26)	/* writeSetup	10 ns */
+		| (3 << 20)	/* writeStrobe	40 ns */
+		| (1 << 17)	/* writeHold	10 ns */
+		| (1 << 13)	/* readSetup	10 ns */
+		| (5 << 7)	/* readStrobe	60 ns */
+		| (1 << 4)	/* readHold	10 ns */
+		| (3 << 2)	/* turnAround	?? ns */
+		| (0 << 0)	/* asyncSize	8-bit bus */
 		;
 
-	emif_regs->AB1CR = acfg1; /* CS2 */
+	__raw_writel(acfg1, &davinci_emif_regs->ab1cr); /* CS2 */
 
-	emif_regs->NANDFCR = 0x00000101; /* NAND flash on CS2 */
+	/* NAND flash on CS2 */
+	__raw_writel(0x00000101, &davinci_emif_regs->nandfcr);
 #endif
 }
 
diff --git a/drivers/mtd/spi/eeprom_m95xxx.c b/drivers/mtd/spi/eeprom_m95xxx.c
index 0148d005e9..632db4e9e0 100644
--- a/drivers/mtd/spi/eeprom_m95xxx.c
+++ b/drivers/mtd/spi/eeprom_m95xxx.c
@@ -44,6 +44,9 @@ ssize_t spi_read (uchar *addr, int alen, uchar *buffer, int len)
 
 	slave = spi_setup_slave(CONFIG_DEFAULT_SPI_BUS, 1, 1000000,
 			CONFIG_DEFAULT_SPI_MODE);
+	if(!slave)
+		return 0;
+
 	spi_claim_bus(slave);
 
 	/* command */
@@ -75,6 +78,9 @@ ssize_t spi_write (uchar *addr, int alen, uchar *buffer, int len)
 
 	slave = spi_setup_slave(CONFIG_DEFAULT_SPI_BUS, 1, 1000000,
 			CONFIG_DEFAULT_SPI_MODE);
+	if (!slave)
+		return 0;
+
 	spi_claim_bus(slave);
 
 	buf[0] = SPI_EEPROM_WREN;
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 5af9cdba2a..8c4ade5ab5 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -752,7 +752,6 @@ static int fec_probe(bd_t *bd)
 	if (fec_get_hwaddr(edev, ethaddr) == 0) {
 		printf("got MAC address from EEPROM: %pM\n", ethaddr);
 		memcpy(edev->enetaddr, ethaddr, 6);
-		fec_set_hwaddr(edev);
 	}
 
 	return 0;
diff --git a/drivers/net/mpc5xxx_fec.c b/drivers/net/mpc5xxx_fec.c
index 1876b7684b..c2b1bbdc7b 100644
--- a/drivers/net/mpc5xxx_fec.c
+++ b/drivers/net/mpc5xxx_fec.c
@@ -336,13 +336,11 @@ static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis)
 	 */
 	fec->eth->xmit_fsm = 0x03000000;
 
-#if defined(CONFIG_MPC5200)
 	/*
-	 * Turn off COMM bus prefetch in the MGT5200 BestComm. It doesn't
+	 * Turn off COMM bus prefetch in the MPC5200 BestComm. It doesn't
 	 * work w/ the current receive task.
 	 */
 	 sdma->PtdCntrl |= 0x00000001;
-#endif
 
 	/*
 	 * Set priority of different initiators
@@ -579,9 +577,7 @@ static int mpc5xxx_fec_init_phy(struct eth_device *dev, bd_t * bis)
 /********************************************************************/
 static void mpc5xxx_fec_halt(struct eth_device *dev)
 {
-#if defined(CONFIG_MPC5200)
 	struct mpc5xxx_sdma *sdma = (struct mpc5xxx_sdma *)MPC5XXX_SDMA;
-#endif
 	mpc5xxx_fec_priv *fec = (mpc5xxx_fec_priv *)dev->priv;
 	int counter = 0xffff;
 
@@ -611,13 +607,11 @@ static void mpc5xxx_fec_halt(struct eth_device *dev)
 	SDMA_TASK_DISABLE (FEC_XMIT_TASK_NO);
 	SDMA_TASK_DISABLE (FEC_RECV_TASK_NO);
 
-#if defined(CONFIG_MPC5200)
 	/*
-	 * Turn on COMM bus prefetch in the MGT5200 BestComm after we're
+	 * Turn on COMM bus prefetch in the MPC5200 BestComm after we're
 	 * done. It doesn't work w/ the current receive task.
 	 */
 	 sdma->PtdCntrl &= ~0x00000001;
-#endif
 
 	/*
 	 * Disable the Ethernet Controller
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
index fe57926d7e..5a63fa2168 100644
--- a/drivers/pci/fsl_pci_init.c
+++ b/drivers/pci/fsl_pci_init.c
@@ -1,9 +1,10 @@
 /*
- * Copyright 2007-2009 Freescale Semiconductor, Inc.
+ * Copyright 2007-2010 Freescale Semiconductor, Inc.
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * Version 2 as published by the Free Software Foundation.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -513,10 +514,15 @@ void ft_fsl_pci_setup(void *blob, const char *pci_alias,
 			struct pci_controller *hose)
 {
 	int off = fdt_path_offset(blob, pci_alias);
+	u32 bus_range[2];
 
-	if (off >= 0) {
-		u32 bus_range[2];
+	if (off < 0)
+		return;
 
+	/* We assume a cfg_addr not being set means we didn't setup the controller */
+	if ((hose == NULL) || (hose->cfg_addr == NULL)) {
+		fdt_del_node_and_alias(blob, pci_alias);
+	} else {
 		bus_range[0] = 0;
 		bus_range[1] = hose->last_busno - hose->first_busno;
 		fdt_setprop(blob, off, "bus-range", &bus_range[0], 2*4);
diff --git a/drivers/pci/pci_sh4.c b/drivers/pci/pci_sh4.c
index c7963ed8a8..62915b6df9 100644
--- a/drivers/pci/pci_sh4.c
+++ b/drivers/pci/pci_sh4.c
@@ -4,7 +4,7 @@
  * (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
  * (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
  *
- * u-boot/cpu/sh4/pci-sh4.c
+ * u-boot/arch/sh/cpu/sh4/pci-sh4.c
  *
  * See file CREDITS for list of people who contributed to this
  * project.
diff --git a/drivers/qe/uec_phy.c b/drivers/qe/uec_phy.c
index c4214d9a0a..c1cc23bfcd 100644
--- a/drivers/qe/uec_phy.c
+++ b/drivers/qe/uec_phy.c
@@ -47,7 +47,7 @@
 /*--------------------------------------------------------------------+
  * Fixed PHY (PHY-less) support for Ethernet Ports.
  *
- * Copied from cpu/ppc4xx/4xx_enet.c
+ * Copied from arch/ppc/cpu/ppc4xx/4xx_enet.c
  *--------------------------------------------------------------------*/
 
 /*
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 71392e6847..c731bfb594 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -25,11 +25,14 @@ include $(TOPDIR)/config.mk
 
 LIB	:= $(obj)libserial.a
 
+COBJS-$(CONFIG_ALTERA_UART) += altera_uart.o
+COBJS-$(CONFIG_ALTERA_JTAG_UART) += altera_jtag_uart.o
 COBJS-$(CONFIG_ARM_DCC) += arm_dcc.o
 COBJS-$(CONFIG_AT91RM9200_USART) += at91rm9200_usart.o
 COBJS-$(CONFIG_ATMEL_USART) += atmel_usart.o
 COBJS-$(CONFIG_MCFUART) += mcfuart.o
 COBJS-$(CONFIG_NS9750_UART) += ns9750_serial.o
+COBJS-$(CONFIG_OPENCORES_YANU) += opencores_yanu.o
 COBJS-$(CONFIG_SYS_NS16550) += ns16550.o
 COBJS-$(CONFIG_DRIVER_S3C4510_UART) += s3c4510b_uart.o
 COBJS-$(CONFIG_S3C64XX) += s3c64xx.o
diff --git a/drivers/serial/altera_jtag_uart.c b/drivers/serial/altera_jtag_uart.c
new file mode 100644
index 0000000000..fb28aa9eb9
--- /dev/null
+++ b/drivers/serial/altera_jtag_uart.c
@@ -0,0 +1,70 @@
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <watchdog.h>
+#include <asm/io.h>
+#include <nios2-io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*------------------------------------------------------------------
+ * JTAG acts as the serial port
+ *-----------------------------------------------------------------*/
+static nios_jtag_t *jtag = (nios_jtag_t *)CONFIG_SYS_NIOS_CONSOLE;
+
+void serial_setbrg( void ){ return; }
+int serial_init( void ) { return(0);}
+
+void serial_putc (char c)
+{
+	while (NIOS_JTAG_WSPACE ( readl (&jtag->control)) == 0)
+		WATCHDOG_RESET ();
+	writel ((unsigned char)c, &jtag->data);
+}
+
+void serial_puts (const char *s)
+{
+	while (*s != 0)
+		serial_putc (*s++);
+}
+
+int serial_tstc (void)
+{
+	return ( readl (&jtag->control) & NIOS_JTAG_RRDY);
+}
+
+int serial_getc (void)
+{
+	int c;
+	unsigned val;
+
+	while (1) {
+		WATCHDOG_RESET ();
+		val = readl (&jtag->data);
+		if (val & NIOS_JTAG_RVALID)
+			break;
+	}
+	c = val & 0x0ff;
+	return (c);
+}
diff --git a/drivers/serial/altera_uart.c b/drivers/serial/altera_uart.c
new file mode 100644
index 0000000000..045f1197a3
--- /dev/null
+++ b/drivers/serial/altera_uart.c
@@ -0,0 +1,94 @@
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcnutt@psyent.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include <common.h>
+#include <watchdog.h>
+#include <asm/io.h>
+#include <nios2-io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*------------------------------------------------------------------
+ * UART the serial port
+ *-----------------------------------------------------------------*/
+
+static nios_uart_t *uart = (nios_uart_t *) CONFIG_SYS_NIOS_CONSOLE;
+
+#if defined(CONFIG_SYS_NIOS_FIXEDBAUD)
+
+/* Everything's already setup for fixed-baud PTF
+ * assignment
+ */
+void serial_setbrg (void){ return; }
+int serial_init (void) { return (0);}
+
+#else
+
+void serial_setbrg (void)
+{
+	unsigned div;
+
+	div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1;
+	writel (div, &uart->divisor);
+	return;
+}
+
+int serial_init (void)
+{
+	serial_setbrg ();
+	return (0);
+}
+
+#endif /* CONFIG_SYS_NIOS_FIXEDBAUD */
+
+/*-----------------------------------------------------------------------
+ * UART CONSOLE
+ *---------------------------------------------------------------------*/
+void serial_putc (char c)
+{
+	if (c == '\n')
+		serial_putc ('\r');
+	while ((readl (&uart->status) & NIOS_UART_TRDY) == 0)
+		WATCHDOG_RESET ();
+	writel ((unsigned char)c, &uart->txdata);
+}
+
+void serial_puts (const char *s)
+{
+	while (*s != 0) {
+		serial_putc (*s++);
+	}
+}
+
+int serial_tstc (void)
+{
+	return (readl (&uart->status) & NIOS_UART_RRDY);
+}
+
+int serial_getc (void)
+{
+	while (serial_tstc () == 0)
+		WATCHDOG_RESET ();
+	return (readl (&uart->rxdata) & 0x00ff );
+}
diff --git a/drivers/serial/mcfuart.c b/drivers/serial/mcfuart.c
index 0b531402e4..d93b24b897 100644
--- a/drivers/serial/mcfuart.c
+++ b/drivers/serial/mcfuart.c
@@ -34,7 +34,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-extern void uart_port_conf(void);
+extern void uart_port_conf(int port);
 
 int serial_init(void)
 {
@@ -43,7 +43,7 @@ int serial_init(void)
 
 	uart = (volatile uart_t *)(CONFIG_SYS_UART_BASE);
 
-	uart_port_conf();
+	uart_port_conf(CONFIG_SYS_UART_PORT);
 
 	/* write to SICR: SIM2 = uart mode,dcd does not affect rx */
 	uart->ucr = UART_UCR_RESET_RX;
diff --git a/cpu/nios2/serial.c b/drivers/serial/opencores_yanu.c
index 6c835af4b1..f18f7f444e 100644
--- a/cpu/nios2/serial.c
+++ b/drivers/serial/opencores_yanu.c
@@ -1,8 +1,4 @@
 /*
- * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * YANU Support:
  * Copyright 2010, Renato Andreola <renato.andreola@imagos.it>
  *
  * See file CREDITS for list of people who contributed to this
@@ -24,61 +20,13 @@
  * MA 02111-1307 USA
  */
 
-
 #include <common.h>
 #include <watchdog.h>
 #include <asm/io.h>
-#include <nios2-io.h>
 #include <nios2-yanu.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/*------------------------------------------------------------------
- * JTAG acts as the serial port
- *-----------------------------------------------------------------*/
-#if defined(CONFIG_CONSOLE_JTAG)
-
-static nios_jtag_t *jtag = (nios_jtag_t *)CONFIG_SYS_NIOS_CONSOLE;
-
-void serial_setbrg( void ){ return; }
-int serial_init( void ) { return(0);}
-
-void serial_putc (char c)
-{
-	unsigned val;
-
-	while (NIOS_JTAG_WSPACE ( readl (&jtag->control)) == 0)
-		WATCHDOG_RESET ();
-	writel (&jtag->data, (unsigned char)c);
-}
-
-void serial_puts (const char *s)
-{
-	while (*s != 0)
-		serial_putc (*s++);
-}
-
-int serial_tstc (void)
-{
-	return ( readl (&jtag->control) & NIOS_JTAG_RRDY);
-}
-
-int serial_getc (void)
-{
-	int c;
-	unsigned val;
-
-	while (1) {
-		WATCHDOG_RESET ();
-		val = readl (&jtag->data);
-		if (val & NIOS_JTAG_RVALID)
-			break;
-	}
-	c = val & 0x0ff;
-	return (c);
-}
-
-#elif defined(CONFIG_CONSOLE_YANU)
 /*-----------------------------------------------------------------*/
 /* YANU Imagos serial port */
 /*-----------------------------------------------------------------*/
@@ -113,7 +61,7 @@ void serial_setbrg (void)
 	    ((unsigned)CONFIG_SYS_CLK_FREQ >> k);
 
 	baud = best_m + best_n * YANU_BAUDE;
-	writel(&uart->baud, baud);
+	writel(baud, &uart->baud);
 
 	return;
 }
@@ -144,7 +92,7 @@ void serial_setbrg (void)
 	    ((unsigned)CONFIG_SYS_CLK_FREQ >> k);
 
 	baud = best_m + best_n * YANU_BAUDE;
-	writel(&uart->baud, baud);
+	writel(baud, &uart->baud);
 
 	return;
 }
@@ -165,7 +113,7 @@ int serial_init (void)
 		YANU_ACTION_RPE         |
 	    YANU_ACTION_RFE | YANU_ACTION_RFIFO_CLEAR | YANU_ACTION_TFIFO_CLEAR;
 
-	writel(&uart->action, action);
+	writel(action, &uart->action);
 	
 	/*  control register cleanup */
 	/* no interrupts enabled */
@@ -179,7 +127,7 @@ int serial_init (void)
 	control |= YANU_CONTROL_RDYDLY * YANU_RXFIFO_DLY;
 	control |= YANU_CONTROL_TXTHR *  YANU_TXFIFO_THR;
 
-	writel(&uart->control, control);
+	writel(control, &uart->control);
 
 	/* to set baud rate */
 	serial_setbrg();
@@ -208,7 +156,7 @@ void serial_putc (char c)
 		WATCHDOG_RESET ();
 	}
 
-	writel(&uart->data, (unsigned char)c);
+	writel((unsigned char)c, &uart->data);
 }
 
 void serial_puts (const char *s)
@@ -234,76 +182,7 @@ int serial_getc (void)
 		WATCHDOG_RESET ();
 	
 	/* first we pull the char */
-	writel(&uart->action, YANU_ACTION_RFIFO_PULL);
+	writel(YANU_ACTION_RFIFO_PULL, &uart->action);
 
 	return(readl(&uart->data) & YANU_DATA_CHAR_MASK);
 }
-
-#else /*CONFIG_CONSOLE_YANU*/
-
-/*------------------------------------------------------------------
- * UART the serial port
- *-----------------------------------------------------------------*/
-
-static nios_uart_t *uart = (nios_uart_t *) CONFIG_SYS_NIOS_CONSOLE;
-
-#if defined(CONFIG_SYS_NIOS_FIXEDBAUD)
-
-/* Everything's already setup for fixed-baud PTF
- * assignment
- */
-void serial_setbrg (void){ return; }
-int serial_init (void) { return (0);}
-
-#else
-
-void serial_setbrg (void)
-{
-	unsigned div;
-
-	div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1;
-	writel (&uart->divisor,div);
-	return;
-}
-
-int serial_init (void)
-{
-	serial_setbrg ();
-	return (0);
-}
-
-#endif /* CONFIG_SYS_NIOS_FIXEDBAUD */
-
-
-/*-----------------------------------------------------------------------
- * UART CONSOLE
- *---------------------------------------------------------------------*/
-void serial_putc (char c)
-{
-	if (c == '\n')
-		serial_putc ('\r');
-	while ((readl (&uart->status) & NIOS_UART_TRDY) == 0)
-		WATCHDOG_RESET ();
-	writel (&uart->txdata,(unsigned char)c);
-}
-
-void serial_puts (const char *s)
-{
-	while (*s != 0) {
-		serial_putc (*s++);
-	}
-}
-
-int serial_tstc (void)
-{
-	return (readl (&uart->status) & NIOS_UART_RRDY);
-}
-
-int serial_getc (void)
-{
-	while (serial_tstc () == 0)
-		WATCHDOG_RESET ();
-	return (readl (&uart->rxdata) & 0x00ff );
-}
-
-#endif /* CONFIG_JTAG_CONSOLE */
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index c4b36f06c0..687ffe6ace 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2006 Ben Warren, Qstreams Networks Inc.
- * With help from the common/soft_spi and cpu/mpc8260 drivers
+ * With help from the common/soft_spi and arch/ppc/cpu/mpc8260 drivers
  *
  * See file CREDITS for list of people who contributed to this
  * project.
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 9ebeb4f23d..7784d92b6f 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -55,14 +55,14 @@ static struct descriptor {
 	{
 		0x12,		/* bLength */
 		1,		/* bDescriptorType: UDESC_DEVICE */
-		0x0002,		/* bcdUSB: v2.0 */
+		cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
 		9,		/* bDeviceClass: UDCLASS_HUB */
 		0,		/* bDeviceSubClass: UDSUBCLASS_HUB */
 		1,		/* bDeviceProtocol: UDPROTO_HSHUBSTT */
 		64,		/* bMaxPacketSize: 64 bytes */
 		0x0000,		/* idVendor */
 		0x0000,		/* idProduct */
-		0x0001,		/* bcdDevice */
+		cpu_to_le16(0x0100), /* bcdDevice */
 		1,		/* iManufacturer */
 		2,		/* iProduct */
 		0,		/* iSerialNumber */
@@ -536,7 +536,7 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 	uint32_t reg;
 	uint32_t *status_reg;
 
-	if (le16_to_cpu(req->index) >= CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
+	if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
 		printf("The request port(%d) is not configured\n",
 			le16_to_cpu(req->index) - 1);
 		return -1;
@@ -630,19 +630,8 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 			tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
 		if (reg & EHCI_PS_OCA)
 			tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
-		if (reg & EHCI_PS_PR &&
-		    (portreset & (1 << le16_to_cpu(req->index)))) {
-			int ret;
-			/* force reset to complete */
-			reg = reg & ~(EHCI_PS_PR | EHCI_PS_CLEAR);
-			ehci_writel(status_reg, reg);
-			ret = handshake(status_reg, EHCI_PS_PR, 0, 2 * 1000);
-			if (!ret)
-				tmpbuf[0] |= USB_PORT_STAT_RESET;
-			else
-				printf("port(%d) reset error\n",
-					le16_to_cpu(req->index) - 1);
-		}
+		if (reg & EHCI_PS_PR)
+			tmpbuf[0] |= USB_PORT_STAT_RESET;
 		if (reg & EHCI_PS_PP)
 			tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
 
@@ -699,6 +688,8 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 				ehci_writel(status_reg, reg);
 				break;
 			} else {
+				int ret;
+
 				reg |= EHCI_PS_PR;
 				reg &= ~EHCI_PS_PE;
 				ehci_writel(status_reg, reg);
@@ -710,8 +701,19 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 				wait_ms(50);
 				/* terminate the reset */
 				ehci_writel(status_reg, reg & ~EHCI_PS_PR);
-				wait_ms(2);
-				portreset |= 1 << le16_to_cpu(req->index);
+				/*
+				 * A host controller must terminate the reset
+				 * and stabilize the state of the port within
+				 * 2 milliseconds
+				 */
+				ret = handshake(status_reg, EHCI_PS_PR, 0,
+						2 * 1000);
+				if (!ret)
+					portreset |=
+						1 << le16_to_cpu(req->index);
+				else
+					printf("port(%d) reset error\n",
+					le16_to_cpu(req->index) - 1);
 			}
 			break;
 		default:
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index 441b1a2714..047902a0c1 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -28,6 +28,7 @@
 #ifdef CONFIG_PCI_EHCI_DEVICE
 static struct pci_device_id ehci_pci_ids[] = {
 	/* Please add supported PCI EHCI controller ids here */
+	{0x1033, 0x00E0},
 	{0, 0}
 };
 #endif
diff --git a/drivers/usb/host/isp116x-hcd.c b/drivers/usb/host/isp116x-hcd.c
index 7aff54bce1..abdcbb4b22 100644
--- a/drivers/usb/host/isp116x-hcd.c
+++ b/drivers/usb/host/isp116x-hcd.c
@@ -42,7 +42,7 @@
  *
  *    [[GNU/GPL disclaimer]]
  *
- * and in part from AU1x00 OHCI HCD driver "u-boot/cpu/mips/au1x00_usb_ohci.c"
+ * and in part from AU1x00 OHCI HCD driver "u-boot/arch/mips/cpu/au1x00_usb_ohci.c"
  * (original copyright message follows):
  *
  *    URB OHCI HCD (Host Controller Driver) for USB on the AU1x00.
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 29f3ba186a..b2e03bc58b 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -25,11 +25,6 @@
 
 #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
 
-#ifndef CONFIG_AT91_LEGACY
-#define CONFIG_AT91_LEGACY
-#warning Please update to use C structur SoC access !
-#endif
-
 #include <asm/arch/hardware.h>
 #include <asm/arch/io.h>
 #include <asm/arch/at91_pmc.h>
@@ -37,22 +32,23 @@
 
 int usb_cpu_init(void)
 {
+	at91_pmc_t *pmc	= (at91_pmc_t *)AT91_PMC_BASE;
 
 #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
     defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
     defined(CONFIG_AT91SAM9261)
 	/* Enable PLLB */
-	at91_sys_write(AT91_CKGR_PLLBR, get_pllb_init());
-	while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
+	writel(get_pllb_init(), &pmc->pllbr);
+	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
 		;
 #endif
 
 	/* Enable USB host clock. */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_UHP);
+	writel(1 << AT91_ID_UHP, &pmc->pcer);
 #ifdef CONFIG_AT91SAM9261
-	at91_sys_write(AT91_PMC_SCER, AT91_PMC_UHP | AT91_PMC_HCK0);
+	writel(AT91_PMC_UHP | AT91_PMC_HCK0, &pmc->scer);
 #else
-	at91_sys_write(AT91_PMC_SCER, AT91_PMC_UHP);
+	writel(AT91_PMC_UHP, &pmc->scer);
 #endif
 
 	return 0;
@@ -60,19 +56,21 @@ int usb_cpu_init(void)
 
 int usb_cpu_stop(void)
 {
+	at91_pmc_t *pmc	= (at91_pmc_t *)AT91_PMC_BASE;
+
 	/* Disable USB host clock. */
-	at91_sys_write(AT91_PMC_PCDR, 1 << AT91_ID_UHP);
+	writel(1 << AT91_ID_UHP, &pmc->pcdr);
 #ifdef CONFIG_AT91SAM9261
-	at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_HCK0);
+	writel(AT91_PMC_UHP | AT91_PMC_HCK0, &pmc->scdr);
 #else
-	at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP);
+	writel(AT91_PMC_UHP, &pmc->scdr);
 #endif
 
 #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
     defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20)
 	/* Disable PLLB */
-	at91_sys_write(AT91_CKGR_PLLBR, 0);
-	while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != 0)
+	writel(0, &pmc->pllbr);
+	while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0)
 		;
 #endif
 
diff --git a/drivers/video/ati_radeon_fb.c b/drivers/video/ati_radeon_fb.c
index 9ebb0b0c96..4a9bd07e01 100644
--- a/drivers/video/ati_radeon_fb.c
+++ b/drivers/video/ati_radeon_fb.c
@@ -210,7 +210,7 @@ static void radeon_identify_vram(struct radeonfb_info *rinfo)
 	 * ToDo: identify these cases
 	 */
 
-	DPRINT("radeonfb: Found %ldk of %s %d bits wide videoram\n",
+	DPRINT("radeonfb: Found %dk of %s %d bits wide videoram\n",
 	       rinfo->video_ram / 1024,
 	       rinfo->vram_ddr ? "DDR" : "SDRAM",
 	       rinfo->vram_width);
@@ -586,18 +586,21 @@ int radeon_probe(struct radeonfb_info *rinfo)
 		rinfo->pdev.device = did;
 		rinfo->family = get_radeon_id_family(rinfo->pdev.device);
 		pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0,
-				&rinfo->fb_base_phys);
+				&rinfo->fb_base_bus);
 		pci_read_config_dword(pdev, PCI_BASE_ADDRESS_2,
-				&rinfo->mmio_base_phys);
-		rinfo->fb_base_phys &= 0xfffff000;
-		rinfo->mmio_base_phys &= ~0x04;
-
-		rinfo->mmio_base = (void *)rinfo->mmio_base_phys;
-		DPRINT("rinfo->mmio_base = 0x%x\n",rinfo->mmio_base);
+				&rinfo->mmio_base_bus);
+		rinfo->fb_base_bus &= 0xfffff000;
+		rinfo->mmio_base_bus &= ~0x04;
+
+		rinfo->mmio_base = pci_bus_to_virt(pdev, rinfo->mmio_base_bus,
+					PCI_REGION_MEM, 0, MAP_NOCACHE);
+		DPRINT("rinfo->mmio_base = 0x%p bus=0x%x\n",
+		       rinfo->mmio_base, rinfo->mmio_base_bus);
 		rinfo->fb_local_base = INREG(MC_FB_LOCATION) << 16;
 		DPRINT("rinfo->fb_local_base = 0x%x\n",rinfo->fb_local_base);
 		/* PostBIOS with x86 emulater */
-		BootVideoCardBIOS(pdev, NULL, 0);
+		if (!BootVideoCardBIOS(pdev, NULL, 0))
+			return -1;
 
 		/*
 		 * Check for errata
@@ -610,14 +613,15 @@ int radeon_probe(struct radeonfb_info *rinfo)
 
 		rinfo->mapped_vram = min_t(unsigned long, MAX_MAPPED_VRAM,
 				rinfo->video_ram);
-		rinfo->fb_base = (void *)rinfo->fb_base_phys;
-
-		DPRINT("Radeon: framebuffer base phy address 0x%08x," \
-		      "MMIO base phy address 0x%08x," \
-		      "framebuffer local base 0x%08x.\n ",
-		      rinfo->fb_base_phys, rinfo->mmio_base_phys,
-		      rinfo->fb_local_base);
-
+		rinfo->fb_base = pci_bus_to_virt(pdev, rinfo->fb_base_bus,
+					PCI_REGION_MEM, 0, MAP_NOCACHE);
+		DPRINT("Radeon: framebuffer base address 0x%08x, "
+		       "bus address 0x%08x\n"
+		       "MMIO base address 0x%08x, bus address 0x%08x, "
+		       "framebuffer local base 0x%08x.\n ",
+		       (u32)rinfo->fb_base, rinfo->fb_base_bus,
+		       (u32)rinfo->mmio_base, rinfo->mmio_base_bus,
+		       rinfo->fb_local_base);
 		return 0;
 	}
 	return -1;
@@ -733,13 +737,13 @@ void *video_hw_init(void)
 	}
 
 	pGD->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS;
-	pGD->pciBase = rinfo->fb_base_phys;
-	pGD->frameAdrs = rinfo->fb_base_phys;
+	pGD->pciBase = (unsigned int)rinfo->fb_base;
+	pGD->frameAdrs = (unsigned int)rinfo->fb_base;
 	pGD->memSize = 64 * 1024 * 1024;
 
 	/* Cursor Start Address */
-	pGD->dprBase =
-	    (pGD->winSizeX * pGD->winSizeY * pGD->gdfBytesPP) + rinfo->fb_base_phys;
+	pGD->dprBase = (pGD->winSizeX * pGD->winSizeY * pGD->gdfBytesPP) +
+		(unsigned int)rinfo->fb_base;
 	if ((pGD->dprBase & 0x0fff) != 0) {
 		/* allign it */
 		pGD->dprBase &= 0xfffff000;
@@ -747,8 +751,8 @@ void *video_hw_init(void)
 	}
 	DPRINT ("Cursor Start %x Pattern Start %x\n", pGD->dprBase,
 		PATTERN_ADR);
-	pGD->vprBase = rinfo->fb_base_phys;	/* Dummy */
-	pGD->cprBase = rinfo->fb_base_phys;	/* Dummy */
+	pGD->vprBase = (unsigned int)rinfo->fb_base;	/* Dummy */
+	pGD->cprBase = (unsigned int)rinfo->fb_base;	/* Dummy */
 	/* set up Hardware */
 
 	/* Clear video memory (only visible screen area) */
diff --git a/drivers/video/ati_radeon_fb.h b/drivers/video/ati_radeon_fb.h
index e981f95246..065904555f 100644
--- a/drivers/video/ati_radeon_fb.h
+++ b/drivers/video/ati_radeon_fb.h
@@ -49,8 +49,8 @@ struct radeonfb_info {
 	struct pci_device_id	pdev;
 	u16			family;
 
-	u32			fb_base_phys;
-	u32			mmio_base_phys;
+	u32			fb_base_bus;
+	u32			mmio_base_bus;
 
 	void			*mmio_base;
 	void			*fb_base;
diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
index 49f0a2e040..d1f47c9157 100644
--- a/drivers/video/cfb_console.c
+++ b/drivers/video/cfb_console.c
@@ -803,8 +803,193 @@ static void inline fill_555rgb_pswap(uchar *fb, int x,
 #endif
 
 /*
+ * RLE8 bitmap support
+ */
+
+#ifdef CONFIG_VIDEO_BMP_RLE8
+/* Pre-calculated color table entry */
+struct palette {
+	union {
+		unsigned short	w;	/* word */
+		unsigned int	dw;	/* double word */
+	} ce; /* color entry */
+};
+
+/*
+ * Helper to draw encoded/unencoded run.
+ */
+static void draw_bitmap (uchar **fb, uchar *bm, struct palette *p,
+			 int cnt, int enc)
+{
+	ulong addr = (ulong)*fb;
+	int *off;
+	int enc_off = 1;
+	int i;
+
+	/*
+	 * Setup offset of the color index in the bitmap.
+	 * Color index of encoded run is at offset 1.
+	 */
+	off = enc ? &enc_off : &i;
+
+	switch (VIDEO_DATA_FORMAT) {
+	case GDF__8BIT_INDEX:
+		for (i = 0; i < cnt; i++)
+			*(unsigned char *)addr++ = bm[*off];
+		break;
+	case GDF_15BIT_555RGB:
+	case GDF_16BIT_565RGB:
+		/* differences handled while pre-calculating palette */
+		for (i = 0; i < cnt; i++) {
+			*(unsigned short *)addr = p[bm[*off]].ce.w;
+			addr += 2;
+		}
+		break;
+	case GDF_32BIT_X888RGB:
+		for (i = 0; i < cnt; i++) {
+			*(unsigned long *)addr = p[bm[*off]].ce.dw;
+			addr += 4;
+		}
+		break;
+	}
+	*fb = (uchar *)addr; /* return modified address */
+}
+
+static int display_rle8_bitmap (bmp_image_t *img, int xoff, int yoff,
+				int width, int height)
+{
+	unsigned char *bm;
+	unsigned char *fbp;
+	unsigned int cnt, runlen;
+	int decode = 1;
+	int x, y, bpp, i, ncolors;
+	struct palette p[256];
+	bmp_color_table_entry_t cte;
+	int green_shift, red_off;
+
+	x = 0;
+	y = __le32_to_cpu(img->header.height) - 1;
+	ncolors = __le32_to_cpu(img->header.colors_used);
+	bpp = VIDEO_PIXEL_SIZE;
+	fbp = (unsigned char *)((unsigned int)video_fb_address +
+				(((y + yoff) * VIDEO_COLS) + xoff) * bpp);
+
+	bm = (uchar *)img + __le32_to_cpu(img->header.data_offset);
+
+	/* pre-calculate and setup palette */
+	switch (VIDEO_DATA_FORMAT) {
+	case GDF__8BIT_INDEX:
+		for (i = 0; i < ncolors; i++) {
+			cte = img->color_table[i];
+			video_set_lut (i, cte.red, cte.green, cte.blue);
+		}
+		break;
+	case GDF_15BIT_555RGB:
+	case GDF_16BIT_565RGB:
+		if (VIDEO_DATA_FORMAT == GDF_15BIT_555RGB) {
+			green_shift = 3;
+			red_off = 10;
+		} else {
+			green_shift = 2;
+			red_off = 11;
+		}
+		for (i = 0; i < ncolors; i++) {
+			cte = img->color_table[i];
+			p[i].ce.w = SWAP16((unsigned short)
+					   (((cte.red >> 3) << red_off) |
+					    ((cte.green >> green_shift) << 5) |
+					    cte.blue >> 3));
+		}
+		break;
+	case GDF_32BIT_X888RGB:
+		for (i = 0; i < ncolors; i++) {
+			cte = img->color_table[i];
+			p[i].ce.dw = SWAP32((cte.red << 16) | (cte.green << 8) |
+					     cte.blue);
+		}
+		break;
+	default:
+		printf("RLE Bitmap unsupported in video mode 0x%x\n",
+			VIDEO_DATA_FORMAT);
+		return -1;
+	}
+
+	while (decode) {
+		switch (bm[0]) {
+		case 0:
+			switch (bm[1]) {
+			case 0:
+				/* scan line end marker */
+				bm += 2;
+				x = 0;
+				y--;
+				fbp = (unsigned char *)
+					((unsigned int)video_fb_address +
+					 (((y + yoff) * VIDEO_COLS) +
+					  xoff) * bpp);
+				continue;
+			case 1:
+				/* end of bitmap data marker */
+				decode = 0;
+				break;
+			case 2:
+				/* run offset marker */
+				x += bm[2];
+				y -= bm[3];
+				fbp = (unsigned char *)
+					((unsigned int)video_fb_address +
+					 (((y + yoff) * VIDEO_COLS) +
+					  x + xoff) * bpp);
+				bm += 4;
+				break;
+			default:
+				/* unencoded run */
+				cnt = bm[1];
+				runlen = cnt;
+				bm += 2;
+				if (y < height) {
+					if (x >= width) {
+						x += runlen;
+						goto next_run;
+					}
+					if (x + runlen > width)
+						cnt = width - x;
+
+					draw_bitmap (&fbp, bm, p, cnt, 0);
+					x += runlen;
+				}
+next_run:
+				bm += runlen;
+				if (runlen & 1)
+					bm++; /* 0 padding if length is odd */
+			}
+			break;
+		default:
+			/* encoded run */
+			if (y < height) { /* only draw into visible area */
+				cnt = bm[0];
+				runlen = cnt;
+				if (x >= width) {
+					x += runlen;
+					bm += 2;
+					continue;
+				}
+				if (x + runlen > width)
+					cnt = width - x;
+
+				draw_bitmap (&fbp, bm, p, cnt, 1);
+				x += runlen;
+			}
+			bm += 2;
+			break;
+		}
+	}
+	return 0;
+}
+#endif
+
+/*
  * Display the BMP file located at address bmp_image.
- * Only uncompressed
  */
 int video_display_bitmap (ulong bmp_image, int x, int y)
 {
@@ -872,7 +1057,11 @@ int video_display_bitmap (ulong bmp_image, int x, int y)
 	debug ("Display-bmp: %d x %d  with %d colors\n",
 	       width, height, colors);
 
-	if (compression != BMP_BI_RGB) {
+	if (compression != BMP_BI_RGB
+#ifdef CONFIG_VIDEO_BMP_RLE8
+	    && compression != BMP_BI_RLE8
+#endif
+	   ) {
 		printf ("Error: compression type %ld not supported\n",
 			compression);
 #ifdef CONFIG_VIDEO_BMP_GZIP
@@ -906,6 +1095,13 @@ int video_display_bitmap (ulong bmp_image, int x, int y)
 			((y + height - 1) * VIDEO_COLS * VIDEO_PIXEL_SIZE) +
 			x * VIDEO_PIXEL_SIZE);
 
+#ifdef CONFIG_VIDEO_BMP_RLE8
+	if (compression == BMP_BI_RLE8) {
+		return display_rle8_bitmap(bmp,
+					   x, y, width, height);
+	}
+#endif
+
 	/* We handle only 8bpp or 24 bpp bitmap */
 	switch (le16_to_cpu (bmp->header.bit_count)) {
 	case 8:
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index 5bb8b77afc..25afae748d 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -42,11 +42,10 @@
 static int at91_wdt_settimeout(unsigned int timeout)
 {
 	unsigned int reg;
-	unsigned int mr;
+	at91_wdt_t *wd 	= (at91_wdt_t *) AT91_WDT_BASE;
 
 	/* Check if disabled */
-	mr = at91_sys_read(AT91_WDT_MR);
-	if (mr & AT91_WDT_WDDIS) {
+	if (readl(&wd->mr) & AT91_WDT_MR_WDDIS) {
 		printf("sorry, watchdog is disabled\n");
 		return -1;
 	}
@@ -57,19 +56,21 @@ static int at91_wdt_settimeout(unsigned int timeout)
 	 * Since WDV is a 12-bit counter, the maximum period is
 	 * 4096 / 256 = 16 seconds.
 	 */
-	reg = AT91_WDT_WDRSTEN	/* causes watchdog reset */
-		/* | AT91_WDT_WDRPROC	causes processor reset only */
-		| AT91_WDT_WDDBGHLT		/* disabled in debug mode */
-		| AT91_WDT_WDD			/* restart at any time */
-		| (timeout & AT91_WDT_WDV);	/* timer value */
-	at91_sys_write(AT91_WDT_MR, reg);
+
+	reg = AT91_WDT_MR_WDRSTEN		/* causes watchdog reset */
+		| AT91_WDT_MR_WDDBGHLT		/* disabled in debug mode */
+		| AT91_WDT_MR_WDD(0xfff)	/* restart at any time */
+		| AT91_WDT_MR_WDV(timeout);	/* timer value */
+
+	writel(reg, &wd->mr);
 
 	return 0;
 }
 
 void hw_watchdog_reset(void)
 {
-	at91_sys_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
+	at91_wdt_t *wd 	= (at91_wdt_t *) AT91_WDT_BASE;
+	writel(AT91_WDT_CR_WDRSTT | AT91_WDT_CR_KEY, &wd->cr);
 }
 
 void hw_watchdog_init(void)
diff --git a/examples/api/Makefile b/examples/api/Makefile
index d4c5ca2559..bed16f1555 100644
--- a/examples/api/Makefile
+++ b/examples/api/Makefile
@@ -40,14 +40,14 @@ COBJ_FILES-$(CONFIG_API) += glue.o
 COBJ_FILES-$(CONFIG_API) += libgenwrap.o
 
 # Source files which exist outside the examples/api directory
-EXT_COBJ_FILES-$(CONFIG_API) += lib_generic/crc32.o
-EXT_COBJ_FILES-$(CONFIG_API) += lib_generic/ctype.o
-EXT_COBJ_FILES-$(CONFIG_API) += lib_generic/div64.o
-EXT_COBJ_FILES-$(CONFIG_API) += lib_generic/string.o
-EXT_COBJ_FILES-$(CONFIG_API) += lib_generic/time.o
-EXT_COBJ_FILES-$(CONFIG_API) += lib_generic/vsprintf.o
+EXT_COBJ_FILES-$(CONFIG_API) += lib/crc32.o
+EXT_COBJ_FILES-$(CONFIG_API) += lib/ctype.o
+EXT_COBJ_FILES-$(CONFIG_API) += lib/div64.o
+EXT_COBJ_FILES-$(CONFIG_API) += lib/string.o
+EXT_COBJ_FILES-$(CONFIG_API) += lib/time.o
+EXT_COBJ_FILES-$(CONFIG_API) += lib/vsprintf.o
 ifeq ($(ARCH),ppc)
-EXT_SOBJ_FILES-$(CONFIG_API) += lib_ppc/ppcstring.o
+EXT_SOBJ_FILES-$(CONFIG_API) += arch/ppc/lib/ppcstring.o
 endif
 
 # Create a list of source files so their dependencies can be auto-generated
@@ -75,11 +75,11 @@ $(OUTPUT):	$(OBJS)
 		$(OBJCOPY) -O binary $@ $(OUTPUT).bin 2>/dev/null
 
 # Rule to build generic library C files
-$(obj)%.o: $(SRCTREE)/lib_generic/%.c
+$(obj)%.o: $(SRCTREE)/lib/%.c
 	$(CC) -g $(CFLAGS) -c -o $@ $<
 
 # Rule to build architecture-specific library assembly files
-$(obj)%.o: $(SRCTREE)/lib_$(ARCH)/%.S
+$(obj)%.o: $(SRCTREE)/arch/$(ARCH)/lib/%.S
 	$(CC) -g $(CFLAGS) -c -o $@ $<
 
 #########################################################################
diff --git a/examples/api/libgenwrap.c b/examples/api/libgenwrap.c
index 2b107d9797..b435ddecba 100644
--- a/examples/api/libgenwrap.c
+++ b/examples/api/libgenwrap.c
@@ -23,7 +23,7 @@
  *
  *
  * This is is a set of wrappers/stubs that allow to use certain routines from
- * U-Boot's lib_generic in the standalone app. This way way we can re-use
+ * U-Boot's lib in the standalone app. This way way we can re-use
  * existing code e.g. operations on strings and similar.
  *
  */
diff --git a/examples/standalone/mem_to_mem_idma2intr.c b/examples/standalone/mem_to_mem_idma2intr.c
index 15779d0a16..eeff5f5f2d 100644
--- a/examples/standalone/mem_to_mem_idma2intr.c
+++ b/examples/standalone/mem_to_mem_idma2intr.c
@@ -1,5 +1,5 @@
 /* The dpalloc function used and implemented in this file was derieved
- * from PPCBoot/U-Boot file "cpu/mpc8260/commproc.c".
+ * from PPCBoot/U-Boot file "arch/ppc/cpu/mpc8260/commproc.c".
  */
 
 /* Author: Arun Dharankar <ADharankar@ATTBI.Com>
diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c
index 93651f53e9..c4f7445221 100644
--- a/fs/jffs2/jffs2_1pass.c
+++ b/fs/jffs2/jffs2_1pass.c
@@ -398,23 +398,26 @@ static inline void *get_fl_mem(u32 off, u32 size, void *ext_buf)
 {
 	struct mtdids *id = current_part->dev->id;
 
+	switch(id->type) {
 #if defined(CONFIG_CMD_FLASH)
-	if (id->type == MTD_DEV_TYPE_NOR) {
+	case MTD_DEV_TYPE_NOR:
 		return get_fl_mem_nor(off, size, ext_buf);
-	}
+		break;
 #endif
-
 #if defined(CONFIG_JFFS2_NAND) && defined(CONFIG_CMD_NAND)
-	if (id->type == MTD_DEV_TYPE_NAND)
+	case MTD_DEV_TYPE_NAND:
 		return get_fl_mem_nand(off, size, ext_buf);
+		break;
 #endif
-
 #if defined(CONFIG_CMD_ONENAND)
-	if (id->type == MTD_DEV_TYPE_ONENAND)
+	case MTD_DEV_TYPE_ONENAND:
 		return get_fl_mem_onenand(off, size, ext_buf);
+		break;
 #endif
-
-	printf("get_fl_mem: unknown device type, using raw offset!\n");
+	default:
+		printf("get_fl_mem: unknown device type, " \
+			"using raw offset!\n");
+	}
 	return (void*)off;
 }
 
@@ -422,23 +425,27 @@ static inline void *get_node_mem(u32 off, void *ext_buf)
 {
 	struct mtdids *id = current_part->dev->id;
 
+	switch(id->type) {
 #if defined(CONFIG_CMD_FLASH)
-	if (id->type == MTD_DEV_TYPE_NOR)
+	case MTD_DEV_TYPE_NOR:
 		return get_node_mem_nor(off, ext_buf);
+		break;
 #endif
-
 #if defined(CONFIG_JFFS2_NAND) && \
     defined(CONFIG_CMD_NAND)
-	if (id->type == MTD_DEV_TYPE_NAND)
+	case MTD_DEV_TYPE_NAND:
 		return get_node_mem_nand(off, ext_buf);
+		break;
 #endif
-
 #if defined(CONFIG_CMD_ONENAND)
-	if (id->type == MTD_DEV_TYPE_ONENAND)
+	case MTD_DEV_TYPE_ONENAND:
 		return get_node_mem_onenand(off, ext_buf);
+		break;
 #endif
-
-	printf("get_node_mem: unknown device type, using raw offset!\n");
+	default:
+		printf("get_fl_mem: unknown device type, " \
+			"using raw offset!\n");
+	}
 	return (void*)off;
 }
 
diff --git a/include/asm-blackfin/ptrace.h b/include/asm-blackfin/ptrace.h
deleted file mode 100644
index f1b7d0064b..0000000000
--- a/include/asm-blackfin/ptrace.h
+++ /dev/null
@@ -1,269 +0,0 @@
-/*
- * U-boot - ptrace.h
- *
- * Copyright (c) 2005-2007 Analog Devices Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-#ifndef _BLACKFIN_PTRACE_H
-#define _BLACKFIN_PTRACE_H
-
-#define NEW_PT_REGS
-
-/*
- * GCC defines register number like this:
- * -----------------------------
- *       0 - 7 are data registers R0-R7
- *       8 - 15 are address registers P0-P7
- *      16 - 31 dsp registers I/B/L0 -- I/B/L3 & M0--M3
- *      32 - 33 A registers A0 & A1
- *      34 -    status register
- *
- * We follows above, except:
- *      32-33 --- Low 32-bit of A0&1
- *      34-35 --- High 8-bit of A0&1
- */
-
-#if defined(NEW_PT_REGS)
-
-#define PT_IPEND	0
-#define PT_SYSCFG	(PT_IPEND+4)
-#define PT_SEQSTAT	(PT_SYSCFG+4)
-#define PT_RETE		(PT_SEQSTAT+4)
-#define PT_RETN		(PT_RETE+4)
-#define PT_RETX		(PT_RETN+4)
-#define PT_RETI		(PT_RETX+4)
-#define PT_PC		PT_RETI
-#define PT_RETS		(PT_RETI+4)
-#define PT_RESERVED	(PT_RETS+4)
-#define PT_ASTAT	(PT_RESERVED+4)
-#define PT_LB1		(PT_ASTAT+4)
-#define PT_LB0		(PT_LB1+4)
-#define PT_LT1		(PT_LB0+4)
-#define PT_LT0		(PT_LT1+4)
-#define PT_LC1		(PT_LT0+4)
-#define PT_LC0		(PT_LC1+4)
-#define PT_A1W		(PT_LC0+4)
-#define PT_A1X		(PT_A1W+4)
-#define PT_A0W		(PT_A1X+4)
-#define PT_A0X		(PT_A0W+4)
-#define PT_B3		(PT_A0X+4)
-#define PT_B2		(PT_B3+4)
-#define PT_B1		(PT_B2+4)
-#define PT_B0		(PT_B1+4)
-#define PT_L3		(PT_B0+4)
-#define PT_L2		(PT_L3+4)
-#define PT_L1		(PT_L2+4)
-#define PT_L0		(PT_L1+4)
-#define PT_M3		(PT_L0+4)
-#define PT_M2		(PT_M3+4)
-#define PT_M1		(PT_M2+4)
-#define PT_M0		(PT_M1+4)
-#define PT_I3		(PT_M0+4)
-#define PT_I2		(PT_I3+4)
-#define PT_I1		(PT_I2+4)
-#define PT_I0		(PT_I1+4)
-#define PT_USP		(PT_I0+4)
-#define PT_FP		(PT_USP+4)
-#define PT_P5		(PT_FP+4)
-#define PT_P4		(PT_P5+4)
-#define PT_P3		(PT_P4+4)
-#define PT_P2		(PT_P3+4)
-#define PT_P1		(PT_P2+4)
-#define PT_P0		(PT_P1+4)
-#define PT_R7		(PT_P0+4)
-#define PT_R6		(PT_R7+4)
-#define PT_R5		(PT_R6+4)
-#define PT_R4		(PT_R5+4)
-#define PT_R3		(PT_R4+4)
-#define PT_R2		(PT_R3+4)
-#define PT_R1		(PT_R2+4)
-#define PT_R0		(PT_R1+4)
-#define PT_ORIG_R0	(PT_R0+4)
-#define PT_SR		PT_SEQSTAT
-
-#else
-/*
- * Here utilize blackfin : dpregs = [pregs + imm16s4]
- *                     [pregs + imm16s4] = dpregs
- * to access defferent saved reg in stack
- */
-#define PT_R3		0
-#define PT_R4		4
-#define PT_R2		8
-#define PT_R1		12
-#define PT_P5		16
-#define PT_P4		20
-#define PT_P3		24
-#define PT_P2		28
-#define PT_P1		32
-#define PT_P0		36
-#define PT_R7		40
-#define PT_R6		44
-#define PT_R5		48
-#define PT_PC		52
-#define PT_SEQSTAT	56	/* so-called SR reg */
-#define PT_SR		PT_SEQSTAT
-#define PT_ASTAT	60
-#define PT_RETS		64
-#define PT_A1w		68
-#define PT_A0w		72
-#define PT_A1x		76
-#define PT_A0x		80
-#define PT_ORIG_R0	84
-#define PT_R0		88
-#define PT_USP		92
-#define PT_FP		96
-#define PT_SP		100
-
-/* Added by HuTao, May26 2003 3:18PM */
-#define PT_IPEND	100
-
-/* Add SYSCFG register for single stepping support */
-#define PT_SYSCFG	104
-
-#endif
-
-#ifndef __ASSEMBLY__
-
-#if defined(NEW_PT_REGS)
-/* this struct defines the way the registers are stored on the
- * stack during a system call.
- */
-struct pt_regs {
-	long ipend;
-	long syscfg;
-	long seqstat;
-	long rete;
-	long retn;
-	long retx;
-	long pc;
-	long rets;
-	long reserved;
-	long astat;
-	long lb1;
-	long lb0;
-	long lt1;
-	long lt0;
-	long lc1;
-	long lc0;
-	long a1w;
-	long a1x;
-	long a0w;
-	long a0x;
-	long b3;
-	long b2;
-	long b1;
-	long b0;
-	long l3;
-	long l2;
-	long l1;
-	long l0;
-	long m3;
-	long m2;
-	long m1;
-	long m0;
-	long i3;
-	long i2;
-	long i1;
-	long i0;
-	long usp;
-	long fp;
-	long p5;
-	long p4;
-	long p3;
-	long p2;
-	long p1;
-	long p0;
-	long r7;
-	long r6;
-	long r5;
-	long r4;
-	long r3;
-	long r2;
-	long r1;
-	long r0;
-	long orig_r0;
-};
-
-#else
-/* now we don't know what regs the system call will use	*/
-struct pt_regs {
-	long r3;
-	long r4;
-	long r2;
-	long r1;
-	long p5;
-	long p4;
-	long p3;
-	long p2;
-	long p1;
-	long p0;
-	long r7;
-	long r6;
-	long r5;
-	unsigned long pc;
-	unsigned long seqstat;
-	unsigned long astat;
-	unsigned long rets;
-	long a1w;
-	long a0w;
-	long a1x;
-	long a0x;
-	long orig_r0;
-	long r0;
-	long usp;
-	long fp;
-/*
- * Added for supervisor/user mode switch.
- *
- * HuTao May26 03 3:23PM
- */
-	long ipend;
-	long syscfg;
-};
-
-#endif
-
-/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
-#define PTRACE_GETREGS		12
-#define PTRACE_SETREGS		13	/* ptrace signal */
-
-#ifdef __KERNEL__
-
-#ifndef PS_S
-#define PS_S			(0x0c00)
-
-/* Bit 11:10 of SEQSTAT defines user/supervisor/debug mode
- *        00: user
- *        01: supervisor
- *        1x: debug
- */
-
-#define PS_M			(0x1000)	/* I am not sure why this is required here Akbar */
-#endif
-
-#define user_mode(regs)			(!((regs)->seqstat & PS_S))
-#define instruction_pointer(regs)	((regs)->pc)
-extern void show_regs(struct pt_regs *);
-
-#endif
-#endif
-#endif
diff --git a/include/asm-blackfin/traps.h b/include/asm-blackfin/traps.h
deleted file mode 100644
index b90cedacbc..0000000000
--- a/include/asm-blackfin/traps.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * U-boot - traps.h
- *
- * Copyright (c) 2005-2007 Analog Devices Inc.
- *
- * This file is based on
- * linux/include/asm/traps.h
- * Copyright (C) 1993        Hamish Macdonald
- * Lineo, Inc    Jul 2001    Tony Kou
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- */
-
-/*
-  */
-
-#ifndef _BLACKFIN_TRAPS_H
-#define _BLACKFIN_TRAPS_H
-
-#ifndef __ASSEMBLY__
-typedef void (*e_vector) (void);
-extern e_vector vectors[];
-#endif
-
-#define VEC_SYS		(0)
-#define VEC_EXCPT01	(1)
-#define VEC_EXCPT02	(2)
-#define VEC_EXCPT03	(3)
-#define VEC_EXCPT04	(4)
-#define VEC_EXCPT05	(5)
-#define VEC_EXCPT06	(6)
-#define VEC_EXCPT07	(7)
-#define VEC_EXCPT08	(8)
-#define VEC_EXCPT09	(9)
-#define VEC_EXCPT10	(10)
-#define VEC_EXCPT11	(11)
-#define VEC_EXCPT12	(12)
-#define VEC_EXCPT13	(13)
-#define VEC_EXCPT14	(14)
-#define VEC_EXCPT15	(15)
-#define VEC_STEP	(16)
-#define VEC_OVFLOW	(17)
-#define VEC_UNDEF_I	(33)
-#define VEC_ILGAL_I	(34)
-#define VEC_CPLB_VL	(35)
-#define VEC_MISALI_D	(36)
-#define VEC_UNCOV	(37)
-#define VEC_CPLB_M	(38)
-#define VEC_CPLB_MHIT	(39)
-#define VEC_WATCH	(40)
-#define VEC_ISTRU_VL	(41)
-#define VEC_MISALI_I	(42)
-#define VEC_CPLB_I_VL	(43)
-#define VEC_CPLB_I_M	(44)
-#define VEC_CPLB_I_MHIT	(45)
-#define VEC_ILL_RES	(46)	/* including unvalid supervisor mode insn */
-
-#define VECOFF(vec)	((vec)<<2)
-
-#ifndef __ASSEMBLY__
-
-/* Status register bits */
-#define PS_T  (0x8000)
-#define PS_S  (0x0c00)		/*  Supervisor mode = 0b01      */
-#define PS_D  (0x0c00)		/*  Debug mode = 0b1x           */
-#define PS_M  (0x1000)
-#define PS_C  (0x0001)
-
-#endif
-#endif
diff --git a/include/asm-nios2/bitops.h b/include/asm-nios2/bitops.h
deleted file mode 100644
index 5776bda3e3..0000000000
--- a/include/asm-nios2/bitops.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
- * Scott McNutt <smcnutt@psyent.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __ASM_NIOS2_BITOPS_H_
-#define __ASM_NIOS2_BITOPS_H_
-
-
-extern void set_bit(int nr, volatile void * a);
-extern void clear_bit(int nr, volatile void * a);
-extern int test_and_clear_bit(int nr, volatile void * a);
-extern void change_bit(unsigned long nr, volatile void *addr);
-extern int test_and_set_bit(int nr, volatile void * a);
-extern int test_and_change_bit(int nr, volatile void * addr);
-extern int test_bit(int nr, volatile void * a);
-extern int ffs(int i);
-#define PLATFORM_FFS
-
-#endif /* __ASM_NIOS2_BITOPS_H */
diff --git a/include/common.h b/include/common.h
index a133e3479a..df956bbb41 100644
--- a/include/common.h
+++ b/include/common.h
@@ -230,7 +230,7 @@ int	parse_line (char *, char *[]);
 void	init_cmd_timeout(void);
 void	reset_cmd_timeout(void);
 
-/* lib_$(ARCH)/board.c */
+/* arch/$(ARCH)/lib/board.c */
 void	board_init_f  (ulong) __attribute__ ((noreturn));
 void	board_init_r  (gd_t *, ulong) __attribute__ ((noreturn));
 int	checkboard    (void);
@@ -604,38 +604,38 @@ ulong	vfd_setmem (ulong);
 /* $(CPU)/.../video.c */
 ulong	video_setmem (ulong);
 
-/* lib_$(ARCH)/cache.c */
+/* arch/$(ARCH)/lib/cache.c */
 void	flush_cache   (unsigned long, unsigned long);
 void	flush_dcache_range(unsigned long start, unsigned long stop);
 void	invalidate_dcache_range(unsigned long start, unsigned long stop);
 
 
-/* lib_$(ARCH)/ticks.S */
+/* arch/$(ARCH)/lib/ticks.S */
 unsigned long long get_ticks(void);
 void	wait_ticks    (unsigned long);
 
-/* lib_$(ARCH)/time.c */
+/* arch/$(ARCH)/lib/time.c */
 void	__udelay      (unsigned long);
 ulong	usec2ticks    (unsigned long usec);
 ulong	ticks2usec    (unsigned long ticks);
 int	init_timebase (void);
 
-/* lib_generic/gunzip.c */
+/* lib/gunzip.c */
 int gunzip(void *, int, unsigned char *, unsigned long *);
 int zunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp,
 						int stoponerr, int offset);
 
-/* lib_generic/net_utils.c */
+/* lib/net_utils.c */
 #include <net.h>
 static inline IPaddr_t getenv_IPaddr (char *var)
 {
 	return (string_to_ip(getenv(var)));
 }
 
-/* lib_generic/time.c */
+/* lib/time.c */
 void	udelay        (unsigned long);
 
-/* lib_generic/vsprintf.c */
+/* lib/vsprintf.c */
 ulong	simple_strtoul(const char *cp,char **endp,unsigned int base);
 unsigned long long	simple_strtoull(const char *cp,char **endp,unsigned int base);
 long	simple_strtol(const char *cp,char **endp,unsigned int base);
@@ -645,10 +645,10 @@ int	sprintf(char * buf, const char *fmt, ...)
 		__attribute__ ((format (__printf__, 2, 3)));
 int	vsprintf(char *buf, const char *fmt, va_list args);
 
-/* lib_generic/strmhz.c */
+/* lib/strmhz.c */
 char *	strmhz(char *buf, long hz);
 
-/* lib_generic/crc32.c */
+/* lib/crc32.c */
 #include <u-boot/crc.h>
 
 /* common/console.c */
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
index 058fdf14fa..746bf18f04 100644
--- a/include/config_cmd_all.h
+++ b/include/config_cmd_all.h
@@ -15,6 +15,7 @@
 
 #define CONFIG_CMD_AMBAPP	/* AMBA Plug & Play Bus print utility */
 #define CONFIG_CMD_ASKENV	/* ask for env variable		*/
+#define CONFIG_CMD_AT91_SPIMUX	/* AT91 MMC/SPI Mux Support     */
 #define CONFIG_CMD_BDI		/* bdinfo			*/
 #define CONFIG_CMD_BEDBUG	/* Include BedBug Debugger	*/
 #define CONFIG_CMD_BMP		/* BMP support			*/
@@ -33,7 +34,6 @@
 #define CONFIG_CMD_EDITENV	/* editenv			*/
 #define CONFIG_CMD_EEPROM	/* EEPROM read/write support	*/
 #define CONFIG_CMD_ELF		/* ELF (VxWorks) load/boot cmd	*/
-#define CONFIG_CMD_SAVEENV	/* saveenv			*/
 #define CONFIG_CMD_EXT2		/* EXT2 Support			*/
 #define CONFIG_CMD_FAT		/* FAT support			*/
 #define CONFIG_CMD_FDC		/* Floppy Disk Support		*/
@@ -55,6 +55,7 @@
 #define CONFIG_CMD_LOADS	/* loads			*/
 #define CONFIG_CMD_MEMORY	/* md mm nm mw cp cmp crc base loop mtest */
 #define CONFIG_CMD_MFSL		/* FSL support for Microblaze	*/
+#define CONFIG_CMD_MG_DISK	/* mGine m(g)flash IO node support */
 #define CONFIG_CMD_MII		/* MII support			*/
 #define CONFIG_CMD_MISC		/* Misc functions like sleep etc*/
 #define CONFIG_CMD_MMC		/* MMC support			*/
@@ -70,6 +71,7 @@
 #define CONFIG_CMD_REGINFO	/* Register dump		*/
 #define CONFIG_CMD_REISER	/* Reiserfs support		*/
 #define CONFIG_CMD_RUN		/* run command in env variable	*/
+#define CONFIG_CMD_SAVEENV	/* saveenv			*/
 #define CONFIG_CMD_SAVES	/* save S record dump		*/
 #define CONFIG_CMD_SCSI		/* SCSI Support			*/
 #define CONFIG_CMD_SDRAM	/* SDRAM DIMM SPD info printout */
@@ -79,12 +81,12 @@
 #define CONFIG_CMD_SOURCE	/* "source" command support	*/
 #define CONFIG_CMD_SPI		/* SPI utility			*/
 #define CONFIG_CMD_TERMINAL	/* built-in Serial Terminal	*/
+#define CONFIG_CMD_UBI		/* UBI Support			*/
+#define CONFIG_CMD_UBIFS	/* UBIFS Support		*/
 #define CONFIG_CMD_UNIVERSE	/* Tundra Universe Support	*/
 #define CONFIG_CMD_UNZIP	/* unzip from memory to memory	*/
 #define CONFIG_CMD_USB		/* USB Support			*/
 #define CONFIG_CMD_VFD		/* VFD support (TRAB)		*/
 #define CONFIG_CMD_XIMG		/* Load part of Multi Image	*/
-#define CONFIG_CMD_AT91_SPIMUX	/* AT91 MMC/SPI Mux Support     */
-#define CONFIG_CMD_MG_DISK	/* mGine m(g)flash IO node support */
 
 #endif	/* _CONFIG_CMD_ALL_H */
diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h
index 5cb0f1e28c..4cb805223c 100644
--- a/include/configs/ASH405.h
+++ b/include/configs/ASH405.h
@@ -244,6 +244,7 @@
  * I2C EEPROM (CAT24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/B2.h b/include/configs/B2.h
index f51a26115c..ca7350dc40 100644
--- a/include/configs/B2.h
+++ b/include/configs/B2.h
@@ -207,7 +207,7 @@
 */
 
 /*
-	Linux TAGs (see lib_arm/armlinux.c)
+	Linux TAGs (see arch/arm/lib/armlinux.c)
 */
 #define CONFIG_CMDLINE_TAG
 #undef CONFIG_SETUP_MEMORY_TAGS
diff --git a/include/configs/BC3450.h b/include/configs/BC3450.h
index 8c5a742290..44befe9edf 100644
--- a/include/configs/BC3450.h
+++ b/include/configs/BC3450.h
@@ -471,13 +471,8 @@
 /*
  * Various low-level settings
  */
-#if defined(CONFIG_MPC5200)
-# define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
-# define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-# define CONFIG_SYS_HID0_INIT		0
-# define CONFIG_SYS_HID0_FINAL		0
-#endif
+#define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
+#define CONFIG_SYS_HID0_FINAL		HID0_ICE
 
 #define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
diff --git a/include/configs/CANBT.h b/include/configs/CANBT.h
index e3e6e75e8d..cdba81d323 100644
--- a/include/configs/CANBT.h
+++ b/include/configs/CANBT.h
@@ -173,6 +173,7 @@
  * I2C EEPROM (CAT24WC08) for environment
  */
 #define CONFIG_HARD_I2C			/* I2C with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h
index ae8494d577..2b6786b9dc 100644
--- a/include/configs/CMS700.h
+++ b/include/configs/CMS700.h
@@ -224,6 +224,7 @@
  * I2C EEPROM (CAT24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		100000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/CPCI2DP.h b/include/configs/CPCI2DP.h
index 5c88c47b50..922121173a 100644
--- a/include/configs/CPCI2DP.h
+++ b/include/configs/CPCI2DP.h
@@ -207,6 +207,7 @@
  * I2C EEPROM (CAT24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h
index d131aeaf43..3e7020df89 100644
--- a/include/configs/CPCI405.h
+++ b/include/configs/CPCI405.h
@@ -256,6 +256,7 @@
  * I2C EEPROM (CAT24WC08) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h
index 07c4e35995..d3000f6578 100644
--- a/include/configs/CPCI4052.h
+++ b/include/configs/CPCI4052.h
@@ -283,6 +283,7 @@
  * I2C EEPROM (CAT24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h
index c78552bbd4..d3763441ef 100644
--- a/include/configs/CPCI405AB.h
+++ b/include/configs/CPCI405AB.h
@@ -259,6 +259,7 @@
  * I2C EEPROM (CAT24WC32) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		100000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h
index 59e0778f6a..07acab0c2b 100644
--- a/include/configs/CPCI405DT.h
+++ b/include/configs/CPCI405DT.h
@@ -278,6 +278,7 @@
  * I2C EEPROM (CAT24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/CPCIISER4.h b/include/configs/CPCIISER4.h
index b2679e5878..5b50bcf331 100644
--- a/include/configs/CPCIISER4.h
+++ b/include/configs/CPCIISER4.h
@@ -189,6 +189,7 @@
  * I2C EEPROM (CAT24WC08) for environment
  */
 #define CONFIG_HARD_I2C			/* I2C with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h
index 96bf161aa1..9ab30ecbaf 100644
--- a/include/configs/CRAYL1.h
+++ b/include/configs/CRAYL1.h
@@ -65,6 +65,7 @@
  #define CONFIG_ETHADDR          00:40:a6:80:14:5
  */
 #define CONFIG_HARD_I2C         1		/* hardware support for i2c */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SDRAM_BANK0		1
 #define CONFIG_SYS_I2C_SPEED		    400000	/* I2C speed and slave address	*/
 #define CONFIG_SYS_I2C_SLAVE		    0x7F
diff --git a/include/configs/DP405.h b/include/configs/DP405.h
index 49ecb6f36c..4423f2ab62 100644
--- a/include/configs/DP405.h
+++ b/include/configs/DP405.h
@@ -174,6 +174,7 @@
  * I2C EEPROM (CAT24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/DU405.h b/include/configs/DU405.h
index cfb3023318..8f1fc78bce 100644
--- a/include/configs/DU405.h
+++ b/include/configs/DU405.h
@@ -212,6 +212,7 @@
  * I2C EEPROM (CAT24WC08) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/DU440.h b/include/configs/DU440.h
index 65dc2359d0..830466f7a8 100644
--- a/include/configs/DU440.h
+++ b/include/configs/DU440.h
@@ -169,6 +169,7 @@
  */
 #define CONFIG_HARD_I2C		1	/* I2C with hardware support    */
 #undef	CONFIG_SOFT_I2C			/* I2C bit-banged	        */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		100000	/* I2C speed and slave address  */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 #define CONFIG_I2C_MULTI_BUS    1
diff --git a/include/configs/EB+MCF-EV123.h b/include/configs/EB+MCF-EV123.h
index a0b27a89c4..880cb4ee6b 100644
--- a/include/configs/EB+MCF-EV123.h
+++ b/include/configs/EB+MCF-EV123.h
@@ -208,6 +208,18 @@
  */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV + CF_CACR_DCM)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_DISD | \
+					 CF_CACR_CEIB | CF_CACR_DBWE | \
+					 CF_CACR_EUSP)
+
 /*-----------------------------------------------------------------------
  * Memory bank definitions
  */
diff --git a/include/configs/EP1C20.h b/include/configs/EP1C20.h
index 61d8e20f9b..3920d35264 100644
--- a/include/configs/EP1C20.h
+++ b/include/configs/EP1C20.h
@@ -94,7 +94,8 @@
 /*------------------------------------------------------------------------
  * CONSOLE
  *----------------------------------------------------------------------*/
-#if defined(CONFIG_CONSOLE_JTAG)
+#define CONFIG_ALTERA_UART		1	/* Use altera uart */
+#if defined(CONFIG_ALTERA_JTAG_UART)
 #define CONFIG_SYS_NIOS_CONSOLE	0x021208b0	/* JTAG UART base addr	*/
 #else
 #define CONFIG_SYS_NIOS_CONSOLE	0x02120840	/* UART base addr	*/
@@ -123,14 +124,16 @@
  * TIMEBASE --
  *
  * The high res timer defaults to 1 msec. Since it includes the period
- * registers, we can slow it down to 10 msec using TMRCNT. If the default
- * period is acceptable, TMRCNT can be left undefined.
+ * registers, the interrupt frequency can be reduced using TMRCNT.
+ * If the default period is acceptable, TMRCNT can be left undefined.
+ * TMRMS represents the desired mecs per tick (msecs per interrupt).
  *----------------------------------------------------------------------*/
+#define CONFIG_SYS_HZ			1000	/* Always 1000 */
 #define CONFIG_SYS_NIOS_TMRBASE	0x02120820	/* Tick timer base addr */
-#define CONFIG_SYS_NIOS_TMRIRQ		3		/* Timer IRQ num	*/
-#define CONFIG_SYS_NIOS_TMRMS		10		/* 10 msec per tick	*/
-#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
-#define CONFIG_SYS_HZ		(CONFIG_SYS_CLK_FREQ/(CONFIG_SYS_NIOS_TMRCNT + 1))
+#define CONFIG_SYS_NIOS_TMRIRQ		3	/* Timer IRQ num	*/
+#define CONFIG_SYS_NIOS_TMRMS		10	/* Desired period (msec)*/
+#define CONFIG_SYS_NIOS_TMRCNT \
+		(CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
 
 /*------------------------------------------------------------------------
  * STATUS LED -- Provides a simple blinking led. For Nios2 each board
diff --git a/include/configs/EP1S10.h b/include/configs/EP1S10.h
index 41e64e6d1b..bfbf8c1119 100644
--- a/include/configs/EP1S10.h
+++ b/include/configs/EP1S10.h
@@ -92,7 +92,8 @@
 /*------------------------------------------------------------------------
  * CONSOLE
  *----------------------------------------------------------------------*/
-#if defined(CONFIG_CONSOLE_JTAG)
+#define CONFIG_ALTERA_UART		1	/* Use altera uart */
+#if defined(CONFIG_ALTERA_JTAG_UART)
 #define CONFIG_SYS_NIOS_CONSOLE	0x021208b0	/* JTAG UART base addr	*/
 #else
 #define CONFIG_SYS_NIOS_CONSOLE	0x02120840	/* UART base addr	*/
@@ -118,14 +119,16 @@
  * TIMEBASE --
  *
  * The high res timer defaults to 1 msec. Since it includes the period
- * registers, we can slow it down to 10 msec using TMRCNT. If the default
- * period is acceptable, TMRCNT can be left undefined.
+ * registers, the interrupt frequency can be reduced using TMRCNT.
+ * If the default period is acceptable, TMRCNT can be left undefined.
+ * TMRMS represents the desired mecs per tick (msecs per interrupt).
  *----------------------------------------------------------------------*/
+#define CONFIG_SYS_HZ			1000	/* Always 1000 */
 #define CONFIG_SYS_NIOS_TMRBASE	0x02120820	/* Tick timer base addr */
-#define CONFIG_SYS_NIOS_TMRIRQ		3		/* Timer IRQ num	*/
-#define CONFIG_SYS_NIOS_TMRMS		10		/* 10 msec per tick	*/
-#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
-#define CONFIG_SYS_HZ		(CONFIG_SYS_CLK_FREQ/(CONFIG_SYS_NIOS_TMRCNT + 1))
+#define CONFIG_SYS_NIOS_TMRIRQ		3	/* Timer IRQ num */
+#define CONFIG_SYS_NIOS_TMRMS		10	/* Desired period (msec)*/
+#define CONFIG_SYS_NIOS_TMRCNT \
+		(CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
 
 /*------------------------------------------------------------------------
  * STATUS LED -- Provides a simple blinking led. For Nios2 each board
diff --git a/include/configs/EP1S40.h b/include/configs/EP1S40.h
index 5b332e40ee..4d905fee38 100644
--- a/include/configs/EP1S40.h
+++ b/include/configs/EP1S40.h
@@ -92,7 +92,8 @@
 /*------------------------------------------------------------------------
  * CONSOLE
  *----------------------------------------------------------------------*/
-#if defined(CONFIG_CONSOLE_JTAG)
+#define CONFIG_ALTERA_UART		1	/* Use altera uart */
+#if defined(CONFIG_ALTERA_JTAG_UART)
 #define CONFIG_SYS_NIOS_CONSOLE	0x021208b0	/* JTAG UART base addr	*/
 #else
 #define CONFIG_SYS_NIOS_CONSOLE	0x02120840	/* UART base addr	*/
@@ -118,14 +119,16 @@
  * TIMEBASE --
  *
  * The high res timer defaults to 1 msec. Since it includes the period
- * registers, we can slow it down to 10 msec using TMRCNT. If the default
- * period is acceptable, TMRCNT can be left undefined.
+ * registers, the interrupt frequency can be reduced using TMRCNT.
+ * If the default period is acceptable, TMRCNT can be left undefined.
+ * TMRMS represents the desired mecs per tick (msecs per interrupt).
  *----------------------------------------------------------------------*/
+#define CONFIG_SYS_HZ			1000	/* Always 1000 */
 #define CONFIG_SYS_NIOS_TMRBASE	0x02120820	/* Tick timer base addr */
-#define CONFIG_SYS_NIOS_TMRIRQ		3		/* Timer IRQ num	*/
-#define CONFIG_SYS_NIOS_TMRMS		10		/* 10 msec per tick	*/
-#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
-#define CONFIG_SYS_HZ		(CONFIG_SYS_CLK_FREQ/(CONFIG_SYS_NIOS_TMRCNT + 1))
+#define CONFIG_SYS_NIOS_TMRIRQ		3	/* Timer IRQ num */
+#define CONFIG_SYS_NIOS_TMRMS		10	/* Desired period (msec) */
+#define CONFIG_SYS_NIOS_TMRCNT \
+		(CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
 
 /*------------------------------------------------------------------------
  * STATUS LED -- Provides a simple blinking led. For Nios2 each board
diff --git a/include/configs/ERIC.h b/include/configs/ERIC.h
index 023f33e1eb..e07f9a1dc5 100644
--- a/include/configs/ERIC.h
+++ b/include/configs/ERIC.h
@@ -54,6 +54,7 @@
 #endif					/* total size of a X1240 is 2048 bytes */
 
 #define CONFIG_HARD_I2C		1	/* I2C with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/G2000.h b/include/configs/G2000.h
index 6819c3e362..d2883eb8d7 100644
--- a/include/configs/G2000.h
+++ b/include/configs/G2000.h
@@ -295,6 +295,7 @@
  * I2C EEPROM (CAT24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/HH405.h b/include/configs/HH405.h
index 92335239df..01e0bc65ec 100644
--- a/include/configs/HH405.h
+++ b/include/configs/HH405.h
@@ -331,6 +331,7 @@
  * I2C EEPROM (CAT24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #if 0 /* test-only */
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #else
diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h
index ea502d42cd..8c6d5edff7 100644
--- a/include/configs/HUB405.h
+++ b/include/configs/HUB405.h
@@ -244,6 +244,7 @@
  * I2C EEPROM (CAT24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h
index 5ef0b7798e..5d3a744fff 100644
--- a/include/configs/IceCube.h
+++ b/include/configs/IceCube.h
@@ -30,6 +30,7 @@
  */
 
 #define CONFIG_MPC5xxx		1	/* This is an MPC5xxx CPU */
+#define CONFIG_MPC5200		1	/* (more precisely a MPC5200 CPU) */
 #define CONFIG_ICECUBE		1	/* ... on IceCube board */
 
 #define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz */
@@ -47,7 +48,6 @@
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
 
 
-#ifdef CONFIG_MPC5200	/* MPC5100 PCI is not supported yet. */
 /*
  * PCI Mapping:
  * 0x40000000 - 0x4fffffff - PCI Memory
@@ -77,10 +77,6 @@
 #define CONFIG_SYS_RX_ETH_BUFFER	8  /* use 8 rx buffer on eepro100  */
 #define CONFIG_NS8382X		1
 
-#else
-#define CONFIG_MII		1
-#endif
-
 /* Partitions */
 #define CONFIG_MAC_PARTITION
 #define CONFIG_DOS_PARTITION
@@ -169,7 +165,6 @@
 
 #define CONFIG_BOOTCOMMAND	"run flash_self"
 
-#if defined(CONFIG_MPC5200)
 /*
  * IPB Bus clocking configuration.
  */
@@ -178,7 +173,6 @@
 #else
 #undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */
 #endif
-#endif /* CONFIG_MPC5200 */
 
 /* pass open firmware flat tree */
 #define CONFIG_OF_LIBFDT	1
@@ -338,13 +332,8 @@
 /*
  * Various low-level settings
  */
-#if defined(CONFIG_MPC5200)
 #define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
 #define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
 
 #if defined(CONFIG_LITE5200B)
 #define CONFIG_SYS_CS1_START		CONFIG_SYS_FLASH_BASE
diff --git a/include/configs/JSE.h b/include/configs/JSE.h
index 80c70e4886..98f5661a09 100644
--- a/include/configs/JSE.h
+++ b/include/configs/JSE.h
@@ -217,6 +217,7 @@
 
 #define CONFIG_HARD_I2C		1	/* I2C with hardware support	*/
 #undef	CONFIG_SOFT_I2C			/* I2C bit-banged		*/
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address	*/
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/KAREF.h b/include/configs/KAREF.h
index 4b67c9454b..49a7378f27 100644
--- a/include/configs/KAREF.h
+++ b/include/configs/KAREF.h
@@ -132,6 +132,7 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_HARD_I2C	      1		     /* I2C hardware support	*/
 #undef	CONFIG_SOFT_I2C			     /* I2C !bit-banged		*/
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED	      400000	     /* I2C speed 400kHz	*/
 #define CONFIG_SYS_I2C_SLAVE	      0x7F	     /* I2C slave address	*/
 #define CONFIG_SYS_I2C_NOPROBES      {0x69}	     /* Don't probe these addrs */
diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h
index 32123d2f54..e6632acbe7 100644
--- a/include/configs/M5208EVBE.h
+++ b/include/configs/M5208EVBE.h
@@ -158,7 +158,7 @@
  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  */
 #define CONFIG_SYS_SDRAM_BASE		0x40000000
-#define CONFIG_SYS_SDRAM_SIZE		64	/* SDRAM size in MB */
+#define CONFIG_SYS_SDRAM_SIZE		32	/* SDRAM size in MB */
 #define CONFIG_SYS_SDRAM_CFG1		0x43711630
 #define CONFIG_SYS_SDRAM_CFG2		0x56670000
 #define CONFIG_SYS_SDRAM_CTRL		0xE1002000
@@ -207,6 +207,19 @@
 /* Cache Configuration */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV | CF_CACR_INVI)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CINV | \
+					 CF_CACR_DISD | CF_CACR_INVI | \
+					 CF_CACR_CEIB | CF_CACR_DCM | \
+					 CF_CACR_EUSP)
+
 /* Chipselect bank definitions */
 /*
  * CS0 - NOR Flash
diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h
index 1801d9d7d5..6c6b5d6d57 100644
--- a/include/configs/M52277EVB.h
+++ b/include/configs/M52277EVB.h
@@ -302,6 +302,19 @@
  */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV | CF_CACR_INVI)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CINV | \
+					 CF_CACR_DISD | CF_CACR_INVI | \
+					 CF_CACR_CEIB | CF_CACR_DCM | \
+					 CF_CACR_EUSP)
+
 /*-----------------------------------------------------------------------
  * Memory bank definitions
  */
diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h
index 2b816ceae2..5c0dc842aa 100644
--- a/include/configs/M5235EVB.h
+++ b/include/configs/M5235EVB.h
@@ -237,6 +237,18 @@
  */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_DISD | \
+					 CF_CACR_CEIB | CF_CACR_DCM | \
+					 CF_CACR_EUSP)
+
 /*-----------------------------------------------------------------------
  * Chipselect bank definitions
  */
diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h
index e3830e5369..33ac2859df 100644
--- a/include/configs/M5249EVB.h
+++ b/include/configs/M5249EVB.h
@@ -60,6 +60,7 @@
  * Command line configuration.
  */
 #include <config_cmd_default.h>
+#define CONFIG_CMD_CACHE
 #undef CONFIG_CMD_NET
 
 #define CONFIG_SYS_PROMPT		"=> "
@@ -165,6 +166,20 @@
  */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_DCM)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_FLASH_BASE | \
+					 CF_ADDRMASK(2) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ACR1		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CEIB | \
+					 CF_CACR_DBWE)
+
 /*-----------------------------------------------------------------------
  * Memory bank definitions
  */
diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h
index 5e86e4cb90..b5af493b80 100644
--- a/include/configs/M5253DEMO.h
+++ b/include/configs/M5253DEMO.h
@@ -57,6 +57,7 @@
  */
 #include <config_cmd_default.h>
 
+#define CONFIG_CMD_CACHE
 #define CONFIG_CMD_LOADB
 #define CONFIG_CMD_LOADS
 #define CONFIG_CMD_EXT2
@@ -95,11 +96,6 @@
 #	define DM9000_DATA		(CONFIG_DM9000_BASE + 4)
 #	undef CONFIG_DM9000_DEBUG
 
-#	define CONFIG_ETHADDR		00:e0:0c:bc:e5:60
-#	define CONFIG_IPADDR		10.82.121.249
-#	define CONFIG_NETMASK		255.255.252.0
-#	define CONFIG_SERVERIP		10.82.120.80
-#	define CONFIG_GATEWAYIP		10.82.123.254
 #	define CONFIG_OVERWRITE_ETHADDR_ONCE
 
 #	define CONFIG_EXTRA_ENV_SETTINGS		\
@@ -109,9 +105,9 @@
 		"u-boot=u-boot.bin\0"			\
 		"load=tftp ${loadaddr) ${u-boot}\0"	\
 		"upd=run load; run prog\0"		\
-		"prog=prot off 0 2ffff;"	\
-		"era 0 2ffff;"			\
-		"cp.b ${loadaddr} 0 ${filesize};"	\
+		"prog=prot off 0xff800000 0xff82ffff;"	\
+		"era 0xff800000 0xff82ffff;"		\
+		"cp.b ${loadaddr} 0xff800000 ${filesize};"	\
 		"save\0"				\
 		""
 #endif
@@ -231,6 +227,20 @@
 /* Cache Configuration */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_DCM)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_FLASH_BASE | \
+					 CF_ADDRMASK(8) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ACR1		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CEIB | \
+					 CF_CACR_DBWE)
+
 /* Port configuration */
 #define CONFIG_SYS_FECI2C		0xF0
 
diff --git a/include/configs/M5253EVBE.h b/include/configs/M5253EVBE.h
index df6970cdfa..206d1152ee 100644
--- a/include/configs/M5253EVBE.h
+++ b/include/configs/M5253EVBE.h
@@ -64,6 +64,7 @@
  * Command line configuration.
  */
 #include <config_cmd_default.h>
+#define CONFIG_CMD_CACHE
 #undef CONFIG_CMD_NET
 #define CONFIG_CMD_LOADB
 #define CONFIG_CMD_LOADS
@@ -179,6 +180,20 @@
 /* Cache Configuration */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_DCM)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_FLASH_BASE | \
+					 CF_ADDRMASK(2) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ACR1		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CEIB | \
+					 CF_CACR_DBWE)
+
 /* Port configuration */
 #define CONFIG_SYS_FECI2C		0xF0
 
diff --git a/include/configs/M5271EVB.h b/include/configs/M5271EVB.h
index 50b3ab2808..798949cc56 100644
--- a/include/configs/M5271EVB.h
+++ b/include/configs/M5271EVB.h
@@ -72,6 +72,7 @@
  */
 #include <config_cmd_default.h>
 
+#define CONFIG_CMD_CACHE
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_MII
@@ -229,6 +230,19 @@
 /* Cache Configuration */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV | CF_CACR_INVI)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CINV | \
+					 CF_CACR_DISD | CF_CACR_INVI | \
+					 CF_CACR_CEIB | CF_CACR_DCM | \
+					 CF_CACR_EUSP)
+
 /* Chip Select 0  : Boot Flash */
 #define CONFIG_SYS_CS0_BASE	0xFFE00000
 #define CONFIG_SYS_CS0_MASK	0x001F0001
diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h
index f824158a69..f704bb3ff7 100644
--- a/include/configs/M5272C3.h
+++ b/include/configs/M5272C3.h
@@ -74,6 +74,7 @@
  */
 #include <config_cmd_default.h>
 
+#define CONFIG_CMD_CACHE
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_PING
@@ -211,6 +212,19 @@
  */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV | CF_CACR_INVI)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CINV | \
+					 CF_CACR_DISD | CF_CACR_INVI | \
+					 CF_CACR_CEIB | CF_CACR_DCM | \
+					 CF_CACR_EUSP)
+
 /*-----------------------------------------------------------------------
  * Memory bank definitions
  */
diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h
index b380159812..981670ac06 100644
--- a/include/configs/M5275EVB.h
+++ b/include/configs/M5275EVB.h
@@ -72,6 +72,7 @@
 /* Available command configuration */
 #include <config_cmd_default.h>
 
+#define CONFIG_CMD_CACHE
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_NET
@@ -121,11 +122,6 @@
 #define CONFIG_SYS_I2C_PINMUX_CLR	(0xFFF0)
 #define CONFIG_SYS_I2C_PINMUX_SET	(0x000F)
 
-#ifdef CONFIG_MCFFEC
-#define CONFIG_ETHADDR		00:06:3b:01:41:55
-#define CONFIG_ETH1ADDR		00:0e:0c:bc:e5:60
-#endif
-
 #define CONFIG_SYS_PROMPT		"-> "
 #define CONFIG_SYS_LONGHELP		/* undef to save memory	*/
 
@@ -145,6 +141,23 @@
 #define CONFIG_SYS_MEMTEST_START	0x400
 #define CONFIG_SYS_MEMTEST_END		0x380000
 
+#ifdef CONFIG_MCFFEC
+#	define CONFIG_NET_RETRY_COUNT	5
+#	define CONFIG_OVERWRITE_ETHADDR_ONCE
+#endif				/* FEC_ENET */
+
+#define CONFIG_EXTRA_ENV_SETTINGS		\
+	"netdev=eth0\0"				\
+	"loadaddr=10000\0"			\
+	"uboot=u-boot.bin\0"			\
+	"load=tftp ${loadaddr} ${uboot}\0"	\
+	"upd=run load; run prog\0"		\
+	"prog=prot off ffe00000 ffe3ffff;"	\
+	"era ffe00000 ffe3ffff;"		\
+	"cp.b ${loadaddr} ffe00000 ${filesize};"\
+	"save\0"				\
+	""
+
 #define CONFIG_SYS_HZ			1000
 #define CONFIG_SYS_CLK			150000000
 
@@ -208,6 +221,19 @@
  */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV | CF_CACR_INVI)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CINV | \
+					 CF_CACR_DISD | CF_CACR_INVI | \
+					 CF_CACR_CEIB | CF_CACR_DCM | \
+					 CF_CACR_EUSP)
+
 /*-----------------------------------------------------------------------
  * Memory bank definitions
  */
diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h
index 15590cfcd5..6e0aa14d3a 100644
--- a/include/configs/M5282EVB.h
+++ b/include/configs/M5282EVB.h
@@ -64,6 +64,7 @@
  * Command line configuration.
  */
 #include <config_cmd_default.h>
+#define CONFIG_CMD_CACHE
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_MII
@@ -209,6 +210,18 @@
  */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV + CF_CACR_DCM)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_DISD | \
+					 CF_CACR_CEIB | CF_CACR_DBWE | \
+					 CF_CACR_EUSP)
+
 /*-----------------------------------------------------------------------
  * Memory bank definitions
  */
diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h
index 30855bdaa2..d983a8fedb 100644
--- a/include/configs/M53017EVB.h
+++ b/include/configs/M53017EVB.h
@@ -69,6 +69,8 @@
 #	define CONFIG_MII_INIT		1
 #	define CONFIG_SYS_DISCOVER_PHY
 #	define CONFIG_SYS_RX_ETH_BUFFER	8
+#	define CONFIG_SYS_TX_ETH_BUFFER	8
+#	define CONFIG_SYS_FEC_BUF_USE_SRAM
 #	define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 #	define CONFIG_HAS_ETH1
 
@@ -166,7 +168,7 @@
  */
 #define CONFIG_SYS_INIT_RAM_ADDR	0x80000000
 #define CONFIG_SYS_INIT_RAM_END		0x20000	/* End of used area in internal SRAM */
-#define CONFIG_SYS_INIT_RAM_CTRL	0x21
+#define CONFIG_SYS_INIT_RAM_CTRL	0x221
 #define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
 #define CONFIG_SYS_GBL_DATA_OFFSET	((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 0x10)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
@@ -180,7 +182,7 @@
 #define CONFIG_SYS_SDRAM_SIZE		64	/* SDRAM size in MB */
 #define CONFIG_SYS_SDRAM_CFG1		0x43711630
 #define CONFIG_SYS_SDRAM_CFG2		0x56670000
-#define CONFIG_SYS_SDRAM_CTRL		0xE1002000
+#define CONFIG_SYS_SDRAM_CTRL		0xE1092000
 #define CONFIG_SYS_SDRAM_EMOD		0x80010000
 #define CONFIG_SYS_SDRAM_MODE		0x00CD0000
 
@@ -231,6 +233,17 @@
  */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINVA)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_EC | CF_CACR_CINVA | \
+					 CF_CACR_DCM_P)
+
 /*-----------------------------------------------------------------------
  * Chipselect bank definitions
  */
diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index 8180c05e67..159b178f40 100644
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -237,6 +237,17 @@
  */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINVA)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_EC | CF_CACR_CINVA | \
+					 CF_CACR_DCM_P)
+
 /*-----------------------------------------------------------------------
  * Chipselect bank definitions
  */
diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h
index 8652a80aa1..af1988ce0a 100644
--- a/include/configs/M5373EVB.h
+++ b/include/configs/M5373EVB.h
@@ -237,6 +237,17 @@
  */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINVA)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_EC | CF_CACR_CINVA | \
+					 CF_CACR_DCM_P)
+
 /*-----------------------------------------------------------------------
  * Chipselect bank definitions
  */
diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h
index a5acfd2846..a80d33047f 100644
--- a/include/configs/M54451EVB.h
+++ b/include/configs/M54451EVB.h
@@ -309,6 +309,21 @@
 /* Cache Configuration */
 #define CONFIG_SYS_CACHELINE_SIZE		16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_BCINVA + CF_CACR_ICINVA)
+#define CONFIG_SYS_DCACHE_INV		(CF_CACR_DCINVA)
+#define CONFIG_SYS_CACHE_ACR2		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_BEC | CF_CACR_IEC | \
+					 CF_CACR_ICINVA | CF_CACR_EUSP)
+#define CONFIG_SYS_CACHE_DCACR		((CONFIG_SYS_CACHE_ICACR | \
+					 CF_CACR_DEC | CF_CACR_DDCM_P | \
+					 CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
+
 /*-----------------------------------------------------------------------
  * Memory bank definitions
  */
diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h
index 7737284aab..5b4bba8c26 100644
--- a/include/configs/M54455EVB.h
+++ b/include/configs/M54455EVB.h
@@ -279,7 +279,7 @@
  * Definitions for initial stack pointer and data area (in DPRAM)
  */
 #define CONFIG_SYS_INIT_RAM_ADDR	0x80000000
-#define CONFIG_SYS_INIT_RAM_END	0x8000	/* End of used area in internal SRAM */
+#define CONFIG_SYS_INIT_RAM_END		0x8000	/* End of used area in internal SRAM */
 #define CONFIG_SYS_INIT_RAM_CTRL	0x221
 #define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
 #define CONFIG_SYS_GBL_DATA_OFFSET	((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 32)
@@ -408,6 +408,21 @@
  */
 #define CONFIG_SYS_CACHELINE_SIZE		16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_BCINVA + CF_CACR_ICINVA)
+#define CONFIG_SYS_DCACHE_INV		(CF_CACR_DCINVA)
+#define CONFIG_SYS_CACHE_ACR2		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_BEC | CF_CACR_IEC | \
+					 CF_CACR_ICINVA | CF_CACR_EUSP)
+#define CONFIG_SYS_CACHE_DCACR		((CONFIG_SYS_CACHE_ICACR | \
+					 CF_CACR_DEC | CF_CACR_DDCM_P | \
+					 CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
+
 /*-----------------------------------------------------------------------
  * Memory bank definitions
  */
diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h
index 4534002e47..d0077667f3 100644
--- a/include/configs/M5475EVB.h
+++ b/include/configs/M5475EVB.h
@@ -286,6 +286,22 @@
  */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_BCINVA + CF_CACR_ICINVA + \
+					 CF_CACR_IDCM)
+#define CONFIG_SYS_DCACHE_INV		(CF_CACR_DCINVA)
+#define CONFIG_SYS_CACHE_ACR2		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_BEC | CF_CACR_BCINVA | \
+					 CF_CACR_IEC | CF_CACR_ICINVA)
+#define CONFIG_SYS_CACHE_DCACR		((CONFIG_SYS_CACHE_ICACR | \
+					 CF_CACR_DEC | CF_CACR_DDCM_P | \
+					 CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
+
 /*-----------------------------------------------------------------------
  * Chipselect bank definitions
  */
diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h
index 971cb67bad..f23b8b0efa 100644
--- a/include/configs/M5485EVB.h
+++ b/include/configs/M5485EVB.h
@@ -272,6 +272,22 @@
  */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_BCINVA + CF_CACR_ICINVA + \
+					 CF_CACR_IDCM)
+#define CONFIG_SYS_DCACHE_INV		(CF_CACR_DCINVA)
+#define CONFIG_SYS_CACHE_ACR2		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_BEC | CF_CACR_BCINVA | \
+					 CF_CACR_IEC | CF_CACR_ICINVA)
+#define CONFIG_SYS_CACHE_DCACR		((CONFIG_SYS_CACHE_ICACR | \
+					 CF_CACR_DEC | CF_CACR_DDCM_P | \
+					 CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
+
 /*-----------------------------------------------------------------------
  * Chipselect bank definitions
  */
diff --git a/include/configs/METROBOX.h b/include/configs/METROBOX.h
index 518173aa5d..e7429dd199 100644
--- a/include/configs/METROBOX.h
+++ b/include/configs/METROBOX.h
@@ -194,6 +194,7 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_HARD_I2C	      1		     /* I2C hardware support	*/
 #undef	CONFIG_SOFT_I2C			     /* I2C !bit-banged		*/
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED	      400000	     /* I2C speed 400kHz	*/
 #define CONFIG_SYS_I2C_SLAVE	      0x7F	     /* I2C slave address	*/
 #define CONFIG_SYS_I2C_NOPROBES      {0x69}	     /* Don't probe these addrs */
diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h
index 7ac9342251..7e6484ee94 100644
--- a/include/configs/MIP405.h
+++ b/include/configs/MIP405.h
@@ -97,6 +97,7 @@
  ***************************************************************/
 
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		50000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 87901b3af9..da4313ac3a 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -413,6 +413,9 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE	1
 #define CONFIG_SYS_NS16550_CLK		get_bus_freq(0)
+#ifdef CONFIG_NAND_SPL
+#define CONFIG_NS16550_MIN_FUNCTIONS
+#endif
 
 #define CONFIG_SYS_BAUDRATE_TABLE	\
 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index 9b81703741..0c43b2b0c7 100644
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -284,6 +284,9 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    1
 #define CONFIG_SYS_NS16550_CLK		get_bus_freq(0)
+#ifdef CONFIG_NAND_SPL
+#define CONFIG_NS16550_MIN_FUNCTIONS
+#endif
 
 #define CONFIG_SYS_BAUDRATE_TABLE  \
 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index 1d2d659239..8382e3ca83 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -177,7 +177,7 @@
 #define PIXIS_VSPEED1		0x18	/* VELA VSpeed 1 */
 #define PIXIS_VCLKH		0x19	/* VELA VCLKH register */
 #define PIXIS_VCLKL		0x1A	/* VELA VCLKL register */
-#define CONFIG_SYS_PIXIS_VBOOT_MASK	0x0C    /* Reset altbank mask*/
+#define CONFIG_SYS_PIXIS_VBOOT_MASK	0xC0    /* Reset altbank mask */
 
 #define CONFIG_SYS_MAX_FLASH_BANKS	2		/* number of banks */
 #define CONFIG_SYS_MAX_FLASH_SECT	1024		/* sectors per device */
@@ -341,10 +341,8 @@
  * BAT0		2G	Cacheable, non-guarded
  * 0x0000_0000	2G	DDR
  */
-#define CONFIG_SYS_DBAT0L	(BATL_PP_RW | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_DBAT0U	(BATU_BL_2G | BATU_VS | BATU_VP)
-#define CONFIG_SYS_IBAT0L	(BATL_PP_RW | BATL_MEMCOHERENCE )
-#define CONFIG_SYS_IBAT0U	CONFIG_SYS_DBAT0U
+#define CONFIG_SYS_DBAT0L	(BATL_PP_RW)
+#define CONFIG_SYS_IBAT0L	(BATL_PP_RW)
 
 /*
  * BAT1		1G	Cache-inhibited, guarded
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index 12a8f60390..94e4d243e8 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -482,9 +482,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  * BAT0		DDR
  */
 #define CONFIG_SYS_DBAT0L	(BATL_PP_RW | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_DBAT0U	(BATU_BL_2G | BATU_VS | BATU_VP)
-#define CONFIG_SYS_IBAT0L	(BATL_PP_RW | BATL_MEMCOHERENCE )
-#define CONFIG_SYS_IBAT0U	CONFIG_SYS_DBAT0U
+#define CONFIG_SYS_IBAT0L	(BATL_PP_RW | BATL_MEMCOHERENCE)
 
 /*
  * BAT1		LBC (PIXIS/CF)
diff --git a/include/configs/MVSMR.h b/include/configs/MVSMR.h
new file mode 100644
index 0000000000..6492068c2f
--- /dev/null
+++ b/include/configs/MVSMR.h
@@ -0,0 +1,295 @@
+/*
+ * (C) Copyright 2003-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2004-2010
+ * Matrix-Vision GmbH, andre.schwarz@matrix-vision.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <version.h>
+
+#define CONFIG_MPC5xxx	1
+#define CONFIG_MPC5200 	1
+
+#define CONFIG_SYS_MPC5XXX_CLKIN	33000000
+
+#define BOOTFLAG_COLD		0x01
+#define BOOTFLAG_WARM		0x02
+
+#define CONFIG_MISC_INIT_R	1
+
+#define CONFIG_SYS_CACHELINE_SIZE	32
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_SYS_CACHELINE_SHIFT	5
+#endif
+
+#define CONFIG_PSC_CONSOLE	1
+#define CONFIG_BAUDRATE		115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200,\
+						230400}
+
+#define CONFIG_PCI		1
+#define CONFIG_PCI_PNP		1
+#undef	CONFIG_PCI_SCAN_SHOW
+#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	1
+
+#define CONFIG_PCI_MEM_BUS	0x40000000
+#define CONFIG_PCI_MEM_PHYS	CONFIG_PCI_MEM_BUS
+#define CONFIG_PCI_MEM_SIZE	0x10000000
+
+#define CONFIG_PCI_IO_BUS	0x50000000
+#define CONFIG_PCI_IO_PHYS	CONFIG_PCI_IO_BUS
+#define CONFIG_PCI_IO_SIZE	0x01000000
+
+#define CONFIG_SYS_XLB_PIPELINING	1
+#define CONFIG_HIGH_BATS	1
+
+#define MV_CI			mvSMR
+#define MV_VCI			mvSMR
+#define MV_FPGA_DATA		0xff840000
+#define MV_FPGA_SIZE		0x1ff88
+#define MV_KERNEL_ADDR		0xfff00000
+#define MV_SCRIPT_ADDR		0xff806000
+#define MV_INITRD_ADDR		0xff880000
+#define MV_INITRD_LENGTH	0x00240000
+#define MV_SCRATCH_ADDR		0xffcc0000
+#define MV_SCRATCH_LENGTH	MV_INITRD_LENGTH
+
+#define CONFIG_SHOW_BOOT_PROGRESS 1
+
+#define MV_KERNEL_ADDR_RAM	0x00100000
+#define MV_INITRD_ADDR_RAM	0x00400000
+
+/*
+ * Supported commands
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_FPGA
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SDRAM
+
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_NTPSERVER
+#define CONFIG_BOOTP_RANDOM_DELAY
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_VENDOREX
+
+/*
+ * Autoboot
+ */
+#define CONFIG_BOOTDELAY		1
+#define CONFIG_AUTOBOOT_KEYED
+#define CONFIG_AUTOBOOT_STOP_STR 	"abcdefg"
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+#define CONFIG_BOOTCOMMAND      "source ${script_addr}"
+#define CONFIG_BOOTARGS		"root=/dev/ram ro rootfstype=squashfs" \
+					" allocate=6M"
+
+#define XMK_STR(x)      #x
+#define MK_STR(x)       XMK_STR(x)
+
+#define CONFIG_EXTRA_ENV_SETTINGS				\
+	"console_nr=0\0"					\
+	"console=no\0"						\
+	"stdin=serial\0"					\
+	"stdout=serial\0"					\
+	"stderr=serial\0"					\
+	"fpga=0\0"						\
+	"fpgadata=" MK_STR(MV_FPGA_DATA) "\0"			\
+	"fpgadatasize=" MK_STR(MV_FPGA_SIZE) "\0"		\
+	"mv_kernel_addr=" MK_STR(MV_KERNEL_ADDR) "\0"		\
+	"mv_kernel_addr_ram=" MK_STR(MV_KERNEL_ADDR_RAM) "\0"	\
+	"script_addr=" MK_STR(MV_SCRIPT_ADDR) "\0"		\
+	"mv_initrd_addr=" MK_STR(MV_INITRD_ADDR) "\0"		\
+	"mv_initrd_addr_ram=" MK_STR(MV_INITRD_ADDR_RAM) "\0"	\
+	"mv_initrd_length=" MK_STR(MV_INITRD_LENGTH) "\0"	\
+	"mv_scratch_addr=" MK_STR(MV_SCRATCH_ADDR) "\0"		\
+	"mv_scratch_length=" MK_STR(MV_SCRATCH_LENGTH) "\0"	\
+	"mv_version=" U_BOOT_VERSION "\0"			\
+	"dhcp_client_id=" MK_STR(MV_CI) "\0"			\
+	"dhcp_vendor-class-identifier=" MK_STR(MV_VCI) "\0"	\
+	"netretry=no\0"						\
+	"use_static_ipaddr=no\0"				\
+	"static_ipaddr=192.168.0.101\0"				\
+	"static_netmask=255.255.255.0\0"			\
+	"static_gateway=0.0.0.0\0"				\
+	"initrd_name=uInitrd.mvsmr-rfs\0"			\
+	"zcip=yes\0"						\
+	"netboot=no\0"						\
+	""
+
+#undef XMK_STR
+#undef MK_STR
+
+/*
+ * IPB Bus clocking configuration.
+ */
+#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK
+
+/*
+ * Flash configuration
+ */
+#undef 	CONFIG_FLASH_16BIT
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1
+#define CONFIG_SYS_FLASH_EMPTY_INFO
+
+#define CONFIG_SYS_FLASH_ERASE_TOUT	50000
+#define CONFIG_SYS_FLASH_WRITE_TOUT	1000
+
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+#define CONFIG_SYS_MAX_FLASH_SECT	256
+
+#define CONFIG_SYS_LOWBOOT
+#define CONFIG_SYS_FLASH_BASE		TEXT_BASE
+#define CONFIG_SYS_FLASH_SIZE		0x00800000
+
+/*
+ * Environment settings
+ */
+#define CONFIG_ENV_IS_IN_FLASH
+#undef	CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_HAS_UID
+#define	CONFIG_OVERWRITE_ETHADDR_ONCE
+
+#define CONFIG_ENV_OFFSET	0x8000
+#define CONFIG_ENV_SIZE		0x2000
+#define CONFIG_ENV_SECT_SIZE	0x2000
+
+/* used by linker script to wrap code around */
+#define CONFIG_SCRIPT_OFFSET	0x6000
+#define CONFIG_SCRIPT_SECT_SIZE	0x2000
+
+/*
+ * Memory map
+ */
+#define CONFIG_SYS_MBAR		0xF0000000
+#define CONFIG_SYS_SDRAM_BASE	0x00000000
+#define CONFIG_SYS_DEFAULT_MBAR	0x80000000
+
+#define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
+#define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_SIZE
+
+#define CONFIG_SYS_GBL_DATA_SIZE	128
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - \
+						CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
+
+#define CONFIG_SYS_MONITOR_BASE	TEXT_BASE
+#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
+#define CONFIG_SYS_RAMBOOT		1
+#endif
+
+/* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
+#define CONFIG_SYS_MONITOR_LEN		(512 << 10)
+#define CONFIG_SYS_MALLOC_LEN		(512 << 10)
+#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)
+
+/*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C		1
+#define CONFIG_SYS_I2C_MODULE	1
+#define CONFIG_SYS_I2C_SPEED	86000
+#define CONFIG_SYS_I2C_SLAVE	0x7F
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_NET_RETRY_COUNT 5
+
+#define CONFIG_MPC5xxx_FEC
+#define CONFIG_MPC5xxx_FEC_MII100
+#define CONFIG_PHY_ADDR		0x00
+#define CONFIG_NETDEV		eth0
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_PROMPT_HUSH_PS2 	"> "
+#undef 	CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT		"=> "
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_SYS_CBSIZE		1024
+#else
+#define CONFIG_SYS_CBSIZE		256
+#endif
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_MEMTEST_START	0x00800000
+#define CONFIG_SYS_MEMTEST_END		0x02f00000
+
+#define CONFIG_SYS_HZ			1000
+
+/* default load address */
+#define CONFIG_SYS_LOAD_ADDR		0x02000000
+/* default location for tftp and bootm */
+#define CONFIG_LOADADDR 		0x00200000
+
+/*
+ * Various low-level settings
+ */
+#define CONFIG_SYS_GPS_PORT_CONFIG	0x00050044
+
+#define CONFIG_SYS_HID0_INIT		(HID0_ICE | HID0_ICFI)
+#define CONFIG_SYS_HID0_FINAL		HID0_ICE
+
+#define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
+#define CONFIG_SYS_BOOTCS_CFG		0x00047800
+#define CONFIG_SYS_CS0_START		CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_CS0_SIZE		CONFIG_SYS_FLASH_SIZE
+
+#define CONFIG_SYS_CS_BURST		0x000000f0
+#define CONFIG_SYS_CS_DEADCYCLE		0x33333303
+
+#define CONFIG_SYS_RESET_ADDRESS	0x00000100
+
+#undef FPGA_DEBUG
+#undef CONFIG_SYS_FPGA_PROG_FEEDBACK
+#define CONFIG_FPGA		CONFIG_SYS_XILINX_SPARTAN2
+#define CONFIG_FPGA_XILINX	1
+#define CONFIG_FPGA_SPARTAN2	1
+#define CONFIG_FPGA_COUNT	1
+
+#endif
diff --git a/include/configs/OCRTC.h b/include/configs/OCRTC.h
index 860ec52921..55471af34a 100644
--- a/include/configs/OCRTC.h
+++ b/include/configs/OCRTC.h
@@ -210,6 +210,7 @@
  * I2C EEPROM (CAT24WC08) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/ORSG.h b/include/configs/ORSG.h
index b2e2d41f2b..142471362f 100644
--- a/include/configs/ORSG.h
+++ b/include/configs/ORSG.h
@@ -208,6 +208,7 @@
  * I2C EEPROM (CAT24WC08) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 405e6d5042..a9b4004c36 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -286,6 +286,9 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE	1
 #define CONFIG_SYS_NS16550_CLK		get_bus_freq(0)
+#ifdef CONFIG_NAND_SPL
+#define CONFIG_NS16550_MIN_FUNCTIONS
+#endif
 
 #define CONFIG_SERIAL_MULTI	1 /* Enable both serial ports */
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV	/* determine from environment */
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index 30a5a319bc..66be725c8a 100644
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -238,7 +238,9 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy);
 
 #define CONFIG_BOARD_EARLY_INIT_R	/* call board_early_init_r function */
 
-#define CONFIG_FSL_PIXIS	1	/* use common PIXIS code */
+#define CONFIG_FSL_NGPIXIS		/* use common ngPIXIS code */
+
+#ifdef CONFIG_FSL_NGPIXIS
 #define PIXIS_BASE	0xffdf0000	/* PIXIS registers */
 #ifdef CONFIG_PHYS_64BIT
 #define PIXIS_BASE_PHYS	0xfffdf0000ull
@@ -249,59 +251,11 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy);
 #define CONFIG_SYS_BR3_PRELIM	(BR_PHYS_ADDR(PIXIS_BASE_PHYS) | BR_PS_8 | BR_V)
 #define CONFIG_SYS_OR3_PRELIM		0xffffeff7	/* 32KB but only 4k mapped */
 
-#define PIXIS_ID		0x0	/* Board ID at offset 0 */
-#define PIXIS_VER		0x1	/* Board version at offset 1 */
-#define PIXIS_PVER		0x2	/* PIXIS FPGA version at offset 2 */
-#define PIXIS_CSR		0x3	/* PIXIS General control/status register */
-#define PIXIS_RST		0x4	/* PIXIS Reset Control register */
-#define PIXIS_PWR		0x5	/* PIXIS Power status register */
-#define PIXIS_AUX		0x6	/* Auxiliary 1 register */
-#define PIXIS_SPD		0x7	/* Register for SYSCLK speed */
-#define PIXIS_AUX2		0x8	/* Auxiliary 2 register */
-#define PIXIS_VCTL		0x10	/* VELA Control Register */
-#define PIXIS_VSTAT		0x11	/* VELA Status Register */
-#define PIXIS_VCFGEN0		0x12	/* VELA Config Enable 0 */
-#define PIXIS_VCFGEN1		0x13	/* VELA Config Enable 1 */
-#define PIXIS_VCORE0		0x14	/* VELA VCORE0 Register */
-#define PIXIS_VBOOT		0x16	/* VELA VBOOT Register */
-#define PIXIS_VSPEED0		0x17	/* VELA VSpeed 0 */
-#define PIXIS_VSPEED1		0x18	/* VELA VSpeed 1 */
-#define PIXIS_VSPEED2		0x19	/* VELA VSpeed 2 */
-#define PIXIS_VSYSCLK0		0x19	/* VELA SYSCLK0 Register */
-#define PIXIS_VSYSCLK1		0x1A	/* VELA SYSCLK1 Register */
-#define PIXIS_VSYSCLK2		0x1B	/* VELA SYSCLK2 Register */
-#define PIXIS_VDDRCLK0		0x1C	/* VELA DDRCLK0 Register */
-#define PIXIS_VDDRCLK1		0x1D	/* VELA DDRCLK1 Register */
-#define PIXIS_VDDRCLK2		0x1E	/* VELA DDRCLK2 Register */
-
-#define PIXIS_VWATCH		0x24	/* Watchdog Register */
-#define PIXIS_LED		0x25	/* LED Register */
-
-#define PIXIS_SW(x)		0x20 + (x - 1) * 2
-#define PIXIS_EN(x)		0x21 + (x - 1) * 2
-#define PIXIS_SW7_LBMAP		0xc0	/* SW7 - cfg_lbmap */
-#define PIXIS_SW7_VBANK		0x30	/* SW7 - cfg_vbank */
-
-/* old pixis referenced names */
-#define PIXIS_VCLKH		0x19	/* VELA VCLKH register */
-#define PIXIS_VCLKL		0x1A	/* VELA VCLKL register */
-#define CONFIG_SYS_PIXIS_VBOOT_MASK	0xc0
-#define PIXIS_VSPEED2_TSEC1SER	0x8
-#define PIXIS_VSPEED2_TSEC2SER	0x4
-#define PIXIS_VSPEED2_TSEC3SER	0x2
-#define PIXIS_VSPEED2_TSEC4SER	0x1
-#define PIXIS_VCFGEN1_TSEC1SER	0x20
-#define PIXIS_VCFGEN1_TSEC2SER	0x20
-#define PIXIS_VCFGEN1_TSEC3SER	0x20
-#define PIXIS_VCFGEN1_TSEC4SER	0x20
-#define PIXIS_VSPEED2_MASK	(PIXIS_VSPEED2_TSEC1SER \
-					| PIXIS_VSPEED2_TSEC2SER \
-					| PIXIS_VSPEED2_TSEC3SER \
-					| PIXIS_VSPEED2_TSEC4SER)
-#define PIXIS_VCFGEN1_MASK	(PIXIS_VCFGEN1_TSEC1SER \
-					| PIXIS_VCFGEN1_TSEC2SER \
-					| PIXIS_VCFGEN1_TSEC3SER \
-					| PIXIS_VCFGEN1_TSEC4SER)
+#define PIXIS_LBMAP_SWITCH	7
+#define PIXIS_LBMAP_MASK	0xf0
+#define PIXIS_LBMAP_SHIFT	4
+#define PIXIS_LBMAP_ALTBANK	0x20
+#endif
 
 #define CONFIG_SYS_INIT_RAM_LOCK	1
 #define CONFIG_SYS_INIT_RAM_ADDR	0xffd00000	/* Initial L1 address */
diff --git a/include/configs/PCI405.h b/include/configs/PCI405.h
index 4e397990cc..0d443ea2d4 100644
--- a/include/configs/PCI405.h
+++ b/include/configs/PCI405.h
@@ -204,6 +204,7 @@
  * I2C EEPROM (CAT24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/PCI5441.h b/include/configs/PCI5441.h
index 831a60d9a0..c60a9f7bc7 100644
--- a/include/configs/PCI5441.h
+++ b/include/configs/PCI5441.h
@@ -92,7 +92,8 @@
 /*------------------------------------------------------------------------
  * CONSOLE
  *----------------------------------------------------------------------*/
-#if defined(CONFIG_CONSOLE_JTAG)
+#define CONFIG_ALTERA_UART		1	/* Use altera uart */
+#if defined(CONFIG_ALTERA_JTAG_UART)
 #define CONFIG_SYS_NIOS_CONSOLE	0x00920820	/* JTAG UART base addr	*/
 #else
 #define CONFIG_SYS_NIOS_CONSOLE	0x009208a0	/* UART base addr	*/
@@ -113,14 +114,16 @@
  * TIMEBASE --
  *
  * The high res timer defaults to 1 msec. Since it includes the period
- * registers, we can slow it down to 10 msec using TMRCNT. If the default
- * period is acceptable, TMRCNT can be left undefined.
+ * registers, the interrupt frequency can be reduced using TMRCNT.
+ * If the default period is acceptable, TMRCNT can be left undefined.
+ * TMRMS represents the desired mecs per tick (msecs per interrupt).
  *----------------------------------------------------------------------*/
+#define CONFIG_SYS_HZ			1000	/* Always 1000 */
 #define CONFIG_SYS_NIOS_TMRBASE	0x00920860	/* Tick timer base addr	*/
-#define CONFIG_SYS_NIOS_TMRIRQ		3		/* Timer IRQ num	*/
-#define CONFIG_SYS_NIOS_TMRMS		10		/* 10 msec per tick	*/
-#define CONFIG_SYS_NIOS_TMRCNT	(CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
-#define	CONFIG_SYS_HZ		(CONFIG_SYS_CLK_FREQ/(CONFIG_SYS_NIOS_TMRCNT + 1))
+#define CONFIG_SYS_NIOS_TMRIRQ		3	/* Timer IRQ num */
+#define CONFIG_SYS_NIOS_TMRMS		10	/* Desired period (msec)*/
+#define CONFIG_SYS_NIOS_TMRCNT \
+		(CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
 
 
 /*
diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h
index 962b29e95b..3e57c0b92f 100644
--- a/include/configs/PIP405.h
+++ b/include/configs/PIP405.h
@@ -86,6 +86,7 @@
  * The Atmel EEPROM uses 16Bit addressing.
  ***************************************************************/
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		50000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/PK1C20.h b/include/configs/PK1C20.h
index cf6f7a9e8a..874c20b935 100644
--- a/include/configs/PK1C20.h
+++ b/include/configs/PK1C20.h
@@ -94,7 +94,8 @@
 /*------------------------------------------------------------------------
  * CONSOLE
  *----------------------------------------------------------------------*/
-#if defined(CONFIG_CONSOLE_JTAG)
+#define CONFIG_ALTERA_UART		1	/* Use altera uart */
+#if defined(CONFIG_ALTERA_JTAG_UART)
 #define CONFIG_SYS_NIOS_CONSOLE	0x021208b0	/* JTAG UART base addr	*/
 #else
 #define CONFIG_SYS_NIOS_CONSOLE	0x02120840	/* UART base addr	*/
@@ -123,14 +124,16 @@
  * TIMEBASE --
  *
  * The high res timer defaults to 1 msec. Since it includes the period
- * registers, we can slow it down to 10 msec using TMRCNT. If the default
- * period is acceptable, TMRCNT can be left undefined.
+ * registers, the interrupt frequency can be reduced using TMRCNT.
+ * If the default period is acceptable, TMRCNT can be left undefined.
+ * TMRMS represents the desired mecs per tick (msecs per interrupt).
  *----------------------------------------------------------------------*/
+#define CONFIG_SYS_HZ			1000	/* Always 1000 */
 #define CONFIG_SYS_NIOS_TMRBASE	0x02120820	/* Tick timer base addr */
-#define CONFIG_SYS_NIOS_TMRIRQ		3		/* Timer IRQ num	*/
-#define CONFIG_SYS_NIOS_TMRMS		10		/* 10 msec per tick	*/
-#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
-#define CONFIG_SYS_HZ		(CONFIG_SYS_CLK_FREQ/(CONFIG_SYS_NIOS_TMRCNT + 1))
+#define CONFIG_SYS_NIOS_TMRIRQ		3	/* Timer IRQ num */
+#define CONFIG_SYS_NIOS_TMRMS		10	/* Desired period */
+#define CONFIG_SYS_NIOS_TMRCNT \
+		(CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
 
 /*------------------------------------------------------------------------
  * STATUS LED -- Provides a simple blinking led. For Nios2 each board
diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h
index 3d59454eb9..f917eb5c25 100644
--- a/include/configs/PLU405.h
+++ b/include/configs/PLU405.h
@@ -278,6 +278,7 @@
  * I2C EEPROM (24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/PM520.h b/include/configs/PM520.h
index f9687d2743..22de2075f9 100644
--- a/include/configs/PM520.h
+++ b/include/configs/PM520.h
@@ -50,7 +50,6 @@
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
 
 
-#ifdef CONFIG_MPC5200	/* MPC5100 PCI is not supported yet. */
 /*
  * PCI Mapping:
  * 0x40000000 - 0x4fffffff - PCI Memory
@@ -75,7 +74,6 @@
 #define CONFIG_SYS_RX_ETH_BUFFER	8  /* use 8 rx buffer on eepro100  */
 #undef  CONFIG_NS8382X
 
-#endif
 
 /* Partitions */
 #define CONFIG_DOS_PARTITION
@@ -111,9 +109,7 @@
 #define CONFIG_CMD_SNTP
 #define CONFIG_CMD_USB
 
-#if defined(CONFIG_MPC5200)
 #define CONFIG_CMD_PCI
-#endif
 
 
 /*
@@ -147,12 +143,10 @@
 
 #define CONFIG_BOOTCOMMAND	"run flash_self"
 
-#if defined(CONFIG_MPC5200)
 /*
  * IPB Bus clocking configuration.
  */
 #undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */
-#endif
 /*
  * I2C configuration
  */
@@ -301,13 +295,8 @@
 /*
  * Various low-level settings
  */
-#if defined(CONFIG_MPC5200)
 #define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
 #define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
 
 #if defined(CONFIG_BOOT_ROM)
 #define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_BOOTROM_BASE
diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h
index 87ea7b6d47..00a12fb833 100644
--- a/include/configs/PMC405.h
+++ b/include/configs/PMC405.h
@@ -235,6 +235,7 @@
  * I2C EEPROM (CAT24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		100000 /* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/PMC405DE.h b/include/configs/PMC405DE.h
index 7198632c36..2c048dd0dd 100644
--- a/include/configs/PMC405DE.h
+++ b/include/configs/PMC405DE.h
@@ -215,6 +215,7 @@
  * I2C EEPROM (24W16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000 /* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h
index 89799af3f3..c2fb56c6f9 100644
--- a/include/configs/PMC440.h
+++ b/include/configs/PMC440.h
@@ -226,6 +226,7 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_HARD_I2C		1	/* I2C with hardware support    */
 #undef	CONFIG_SOFT_I2C		/* I2C bit-banged               */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address  */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h
index 8e9d92872a..44f03dc390 100644
--- a/include/configs/PPChameleonEVB.h
+++ b/include/configs/PPChameleonEVB.h
@@ -414,6 +414,7 @@
  * I2C EEPROM (CAT24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/TASREG.h b/include/configs/TASREG.h
index 25f3a26f35..b69f015c7c 100644
--- a/include/configs/TASREG.h
+++ b/include/configs/TASREG.h
@@ -252,6 +252,17 @@
  */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_DCM)
+#define CONFIG_SYS_CACHE_ACR1		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CEIB | \
+					 CF_CACR_DBWE)
+
 /*-----------------------------------------------------------------------
  * Memory bank definitions
  */
diff --git a/include/configs/TB5200.h b/include/configs/TB5200.h
index 3438abaeaa..6da18ebca1 100644
--- a/include/configs/TB5200.h
+++ b/include/configs/TB5200.h
@@ -430,13 +430,8 @@
 /*
  * Various low-level settings
  */
-#if defined(CONFIG_MPC5200)
 #define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
 #define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
 
 #define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index 2154c7870e..107bff19ff 100644
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -633,13 +633,8 @@
 /*
  * Various low-level settings
  */
-#if defined(CONFIG_MPC5200)
 #define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
 #define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
 
 #define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
diff --git a/include/configs/Total5200.h b/include/configs/Total5200.h
index 1daa5746ee..7510ab10e4 100644
--- a/include/configs/Total5200.h
+++ b/include/configs/Total5200.h
@@ -41,6 +41,7 @@
  */
 
 #define CONFIG_MPC5xxx		1	/* This is an MPC5xxx CPU */
+#define CONFIG_MPC5200		1	/* (more precisely a MPC5200 CPU) */
 #define CONFIG_TOTAL5200	1	/* ... on Total5200 board */
 
 #define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz */
@@ -73,7 +74,6 @@
 #define CONFIG_SPLASH_SCREEN
 
 
-#ifdef CONFIG_MPC5200	/* MGT5100 PCI is not supported yet. */
 /*
  * PCI Mapping:
  * 0x40000000 - 0x4fffffff - PCI Memory
@@ -98,12 +98,6 @@
 #define CONFIG_SYS_RX_ETH_BUFFER	8  /* use 8 rx buffer on eepro100  */
 #define CONFIG_NS8382X		1
 
-#else	/* MGT5100 */
-
-#define CONFIG_MII		1
-
-#endif
-
 /* Partitions */
 #define CONFIG_MAC_PARTITION
 #define CONFIG_DOS_PARTITION
@@ -127,9 +121,7 @@
  */
 #include <config_cmd_default.h>
 
-#if defined(CONFIG_MPC5200)
-    #define CONFIG_CMD_PCI
-#endif
+#define CONFIG_CMD_PCI
 
 #define CONFIG_CMD_BMP
 #define CONFIG_CMD_EEPROM
@@ -176,12 +168,10 @@
 
 #define CONFIG_BOOTCOMMAND	"run flash_self"
 
-#if defined(CONFIG_MPC5200)
 /*
  * IPB Bus clocking configuration.
  */
 #undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */
-#endif
 
 /*
  * I2C configuration
@@ -326,17 +316,8 @@
 /*
  * Various low-level settings
  */
-#if defined(CONFIG_MPC5200)
 #define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
 #define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
-
-#if defined (CONFIG_MGT5100)
-#   define CONFIG_BOARD_EARLY_INIT_R	/* switch from CS_BOOT to CS0 */
-#endif
 
 #if CONFIG_TOTAL5200_REV==1
 #   define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h
index 38a1d0deca..9c91fccb11 100644
--- a/include/configs/VOH405.h
+++ b/include/configs/VOH405.h
@@ -277,6 +277,7 @@
  * I2C EEPROM (CAT24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		100000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h
index 4717869dde..871e4c339e 100644
--- a/include/configs/VOM405.h
+++ b/include/configs/VOM405.h
@@ -203,6 +203,7 @@
  * I2C EEPROM (CAT24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h
index c0179150c2..f06bfe5521 100644
--- a/include/configs/W7OLMC.h
+++ b/include/configs/W7OLMC.h
@@ -273,6 +273,7 @@
  * I2C EEPROM (CAT24WC08) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h
index 1d4ad13ed3..be8c9f82ef 100644
--- a/include/configs/W7OLMG.h
+++ b/include/configs/W7OLMG.h
@@ -280,6 +280,7 @@
  * I2C EEPROM (ATMEL 24C04N)
  */
 #define CONFIG_HARD_I2C		1		/* Hardware assisted I2C	*/
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000		/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h
index 5c281a1a66..be9ac6261c 100644
--- a/include/configs/WUH405.h
+++ b/include/configs/WUH405.h
@@ -241,6 +241,7 @@
  * I2C EEPROM (CAT24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/XPEDITE1000.h b/include/configs/XPEDITE1000.h
index 658e9473bc..cf39aeaaf7 100644
--- a/include/configs/XPEDITE1000.h
+++ b/include/configs/XPEDITE1000.h
@@ -141,6 +141,7 @@ extern void out32(unsigned int, unsigned long);
  * I2C
  */
 #define CONFIG_HARD_I2C			1	/* I2C with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7f
 #define CONFIG_I2C_MULTI_BUS
diff --git a/include/configs/aev.h b/include/configs/aev.h
index 2b4826d90e..98958a6237 100644
--- a/include/configs/aev.h
+++ b/include/configs/aev.h
@@ -362,13 +362,8 @@
 /*
  * Various low-level settings
  */
-#if defined(CONFIG_MPC5200)
 #define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
 #define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
 
 #define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
diff --git a/include/configs/alpr.h b/include/configs/alpr.h
index 0fed9ad68e..ee0c14d960 100644
--- a/include/configs/alpr.h
+++ b/include/configs/alpr.h
@@ -118,6 +118,7 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_HARD_I2C		1	/* I2C with hardware support	*/
 #undef	CONFIG_SOFT_I2C			/* I2C bit-banged		*/
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		100000	/* I2C speed and slave address	*/
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 #define CONFIG_SYS_I2C_NOPROBES	{0x69}	/* Don't probe these addrs	*/
@@ -235,11 +236,13 @@
 #define CONFIG_CMD_EEPROM
 #define CONFIG_CMD_FPGA
 #define CONFIG_CMD_I2C
+#undef CONFIG_CMD_LOADB
+#undef CONFIG_CMD_LOADS
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_NAND
 #define CONFIG_CMD_NET
-#define CONFIG_CMD_PCI
 #undef CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
 
 #undef CONFIG_WATCHDOG			/* watchdog disabled		*/
 
diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h
index 8cd97b86da..13a941ef63 100644
--- a/include/configs/amcc-common.h
+++ b/include/configs/amcc-common.h
@@ -40,6 +40,7 @@
  * I2C
  */
 #define CONFIG_HARD_I2C			/* I2C with hardware support	*/
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
 /*
diff --git a/include/configs/aria.h b/include/configs/aria.h
index f89fc570aa..06763c5d96 100644
--- a/include/configs/aria.h
+++ b/include/configs/aria.h
@@ -190,7 +190,7 @@
 
 /*
  * Backward compatible definitions,
- * so we do not have to change cpu/mpc512x/fixed_sdram.c
+ * so we do not have to change arch/ppc/cpu/mpc512x/fixed_sdram.c
  */
 #define	CONFIG_SYS_DDRCMD_EM2		(CONFIG_SYS_MICRON_EMR2)
 #define CONFIG_SYS_DDRCMD_EM3		(CONFIG_SYS_MICRON_EMR3)
diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h
new file mode 100644
index 0000000000..7c8281cae7
--- /dev/null
+++ b/include/configs/astro_mcf5373l.h
@@ -0,0 +1,400 @@
+/*
+ * Configuration settings for the Sentec Cobra Board.
+ *
+ * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * configuration for ASTRO "Urmel" board.
+ * Originating from Cobra5272 configuration, messed up by
+ * Wolfgang Wegner <w.wegner@astro-kom.de>
+ * Please do not bother the original author with bug reports
+ * concerning this file.
+ */
+
+#ifndef _CONFIG_ASTRO_MCF5373L_H
+#define _CONFIG_ASTRO_MCF5373L_H
+
+/*
+ * set the card type to actually compile for; either of
+ * the possibilities listed below has to be used!
+ */
+#define CONFIG_ASTRO_V532	1
+
+#if CONFIG_ASTRO_V532
+#define ASTRO_ID	0xF8
+#elif CONFIG_ASTRO_V512
+#define ASTRO_ID	0xFA
+#elif CONFIG_ASTRO_TWIN7S2
+#define ASTRO_ID	0xF9
+#elif CONFIG_ASTRO_V912
+#define ASTRO_ID	0xFC
+#elif CONFIG_ASTRO_COFDMDUOS2
+#define ASTRO_ID	0xFB
+#else
+#error No card type defined!
+#endif
+
+/*
+ * Define processor
+ * possible values for Urmel board: only Coldfire M5373 processor supported
+ * (please do not change)
+ */
+
+/* it seems not clear yet which processor defines we should use */
+#define CONFIG_MCF537x			/* define processor family */
+#define CONFIG_MCF532x			/* define processor family */
+#define CONFIG_M5373			/* define processor type */
+#define CONFIG_ASTRO5373L		/* define board type */
+
+/* Command line configuration */
+#include <config_cmd_default.h>
+
+/*
+ * CONFIG_MK_RAM defines if u-boot is loaded via BDM (or started from
+ * a different bootloader that has already performed RAM setup) or
+ * started directly from flash, which is the regular case for production
+ * boards.
+ */
+#ifdef CONFIG_MK_RAM
+#define CONFIG_MONITOR_IS_IN_RAM
+#define CONFIG_TEXT_BASE		0x40020000
+#define ENABLE_JFFS	0
+#else
+#define CONFIG_TEXT_BASE		0x00000000
+#define ENABLE_JFFS	1
+#endif
+
+/* Define which commmands should be available at u-boot command prompt */
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_XIMG
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
+#if ENABLE_JFFS
+#define CONFIG_CMD_JFFS2
+#endif
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_LOADS
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_FPGA
+#define CONFIG_CMDLINE_EDITING
+
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+
+#define CONFIG_MCFRTC
+#undef RTC_DEBUG
+
+/* Timer */
+#define CONFIG_MCFTMR
+#undef CONFIG_MCFPIT
+
+/* I2C */
+#define CONFIG_FSL_I2C
+#define CONFIG_HARD_I2C			/* I2C with hw support */
+#undef CONFIG_SOFT_I2C			/* I2C bit-banged */
+#define CONFIG_SYS_I2C_SPEED		80000
+#define CONFIG_SYS_I2C_SLAVE		0x7F
+#define CONFIG_SYS_I2C_OFFSET		0x58000
+#define CONFIG_SYS_IMMR			CONFIG_SYS_MBAR
+
+/*
+ * Defines processor clock - important for correct timings concerning serial
+ * interface etc.
+ * CONFIG_SYS_HZ gives unit: 1000 -> 1 Hz ^= 1000 ms
+ */
+
+#define CONFIG_SYS_HZ			1000
+#define CONFIG_SYS_CLK			80000000
+#define CONFIG_SYS_CPU_CLK		(CONFIG_SYS_CLK * 3)
+#define CONFIG_SYS_SDRAM_SIZE		32		/* SDRAM size in MB */
+
+#define CONFIG_SYS_CORE_SRAM_SIZE	0x8000
+#define CONFIG_SYS_CORE_SRAM		0x80000000
+
+#define CONFIG_SYS_UNIFY_CACHE
+
+/*
+ * Define baudrate for UART1 (console output, tftp, ...)
+ * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
+ * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected
+ * in u-boot command interface
+ */
+
+#define CONFIG_BAUDRATE		115200
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
+
+#define CONFIG_MCFUART
+#define CONFIG_SYS_UART_PORT		(2)
+#define CONFIG_SYS_UART2_ALT3_GPIO
+
+/*
+ * Watchdog configuration; Watchdog is disabled for running from RAM
+ * and set to highest possible value else. Beware there is no check
+ * in the watchdog code to validate the timeout value set here!
+ */
+
+#ifndef CONFIG_MONITOR_IS_IN_RAM
+#define CONFIG_WATCHDOG
+#define CONFIG_WATCHDOG_TIMEOUT 3355	/* timeout in milliseconds */
+#endif
+
+/*
+ * Configuration for environment
+ * Environment is located in the last sector of the flash
+ */
+
+#ifndef CONFIG_MONITOR_IS_IN_RAM
+#define CONFIG_ENV_OFFSET		0x1FF8000
+#define CONFIG_ENV_SECT_SIZE		0x8000
+#define CONFIG_ENV_IS_IN_FLASH		1
+#else
+/*
+ * environment in RAM - This is used to use a single PC-based application
+ * to load an image, load U-Boot, load an environment and then start U-Boot
+ * to execute the commands from the environment. Feedback is done via setting
+ * and reading memory locations.
+ */
+#define CONFIG_ENV_ADDR		0x40060000
+#define CONFIG_ENV_SECT_SIZE	0x8000
+#define CONFIG_ENV_IS_IN_FLASH	1
+#endif
+
+/* here we put our FPGA configuration... */
+#define CONFIG_MISC_INIT_R	1
+
+/* Define user parameters that have to be customized most likely */
+
+/* AUTOBOOT settings - booting images automatically by u-boot after power on */
+
+/*
+ * used for autoboot, delay in seconds u-boot will wait before starting
+ * defined (auto-)boot command, setting to -1 disables delay, setting to
+ * 0 will too prevent access to u-boot command interface: u-boot then has
+ * to be reflashed
+ * beware - watchdog is not serviced during autoboot delay time!
+ */
+#ifdef CONFIG_MONITOR_IS_IN_RAM
+#define CONFIG_BOOTDELAY	1
+#else
+#define CONFIG_BOOTDELAY	1
+#endif
+
+/*
+ * The following settings will be contained in the environment block ; if you
+ * want to use a neutral environment all those settings can be manually set in
+ * u-boot: 'set' command
+ */
+
+#define _QUOTEME(x)	#x
+#define QUOTEME(x)	_QUOTEME(x)
+
+#define CONFIG_EXTRA_ENV_SETTINGS			\
+	"loaderversion=11\0"				\
+	"card_id="QUOTEME(ASTRO_ID)"\0"			\
+	"alterafile=0\0"				\
+	"xilinxfile=0\0"				\
+	"xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\
+		"fpga load 0 0x41000000 $filesize\0" \
+	"alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\
+		"fpga load 1 0x41000000 $filesize\0" \
+	"env_default=1\0"				\
+	"env_check=if test $env_default -eq 1;"\
+		" then setenv env_default 0;saveenv;fi\0"
+
+/*
+ * "update" is a non-standard command that has to be supplied
+ * by external update.c; This is not included in mainline because
+ * it needs non-blocking CFI routines.
+ */
+#ifdef CONFIG_MONITOR_IS_IN_RAM
+#define CONFIG_BOOTCOMMAND	""	/* no autoboot in this case */
+#else
+#if CONFIG_ASTRO_V532
+#define CONFIG_BOOTCOMMAND	"protect off 0x80000 0x1ffffff;run env_check;"\
+				"run xilinxload&&run alteraload&&bootm 0x80000;"\
+				"update;reset"
+#else
+#define CONFIG_BOOTCOMMAND	"protect off 0x80000 0x1ffffff;run env_check;"\
+				"run xilinxload&&bootm 0x80000;update;reset"
+#endif
+#endif
+
+/* default bootargs that are considered during boot */
+#define CONFIG_BOOTARGS		" console=ttyS2,115200 rootfstype=romfs"\
+				" loaderversion=$loaderversion"
+
+#define CONFIG_SYS_PROMPT	"URMEL > "
+
+/* default RAM address for user programs */
+#define CONFIG_SYS_LOAD_ADDR	0x20000
+
+#define CONFIG_SYS_LONGHELP
+
+#if (CONFIG_COMMANDS & CONFIG_CMD_KGDB)
+#define CONFIG_SYS_CBSIZE		1024
+#else
+#define CONFIG_SYS_CBSIZE		256
+#endif
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+
+#define CONFIG_FPGA_COUNT	1
+#define CONFIG_FPGA
+#define	CONFIG_FPGA_XILINX
+#define	CONFIG_FPGA_SPARTAN3
+#define CONFIG_FPGA_ALTERA
+#define CONFIG_FPGA_CYCLON2
+#define CONFIG_SYS_FPGA_PROG_FEEDBACK
+#define CONFIG_SYS_FPGA_WAIT		1000
+
+/* End of user parameters to be customized */
+
+/* Defines memory range for test */
+
+#define CONFIG_SYS_MEMTEST_START	0x40020000
+#define CONFIG_SYS_MEMTEST_END		0x41ffffff
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+
+/* Base register address */
+
+#define CONFIG_SYS_MBAR		0xFC000000	/* Register Base Addrs */
+
+/* System Conf. Reg. & System Protection Reg. */
+
+#define CONFIG_SYS_SCR		0x0003;
+#define CONFIG_SYS_SPR		0xffff;
+
+/*
+ * Definitions for initial stack pointer and data area (in internal SRAM)
+ */
+#define CONFIG_SYS_INIT_RAM_ADDR	0x80000000
+#define CONFIG_SYS_INIT_RAM_END		0x8000
+#define CONFIG_SYS_INIT_RAM_CTRL	0x221
+#define CONFIG_SYS_GBL_DATA_SIZE	128
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - \
+					 CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
+
+/*
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000
+ */
+#define CONFIG_SYS_SDRAM_BASE		0x40000000
+
+/*
+ * Chipselect bank definitions
+ *
+ * CS0 - Flash 32MB (first 16MB)
+ * CS1 - Flash 32MB (second half)
+ * CS2 - FPGA
+ * CS3 - FPGA
+ * CS4 - unused
+ * CS5 - unused
+ */
+#define CONFIG_SYS_CS0_BASE		0
+#define CONFIG_SYS_CS0_MASK		0x00ff0001
+#define CONFIG_SYS_CS0_CTRL		0x00001fc0
+
+#define CONFIG_SYS_CS1_BASE		0x01000000
+#define CONFIG_SYS_CS1_MASK		0x00ff0001
+#define CONFIG_SYS_CS1_CTRL		0x00001fc0
+
+#define CONFIG_SYS_CS2_BASE		0x20000000
+#define CONFIG_SYS_CS2_MASK		0x00ff0001
+#define CONFIG_SYS_CS2_CTRL		0x0000fec0
+
+#define CONFIG_SYS_CS3_BASE		0x21000000
+#define CONFIG_SYS_CS3_MASK		0x00ff0001
+#define CONFIG_SYS_CS3_CTRL		0x0000fec0
+
+#define CONFIG_SYS_FLASH_BASE		0x00000000
+
+#ifdef	CONFIG_MONITOR_IS_IN_RAM
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_TEXT_BASE
+#else
+/* This is mainly used during relocation in start.S */
+#define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_FLASH_BASE + 0x400)
+#endif
+/* Reserve 256 kB for Monitor */
+#define CONFIG_SYS_MONITOR_LEN		(256 << 10)
+
+#define CONFIG_SYS_BOOTPARAMS_LEN	(64 * 1024)
+/* Reserve 128 kB for malloc() */
+#define CONFIG_SYS_MALLOC_LEN		(128 << 10)
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization ??
+ */
+#define CONFIG_SYS_BOOTMAPSZ		(CONFIG_SYS_SDRAM_BASE + \
+						(CONFIG_SYS_SDRAM_SIZE << 20))
+
+/* FLASH organization */
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+#define CONFIG_SYS_MAX_FLASH_SECT	259
+#define CONFIG_SYS_FLASH_ERASE_TOUT	1000
+
+#define CONFIG_SYS_FLASH_CFI		1
+#define CONFIG_FLASH_CFI_DRIVER		1
+#define CONFIG_SYS_FLASH_SIZE		0x2000000
+#define CONFIG_SYS_FLASH_PROTECTION	1
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
+#define CONFIG_SYS_FLASH_CFI_NONBLOCK	1
+
+#if ENABLE_JFFS
+/* JFFS Partition offset set */
+#define CONFIG_SYS_JFFS2_FIRST_BANK    0
+#define CONFIG_SYS_JFFS2_NUM_BANKS     1
+/* 512k reserved for u-boot */
+#define CONFIG_SYS_JFFS2_FIRST_SECTOR  0x40
+#endif
+
+/* Cache Configuration */
+#define CONFIG_SYS_CACHELINE_SIZE	16
+
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINVA)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_EC | CF_CACR_CINVA | \
+					 CF_CACR_DCM_P)
+
+#endif	/* _CONFIG_ASTRO_MCF5373L_H */
diff --git a/include/configs/bf533-stamp.h b/include/configs/bf533-stamp.h
index 083c030179..80c48847e4 100644
--- a/include/configs/bf533-stamp.h
+++ b/include/configs/bf533-stamp.h
@@ -126,11 +126,11 @@
  * it linked after the configuration sector.
  */
 # define LDS_BOARD_TEXT \
-	cpu/blackfin/traps.o		(.text .text.*); \
-	cpu/blackfin/interrupt.o	(.text .text.*); \
-	cpu/blackfin/serial.o		(.text .text.*); \
+	arch/blackfin/cpu/traps.o		(.text .text.*); \
+	arch/blackfin/cpu/interrupt.o	(.text .text.*); \
+	arch/blackfin/cpu/serial.o		(.text .text.*); \
 	common/dlmalloc.o		(.text .text.*); \
-	lib_generic/crc32.o		(.text .text.*); \
+	lib/crc32.o		(.text .text.*); \
 	. = DEFINED(env_offset) ? env_offset : .; \
 	common/env_embedded.o		(.text .text.*);
 #endif
diff --git a/include/configs/bf537-pnav.h b/include/configs/bf537-pnav.h
index 6627a04f59..cf40d06b88 100644
--- a/include/configs/bf537-pnav.h
+++ b/include/configs/bf537-pnav.h
@@ -112,11 +112,11 @@
  * it linked after the configuration sector.
  */
 # define LDS_BOARD_TEXT \
-	cpu/blackfin/traps.o		(.text .text.*); \
-	cpu/blackfin/interrupt.o	(.text .text.*); \
-	cpu/blackfin/serial.o		(.text .text.*); \
+	arch/blackfin/cpu/traps.o		(.text .text.*); \
+	arch/blackfin/cpu/interrupt.o	(.text .text.*); \
+	arch/blackfin/cpu/serial.o		(.text .text.*); \
 	common/dlmalloc.o		(.text .text.*); \
-	lib_generic/crc32.o		(.text .text.*); \
+	lib/crc32.o		(.text .text.*); \
 	. = DEFINED(env_offset) ? env_offset : .; \
 	common/env_embedded.o		(.text .text.*);
 #endif
diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h
index de2add7595..92ceb3815b 100644
--- a/include/configs/bf537-stamp.h
+++ b/include/configs/bf537-stamp.h
@@ -122,11 +122,11 @@
  * it linked after the configuration sector.
  */
 # define LDS_BOARD_TEXT \
-	cpu/blackfin/traps.o		(.text .text.*); \
-	cpu/blackfin/interrupt.o	(.text .text.*); \
-	cpu/blackfin/serial.o		(.text .text.*); \
+	arch/blackfin/cpu/traps.o		(.text .text.*); \
+	arch/blackfin/cpu/interrupt.o	(.text .text.*); \
+	arch/blackfin/cpu/serial.o		(.text .text.*); \
 	common/dlmalloc.o		(.text .text.*); \
-	lib_generic/crc32.o		(.text .text.*); \
+	lib/crc32.o		(.text .text.*); \
 	. = DEFINED(env_offset) ? env_offset : .; \
 	common/env_embedded.o		(.text .text.*);
 #endif
@@ -277,6 +277,15 @@
 #define FLASH_END_POST_BLOCK	71	/* Should < = 71 */
 #endif
 
+/* These are for board tests */
+#if 0
+#define CONFIG_BOOTCOMMAND       "bootldr 0x203f0100"
+#define CONFIG_AUTOBOOT_KEYED
+#define CONFIG_AUTOBOOT_PROMPT \
+	"autoboot in %d seconds: press space to stop\n", bootdelay
+#define CONFIG_AUTOBOOT_STOP_STR " "
+#endif
+
 
 /*
  * Pull in common ADI header for remaining command/environment setup
diff --git a/include/configs/bf538f-ezkit.h b/include/configs/bf538f-ezkit.h
index 4ea2300f4b..59e05650ec 100644
--- a/include/configs/bf538f-ezkit.h
+++ b/include/configs/bf538f-ezkit.h
@@ -119,11 +119,11 @@
  * it linked after the configuration sector.
  */
 # define LDS_BOARD_TEXT \
-	cpu/blackfin/traps.o		(.text .text.*); \
-	cpu/blackfin/interrupt.o	(.text .text.*); \
-	cpu/blackfin/serial.o		(.text .text.*); \
+	arch/blackfin/cpu/traps.o		(.text .text.*); \
+	arch/blackfin/cpu/interrupt.o	(.text .text.*); \
+	arch/blackfin/cpu/serial.o		(.text .text.*); \
 	common/dlmalloc.o		(.text .text.*); \
-	lib_generic/crc32.o		(.text .text.*); \
+	lib/crc32.o		(.text .text.*); \
 	. = DEFINED(env_offset) ? env_offset : .; \
 	common/env_embedded.o		(.text .text.*);
 #endif
diff --git a/include/configs/bf561-ezkit.h b/include/configs/bf561-ezkit.h
index 8ab38bbacb..1e3fdef64a 100644
--- a/include/configs/bf561-ezkit.h
+++ b/include/configs/bf561-ezkit.h
@@ -96,12 +96,12 @@
  * it linked after the configuration sector.
  */
 # define LDS_BOARD_TEXT \
-	cpu/blackfin/traps.o		(.text .text.*); \
-	cpu/blackfin/interrupt.o	(.text .text.*); \
-	cpu/blackfin/serial.o		(.text .text.*); \
+	arch/blackfin/cpu/traps.o		(.text .text.*); \
+	arch/blackfin/cpu/interrupt.o	(.text .text.*); \
+	arch/blackfin/cpu/serial.o		(.text .text.*); \
 	common/dlmalloc.o		(.text .text.*); \
-	lib_generic/crc32.o		(.text .text.*); \
-	lib_generic/zlib.o		(.text .text.*); \
+	lib/crc32.o		(.text .text.*); \
+	lib/zlib.o		(.text .text.*); \
 	board/bf561-ezkit/bf561-ezkit.o	(.text .text.*); \
 	. = DEFINED(env_offset) ? env_offset : .; \
 	common/env_embedded.o		(.text .text.*);
diff --git a/include/configs/cm-bf537e.h b/include/configs/cm-bf537e.h
index 0d68ebae2a..8d0bc1232f 100644
--- a/include/configs/cm-bf537e.h
+++ b/include/configs/cm-bf537e.h
@@ -104,11 +104,11 @@
  * it linked after the configuration sector.
  */
 # define LDS_BOARD_TEXT \
-	cpu/blackfin/traps.o		(.text .text.*); \
-	cpu/blackfin/interrupt.o	(.text .text.*); \
-	cpu/blackfin/serial.o		(.text .text.*); \
+	arch/blackfin/cpu/traps.o		(.text .text.*); \
+	arch/blackfin/cpu/interrupt.o	(.text .text.*); \
+	arch/blackfin/cpu/serial.o		(.text .text.*); \
 	common/dlmalloc.o		(.text .text.*); \
-	lib_generic/crc32.o		(.text .text.*); \
+	lib/crc32.o		(.text .text.*); \
 	. = DEFINED(env_offset) ? env_offset : .; \
 	common/env_embedded.o		(.text .text.*);
 #endif
diff --git a/include/configs/cm-bf537u.h b/include/configs/cm-bf537u.h
index c1179b0aee..bbea3ab009 100644
--- a/include/configs/cm-bf537u.h
+++ b/include/configs/cm-bf537u.h
@@ -105,11 +105,11 @@
  * it linked after the configuration sector.
  */
 # define LDS_BOARD_TEXT \
-	cpu/blackfin/traps.o		(.text .text.*); \
-	cpu/blackfin/interrupt.o	(.text .text.*); \
-	cpu/blackfin/serial.o		(.text .text.*); \
+	arch/blackfin/cpu/traps.o		(.text .text.*); \
+	arch/blackfin/cpu/interrupt.o	(.text .text.*); \
+	arch/blackfin/cpu/serial.o		(.text .text.*); \
 	common/dlmalloc.o		(.text .text.*); \
-	lib_generic/crc32.o		(.text .text.*); \
+	lib/crc32.o		(.text .text.*); \
 	. = DEFINED(env_offset) ? env_offset : .; \
 	common/env_embedded.o		(.text .text.*);
 #endif
diff --git a/include/configs/cm-bf561.h b/include/configs/cm-bf561.h
index 1741ed4932..c60401c8fe 100644
--- a/include/configs/cm-bf561.h
+++ b/include/configs/cm-bf561.h
@@ -63,14 +63,10 @@
  * Network Settings
  */
 #define ADI_CMDS_NETWORK	1
-/* The next 2 lines are for use with DEV-BF5xx */
 #define CONFIG_NET_MULTI
-#define CONFIG_SMC91111	1
-#define CONFIG_SMC91111_BASE	0x28000300
-/* The next 3 lines are for use with EXT-BF5xx-USB-ETH2 */
-/* #define CONFIG_DRIVER_SMC911X 1 */
-/* #define CONFIG_DRIVER_SMC911X_BASE 0x24080000 /! AMS1 */
-/* #define CONFIG_DRIVER_SMC911X_32_BIT 1 */
+#define CONFIG_SMC911X		1
+#define CONFIG_SMC911X_BASE	0x24008000 /* AMS1 */
+#define CONFIG_SMC911X_16_BIT
 #define CONFIG_HOSTNAME		cm-bf561
 /* Uncomment next line to use fixed MAC address */
 /* #define CONFIG_ETHADDR	02:80:ad:20:31:cf */
@@ -94,6 +90,7 @@
 #define CONFIG_ENV_OFFSET	0x20000
 #define CONFIG_ENV_SECT_SIZE	0x20000
 #define CONFIG_ENV_SIZE		0x10000
+#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
 
 
 /*
diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h
index 1c3ea23c77..330e3ac667 100644
--- a/include/configs/cobra5272.h
+++ b/include/configs/cobra5272.h
@@ -331,6 +331,19 @@ from which user programs will be started */
  */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV | CF_CACR_INVI)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CINV | \
+					 CF_CACR_DISD | CF_CACR_INVI | \
+					 CF_CACR_CEIB | CF_CACR_DCM | \
+					 CF_CACR_EUSP)
+
 /*-----------------------------------------------------------------------
  * Memory bank definitions
  *
diff --git a/include/configs/cpci5200.h b/include/configs/cpci5200.h
index 52df16af14..f7290d6eb4 100644
--- a/include/configs/cpci5200.h
+++ b/include/configs/cpci5200.h
@@ -59,7 +59,6 @@
 #define CONFIG_BAUDRATE		9600	/* ... at 115200 bps */
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
 
-#ifdef CONFIG_MPC5200		/* MPC5100 PCI is not supported yet. */
 /*
  * PCI Mapping:
  * 0x40000000 - 0x4fffffff - PCI Memory
@@ -90,8 +89,6 @@
 #define CONFIG_NS8382X		1
 #endif
 
-#endif
-
 /* Partitions */
 #define CONFIG_MAC_PARTITION
 #define CONFIG_DOS_PARTITION
@@ -169,8 +166,6 @@
 
 #define CONFIG_BOOTCOMMAND	"run flash_vxworks0"
 
-#if defined(CONFIG_MPC5200)
-
 #define CONFIG_RTC_M48T35A	1	/* ST Electronics M48 timekeeper */
 #define CONFIG_SYS_NVRAM_BASE_ADDR	0xfd010000
 #define CONFIG_SYS_NVRAM_SIZE		32*1024
@@ -179,7 +174,6 @@
  * IPB Bus clocking configuration.
  */
 #undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */
-#endif
 /*
  * I2C configuration
  */
@@ -303,13 +297,8 @@
 /*
  * Various low-level settings
  */
-#if defined(CONFIG_MPC5200)
 #define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
 #define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
 
 #define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
diff --git a/include/configs/csb272.h b/include/configs/csb272.h
index aed6f50f98..9ded330664 100644
--- a/include/configs/csb272.h
+++ b/include/configs/csb272.h
@@ -171,6 +171,7 @@
  *
  */
 #define CONFIG_HARD_I2C		1	/* I2C with hardware support	*/
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		100000	/* I2C speed			*/
 #define CONFIG_SYS_I2C_SLAVE		0x7F	/* I2C slave address		*/
 
diff --git a/include/configs/csb472.h b/include/configs/csb472.h
index 24b961f3e1..71eb083e33 100644
--- a/include/configs/csb472.h
+++ b/include/configs/csb472.h
@@ -170,6 +170,7 @@
  *
  */
 #define CONFIG_HARD_I2C		1	/* I2C with hardware support	*/
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		100000	/* I2C speed			*/
 #define CONFIG_SYS_I2C_SLAVE		0x7F	/* I2C slave address		*/
 
diff --git a/include/configs/galaxy5200.h b/include/configs/galaxy5200.h
index 4be28b26a6..44669ea44d 100644
--- a/include/configs/galaxy5200.h
+++ b/include/configs/galaxy5200.h
@@ -141,7 +141,7 @@
 
 #define CONFIG_SYS_FLASH_BASE		0xfe000000
 /*
- * The flash size is autoconfigured, but cpu/mpc5xxx/cpu_init.c needs this
+ * The flash size is autoconfigured, but arch/ppc/cpu/mpc5xxx/cpu_init.c needs this
  * variable defined
  */
 #define CONFIG_SYS_FLASH_SIZE		0x02000000
diff --git a/include/configs/hmi1001.h b/include/configs/hmi1001.h
index a81527ebed..f9cdcbc3ce 100644
--- a/include/configs/hmi1001.h
+++ b/include/configs/hmi1001.h
@@ -261,13 +261,8 @@
 /*
  * Various low-level settings
  */
-#if defined(CONFIG_MPC5200)
 #define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
 #define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
 
 #define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
diff --git a/include/configs/ibf-dsp561.h b/include/configs/ibf-dsp561.h
index 7c9f71e888..2eef5efa78 100644
--- a/include/configs/ibf-dsp561.h
+++ b/include/configs/ibf-dsp561.h
@@ -84,12 +84,12 @@
  * it linked after the configuration sector.
  */
 # define LDS_BOARD_TEXT \
-	cpu/blackfin/traps.o		(.text .text.*); \
-	cpu/blackfin/interrupt.o	(.text .text.*); \
-	cpu/blackfin/serial.o		(.text .text.*); \
+	arch/blackfin/cpu/traps.o		(.text .text.*); \
+	arch/blackfin/cpu/interrupt.o	(.text .text.*); \
+	arch/blackfin/cpu/serial.o		(.text .text.*); \
 	common/dlmalloc.o		(.text .text.*); \
-	lib_generic/crc32.o		(.text .text.*); \
-	lib_generic/zlib.o		(.text .text.*); \
+	lib/crc32.o		(.text .text.*); \
+	lib/zlib.o		(.text .text.*); \
 	board/ibf-dsp561/ibf-dsp561.o	(.text .text.*); \
 	. = DEFINED(env_offset) ? env_offset : .; \
 	common/env_embedded.o		(.text .text.*);
diff --git a/include/configs/idmr.h b/include/configs/idmr.h
index 841affb7cc..61e3bad4f3 100644
--- a/include/configs/idmr.h
+++ b/include/configs/idmr.h
@@ -224,6 +224,19 @@
 /* Cache Configuration */
 #define CONFIG_SYS_CACHELINE_SIZE	16
 
+#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV | CF_CACR_INVI)
+#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+					 CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CINV | \
+					 CF_CACR_DISD | CF_CACR_INVI | \
+					 CF_CACR_CEIB | CF_CACR_DCM | \
+					 CF_CACR_EUSP)
+
 /* Port configuration */
 #define CONFIG_SYS_FECI2C		0xF0
 
diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h
new file mode 100644
index 0000000000..1da860261a
--- /dev/null
+++ b/include/configs/imx27lite-common.h
@@ -0,0 +1,237 @@
+/*
+ * Copyright (C) 2010 Heiko Schocher <hs@denx.de>
+ *
+ * based on:
+ * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __IMX27LITE_COMMON_CONFIG_H
+#define __IMX27LITE_COMMON_CONFIG_H
+
+/*
+ * SoC Configuration
+ */
+#define CONFIG_ARM926EJS			/* arm926ejs CPU core */
+#define CONFIG_MX27
+#define CONFIG_MX27_CLK32	32768		/* OSC32K frequency */
+#define CONFIG_SYS_HZ		1000
+
+#define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_DISPLAY_CPUINFO
+
+#define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS	1
+#define CONFIG_INITRD_TAG		1
+
+/*
+ * Lowlevel configuration
+ */
+#define SDRAM_ESDCFG_REGISTER_VAL(cas)	\
+		(ESDCFG_TRC(10) |	\
+		ESDCFG_TRCD(3) |	\
+		ESDCFG_TCAS(cas) |	\
+		ESDCFG_TRRD(1) |	\
+		ESDCFG_TRAS(5) |	\
+		ESDCFG_TWR |		\
+		ESDCFG_TMRD(2) |	\
+		ESDCFG_TRP(2) |		\
+		ESDCFG_TXP(3))
+
+#define SDRAM_ESDCTL_REGISTER_VAL	\
+		(ESDCTL_PRCT(0) |	\
+		 ESDCTL_BL |		\
+		 ESDCTL_PWDT(0) |	\
+		 ESDCTL_SREFR(3) |	\
+		 ESDCTL_DSIZ_32 |	\
+		 ESDCTL_COL10 |		\
+		 ESDCTL_ROW13 |		\
+		 ESDCTL_SDE)
+
+#define SDRAM_ALL_VAL		0xf00
+
+#define SDRAM_MODE_REGISTER_VAL	0x33	/* BL: 8, CAS: 3 */
+#define SDRAM_EXT_MODE_REGISTER_VAL	0x1000000
+
+#define MPCTL0_VAL	0x1ef15d5
+
+#define SPCTL0_VAL	0x043a1c09
+
+#define CSCR_VAL	0x33f08107
+
+#define PCDR0_VAL	0x120470c3
+#define PCDR1_VAL	0x03030303
+#define PCCR0_VAL	0xffffffff
+#define PCCR1_VAL	0xfffffffc
+
+#define AIPI1_PSR0_VAL	0x20040304
+#define AIPI1_PSR1_VAL	0xdffbfcfb
+#define AIPI2_PSR0_VAL	0x07ffc200
+#define AIPI2_PSR1_VAL	0xffffffff
+
+/*
+ * Memory Info
+ */
+/* malloc() len */
+#define CONFIG_SYS_MALLOC_LEN		(0x10000 + 512 * 1024)
+/* reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_SIZE	128
+/* memtest start address */
+#define CONFIG_SYS_MEMTEST_START	0xA0000000
+#define CONFIG_SYS_MEMTEST_END		0xA1000000	/* 16MB RAM test */
+#define CONFIG_NR_DRAM_BANKS	1		/* we have 1 bank of DRAM */
+#define CONFIG_STACKSIZE	(256 * 1024)	/* regular stack */
+#define PHYS_SDRAM_1		0xA0000000	/* DDR Start */
+#define PHYS_SDRAM_1_SIZE	0x08000000	/* DDR size 128MB */
+
+/*
+ * Serial Driver info
+ */
+#define CONFIG_MXC_UART
+#define CONFIG_SYS_MX27_UART1
+#define CONFIG_CONS_INDEX	1		/* use UART0 for console */
+#define CONFIG_BAUDRATE		115200		/* Default baud rate */
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Flash & Environment
+ */
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI
+/* Use buffered writes (~10x faster) */
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
+/* Use hardware sector protection */
+#define CONFIG_SYS_FLASH_PROTECTION		1
+#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of flash banks */
+/* CS2 Base address */
+#define PHYS_FLASH_1			0xc0000000
+/* Flash Base for U-Boot */
+#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
+#define CONFIG_SYS_MAX_FLASH_SECT	(PHYS_FLASH_SIZE / \
+		CONFIG_SYS_FLASH_SECT_SZ)
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_MONITOR_LEN		0x40000		/* Reserve 256KiB */
+#define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
+/* Address and size of Redundant Environment Sector	*/
+#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+#define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
+
+/*
+ * Ethernet
+ */
+#define CONFIG_FEC_MXC
+#define CONFIG_FEC_MXC_PHYADDR		0x1f
+#define CONFIG_MII
+#define CONFIG_NET_MULTI
+
+/*
+ * MTD
+ */
+#define CONFIG_FLASH_CFI_MTD
+#define CONFIG_MTD_DEVICE
+
+/*
+ * NAND
+ */
+#define CONFIG_NAND_MXC
+#define CONFIG_MXC_NAND_REGS_BASE	0xd8000000
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_BASE		0xd8000000
+#define CONFIG_JFFS2_NAND
+#define CONFIG_MXC_NAND_HWECC
+#define CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */
+
+/*
+ * SD/MMC
+ */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MXC_MMC
+#define CONFIG_DOS_PARTITION
+
+/*
+ * MTD partitions
+ */
+#define CONFIG_CMD_MTDPARTS
+
+/*
+ * U-Boot general configuration
+ */
+#define CONFIG_SYS_PROMPT	"=> "	/* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size  */
+/* Print buffer sz */
+#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + \
+		sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS	16	/* max number of command args */
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
+
+/*
+ * U-Boot commands
+ */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_PING
+
+#define CONFIG_BOOTDELAY	5
+
+#define CONFIG_LOADADDR		0xa0800000	/* loadaddr env var */
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
+
+#define xstr(s)	str(s)
+#define str(s)	#s
+
+#define	CONFIG_EXTRA_ENV_SETTINGS					\
+	"netdev=eth0\0"							\
+	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
+		"nfsroot=${serverip}:${rootpath}\0"			\
+	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
+	"addip=setenv bootargs ${bootargs} "				\
+		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
+		":${hostname}:${netdev}:off panic=1\0"			\
+	"addtty=setenv bootargs ${bootargs}"				\
+		" console=ttymxc0,${baudrate}\0"			\
+	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
+	"addmisc=setenv bootargs ${bootargs}\0"				\
+	"u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0"			\
+	"kernel_addr_r=a0800000\0"					\
+	"bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0"			\
+	"rootpath=/opt/eldk-4.2-arm/arm\0"				\
+	"net_nfs=tftp ${kernel_addr_r} ${bootfile};"			\
+		"run nfsargs addip addtty addmtd addmisc;"		\
+		"bootm\0"						\
+	"bootcmd=run net_nfs\0"					\
+	"load=tftp ${loadaddr} ${u-boot}\0"				\
+	"update=protect off " xstr(CONFIG_SYS_MONITOR_BASE)		\
+		" +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE)	\
+		" +${filesize};cp.b ${fileaddr} "			\
+		xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0"		\
+	"upd=run load update\0"						\
+	"mtdids=" MTDIDS_DEFAULT "\0"					\
+	"mtdparts=" MTDPARTS_DEFAULT "\0"				\
+
+#endif /* __IMX27LITE_COMMON_CONFIG_H */
diff --git a/include/configs/imx27lite.h b/include/configs/imx27lite.h
index ee749ecd2f..72f6e80ede 100644
--- a/include/configs/imx27lite.h
+++ b/include/configs/imx27lite.h
@@ -20,158 +20,31 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+/* include common defines/options for all imx27lite related boards */
+#include "imx27lite-common.h"
 /*
  * SoC Configuration
  */
-#define CONFIG_ARM926EJS			/* arm926ejs CPU core */
-#define CONFIG_MX27
 #define CONFIG_IMX27LITE
-#define CONFIG_MX27_CLK32	32768		/* OSC32K frequency */
-#define CONFIG_SYS_HZ		1000
-
-#define CONFIG_DISPLAY_CPUINFO
-
-#define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS	1
-#define CONFIG_INITRD_TAG		1
-
-/*
- * Lowlevel configuration
- */
-#define SDRAM_ESDCFG_REGISTER_VAL(cas)	\
-		(ESDCFG_TRC(10) |	\
-		ESDCFG_TRCD(3) |	\
-		ESDCFG_TCAS(cas) |	\
-		ESDCFG_TRRD(1) |	\
-		ESDCFG_TRAS(5) |	\
-		ESDCFG_TWR |		\
-		ESDCFG_TMRD(2) |	\
-		ESDCFG_TRP(2) |		\
-		ESDCFG_TXP(3))
-
-#define SDRAM_ESDCTL_REGISTER_VAL	\
-		(ESDCTL_PRCT(0) |	\
-		 ESDCTL_BL |		\
-		 ESDCTL_PWDT(0) |	\
-		 ESDCTL_SREFR(3) |	\
-		 ESDCTL_DSIZ_32 |	\
-		 ESDCTL_COL10 |		\
-		 ESDCTL_ROW13 |		\
-		 ESDCTL_SDE)
-
-#define SDRAM_ALL_VAL		0xf00
-
-#define SDRAM_MODE_REGISTER_VAL	0x33	/* BL: 8, CAS: 3 */
-#define SDRAM_EXT_MODE_REGISTER_VAL	0x1000000
-
-#define MPCTL0_VAL	0x1ef15d5
-
-#define SPCTL0_VAL	0x043a1c09
-
-#define CSCR_VAL	0x33f08107
-
-#define PCDR0_VAL	0x120470c3
-#define PCDR1_VAL	0x03030303
-#define PCCR0_VAL	0xffffffff
-#define PCCR1_VAL	0xfffffffc
-
-#define AIPI1_PSR0_VAL	0x20040304
-#define AIPI1_PSR1_VAL	0xdffbfcfb
-#define AIPI2_PSR0_VAL	0x07ffc200
-#define AIPI2_PSR1_VAL	0xffffffff
-
-/*
- * Memory Info
- */
-/* malloc() len */
-#define CONFIG_SYS_MALLOC_LEN		(0x10000 + 512 * 1024)
-/* reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_SIZE	128
-/* memtest start address */
-#define CONFIG_SYS_MEMTEST_START	0xA0000000
-#define CONFIG_SYS_MEMTEST_END		0xA1000000	/* 16MB RAM test */
-#define CONFIG_NR_DRAM_BANKS	1		/* we have 1 bank of DRAM */
-#define CONFIG_STACKSIZE	(256 * 1024)	/* regular stack */
-#define PHYS_SDRAM_1		0xA0000000	/* DDR Start */
-#define PHYS_SDRAM_1_SIZE	0x08000000	/* DDR size 128MB */
-
-/*
- * Serial Driver info
- */
-#define CONFIG_MXC_UART
-#define CONFIG_SYS_MX27_UART1
-#define CONFIG_CONS_INDEX	1		/* use UART0 for console */
-#define CONFIG_BAUDRATE		115200		/* Default baud rate */
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+#define CONFIG_HOSTNAME		imx27
+#define CONFIG_BOARDNAME	"LogicPD imx27lite\n"
 
 /*
  * Flash & Environment
  */
-#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI
-/* Use buffered writes (~10x faster) */
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
-/* Use hardware sector protection */
-#define CONFIG_SYS_FLASH_PROTECTION		1
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of flash banks */
 #define CONFIG_SYS_FLASH_SECT_SZ	0x2000	/* 8KB sect size Intel Flash */
-/* end of flash */
 #define CONFIG_ENV_OFFSET		(PHYS_FLASH_SIZE - 0x20000)
-/* CS2 Base address */
-#define PHYS_FLASH_1			0xc0000000
-/* Flash Base for U-Boot */
-#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
-/* Flash size 2MB */
 #define PHYS_FLASH_SIZE			0x200000
-#define CONFIG_SYS_MAX_FLASH_SECT	(PHYS_FLASH_SIZE / \
-		CONFIG_SYS_FLASH_SECT_SZ)
-#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_MONITOR_LEN		0x40000		/* Reserve 256KiB */
 #define CONFIG_ENV_SECT_SIZE		0x10000		/* Env sector Size */
-#define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
-/* Address and size of Redundant Environment Sector	*/
-#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
-#define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
-
-/*
- * Ethernet
- */
-#define CONFIG_FEC_MXC
-#define CONFIG_FEC_MXC_PHYADDR		0x1f
-#define CONFIG_MII
-#define CONFIG_NET_MULTI
-
-/*
- * MTD
- */
-#define CONFIG_FLASH_CFI_MTD
-#define CONFIG_MTD_DEVICE
-
-/*
- * NAND
- */
-#define CONFIG_NAND_MXC
-#define CONFIG_MXC_NAND_REGS_BASE	0xd8000000
-#define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_BASE		0xd8000000
-#define CONFIG_JFFS2_NAND
-#define CONFIG_MXC_NAND_HWECC
-#define CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */
 
 /*
  * SD/MMC
  */
-#define CONFIG_MMC
-#define CONFIG_GENERIC_MMC
-#define CONFIG_MXC_MMC
 #define CONFIG_MXC_MCI_REGS_BASE	0x10014000
-#define CONFIG_DOS_PARTITION
 
 /*
  * MTD partitions
  */
-#define CONFIG_CMD_MTDPARTS
 #define MTDIDS_DEFAULT		"nor0=physmap-flash.0,nand0=mxc_nand.0"
 #define MTDPARTS_DEFAULT			\
 	"mtdparts="				\
@@ -186,69 +59,4 @@
 			"22m(rootfs),"		\
 			"-(userfs)"
 
-/*
- * U-Boot general configuration
- */
-#define CONFIG_BOOTFILE		"uImage"	/* Boot file name */
-#define CONFIG_SYS_PROMPT	"=> "	/* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size  */
-/* Print buffer sz */
-#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + \
-		sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS	16	/* max number of command args */
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SYS_LONGHELP
-
-/*
- * U-Boot commands
- */
-#include <config_cmd_default.h>
-#define CONFIG_CMD_ASKENV
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DIAG
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_JFFS2
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_MMC
-#define CONFIG_CMD_NAND
-#define CONFIG_CMD_PING
-
-#define CONFIG_BOOTDELAY	5
-
-#define CONFIG_LOADADDR		0xa0800000	/* loadaddr env var */
-#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
-
-#define xstr(s)	str(s)
-#define str(s)	#s
-
-#define	CONFIG_EXTRA_ENV_SETTINGS					\
-	"netdev=eth0\0"							\
-	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
-		"nfsroot=${serverip}:${rootpath}\0"			\
-	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
-	"addip=setenv bootargs ${bootargs} "				\
-		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
-		":${hostname}:${netdev}:off panic=1\0"			\
-	"addtty=setenv bootargs ${bootargs}"				\
-		" console=ttymxc0,${baudrate}\0"			\
-	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
-	"addmisc=setenv bootargs ${bootargs}\0"				\
-	"u-boot=imx27/u-boot.bin\0"					\
-	"kernel_addr_r=a0800000\0"					\
-	"hostname=imx27\0"						\
-	"bootfile=imx27/uImage\0"					\
-	"rootpath=/opt/eldk-4.2-arm/arm\0"				\
-	"net_nfs=tftp ${kernel_addr_r} ${bootfile};"			\
-		"run nfsargs addip addtty addmtd addmisc;"		\
-		"bootm\0"						\
-	"bootcmd=run net_nfs\0"					\
-	"load=tftp ${loadaddr} ${u-boot}\0"				\
-	"update=protect off " xstr(CONFIG_SYS_MONITOR_BASE)		\
-		" +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE)	\
-		" +${filesize};cp.b ${fileaddr} "			\
-		xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0"		\
-	"upd=run load update\0"						\
-
 #endif /* __CONFIG_H */
diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h
index 14f7826705..c5b1565e34 100644
--- a/include/configs/inka4x0.h
+++ b/include/configs/inka4x0.h
@@ -366,13 +366,8 @@ static inline void tws_data_config_output(unsigned output)
 /*
  * Various low-level settings
  */
-#if defined(CONFIG_MPC5200)
 #define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
 #define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
 
 #define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
diff --git a/include/configs/ip04.h b/include/configs/ip04.h
new file mode 100644
index 0000000000..425a745408
--- /dev/null
+++ b/include/configs/ip04.h
@@ -0,0 +1,157 @@
+/*
+ * U-boot - Configuration file for IP04 board (having BF532 processor)
+ *
+ * Copyright (c) 2006 Intratrade Ltd., Ivan Danov, idanov@gmail.com
+ *
+ * Copyright (c) 2005-2010 Analog Devices Inc.
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef __CONFIG_IP04_H__
+#define __CONFIG_IP04_H__
+
+#include <asm/config-pre.h>
+
+
+/*
+ * Processor Settings
+ */
+#define CONFIG_BFIN_CPU             bf532-0.5
+#define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_NAND
+
+
+/*
+ * Clock Settings
+ *	CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
+ *	SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
+ */
+/* CONFIG_CLKIN_HZ is any value in Hz					*/
+#define CONFIG_CLKIN_HZ			10000000
+/* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN		*/
+/*                                                1 = CLKIN / 2		*/
+#define CONFIG_CLKIN_HALF		0
+/* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass	*/
+/*                                                1 = bypass PLL	*/
+#define CONFIG_PLL_BYPASS		0
+/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL		*/
+/* Values can range from 0-63 (where 0 means 64)			*/
+#define CONFIG_VCO_MULT			40
+/* CCLK_DIV controls the core clock divider				*/
+/* Values can be 1, 2, 4, or 8 ONLY					*/
+#define CONFIG_CCLK_DIV			1
+/* SCLK_DIV controls the system clock divider				*/
+/* Values can range from 1-15						*/
+#define CONFIG_SCLK_DIV			3
+
+
+/*
+ * Memory Settings
+ */
+#define CONFIG_MEM_ADD_WDTH	10
+#define CONFIG_MEM_SIZE		64
+
+#define CONFIG_EBIU_SDRRC_VAL	0x408
+#define CONFIG_EBIU_SDGCTL_VAL	0x9111cd
+
+#define CONFIG_EBIU_AMGCTL_VAL	0xFF
+#define CONFIG_EBIU_AMBCTL0_VAL	0xffc2ffc2
+#define CONFIG_EBIU_AMBCTL1_VAL	0xffc2ffc2
+
+#define CONFIG_SYS_MONITOR_LEN		(256 * 1024)
+#define CONFIG_SYS_MALLOC_LEN		(128 * 1024)
+
+
+/*
+ * Network Settings
+ */
+#define ADI_CMDS_NETWORK	1
+#define CONFIG_NET_MULTI	1
+#define CONFIG_HOSTNAME		IP04
+
+#define CONFIG_DRIVER_DM9000	1
+#define CONFIG_DM9000_NO_SROM
+#define CONFIG_DM9000_BASE	0x20100000
+#define DM9000_IO		CONFIG_DM9000_BASE
+#define DM9000_DATA		(CONFIG_DM9000_BASE + 2)
+
+
+/*
+ * Flash Settings
+ */
+#define CONFIG_ENV_OVERWRITE	1
+#define CONFIG_SYS_NO_FLASH		/* we have only NAND */
+
+
+/*
+ * SPI Settings
+ */
+#define CONFIG_BFIN_SPI
+#define CONFIG_ENV_SPI_MAX_HZ	30000000
+#define CONFIG_SF_DEFAULT_SPEED	30000000
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SPI_FLASH_WINBOND
+
+
+/*
+ * Env Storage Settings
+ */
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_PREBOOT		"echo starting from spi flash"
+#define CONFIG_ENV_OFFSET	0x30000
+#define CONFIG_ENV_SIZE		0x10000
+#define CONFIG_ENV_SECT_SIZE	0x10000
+
+
+/*
+ * NAND Settings
+ */
+#define CONFIG_NAND_PLAT
+#define CONFIG_SYS_NAND_BASE		0x20000000
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+
+#define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2))
+#define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 1))
+#define BFIN_NAND_READY     PF10
+#define BFIN_NAND_WRITE(addr, cmd) \
+	do { \
+		bfin_write8(addr, cmd); \
+		SSYNC(); \
+	} while (0)
+
+#define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd)
+#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
+#define NAND_PLAT_DEV_READY(chip)      (bfin_read_FIO_FLAG_D() & BFIN_NAND_READY)
+#define NAND_PLAT_INIT() \
+	do { \
+		bfin_write_FIO_DIR(bfin_read_FIO_DIR() & ~BFIN_NAND_READY); \
+		bfin_write_FIO_INEN(bfin_read_FIO_INEN() | BFIN_NAND_READY); \
+		bfin_write_FIO_EDGE(bfin_read_FIO_EDGE() & ~BFIN_NAND_READY); \
+		bfin_write_FIO_POLAR(bfin_read_FIO_POLAR() & ~BFIN_NAND_READY); \
+	} while (0)
+
+
+/*
+ * Misc Settings
+ */
+#define CONFIG_BAUDRATE		115200
+#define CONFIG_MISC_INIT_R	/* needed for MAC address */
+#define CONFIG_UART_CONSOLE	0
+
+#undef CONFIG_SHOW_BOOT_PROGRESS
+/* Enable this if bootretry required; currently it's disabled */
+#define CONFIG_BOOT_RETRY_TIME	-1
+#define CONFIG_BOOTCOMMAND	"run nandboot"
+#define CONFIG_AUTOBOOT_PROMPT	"autoboot in %d seconds\n"
+
+
+/*
+ * Pull in common ADI header for remaining command/environment setup
+ */
+#include <configs/bfin_adi_common.h>
+
+#endif
diff --git a/include/configs/ipek01.h b/include/configs/ipek01.h
index d0cb1e1d60..6903b36146 100644
--- a/include/configs/ipek01.h
+++ b/include/configs/ipek01.h
@@ -324,13 +324,8 @@
 /*
  * Various low-level settings
  */
-#if defined(CONFIG_MPC5200)
 #define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
 #define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
 
 #define CONFIG_SYS_BOOTCS_START		CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
diff --git a/include/configs/katmai.h b/include/configs/katmai.h
index c013ac4b3c..fb8ccae71b 100644
--- a/include/configs/katmai.h
+++ b/include/configs/katmai.h
@@ -37,6 +37,7 @@
 #define CONFIG_4xx			1	/* ... PPC4xx family	*/
 #define CONFIG_440			1	/* ... PPC440 family	*/
 #define CONFIG_440SPE			1	/* Specifc SPe support	*/
+#define CONFIG_440SPE_REVA		1	/* Support old Rev A.	*/
 #define CONFIG_SYS_CLK_FREQ	33333333	/* external freq to pll	*/
 #define CONFIG_SYS_4xx_RESET_TYPE	0x2	/* use chip reset on this board	*/
 
diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h
index a79feec16d..e5537da4af 100644
--- a/include/configs/kilauea.h
+++ b/include/configs/kilauea.h
@@ -230,7 +230,7 @@
  *       SDRAM Controller DDR autocalibration values and takes a lot longer
  *       to run than Method_B.
  * (See the Method_A and Method_B algorithm discription in the file:
- *	cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c)
+ *	arch/ppc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c)
  * Define CONFIG_PPC4xx_DDR_METHOD_A to use DDR autocalibration Method_A
  *
  * DDR Autocalibration Method_B is the default.
diff --git a/include/configs/korat.h b/include/configs/korat.h
index 026dd0854a..f95df684ea 100644
--- a/include/configs/korat.h
+++ b/include/configs/korat.h
@@ -153,6 +153,7 @@
  */
 #define CONFIG_HARD_I2C		1	/* I2C with hardware support	*/
 #undef	CONFIG_SOFT_I2C			/* I2C bit-banged		*/
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address	*/
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/linkstation.h b/include/configs/linkstation.h
index 16b464cf6d..3958d09eb9 100644
--- a/include/configs/linkstation.h
+++ b/include/configs/linkstation.h
@@ -290,7 +290,7 @@
  * taken from the orignal Linkstation boot code
  *
  * Most of the low level configuration setttings are normally used
- * in cpu/mpc824x/cpu_init.c which is NOT used by this implementation.
+ * in arch/ppc/cpu/mpc824x/cpu_init.c which is NOT used by this implementation.
  * Low level initialisation is done in board/linkstation/early_init.S
  * The values below are included for reference purpose only
  */
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index 011dd5c81a..6461124e56 100644
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -258,6 +258,7 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_HARD_I2C		1		/* I2C with hardware support	*/
 #undef	CONFIG_SOFT_I2C				/* I2C bit-banged		*/
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		100000		/* I2C speed and slave address	*/
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/magnesium.h b/include/configs/magnesium.h
new file mode 100644
index 0000000000..4fb7744bae
--- /dev/null
+++ b/include/configs/magnesium.h
@@ -0,0 +1,71 @@
+/*
+ * Copyright (C) 2010 Heiko Schocher <hs@denx.de>
+ *
+ * based on:
+ * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* include common defines/options for all imx27lite related boards */
+#include "imx27lite-common.h"
+
+/*
+ * SoC Configuration
+ */
+#define CONFIG_MAGNESIUM
+#define CONFIG_HOSTNAME		magnesium
+#define CONFIG_BOARDNAME	"Projectiondesign magnesium\n"
+
+/*
+ * Flash & Environment
+ */
+#define CONFIG_SYS_FLASH_SECT_SZ	0x8000	/* 64KB sect size */
+#define CONFIG_ENV_OFFSET		(PHYS_FLASH_SIZE - 0x40000)
+#define PHYS_FLASH_SIZE			0x800000
+#define CONFIG_ENV_SECT_SIZE		0x20000		/* Env sector Size */
+
+/*
+ * NAND
+ */
+#define CONFIG_SYS_NAND_LARGEPAGE
+
+/*
+ * SD/MMC
+ */
+#define CONFIG_MXC_MCI_REGS_BASE	0x10013000
+
+/*
+ * MTD partitions
+ */
+#define MTDIDS_DEFAULT		"nor0=physmap-flash.0,nand0=mxc_nand.0"
+#define MTDPARTS_DEFAULT			\
+	"mtdparts="				\
+		"physmap-flash.0:"		\
+			"256k(U-Boot),"		\
+			"7680k(user),"		\
+			"128k(env1),"		\
+			"128k(env2);"		\
+		"mxc_nand.0:"			\
+			"128k(IPL-SPL),"	\
+			"4m(kernel),"		\
+			"22m(rootfs),"		\
+			"-(userfs)"
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/manroland/mpc5200-common.h b/include/configs/manroland/mpc5200-common.h
index b29ef9b655..d25e093ac6 100644
--- a/include/configs/manroland/mpc5200-common.h
+++ b/include/configs/manroland/mpc5200-common.h
@@ -170,13 +170,8 @@
 /*
  * Various low-level settings
  */
-#if defined(CONFIG_MPC5200)
 #define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
 #define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
 
 #define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
diff --git a/include/configs/mecp5200.h b/include/configs/mecp5200.h
index 4a93b58885..73405eabb9 100644
--- a/include/configs/mecp5200.h
+++ b/include/configs/mecp5200.h
@@ -63,9 +63,6 @@
 #endif
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
 
-
-#ifdef CONFIG_MPC5200	/* MPC5100 PCI is not supported yet. */
-
 #define CONFIG_MII
 #if 0 /* test-only !!! */
 #define CONFIG_NET_MULTI	1
@@ -74,10 +71,6 @@
 #define CONFIG_NS8382X		1
 #endif
 
-#else	/* MPC5100 */
-
-#endif
-
 /* Partitions */
 #define CONFIG_MAC_PARTITION
 #define CONFIG_DOS_PARTITION
@@ -152,12 +145,10 @@
 
 #define CONFIG_BOOTCOMMAND	"run flash_vxworks0"
 
-#if defined(CONFIG_MPC5200)
 /*
  * IPB Bus clocking configuration.
  */
 #undef CONFIG_SYS_IPBSPEED_133			/* define for 133MHz speed */
-#endif
 /*
  * I2C configuration
  */
@@ -288,13 +279,8 @@
 /*
  * Various low-level settings
  */
-#if defined(CONFIG_MPC5200)
 #define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
 #define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
 
 #define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
diff --git a/include/configs/meesc.h b/include/configs/meesc.h
index d002b97510..e085f4a47c 100644
--- a/include/configs/meesc.h
+++ b/include/configs/meesc.h
@@ -82,7 +82,6 @@
  */
 #include <config_cmd_default.h>
 #undef CONFIG_CMD_BDI
-#undef CONFIG_CMD_AUTOSCRIPT
 #undef CONFIG_CMD_FPGA
 #undef CONFIG_CMD_LOADS
 #undef CONFIG_CMD_IMLS
diff --git a/include/configs/ml300.h b/include/configs/ml300.h
deleted file mode 100644
index 68d0c85e1a..0000000000
--- a/include/configs/ml300.h
+++ /dev/null
@@ -1,181 +0,0 @@
-/*
- * ML300.h: ML300 specific config options
- *
- * http://www.xilinx.com/ml300
- *
- * Derived from : ML2.h
- *
- *     Author: Xilinx, Inc.
- *
- *
- *     This program is free software; you can redistribute it and/or modify it
- *     under the terms of the GNU General Public License as published by the
- *     Free Software Foundation; either version 2 of the License, or (at your
- *     option) any later version.
- *
- *
- *     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
- *     COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
- *     ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
- *     XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
- *     FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR
- *     OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
- *     XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
- *     THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
- *     WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
- *     CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
- *     FITNESS FOR A PARTICULAR PURPOSE.
- *
- *
- *     Xilinx products are not intended for use in life support appliances,
- *     devices, or systems. Use in such applications is expressly prohibited.
- *
- *
- *     (c) Copyright 2002 Xilinx Inc.
- *     All rights reserved.
- *
- *
- *     You should have received a copy of the GNU General Public License along
- *     with this program; if not, write to the Free Software Foundation, Inc.,
- *     675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/* #define DEBUG */
-/* #define ET_DEBUG 1 */
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_405		1	/* This is a PPC405 CPU		*/
-#define CONFIG_4xx		1	/* ...member of PPC4xx family	*/
-#define CONFIG_XILINX_405	1
-#define CONFIG_XILINX_ML300	1	/* ...on a Xilinx ML300 board	*/
-
-#define CONFIG_SYSTEMACE	1
-#define CONFIG_DOS_PARTITION	1
-#define CONFIG_SYS_SYSTEMACE_BASE	XPAR_OPB_SYSACE_0_BASEADDR
-#define CONFIG_SYS_SYSTEMACE_WIDTH	XPAR_XSYSACE_MEM_WIDTH
-
-#define CONFIG_ENV_IS_IN_EEPROM	1	/* environment is in EEPROM */
-
-/* following are used only if env is in EEPROM */
-#ifdef	CONFIG_ENV_IS_IN_EEPROM
-#define CONFIG_SYS_I2C_EEPROM_ADDR	XPAR_PERSISTENT_0_IIC_0_EEPROMADDR
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_ENV_OFFSET		XPAR_PERSISTENT_0_IIC_0_BASEADDR
-#define CONFIG_MISC_INIT_R	1	/* used to call out convert_env() */
-#define CONFIG_ENV_OVERWRITE	1	/* allow users to update ethaddr and serial# */
-#endif
-
-#include "../board/xilinx/ml300/xparameters.h"
-
-#define CONFIG_SYS_NO_FLASH		1	/* no flash */
-#define CONFIG_ENV_SIZE		XPAR_PERSISTENT_0_IIC_0_HIGHADDR - XPAR_PERSISTENT_0_IIC_0_BASEADDR + 1
-#define CONFIG_BAUDRATE		9600
-#define CONFIG_BOOTDELAY	3	/* autoboot after 3 seconds	*/
-
-#define CONFIG_BOOTCOMMAND	"bootp" /* autoboot command	*/
-
-#define CONFIG_BOOTARGS		"console=ttyS0,9600 ip=off " \
-				"root=/dev/xsysace/disc0/part3 rw"
-
-#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
-#define CONFIG_SYS_LOADS_BAUD_CHANGE	1	/* allow baudrate change	*/
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_NET
-
-#undef CONFIG_CMD_FLASH
-#undef CONFIG_CMD_LOADS
-#undef CONFIG_CMD_FAT
-#undef CONFIG_CMD_IMLS
-
-
-/* #define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ */
-/* 300000000 */
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP		/* undef to save memory		*/
-#define CONFIG_SYS_PROMPT	"=> "	/* Monitor Command Prompt	*/
-
-#define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size	*/
-
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS	16	/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-#define CONFIG_SYS_MEMTEST_START	0x0400000	/* memtest works on	*/
-#define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
-
-#define CONFIG_SYS_DUART_CHAN		0
-#define CONFIG_SYS_NS16550_REG_SIZE -4
-#define CONFIG_SYS_NS16550 1
-#define CONFIG_SYS_INIT_CHAN1	 1
-
-/* The following table includes the supported baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE  \
-    {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
-
-#define CONFIG_SYS_LOAD_ADDR		0x400000	/* default load address */
-#define CONFIG_SYS_EXTBDINFO		1	/* To use extended board_into (bd_t) */
-
-#define CONFIG_SYS_HZ		1000	/* decrementer freq: 1 ms ticks */
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_MONITOR_BASE	0x04000000
-#define CONFIG_SYS_MONITOR_LEN		(192 * 1024)	/* Reserve 196 kB for Monitor	*/
-#define CONFIG_SYS_MALLOC_LEN		(128 * 1024)	/* Reserve 128 kB for malloc()	*/
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-
-#define CONFIG_SYS_INIT_RAM_ADDR	0x800000  /* inside of SDRAM */
-#define CONFIG_SYS_INIT_RAM_END	0x2000	  /* End of used area in RAM */
-#define CONFIG_SYS_GBL_DATA_SIZE	128	  /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET    (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD	0x01	/* Normal Power-On: Boot from FLASH	*/
-#define BOOTFLAG_WARM	0x02	/* Software reboot			*/
-
-#endif				/* __CONFIG_H */
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index 903fe6da7e..3626df73df 100644
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -160,6 +160,9 @@
 #define PHYS_SDRAM_1		CSD0_BASE_ADDR
 #define PHYS_SDRAM_1_SIZE	(512 * 1024 * 1024)
 
+#define CONFIG_SYS_DDR_CLKSEL	0
+#define CONFIG_SYS_CLKTL_CBCDR	0x59E35100
+
 /*-----------------------------------------------------------------------
  * FLASH and environment organization
  */
diff --git a/include/configs/netstal-common.h b/include/configs/netstal-common.h
index 4bed7ae267..cb7efe7abc 100644
--- a/include/configs/netstal-common.h
+++ b/include/configs/netstal-common.h
@@ -42,6 +42,7 @@
  * I2C
  */
 #define CONFIG_HARD_I2C		1	/* I2C with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address	*/
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/o2dnt.h b/include/configs/o2dnt.h
index 18e7cc2a9c..bdc0f7944a 100644
--- a/include/configs/o2dnt.h
+++ b/include/configs/o2dnt.h
@@ -138,7 +138,6 @@
 
 #define CONFIG_BOOTCOMMAND	"run flash_self"
 
-#if defined(CONFIG_MPC5200)
 /*
  * IPB Bus clocking configuration.
  */
@@ -154,7 +153,6 @@
  */
 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2	/* define for 66MHz speed */
 #endif
-#endif
 
 /*
  * I2C configuration
@@ -276,13 +274,8 @@
 /*
  * Various low-level settings
  */
-#if defined(CONFIG_MPC5200)
 #define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
 #define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
 
 #define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
diff --git a/include/configs/otc570.h b/include/configs/otc570.h
index 8e27ebae9e..fb0f576f45 100644
--- a/include/configs/otc570.h
+++ b/include/configs/otc570.h
@@ -102,6 +102,7 @@
 	at91_set_pio_output(AT91_PIO_PORTB, 4, 0); \
 	at91_set_pio_output(AT91_PIO_PORTB, 5, 0); \
 }
+#define I2C_SOFT_DECLARATIONS
 /* Configure data pin as output */
 #define I2C_ACTIVE		at91_set_pio_output(AT91_PIO_PORTB, 4, 0)
 /* Configure data pin as input */
@@ -130,7 +131,6 @@
  * Command line configuration.
  */
 #include <config_cmd_default.h>
-#undef CONFIG_CMD_AUTOSCRIPT
 #undef CONFIG_CMD_FPGA
 #undef CONFIG_CMD_LOADS
 #undef CONFIG_CMD_IMLS
diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h
index 729ca6ac7d..d6b92070a9 100644
--- a/include/configs/p3p440.h
+++ b/include/configs/p3p440.h
@@ -92,6 +92,7 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_HARD_I2C		1	/* I2C with hardware support	*/
 #undef	CONFIG_SOFT_I2C			/* I2C bit-banged		*/
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		100000	/* I2C speed and slave address	*/
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 #define CONFIG_SYS_I2C_NOPROBES	{0x69}	/* Don't probe these addrs	*/
diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h
index 000ae5cd7d..1f744b875d 100644
--- a/include/configs/pcs440ep.h
+++ b/include/configs/pcs440ep.h
@@ -138,6 +138,7 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_HARD_I2C		1	    /* I2C with hardware support	*/
 #undef	CONFIG_SOFT_I2C			    /* I2C bit-banged		*/
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		100000	/* I2C speed and slave address	*/
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/pf5200.h b/include/configs/pf5200.h
index 8ca55d78ec..80a0bc609a 100644
--- a/include/configs/pf5200.h
+++ b/include/configs/pf5200.h
@@ -61,7 +61,6 @@
 #endif
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
 
-#ifdef CONFIG_MPC5200		/* MPC5100 PCI is not supported yet. */
 /*
  * PCI Mapping:
  * 0x40000000 - 0x4fffffff - PCI Memory
@@ -87,7 +86,6 @@
 #define CONFIG_SYS_RX_ETH_BUFFER	8	/* use 8 rx buffer on eepro100	*/
 #define CONFIG_NS8382X		1
 #endif
-#endif
 
 /* Partitions */
 #define CONFIG_MAC_PARTITION
@@ -121,9 +119,7 @@
 #define CONFIG_CMD_I2C
 #define CONFIG_CMD_IDE
 
-#ifdef CONFIG_MPC5200
 #define CONFIG_CMD_PCI
-#endif
 
 
 #if (TEXT_BASE == 0xFF000000)	/* Boot low with 16 MB Flash */
@@ -166,12 +162,10 @@
 
 #define CONFIG_BOOTCOMMAND	"run flash_vxworks0"
 
-#if defined(CONFIG_MPC5200)
 /*
  * IPB Bus clocking configuration.
  */
 #undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK		/* define for 133MHz speed */
-#endif
 /*
  * I2C configuration
  */
@@ -289,13 +283,8 @@
 /*
  * Various low-level settings
  */
-#if defined(CONFIG_MPC5200)
 #define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
 #define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
 
 #define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h
index 47bb8c09aa..a0b00e9706 100644
--- a/include/configs/pm9261.h
+++ b/include/configs/pm9261.h
@@ -28,8 +28,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_AT91_LEGACY
-
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_CPU_NAME	"AT91SAM9261"
 
@@ -51,26 +49,26 @@
 /* clocks */
 /* CKGR_MOR - enable main osc. */
 #define CONFIG_SYS_MOR_VAL						\
-		(AT91_PMC_MOSCEN |					\
+		(AT91_PMC_MOR_MOSCEN |					\
 		 (255 << 8))		/* Main Oscillator Start-up Time */
 #define CONFIG_SYS_PLLAR_VAL						\
-		(AT91_PMC_PLLA_WR_ERRATA | /* Bit 29 must be 1 when prog */ \
-		 AT91_PMC_OUT |						\
+		(AT91_PMC_PLLAR_29 | /* Bit 29 must be 1 when prog */ \
+		 AT91_PMC_PLLXR_OUT(3) |						\
 		 ((MASTER_PLL_MUL - 1) << 16) | (MASTER_PLL_DIV))
 
 /* PCK/2 = MCK Master Clock from PLLA */
 #define	CONFIG_SYS_MCKR1_VAL		\
-		(AT91_PMC_CSS_SLOW |	\
-		 AT91_PMC_PRES_1 |	\
-		 AT91SAM9_PMC_MDIV_2 |	\
-		 AT91_PMC_PDIV_1)
+		(AT91_PMC_MCKR_CSS_SLOW |	\
+		 AT91_PMC_MCKR_PRES_1 |	\
+		 AT91_PMC_MCKR_MDIV_2 |	\
+		 AT91_PMC_MCKR_PLLADIV_1)
 
 /* PCK/2 = MCK Master Clock from PLLA */
 #define	CONFIG_SYS_MCKR2_VAL		\
-		(AT91_PMC_CSS_PLLA |	\
-		 AT91_PMC_PRES_1 |	\
-		 AT91SAM9_PMC_MDIV_2 |	\
-		 AT91_PMC_PDIV_1)
+		(AT91_PMC_MCKR_CSS_PLLA |	\
+		 AT91_PMC_MCKR_PRES_1 |	\
+		 AT91_PMC_MCKR_MDIV_2 |	\
+		 AT91_PMC_MCKR_PLLADIV_1)
 
 /* define PDC[31:16] as DATA[31:16] */
 #define CONFIG_SYS_PIOC_PDR_VAL1	0xFFFF0000
@@ -79,7 +77,7 @@
 
 /* EBI_CSA, no pull-ups for D[15:0], CS1 SDRAM, CS3 NAND Flash */
 #define CONFIG_SYS_MATRIX_EBICSA_VAL		\
-       (AT91_MATRIX_DBPUC | AT91_MATRIX_CS1A_SDRAMC)
+	(AT91_MATRIX_CSA_DBPUC | AT91_MATRIX_CSA_EBI_CS1A)
 
 /* SDRAM */
 /* SDRAMC_MR Mode register */
@@ -122,32 +120,32 @@
 
 /* setup SMC0, CS0 (NOR Flash) - 16-bit, 15 WS */
 #define CONFIG_SYS_SMC0_SETUP0_VAL					\
-		(AT91_SMC_NWESETUP_(10) | AT91_SMC_NCS_WRSETUP_(10) |	\
-		 AT91_SMC_NRDSETUP_(10) | AT91_SMC_NCS_RDSETUP_(10))
+		(AT91_SMC_SETUP_NWE(10) | AT91_SMC_SETUP_NCS_WR(10) |	\
+		 AT91_SMC_SETUP_NRD(10) | AT91_SMC_SETUP_NCS_RD(10))
 #define CONFIG_SYS_SMC0_PULSE0_VAL					\
-		(AT91_SMC_NWEPULSE_(11) | AT91_SMC_NCS_WRPULSE_(11) |	\
-		 AT91_SMC_NRDPULSE_(11) | AT91_SMC_NCS_RDPULSE_(11))
+		(AT91_SMC_PULSE_NWE(11) | AT91_SMC_PULSE_NCS_WR(11) |	\
+		 AT91_SMC_PULSE_NRD(11) | AT91_SMC_PULSE_NCS_RD(11))
 #define CONFIG_SYS_SMC0_CYCLE0_VAL	\
-		(AT91_SMC_NWECYCLE_(22) | AT91_SMC_NRDCYCLE_(22))
+		(AT91_SMC_CYCLE_NWE(22) | AT91_SMC_CYCLE_NRD(22))
 #define CONFIG_SYS_SMC0_MODE0_VAL				\
-		(AT91_SMC_READMODE | AT91_SMC_WRITEMODE |	\
-		 AT91_SMC_DBW_16 |				\
-		 AT91_SMC_TDFMODE |				\
-		 AT91_SMC_TDF_(6))
+		(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |	\
+		 AT91_SMC_MODE_DBW_16 |				\
+		 AT91_SMC_MODE_TDF |				\
+		 AT91_SMC_MODE_TDF_CYCLE(6))
 
 /* user reset enable */
 #define CONFIG_SYS_RSTC_RMR_VAL			\
 		(AT91_RSTC_KEY |		\
-		AT91_RSTC_PROCRST |		\
-		AT91_RSTC_RSTTYP_WAKEUP |	\
-		AT91_RSTC_RSTTYP_WATCHDOG)
+		AT91_RSTC_CR_PROCRST |		\
+		AT91_RSTC_MR_ERSTL(1) |	\
+		AT91_RSTC_MR_ERSTL(2))
 
 /* Disable Watchdog */
 #define CONFIG_SYS_WDTC_WDMR_VAL				\
-		(AT91_WDT_WDIDLEHLT | AT91_WDT_WDDBGHLT |	\
-		 AT91_WDT_WDV |					\
-		 AT91_WDT_WDDIS |				\
-		 AT91_WDT_WDD)
+		(AT91_WDT_MR_WDIDLEHLT | AT91_WDT_MR_WDDBGHLT |	\
+		 AT91_WDT_MR_WDV(0xfff) |					\
+		 AT91_WDT_MR_WDDIS |				\
+		 AT91_WDT_MR_WDD(0xfff))
 
 #define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs */
 #define CONFIG_SETUP_MEMORY_TAGS 1
@@ -180,9 +178,9 @@
 
 /* LED */
 #define CONFIG_AT91_LED
-#define	CONFIG_RED_LED		AT91_PIN_PC12
-#define	CONFIG_GREEN_LED	AT91_PIN_PC13
-#define	CONFIG_YELLOW_LED	AT91_PIN_PC15
+#define	CONFIG_RED_LED		AT91_PIO_PORTC, 12
+#define	CONFIG_GREEN_LED	AT91_PIO_PORTC, 13
+#define	CONFIG_YELLOW_LED	AT91_PIO_PORTC, 15
 
 #define CONFIG_BOOTDELAY	3
 
@@ -200,7 +198,6 @@
 #include <config_cmd_default.h>
 #undef CONFIG_CMD_BDI
 #undef CONFIG_CMD_IMI
-#undef CONFIG_CMD_AUTOSCRIPT
 #undef CONFIG_CMD_FPGA
 #undef CONFIG_CMD_LOADS
 #undef CONFIG_CMD_IMLS
@@ -236,8 +233,8 @@
 #define CONFIG_SYS_NAND_MASK_ALE		(1 << 22)
 /* our CLE is AD21 */
 #define CONFIG_SYS_NAND_MASK_CLE		(1 << 21)
-#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
-#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PA16
+#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIO_PORTC, 14
+#define CONFIG_SYS_NAND_READY_PIN		AT91_PIO_PORTA, 16
 
 /* NOR flash */
 #define CONFIG_SYS_FLASH_CFI			1
diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h
index 807dba8f42..f854f3874d 100644
--- a/include/configs/pm9263.h
+++ b/include/configs/pm9263.h
@@ -215,7 +215,6 @@
 #include <config_cmd_default.h>
 #undef CONFIG_CMD_BDI
 #undef CONFIG_CMD_IMI
-#undef CONFIG_CMD_AUTOSCRIPT
 #undef CONFIG_CMD_FPGA
 #undef CONFIG_CMD_LOADS
 #undef CONFIG_CMD_IMLS
diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h
index b08dcd42de..2472187520 100644
--- a/include/configs/quad100hd.h
+++ b/include/configs/quad100hd.h
@@ -150,6 +150,7 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_HARD_I2C		1		/* I2C with hardware support	*/
 #undef	CONFIG_SOFT_I2C				/* I2C bit-banged		*/
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000		/* I2C speed and slave address	*/
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
@@ -232,7 +233,7 @@
  * Definitions for initial stack pointer and data area (in data cache)
  */
 /* use on chip memory (OCM) for temperary stack until sdram is tested */
-/* see ./cpu/ppc4xx/start.S */
+/* see ./arch/ppc/cpu/ppc4xx/start.S */
 #define CONFIG_SYS_TEMP_STACK_OCM	1
 
 /* On Chip Memory location */
@@ -250,7 +251,7 @@
  * Taken from PPCBoot board/icecube/icecube.h
  */
 
-/* see ./cpu/ppc4xx/cpu_init.c ./cpu/ppc4xx/ndfc.c */
+/* see ./arch/ppc/cpu/ppc4xx/cpu_init.c ./cpu/ppc4xx/ndfc.c */
 #define CONFIG_SYS_EBC_PB0AP		0x04002480
 /* AMD NOR flash - this corresponds to FLASH_BASE so may be correct */
 #define CONFIG_SYS_EBC_PB0CR		0xFFC5A000
@@ -268,7 +269,7 @@
  *
  * Taken in part from PPCBoot board/icecube/icecube.h
  */
-/* see ./cpu/ppc4xx/cpu_init.c ./cpu/ppc4xx/start.S */
+/* see ./arch/ppc/cpu/ppc4xx/cpu_init.c ./cpu/ppc4xx/start.S */
 #define CONFIG_SYS_GPIO0_OSRH		0x55555550
 #define CONFIG_SYS_GPIO0_OSRL		0x00000110
 #define CONFIG_SYS_GPIO0_ISR1H		0x00000000
diff --git a/include/configs/sbc405.h b/include/configs/sbc405.h
index 242f42fdc3..429b11c196 100644
--- a/include/configs/sbc405.h
+++ b/include/configs/sbc405.h
@@ -166,6 +166,7 @@
 
 #define CONFIG_HARD_I2C		1	/* I2C with hardware support	*/
 #undef  CONFIG_SOFT_I2C			/* I2C bit-banged		*/
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address	*/
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/configs/sc3.h b/include/configs/sc3.h
index a5eca39890..7423663a26 100644
--- a/include/configs/sc3.h
+++ b/include/configs/sc3.h
@@ -251,6 +251,7 @@
  */
 #define  CONFIG_HARD_I2C		/* I2C with hardware support	*/
 #undef	CONFIG_SOFT_I2C			/* I2C bit-banged		*/
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 
 #define I2C_INIT
 #define I2C_ACTIVE 0
@@ -455,7 +456,7 @@
  * - internal SRAM (OCM=On Chip Memory) is placed to CONFIG_SYS_OCM_DATA_ADDR
  * - Stackpointer will be located to
  *   (CONFIG_SYS_INIT_RAM_ADDR&0xFFFF0000) | (CONFIG_SYS_INIT_SP_OFFSET&0x0000FFFF)
- *   in cpu/ppc4xx/start.S
+ *   in arch/ppc/cpu/ppc4xx/start.S
  */
 
 #undef CONFIG_SYS_INIT_DCACHE_CS
@@ -494,7 +495,7 @@
 #define BOOTFLAG_WARM	0x02		/* Software reboot			*/
 
 /* ################################################################################### */
-/* These defines will be used in cpu/ppc4xx/cpu_init.c to setup external chip selects  */
+/* These defines will be used in arch/ppc/cpu/ppc4xx/cpu_init.c to setup external chip selects  */
 /* They are currently undefined cause they are initiaized in board/solidcard3/init.S   */
 
 /* This chip select accesses the boot device */
diff --git a/include/configs/smmaco4.h b/include/configs/smmaco4.h
index 5a2ef3aa8c..060026bb64 100644
--- a/include/configs/smmaco4.h
+++ b/include/configs/smmaco4.h
@@ -358,13 +358,8 @@
 /*
  * Various low-level settings
  */
-#if defined(CONFIG_MPC5200)
 #define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
 #define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
 
 #define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
diff --git a/include/configs/spieval.h b/include/configs/spieval.h
index 27dda253fb..d377e199d8 100644
--- a/include/configs/spieval.h
+++ b/include/configs/spieval.h
@@ -438,13 +438,8 @@
 /*
  * Various low-level settings
  */
-#if defined(CONFIG_MPC5200)
 #define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
 #define CONFIG_SYS_HID0_FINAL		HID0_ICE
-#else
-#define CONFIG_SYS_HID0_INIT		0
-#define CONFIG_SYS_HID0_FINAL		0
-#endif
 
 #define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
diff --git a/include/configs/tcm-bf537.h b/include/configs/tcm-bf537.h
index 5a5fbddac3..409a042d05 100644
--- a/include/configs/tcm-bf537.h
+++ b/include/configs/tcm-bf537.h
@@ -105,11 +105,11 @@
  * it linked after the configuration sector.
  */
 # define LDS_BOARD_TEXT \
-	cpu/blackfin/traps.o		(.text .text.*); \
-	cpu/blackfin/interrupt.o	(.text .text.*); \
-	cpu/blackfin/serial.o		(.text .text.*); \
+	arch/blackfin/cpu/traps.o		(.text .text.*); \
+	arch/blackfin/cpu/interrupt.o	(.text .text.*); \
+	arch/blackfin/cpu/serial.o		(.text .text.*); \
 	common/dlmalloc.o		(.text .text.*); \
-	lib_generic/crc32.o		(.text .text.*); \
+	lib/crc32.o		(.text .text.*); \
 	. = DEFINED(env_offset) ? env_offset : .; \
 	common/env_embedded.o		(.text .text.*);
 #endif
diff --git a/include/configs/v38b.h b/include/configs/v38b.h
index 92bcdb33fb..d462ed0f1e 100644
--- a/include/configs/v38b.h
+++ b/include/configs/v38b.h
@@ -170,12 +170,10 @@
 
 #define CONFIG_BOOTCOMMAND	"run net_nfs"
 
-#if defined(CONFIG_MPC5200)
 /*
  * IPB Bus clocking configuration.
  */
 #undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK			/* define for 133MHz speed */
-#endif
 
 /*
  * I2C configuration
diff --git a/include/configs/yucca.h b/include/configs/yucca.h
index 42f880785e..0b4dfb8e73 100644
--- a/include/configs/yucca.h
+++ b/include/configs/yucca.h
@@ -37,6 +37,7 @@
 #define CONFIG_4xx			1	/* ... PPC4xx family	*/
 #define CONFIG_440			1	/* ... PPC440 family	*/
 #define CONFIG_440SPE			1	/* Specifc SPe support	*/
+#define CONFIG_440SPE_REVA		1	/* Support old Rev A.	*/
 #define CONFIG_BOARD_EARLY_INIT_F	1	/* Call board_pre_init	*/
 #define CONFIG_SYS_CLK_FREQ	33333333	/* external freq to pll	*/
 #define EXTCLK_33_33		33333333
diff --git a/include/configs/zeus.h b/include/configs/zeus.h
index 1a77c71968..3b2aede4fd 100644
--- a/include/configs/zeus.h
+++ b/include/configs/zeus.h
@@ -167,6 +167,7 @@
  *----------------------------------------------------------------------*/
 #define CONFIG_HARD_I2C		1		/* I2C with hardware support	*/
 #undef	CONFIG_SOFT_I2C				/* I2C bit-banged		*/
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000		/* I2C speed and slave address	*/
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 0a9dd0dd84..9a453af34b 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -81,5 +81,8 @@ int fdt_resize(void *blob);
 
 int fdt_fixup_nor_flash_size(void *blob, int cs, u32 size);
 
+void fdt_fixup_mtdparts(void *fdt, void *node_info, int node_info_size);
+void fdt_del_node_and_alias(void *blob, const char *alias);
+
 #endif /* ifdef CONFIG_OF_LIBFDT */
 #endif /* ifndef __FDT_SUPPORT_H */
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
index 01b7dec188..f9ae15ad42 100644
--- a/include/fsl_esdhc.h
+++ b/include/fsl_esdhc.h
@@ -2,7 +2,7 @@
  * FSL SD/MMC Defines
  *-------------------------------------------------------------------
  *
- * Copyright 2007-2008, Freescale Semiconductor, Inc
+ * Copyright 2007-2008,2010 Freescale Semiconductor, Inc
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
@@ -39,6 +39,7 @@
 #define SYSCTL_PEREN		0x00000004
 #define SYSCTL_HCKEN		0x00000002
 #define SYSCTL_IPGEN		0x00000001
+#define SYSCTL_RSTA		0x01000000
 
 #define IRQSTAT			0x0002e030
 #define IRQSTAT_DMAE		(0x10000000)
@@ -132,6 +133,8 @@
 
 #define WML		0x2e044
 #define WML_WRITE	0x00010000
+#define WML_RD_WML_MASK	0xff
+#define WML_WR_WML_MASK	0xff0000
 
 #define BLKATTR		0x2e004
 #define BLKATTR_CNT(x)	((x & 0xffff) << 16)
@@ -148,7 +151,6 @@
 struct fsl_esdhc_cfg {
 	u32	esdhc_base;
 	u32	no_snoop;
-	u32	clk_enable;
 };
 
 /* Select the correct accessors depending on endianess */
diff --git a/include/i2c.h b/include/i2c.h
index 31088b675a..d828964256 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -127,8 +127,6 @@ typedef struct _mux_device {
 	struct _mux_device	*next;
 } I2C_MUX_DEVICE;
 
-int	i2c_mux_add_device(I2C_MUX_DEVICE *dev);
-
 I2C_MUX_DEVICE	*i2c_mux_search_device(int id);
 I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf);
 int i2x_mux_select_mux(int bus);
diff --git a/include/jffs2/load_kernel.h b/include/jffs2/load_kernel.h
index 8b2720e951..906eb3d3cd 100644
--- a/include/jffs2/load_kernel.h
+++ b/include/jffs2/load_kernel.h
@@ -78,5 +78,6 @@ struct mtdids {
 extern int mtdparts_init(void);
 extern int find_dev_and_part(const char *id, struct mtd_device **dev,
 				u8 *part_num, struct part_info **part);
+extern struct mtd_device *device_find(u8 type, u8 num);
 
 #endif /* load_kernel_h */
diff --git a/include/linux/stat.h b/include/linux/stat.h
index 2ce1c25ac3..cef636959e 100644
--- a/include/linux/stat.h
+++ b/include/linux/stat.h
@@ -68,7 +68,7 @@ struct stat {
 #endif	/* __PPC__ */
 
 #if defined (__ARM__) || defined (__I386__) || defined (__M68K__) || defined (__bfin__) ||\
-	defined (__microblaze__)
+	defined (__microblaze__) || defined (__nios2__)
 
 struct stat {
 	unsigned short st_dev;
diff --git a/include/lzma/LzmaDec.h b/include/lzma/LzmaDec.h
index 967cdd1018..b7ef6d6bc2 100644
--- a/include/lzma/LzmaDec.h
+++ b/include/lzma/LzmaDec.h
@@ -26,6 +26,6 @@
 #ifndef __LZMADEC_H__FAKE__
 #define __LZMADEC_H__FAKE__
 
-#include "../../lib_generic/lzma/LzmaDec.h"
+#include "../../lib/lzma/LzmaDec.h"
 
 #endif
diff --git a/include/lzma/LzmaTools.h b/include/lzma/LzmaTools.h
index 87943c0332..48b0af84d4 100644
--- a/include/lzma/LzmaTools.h
+++ b/include/lzma/LzmaTools.h
@@ -26,6 +26,6 @@
 #ifndef __LZMATOOLS_H__FAKE__
 #define __LZMATOOLS_H__FAKE__
 
-#include "../../lib_generic/lzma/LzmaTools.h"
+#include "../../lib/lzma/LzmaTools.h"
 
 #endif
diff --git a/include/lzma/LzmaTypes.h b/include/lzma/LzmaTypes.h
index 86160a42b2..740720cfe9 100644
--- a/include/lzma/LzmaTypes.h
+++ b/include/lzma/LzmaTypes.h
@@ -31,6 +31,6 @@
  */
 #define Byte LZByte
 
-#include "../../lib_generic/lzma/Types.h"
+#include "../../lib/lzma/Types.h"
 
 #endif
diff --git a/include/mpc5xxx.h b/include/mpc5xxx.h
index 4dcf90c037..2d343c7b08 100644
--- a/include/mpc5xxx.h
+++ b/include/mpc5xxx.h
@@ -1,7 +1,7 @@
 /*
  * include/asm-ppc/mpc5xxx.h
  *
- * Prototypes, etc. for the Motorola MGT5xxx/MPC5xxx
+ * Prototypes, etc. for the Motorola MPC5xxx
  * embedded cpu chips
  *
  * 2003 (c) MontaVista, Software, Inc.
@@ -33,24 +33,15 @@
 #include <asm/types.h>
 
 /* Processor name */
-#if defined(CONFIG_MPC5200)
 #define CPU_ID_STR	"MPC5200"
-#elif defined(CONFIG_MGT5100)
-#define CPU_ID_STR	"MGT5100"
-#endif
 
 /* Exception offsets (PowerPC standard) */
 #define EXC_OFF_SYS_RESET	0x0100
 #define _START_OFFSET		EXC_OFF_SYS_RESET
 
 /* useful macros for manipulating CSx_START/STOP */
-#if defined(CONFIG_MGT5100)
-#define START_REG(start)	((start) >> 15)
-#define STOP_REG(start, size)	(((start) + (size) - 1) >> 15)
-#elif defined(CONFIG_MPC5200)
 #define START_REG(start)	((start) >> 16)
 #define STOP_REG(start, size)	(((start) + (size) - 1) >> 16)
-#endif
 
 /* Internal memory map */
 
@@ -70,21 +61,12 @@
 #define MPC5XXX_BOOTCS_STOP	(CONFIG_SYS_MBAR + 0x0050)
 #define MPC5XXX_ADDECR		(CONFIG_SYS_MBAR + 0x0054)
 
-#if defined(CONFIG_MGT5100)
-#define MPC5XXX_SDRAM_START	(CONFIG_SYS_MBAR + 0x0034)
-#define MPC5XXX_SDRAM_STOP	(CONFIG_SYS_MBAR + 0x0038)
-#define MPC5XXX_PCI1_START	(CONFIG_SYS_MBAR + 0x003c)
-#define MPC5XXX_PCI1_STOP	(CONFIG_SYS_MBAR + 0x0040)
-#define MPC5XXX_PCI2_START	(CONFIG_SYS_MBAR + 0x0044)
-#define MPC5XXX_PCI2_STOP	(CONFIG_SYS_MBAR + 0x0048)
-#elif defined(CONFIG_MPC5200)
 #define MPC5XXX_CS6_START	(CONFIG_SYS_MBAR + 0x0058)
 #define MPC5XXX_CS6_STOP	(CONFIG_SYS_MBAR + 0x005c)
 #define MPC5XXX_CS7_START	(CONFIG_SYS_MBAR + 0x0060)
 #define MPC5XXX_CS7_STOP	(CONFIG_SYS_MBAR + 0x0064)
 #define MPC5XXX_SDRAM_CS0CFG	(CONFIG_SYS_MBAR + 0x0034)
 #define MPC5XXX_SDRAM_CS1CFG	(CONFIG_SYS_MBAR + 0x0038)
-#endif
 
 #define MPC5XXX_SDRAM		(CONFIG_SYS_MBAR + 0x0100)
 #define MPC5XXX_CDM		(CONFIG_SYS_MBAR + 0x0200)
@@ -99,18 +81,12 @@
 #define MPC5XXX_SDMA		(CONFIG_SYS_MBAR + 0x1200)
 #define MPC5XXX_XLBARB		(CONFIG_SYS_MBAR + 0x1f00)
 
-#if defined(CONFIG_MGT5100)
-#define	MPC5XXX_PSC1		(CONFIG_SYS_MBAR + 0x2000)
-#define	MPC5XXX_PSC2		(CONFIG_SYS_MBAR + 0x2400)
-#define	MPC5XXX_PSC3		(CONFIG_SYS_MBAR + 0x2800)
-#elif defined(CONFIG_MPC5200)
 #define	MPC5XXX_PSC1		(CONFIG_SYS_MBAR + 0x2000)
 #define	MPC5XXX_PSC2		(CONFIG_SYS_MBAR + 0x2200)
 #define	MPC5XXX_PSC3		(CONFIG_SYS_MBAR + 0x2400)
 #define	MPC5XXX_PSC4		(CONFIG_SYS_MBAR + 0x2600)
 #define	MPC5XXX_PSC5		(CONFIG_SYS_MBAR + 0x2800)
 #define	MPC5XXX_PSC6		(CONFIG_SYS_MBAR + 0x2c00)
-#endif
 
 #define	MPC5XXX_FEC		(CONFIG_SYS_MBAR + 0x3000)
 #define MPC5XXX_ATA             (CONFIG_SYS_MBAR + 0x3A00)
@@ -118,22 +94,14 @@
 #define MPC5XXX_I2C1		(CONFIG_SYS_MBAR + 0x3D00)
 #define MPC5XXX_I2C2		(CONFIG_SYS_MBAR + 0x3D40)
 
-#if defined(CONFIG_MGT5100)
-#define MPC5XXX_SRAM		(CONFIG_SYS_MBAR + 0x4000)
-#define MPC5XXX_SRAM_SIZE	(8*1024)
-#elif defined(CONFIG_MPC5200)
 #define MPC5XXX_SRAM		(CONFIG_SYS_MBAR + 0x8000)
 #define MPC5XXX_SRAM_SIZE	(16*1024)
-#endif
 
 /* SDRAM Controller */
 #define MPC5XXX_SDRAM_MODE	(MPC5XXX_SDRAM + 0x0000)
 #define MPC5XXX_SDRAM_CTRL	(MPC5XXX_SDRAM + 0x0004)
 #define MPC5XXX_SDRAM_CONFIG1	(MPC5XXX_SDRAM + 0x0008)
 #define MPC5XXX_SDRAM_CONFIG2	(MPC5XXX_SDRAM + 0x000c)
-#if defined(CONFIG_MGT5100)
-#define MPC5XXX_SDRAM_XLBSEL	(MPC5XXX_SDRAM + 0x0010)
-#endif
 #define MPC5XXX_SDRAM_SDELAY	(MPC5XXX_SDRAM + 0x0090)
 
 /* Clock Distribution Module */
@@ -155,19 +123,15 @@
 #define MPC5XXX_BOOTCS_CFG	MPC5XXX_CS0_CFG
 #define MPC5XXX_CS_CTRL		(MPC5XXX_LPB + 0x0018)
 #define MPC5XXX_CS_STATUS	(MPC5XXX_LPB + 0x001c)
-#if defined(CONFIG_MPC5200)
 #define MPC5XXX_CS6_CFG		(MPC5XXX_LPB + 0x0020)
 #define MPC5XXX_CS7_CFG		(MPC5XXX_LPB + 0x0024)
 #define MPC5XXX_CS_BURST	(MPC5XXX_LPB + 0x0028)
 #define MPC5XXX_CS_DEADCYCLE	(MPC5XXX_LPB + 0x002c)
-#endif
 
-#if defined(CONFIG_MPC5200)
 /* XLB Arbiter registers */
 #define MPC5XXX_XLBARB_CFG		(MPC5XXX_XLBARB + 0x40)
 #define MPC5XXX_XLBARB_MPRIEN	(MPC5XXX_XLBARB + 0x64)
 #define MPC5XXX_XLBARB_MPRIVAL	(MPC5XXX_XLBARB + 0x68)
-#endif
 
 /* GPIO registers */
 #define MPC5XXX_GPS_PORT_CONFIG	(MPC5XXX_GPIO + 0x0000)
@@ -242,14 +206,6 @@
 #define MPC5XXX_PCI_CFG		(MPC5XXX_PCI + 0x0c)
 #define MPC5XXX_PCI_BAR0	(MPC5XXX_PCI + 0x10)
 #define MPC5XXX_PCI_BAR1	(MPC5XXX_PCI + 0x14)
-#if defined(CONFIG_MGT5100)
-#define MPC5XXX_PCI_CTRL	(MPC5XXX_PCI + 0x68)
-#define MPC5XXX_PCI_VALMSKR	(MPC5XXX_PCI + 0x6c)
-#define MPC5XXX_PCI_VALMSKW	(MPC5XXX_PCI + 0x70)
-#define MPC5XXX_PCI_SUBW1	(MPC5XXX_PCI + 0x74)
-#define MPC5XXX_PCI_SUBW2	(MPC5XXX_PCI + 0x78)
-#define MPC5XXX_PCI_WINCOMMAND	(MPC5XXX_PCI + 0x7c)
-#elif defined(CONFIG_MPC5200)
 #define MPC5XXX_PCI_GSCR	(MPC5XXX_PCI + 0x60)
 #define MPC5XXX_PCI_TBATR0	(MPC5XXX_PCI + 0x64)
 #define MPC5XXX_PCI_TBATR1	(MPC5XXX_PCI + 0x68)
@@ -262,7 +218,6 @@
 #define MPC5XXX_PCI_ISR		(MPC5XXX_PCI + 0x88)
 #define MPC5XXX_PCI_ARB		(MPC5XXX_PCI + 0x8c)
 #define MPC5XXX_PCI_CAR		(MPC5XXX_PCI + 0xf8)
-#endif
 
 /* Interrupt Controller registers */
 #define MPC5XXX_ICTL_PER_MASK	(MPC5XXX_ICTL + 0x0000)
@@ -495,31 +450,16 @@ struct mpc5xxx_mmap_ctl {
 	volatile u32	cs4_stop;
 	volatile u32	cs5_start;	/* 0x002c */
 	volatile u32	cs5_stop;
-#if defined(CONFIG_MGT5100)
-	volatile u32	sdram_start;	/* 0x0034 */
-	volatile u32	sdram_stop;	/* 0x0038 */
-	volatile u32	pci1_start;	/* 0x003c */
-	volatile u32	pci1_stop;	/* 0x0040 */
-	volatile u32	pci2_start;	/* 0x0044 */
-	volatile u32	pci2_stop;	/* 0x0048 */
-#elif defined(CONFIG_MPC5200)
 	volatile u32	sdram0;		/* 0x0034 */
 	volatile u32	sdram1;		/* 0x0038 */
 	volatile u32	dummy1[4];	/* 0x003c */
-#endif
 	volatile u32	boot_start;	/* 0x004c */
 	volatile u32	boot_stop;
-#if defined(CONFIG_MGT5100)
-	volatile u32	addecr;		/* 0x0054 */
-#elif defined(CONFIG_MPC5200)
 	volatile u32	ipbi_ws_ctrl;	/* 0x0054 */
-#endif
-#if defined(CONFIG_MPC5200)
 	volatile u32	cs6_start;	/* 0x0058 */
 	volatile u32	cs6_stop;
 	volatile u32	cs7_start;	/* 0x0060 */
 	volatile u32	cs7_stop;
-#endif
 };
 
 /* Clock distribution module */
@@ -546,12 +486,7 @@ struct mpc5xxx_sdram {
 	volatile u32	ctrl;
 	volatile u32	config1;
 	volatile u32	config2;
-#if defined(CONFIG_MGT5100)
-	volatile u32	xlbsel;
-	volatile u32    dummy[31];
-#else
 	volatile u32	dummy[32];
-#endif
 	volatile u32	sdelay;
 };
 
@@ -564,12 +499,10 @@ struct mpc5xxx_lpb {
 	volatile u32	cs5_cfg;
 	volatile u32	cs_ctrl;
 	volatile u32	cs_status;
-#if defined(CONFIG_MPC5200)
 	volatile u32	cs6_cfg;
 	volatile u32	cs7_cfg;
 	volatile u32	cs_burst;
 	volatile u32	cs_deadcycle;
-#endif
 };
 
 
diff --git a/include/mpc86xx.h b/include/mpc86xx.h
index c6f30f9fd5..eb85d60cad 100644
--- a/include/mpc86xx.h
+++ b/include/mpc86xx.h
@@ -83,5 +83,7 @@ static __inline__ unsigned long get_l2cr (void)
    return l2cr_val;
 }
 
+void setup_ddr_bat(phys_addr_t dram_size);
+
 #endif  /* _ASMLANGUAGE */
 #endif	/* __MPC86xx_H__ */
diff --git a/include/mtd_node.h b/include/mtd_node.h
new file mode 100644
index 0000000000..5aae0859da
--- /dev/null
+++ b/include/mtd_node.h
@@ -0,0 +1,11 @@
+#ifndef _NODE_INFO
+#define _NODE_INFO
+
+/*
+ * Info we use to search for a flash node in DTB.
+ */
+struct node_info {
+	const char *compat;	/* compatible string */
+	int type;		/* mtd flash type */
+};
+#endif
diff --git a/include/post.h b/include/post.h
index 9fcd3cec2f..ff83bce6b4 100644
--- a/include/post.h
+++ b/include/post.h
@@ -53,6 +53,11 @@
 
 #define POST_FAIL_SAVE		0x80
 
+#define POST_BEFORE		1
+#define POST_AFTER		0
+#define POST_PASSED		1
+#define POST_FAILED		0
+
 #ifndef	__ASSEMBLY__
 
 struct post_test {
diff --git a/include/ppc440.h b/include/ppc440.h
index e60fa13905..5f87d2c600 100644
--- a/include/ppc440.h
+++ b/include/ppc440.h
@@ -68,6 +68,12 @@
 #define CPR0_SPCID	0x0120
 #define CPR0_ICFG	0x0140
 
+/* 440EPX boot strap options */
+#define BOOT_STRAP_OPTION_A	0x00000000
+#define BOOT_STRAP_OPTION_B	0x00000001
+#define BOOT_STRAP_OPTION_D	0x00000003
+#define BOOT_STRAP_OPTION_E	0x00000004
+
 /* 440gx sdr register definations */
 #define SDR0_SDSTP0	0x0020	    /* */
 #define SDR0_SDSTP1	0x0021	    /* */
diff --git a/include/spartan3.h b/include/spartan3.h
index 30b1c2d62d..d5a589d099 100644
--- a/include/spartan3.h
+++ b/include/spartan3.h
@@ -57,6 +57,7 @@ typedef struct {
 	Xilinx_done_fn	done;
 	Xilinx_wr_fn	wr;
 	Xilinx_post_fn	post;
+	Xilinx_bwr_fn	bwr; /* block write function */
 } Xilinx_Spartan3_Slave_Serial_fns;
 
 /* Device Image Sizes
diff --git a/include/u-boot/crc.h b/include/u-boot/crc.h
index 61bce67914..07badbfc5a 100644
--- a/include/u-boot/crc.h
+++ b/include/u-boot/crc.h
@@ -25,7 +25,7 @@
 #ifndef _UBOOT_CRC_H
 #define _UBOOT_CRC_H
 
-/* lib_generic/crc32.c */
+/* lib/crc32.c */
 uint32_t crc32 (uint32_t, const unsigned char *, uint);
 uint32_t crc32_wd (uint32_t, const unsigned char *, uint, uint);
 uint32_t crc32_no_comp (uint32_t, const unsigned char *, uint);
diff --git a/include/xilinx.h b/include/xilinx.h
index d0799bc572..2cb2e5b6aa 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -100,5 +100,6 @@ typedef int (*Xilinx_busy_fn)( int cookie );
 typedef int (*Xilinx_abort_fn)( int cookie );
 typedef int (*Xilinx_pre_fn)( int cookie );
 typedef int (*Xilinx_post_fn)( int cookie );
+typedef int (*Xilinx_bwr_fn)( void *buf, size_t len, int flush, int cookie );
 
 #endif  /* _XILINX_H_ */
diff --git a/lib_generic/Makefile b/lib/Makefile
index c45f07ca12..c45f07ca12 100644
--- a/lib_generic/Makefile
+++ b/lib/Makefile
diff --git a/lib_generic/addr_map.c b/lib/addr_map.c
index ff8532cf15..ff8532cf15 100644
--- a/lib_generic/addr_map.c
+++ b/lib/addr_map.c
diff --git a/lib_generic/bzlib.c b/lib/bzlib.c
index 5844e187c0..5844e187c0 100644
--- a/lib_generic/bzlib.c
+++ b/lib/bzlib.c
diff --git a/lib_generic/bzlib_crctable.c b/lib/bzlib_crctable.c
index 325b96643e..325b96643e 100644
--- a/lib_generic/bzlib_crctable.c
+++ b/lib/bzlib_crctable.c
diff --git a/lib_generic/bzlib_decompress.c b/lib/bzlib_decompress.c
index 4412b8a23e..4412b8a23e 100644
--- a/lib_generic/bzlib_decompress.c
+++ b/lib/bzlib_decompress.c
diff --git a/lib_generic/bzlib_huffman.c b/lib/bzlib_huffman.c
index 801b8ec39a..801b8ec39a 100644
--- a/lib_generic/bzlib_huffman.c
+++ b/lib/bzlib_huffman.c
diff --git a/lib_generic/bzlib_private.h b/lib/bzlib_private.h
index 87d8f94525..87d8f94525 100644
--- a/lib_generic/bzlib_private.h
+++ b/lib/bzlib_private.h
diff --git a/lib_generic/bzlib_randtable.c b/lib/bzlib_randtable.c
index c3dc7e4181..c3dc7e4181 100644
--- a/lib_generic/bzlib_randtable.c
+++ b/lib/bzlib_randtable.c
diff --git a/lib_generic/circbuf.c b/lib/circbuf.c
index 2332c63717..2332c63717 100644
--- a/lib_generic/circbuf.c
+++ b/lib/circbuf.c
diff --git a/lib_generic/crc16.c b/lib/crc16.c
index 6904365e59..6904365e59 100644
--- a/lib_generic/crc16.c
+++ b/lib/crc16.c
diff --git a/lib_generic/crc32.c b/lib/crc32.c
index 27335a3ed9..27335a3ed9 100644
--- a/lib_generic/crc32.c
+++ b/lib/crc32.c
diff --git a/lib_generic/ctype.c b/lib/ctype.c
index 6ed0468a21..6ed0468a21 100644
--- a/lib_generic/ctype.c
+++ b/lib/ctype.c
diff --git a/lib_generic/display_options.c b/lib/display_options.c
index 2dc2567410..2dc2567410 100644
--- a/lib_generic/display_options.c
+++ b/lib/display_options.c
diff --git a/lib_generic/div64.c b/lib/div64.c
index d9951b597f..d9951b597f 100644
--- a/lib_generic/div64.c
+++ b/lib/div64.c
diff --git a/lib_generic/gunzip.c b/lib/gunzip.c
index d2b7ad4779..d2b7ad4779 100644
--- a/lib_generic/gunzip.c
+++ b/lib/gunzip.c
diff --git a/lib_generic/ldiv.c b/lib/ldiv.c
index 5d231a2a65..5d231a2a65 100644
--- a/lib_generic/ldiv.c
+++ b/lib/ldiv.c
diff --git a/libfdt/Makefile b/lib/libfdt/Makefile
index d6e283045f..d6e283045f 100644
--- a/libfdt/Makefile
+++ b/lib/libfdt/Makefile
diff --git a/libfdt/README b/lib/libfdt/README
index e0598761f9..e0598761f9 100644
--- a/libfdt/README
+++ b/lib/libfdt/README
diff --git a/libfdt/fdt.c b/lib/libfdt/fdt.c
index b09ea6f04d..b09ea6f04d 100644
--- a/libfdt/fdt.c
+++ b/lib/libfdt/fdt.c
diff --git a/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c
index 1e1e32209c..1e1e32209c 100644
--- a/libfdt/fdt_ro.c
+++ b/lib/libfdt/fdt_ro.c
diff --git a/libfdt/fdt_rw.c b/lib/libfdt/fdt_rw.c
index 5c27a677e3..5c27a677e3 100644
--- a/libfdt/fdt_rw.c
+++ b/lib/libfdt/fdt_rw.c
diff --git a/libfdt/fdt_strerror.c b/lib/libfdt/fdt_strerror.c
index 9b00c3a6e8..9b00c3a6e8 100644
--- a/libfdt/fdt_strerror.c
+++ b/lib/libfdt/fdt_strerror.c
diff --git a/libfdt/fdt_sw.c b/lib/libfdt/fdt_sw.c
index 55ebebf1eb..55ebebf1eb 100644
--- a/libfdt/fdt_sw.c
+++ b/lib/libfdt/fdt_sw.c
diff --git a/libfdt/fdt_wip.c b/lib/libfdt/fdt_wip.c
index e373677c50..e373677c50 100644
--- a/libfdt/fdt_wip.c
+++ b/lib/libfdt/fdt_wip.c
diff --git a/libfdt/libfdt_internal.h b/lib/libfdt/libfdt_internal.h
index d2dcbd65ee..d2dcbd65ee 100644
--- a/libfdt/libfdt_internal.h
+++ b/lib/libfdt/libfdt_internal.h
diff --git a/lib_generic/lmb.c b/lib/lmb.c
index c5e75fb3bb..c5e75fb3bb 100644
--- a/lib_generic/lmb.c
+++ b/lib/lmb.c
diff --git a/lib_generic/lzma/LzmaDec.c b/lib/lzma/LzmaDec.c
index f941da27dd..f941da27dd 100644
--- a/lib_generic/lzma/LzmaDec.c
+++ b/lib/lzma/LzmaDec.c
diff --git a/lib_generic/lzma/LzmaDec.h b/lib/lzma/LzmaDec.h
index 7fba87f076..7fba87f076 100644
--- a/lib_generic/lzma/LzmaDec.h
+++ b/lib/lzma/LzmaDec.h
diff --git a/lib_generic/lzma/LzmaTools.c b/lib/lzma/LzmaTools.c
index 8860bfbf3d..8860bfbf3d 100644
--- a/lib_generic/lzma/LzmaTools.c
+++ b/lib/lzma/LzmaTools.c
diff --git a/lib_generic/lzma/LzmaTools.h b/lib/lzma/LzmaTools.h
index 2db80fc0f4..2db80fc0f4 100644
--- a/lib_generic/lzma/LzmaTools.h
+++ b/lib/lzma/LzmaTools.h
diff --git a/lib_generic/lzma/Makefile b/lib/lzma/Makefile
index 57f03b0cd7..57f03b0cd7 100644
--- a/lib_generic/lzma/Makefile
+++ b/lib/lzma/Makefile
diff --git a/lib_generic/lzma/README.txt b/lib/lzma/README.txt
index 23a9be2827..23a9be2827 100644
--- a/lib_generic/lzma/README.txt
+++ b/lib/lzma/README.txt
diff --git a/lib_generic/lzma/Types.h b/lib/lzma/Types.h
index 1af5cfc4d8..1af5cfc4d8 100644
--- a/lib_generic/lzma/Types.h
+++ b/lib/lzma/Types.h
diff --git a/lib_generic/lzma/history.txt b/lib/lzma/history.txt
index 624fb1d4b1..624fb1d4b1 100644
--- a/lib_generic/lzma/history.txt
+++ b/lib/lzma/history.txt
diff --git a/lib_generic/lzma/import_lzmasdk.sh b/lib/lzma/import_lzmasdk.sh
index 1e0f6863aa..1e0f6863aa 100644
--- a/lib_generic/lzma/import_lzmasdk.sh
+++ b/lib/lzma/import_lzmasdk.sh
diff --git a/lib_generic/lzma/license.txt b/lib/lzma/license.txt
index 48b9820c40..48b9820c40 100644
--- a/lib_generic/lzma/license.txt
+++ b/lib/lzma/license.txt
diff --git a/lib_generic/lzma/lzma.txt b/lib/lzma/lzma.txt
index aa20f9dc5c..aa20f9dc5c 100644
--- a/lib_generic/lzma/lzma.txt
+++ b/lib/lzma/lzma.txt
diff --git a/lib_generic/lzo/Makefile b/lib/lzo/Makefile
index 5dd1bf5775..5dd1bf5775 100644
--- a/lib_generic/lzo/Makefile
+++ b/lib/lzo/Makefile
diff --git a/lib_generic/lzo/lzo1x_decompress.c b/lib/lzo/lzo1x_decompress.c
index 09bdc8f6ca..09bdc8f6ca 100644
--- a/lib_generic/lzo/lzo1x_decompress.c
+++ b/lib/lzo/lzo1x_decompress.c
diff --git a/lib_generic/lzo/lzodefs.h b/lib/lzo/lzodefs.h
index b6d482c492..b6d482c492 100644
--- a/lib_generic/lzo/lzodefs.h
+++ b/lib/lzo/lzodefs.h
diff --git a/lib_generic/md5.c b/lib/md5.c
index 81a09e3f90..81a09e3f90 100644
--- a/lib_generic/md5.c
+++ b/lib/md5.c
diff --git a/lib_generic/net_utils.c b/lib/net_utils.c
index f03b098e9c..f03b098e9c 100644
--- a/lib_generic/net_utils.c
+++ b/lib/net_utils.c
diff --git a/lib_generic/rbtree.c b/lib/rbtree.c
index 42eab49883..42eab49883 100644
--- a/lib_generic/rbtree.c
+++ b/lib/rbtree.c
diff --git a/lib_generic/sha1.c b/lib/sha1.c
index da5bc16f3c..da5bc16f3c 100644
--- a/lib_generic/sha1.c
+++ b/lib/sha1.c
diff --git a/lib_generic/sha256.c b/lib/sha256.c
index deb63a40b6..deb63a40b6 100644
--- a/lib_generic/sha256.c
+++ b/lib/sha256.c
diff --git a/lib_generic/string.c b/lib/string.c
index b375b8124a..b375b8124a 100644
--- a/lib_generic/string.c
+++ b/lib/string.c
diff --git a/lib_generic/strmhz.c b/lib/strmhz.c
index d6da1d136e..d6da1d136e 100644
--- a/lib_generic/strmhz.c
+++ b/lib/strmhz.c
diff --git a/lib_generic/time.c b/lib/time.c
index a309c2613a..a309c2613a 100644
--- a/lib_generic/time.c
+++ b/lib/time.c
diff --git a/lib_generic/vsprintf.c b/lib/vsprintf.c
index 8c58a93662..8c58a93662 100644
--- a/lib_generic/vsprintf.c
+++ b/lib/vsprintf.c
diff --git a/lib_generic/zlib.c b/lib/zlib.c
index 26e5af1d8e..26e5af1d8e 100644
--- a/lib_generic/zlib.c
+++ b/lib/zlib.c
diff --git a/mkconfig b/mkconfig
index 0f7f13e3a4..d3109e412c 100755
--- a/mkconfig
+++ b/mkconfig
@@ -42,30 +42,28 @@ if [ "$SRCTREE" != "$OBJTREE" ] ; then
 	mkdir -p ${OBJTREE}/include2
 	cd ${OBJTREE}/include2
 	rm -f asm
-	ln -s ${SRCTREE}/include/asm-$2 asm
-	LNPREFIX="../../include2/asm/"
+	ln -s ${SRCTREE}/arch/$2/include/asm asm
+	LNPREFIX=${SRCTREE}/arch/$2/include/asm/
 	cd ../include
-	rm -rf asm-$2
 	rm -f asm
-	mkdir asm-$2
-	ln -s asm-$2 asm
+	ln -s ${SRCTREE}/arch/$2/include/asm asm
 else
 	cd ./include
 	rm -f asm
-	ln -s asm-$2 asm
+	ln -s ../arch/$2/include/asm asm
 fi
 
-rm -f asm-$2/arch
+rm -f asm/arch
 
 if [ -z "$6" -o "$6" = "NULL" ] ; then
-	ln -s ${LNPREFIX}arch-$3 asm-$2/arch
+	ln -s ${LNPREFIX}arch-$3 asm/arch
 else
-	ln -s ${LNPREFIX}arch-$6 asm-$2/arch
+	ln -s ${LNPREFIX}arch-$6 asm/arch
 fi
 
 if [ "$2" = "arm" ] ; then
-	rm -f asm-$2/proc
-	ln -s ${LNPREFIX}proc-armv asm-$2/proc
+	rm -f asm/proc
+	ln -s ${LNPREFIX}proc-armv asm/proc
 fi
 
 #
diff --git a/nand_spl/board/amcc/acadia/Makefile b/nand_spl/board/amcc/acadia/Makefile
index f37425eba1..fce4582c25 100644
--- a/nand_spl/board/amcc/acadia/Makefile
+++ b/nand_spl/board/amcc/acadia/Makefile
@@ -68,11 +68,11 @@ $(nandobj)u-boot.lds: $(LDSCRIPT)
 # from cpu directory
 $(obj)cache.S:
 	@rm -f $(obj)cache.S
-	ln -s $(SRCTREE)/cpu/ppc4xx/cache.S $(obj)cache.S
+	ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/cache.S $(obj)cache.S
 
 $(obj)gpio.c:
 	@rm -f $(obj)gpio.c
-	ln -s $(SRCTREE)/cpu/ppc4xx/gpio.c $(obj)gpio.c
+	ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/gpio.c $(obj)gpio.c
 
 $(obj)ndfc.c:
 	@rm -f $(obj)ndfc.c
@@ -80,11 +80,11 @@ $(obj)ndfc.c:
 
 $(obj)resetvec.S:
 	@rm -f $(obj)resetvec.S
-	ln -s $(SRCTREE)/cpu/ppc4xx/resetvec.S $(obj)resetvec.S
+	ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/resetvec.S $(obj)resetvec.S
 
 $(obj)start.S:
 	@rm -f $(obj)start.S
-	ln -s $(SRCTREE)/cpu/ppc4xx/start.S $(obj)start.S
+	ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/start.S $(obj)start.S
 
 # from board directory
 $(obj)memory.c:
diff --git a/nand_spl/board/amcc/bamboo/Makefile b/nand_spl/board/amcc/bamboo/Makefile
index 5fcf2905af..48fde1d1da 100644
--- a/nand_spl/board/amcc/bamboo/Makefile
+++ b/nand_spl/board/amcc/bamboo/Makefile
@@ -66,11 +66,11 @@ $(obj)ndfc.c:
 
 $(obj)resetvec.S:
 	@rm -f $(obj)resetvec.S
-	ln -s $(SRCTREE)/cpu/ppc4xx/resetvec.S $(obj)resetvec.S
+	ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/resetvec.S $(obj)resetvec.S
 
 $(obj)start.S:
 	@rm -f $(obj)start.S
-	ln -s $(SRCTREE)/cpu/ppc4xx/start.S $(obj)start.S
+	ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/start.S $(obj)start.S
 
 # from board directory
 $(obj)init.S:
diff --git a/nand_spl/board/amcc/canyonlands/Makefile b/nand_spl/board/amcc/canyonlands/Makefile
index f77e459448..0012a9c99b 100644
--- a/nand_spl/board/amcc/canyonlands/Makefile
+++ b/nand_spl/board/amcc/canyonlands/Makefile
@@ -71,11 +71,11 @@ $(obj)ndfc.c:
 
 $(obj)resetvec.S:
 	@rm -f $(obj)resetvec.S
-	ln -s $(SRCTREE)/cpu/ppc4xx/resetvec.S $(obj)resetvec.S
+	ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/resetvec.S $(obj)resetvec.S
 
 $(obj)start.S:
 	@rm -f $(obj)start.S
-	ln -s $(SRCTREE)/cpu/ppc4xx/start.S $(obj)start.S
+	ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/start.S $(obj)start.S
 
 # from board directory
 $(obj)init.S:
diff --git a/nand_spl/board/amcc/kilauea/Makefile b/nand_spl/board/amcc/kilauea/Makefile
index bc21744019..de4980a55c 100644
--- a/nand_spl/board/amcc/kilauea/Makefile
+++ b/nand_spl/board/amcc/kilauea/Makefile
@@ -62,15 +62,15 @@ $(nandobj)u-boot.lds: $(LDSCRIPT)
 # from cpu directory
 $(obj)44x_spd_ddr2.c: $(obj)ecc.h
 	@rm -f $(obj)44x_spd_ddr2.c
-	ln -s $(SRCTREE)/cpu/ppc4xx/44x_spd_ddr2.c $(obj)44x_spd_ddr2.c
+	ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c $(obj)44x_spd_ddr2.c
 
 $(obj)cache.S:
 	@rm -f $(obj)cache.S
-	ln -s $(SRCTREE)/cpu/ppc4xx/cache.S $(obj)cache.S
+	ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/cache.S $(obj)cache.S
 
 $(obj)ecc.h:
 	@rm -f $(obj)ecc.h
-	ln -s $(SRCTREE)/cpu/ppc4xx/ecc.h $(obj)ecc.h
+	ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/ecc.h $(obj)ecc.h
 
 $(obj)ndfc.c:
 	@rm -f $(obj)ndfc.c
@@ -78,11 +78,11 @@ $(obj)ndfc.c:
 
 $(obj)resetvec.S:
 	@rm -f $(obj)resetvec.S
-	ln -s $(SRCTREE)/cpu/ppc4xx/resetvec.S $(obj)resetvec.S
+	ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/resetvec.S $(obj)resetvec.S
 
 $(obj)start.S:
 	@rm -f $(obj)start.S
-	ln -s $(SRCTREE)/cpu/ppc4xx/start.S $(obj)start.S
+	ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/start.S $(obj)start.S
 
 # from nand_spl directory
 $(obj)nand_boot.c:
diff --git a/nand_spl/board/amcc/sequoia/Makefile b/nand_spl/board/amcc/sequoia/Makefile
index 54ea7c7e51..e6f96fd3bc 100644
--- a/nand_spl/board/amcc/sequoia/Makefile
+++ b/nand_spl/board/amcc/sequoia/Makefile
@@ -62,7 +62,7 @@ $(nandobj)u-boot.lds: $(LDSCRIPT)
 # from cpu directory
 $(obj)denali_data_eye.c:
 	@rm -f $(obj)denali_data_eye.c
-	ln -s $(SRCTREE)/cpu/ppc4xx/denali_data_eye.c $(obj)denali_data_eye.c
+	ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/denali_data_eye.c $(obj)denali_data_eye.c
 
 $(obj)ndfc.c:
 	@rm -f $(obj)ndfc.c
@@ -70,11 +70,11 @@ $(obj)ndfc.c:
 
 $(obj)resetvec.S:
 	@rm -f $(obj)resetvec.S
-	ln -s $(SRCTREE)/cpu/ppc4xx/resetvec.S $(obj)resetvec.S
+	ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/resetvec.S $(obj)resetvec.S
 
 $(obj)start.S:
 	@rm -f $(obj)start.S
-	ln -s $(SRCTREE)/cpu/ppc4xx/start.S $(obj)start.S
+	ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/start.S $(obj)start.S
 
 # from board directory
 $(obj)init.S:
diff --git a/nand_spl/board/freescale/mpc8313erdb/Makefile b/nand_spl/board/freescale/mpc8313erdb/Makefile
index a13e7e2f1f..a23176c78a 100644
--- a/nand_spl/board/freescale/mpc8313erdb/Makefile
+++ b/nand_spl/board/freescale/mpc8313erdb/Makefile
@@ -65,7 +65,7 @@ $(nandobj)u-boot.lds: $(LDSCRIPT)
 # create symbolic links for common files
 
 $(obj)start.S:
-	ln -sf $(SRCTREE)/cpu/mpc83xx/start.S $(obj)start.S
+	ln -sf $(SRCTREE)/arch/ppc/cpu/mpc83xx/start.S $(obj)start.S
 
 $(obj)nand_boot_fsl_elbc.c:
 	ln -sf $(SRCTREE)/nand_spl/nand_boot_fsl_elbc.c \
@@ -81,16 +81,16 @@ $(obj)ns16550.c:
 	ln -sf $(SRCTREE)/drivers/serial/ns16550.c $(obj)ns16550.c
 
 $(obj)nand_init.c:
-	ln -sf $(SRCTREE)/cpu/mpc83xx/nand_init.c $(obj)nand_init.c
+	ln -sf $(SRCTREE)/arch/ppc/cpu/mpc83xx/nand_init.c $(obj)nand_init.c
 
 $(obj)cache.c:
-	ln -sf $(SRCTREE)/lib_ppc/cache.c $(obj)cache.c
+	ln -sf $(SRCTREE)/arch/ppc/lib/cache.c $(obj)cache.c
 
 $(obj)time.c:
-	ln -sf $(SRCTREE)/lib_ppc/time.c $(obj)time.c
+	ln -sf $(SRCTREE)/arch/ppc/lib/time.c $(obj)time.c
 
 $(obj)ticks.S:
-	ln -sf $(SRCTREE)/lib_ppc/ticks.S $(obj)ticks.S
+	ln -sf $(SRCTREE)/arch/ppc/lib/ticks.S $(obj)ticks.S
 
 #########################################################################
 
diff --git a/nand_spl/board/freescale/mpc8315erdb/Makefile b/nand_spl/board/freescale/mpc8315erdb/Makefile
index a13e7e2f1f..a23176c78a 100644
--- a/nand_spl/board/freescale/mpc8315erdb/Makefile
+++ b/nand_spl/board/freescale/mpc8315erdb/Makefile
@@ -65,7 +65,7 @@ $(nandobj)u-boot.lds: $(LDSCRIPT)
 # create symbolic links for common files
 
 $(obj)start.S:
-	ln -sf $(SRCTREE)/cpu/mpc83xx/start.S $(obj)start.S
+	ln -sf $(SRCTREE)/arch/ppc/cpu/mpc83xx/start.S $(obj)start.S
 
 $(obj)nand_boot_fsl_elbc.c:
 	ln -sf $(SRCTREE)/nand_spl/nand_boot_fsl_elbc.c \
@@ -81,16 +81,16 @@ $(obj)ns16550.c:
 	ln -sf $(SRCTREE)/drivers/serial/ns16550.c $(obj)ns16550.c
 
 $(obj)nand_init.c:
-	ln -sf $(SRCTREE)/cpu/mpc83xx/nand_init.c $(obj)nand_init.c
+	ln -sf $(SRCTREE)/arch/ppc/cpu/mpc83xx/nand_init.c $(obj)nand_init.c
 
 $(obj)cache.c:
-	ln -sf $(SRCTREE)/lib_ppc/cache.c $(obj)cache.c
+	ln -sf $(SRCTREE)/arch/ppc/lib/cache.c $(obj)cache.c
 
 $(obj)time.c:
-	ln -sf $(SRCTREE)/lib_ppc/time.c $(obj)time.c
+	ln -sf $(SRCTREE)/arch/ppc/lib/time.c $(obj)time.c
 
 $(obj)ticks.S:
-	ln -sf $(SRCTREE)/lib_ppc/ticks.S $(obj)ticks.S
+	ln -sf $(SRCTREE)/arch/ppc/lib/ticks.S $(obj)ticks.S
 
 #########################################################################
 
diff --git a/nand_spl/board/freescale/mpc8536ds/Makefile b/nand_spl/board/freescale/mpc8536ds/Makefile
index 7ed9d619dc..7f75afcb50 100644
--- a/nand_spl/board/freescale/mpc8536ds/Makefile
+++ b/nand_spl/board/freescale/mpc8536ds/Makefile
@@ -29,7 +29,7 @@ PAD_TO := 0xfff01000
 
 include $(TOPDIR)/config.mk
 
-LDSCRIPT= $(TOPDIR)/cpu/$(CPU)/u-boot-nand_spl.lds
+LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds
 LDFLAGS	= -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
 AFLAGS	+= -DCONFIG_NAND_SPL
 CFLAGS	+= -DCONFIG_NAND_SPL
@@ -64,15 +64,15 @@ $(nandobj)u-boot-spl:	$(OBJS)
 
 $(obj)cache.c:
 	@rm -f $(obj)cache.c
-	ln -sf $(SRCTREE)/lib_ppc/cache.c $(obj)cache.c
+	ln -sf $(SRCTREE)/arch/ppc/lib/cache.c $(obj)cache.c
 
 $(obj)cpu_init_early.c:
 	@rm -f $(obj)cpu_init_early.c
-	ln -sf $(SRCTREE)/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c
+	ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c
 
 $(obj)cpu_init_nand.c:
 	@rm -f $(obj)cpu_init_nand.c
-	ln -sf $(SRCTREE)/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c
+	ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c
 
 $(obj)fsl_law.c:
 	@rm -f $(obj)fsl_law.c
@@ -93,19 +93,19 @@ $(obj)ns16550.c:
 
 $(obj)resetvec.S:
 	@rm -f $(obj)resetvec.S
-	ln -s $(SRCTREE)/cpu/$(CPU)/resetvec.S $(obj)resetvec.S
+	ln -s $(SRCTREE)/$(CPUDIR)/resetvec.S $(obj)resetvec.S
 
 $(obj)fixed_ivor.S:
 	@rm -f $(obj)fixed_ivor.S
-	ln -sf $(SRCTREE)/cpu/mpc85xx/fixed_ivor.S $(obj)fixed_ivor.S
+	ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/fixed_ivor.S $(obj)fixed_ivor.S
 
 $(obj)start.S: $(obj)fixed_ivor.S
 	@rm -f $(obj)start.S
-	ln -sf $(SRCTREE)/cpu/mpc85xx/start.S $(obj)start.S
+	ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/start.S $(obj)start.S
 
 $(obj)tlb.c:
 	@rm -f $(obj)tlb.c
-	ln -sf $(SRCTREE)/cpu/mpc85xx/tlb.c $(obj)tlb.c
+	ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/tlb.c $(obj)tlb.c
 
 $(obj)tlb_table.c:
 	@rm -f $(obj)tlb_table.c
diff --git a/nand_spl/board/freescale/mpc8569mds/Makefile b/nand_spl/board/freescale/mpc8569mds/Makefile
index 7ed9d619dc..7f75afcb50 100644
--- a/nand_spl/board/freescale/mpc8569mds/Makefile
+++ b/nand_spl/board/freescale/mpc8569mds/Makefile
@@ -29,7 +29,7 @@ PAD_TO := 0xfff01000
 
 include $(TOPDIR)/config.mk
 
-LDSCRIPT= $(TOPDIR)/cpu/$(CPU)/u-boot-nand_spl.lds
+LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds
 LDFLAGS	= -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
 AFLAGS	+= -DCONFIG_NAND_SPL
 CFLAGS	+= -DCONFIG_NAND_SPL
@@ -64,15 +64,15 @@ $(nandobj)u-boot-spl:	$(OBJS)
 
 $(obj)cache.c:
 	@rm -f $(obj)cache.c
-	ln -sf $(SRCTREE)/lib_ppc/cache.c $(obj)cache.c
+	ln -sf $(SRCTREE)/arch/ppc/lib/cache.c $(obj)cache.c
 
 $(obj)cpu_init_early.c:
 	@rm -f $(obj)cpu_init_early.c
-	ln -sf $(SRCTREE)/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c
+	ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c
 
 $(obj)cpu_init_nand.c:
 	@rm -f $(obj)cpu_init_nand.c
-	ln -sf $(SRCTREE)/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c
+	ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c
 
 $(obj)fsl_law.c:
 	@rm -f $(obj)fsl_law.c
@@ -93,19 +93,19 @@ $(obj)ns16550.c:
 
 $(obj)resetvec.S:
 	@rm -f $(obj)resetvec.S
-	ln -s $(SRCTREE)/cpu/$(CPU)/resetvec.S $(obj)resetvec.S
+	ln -s $(SRCTREE)/$(CPUDIR)/resetvec.S $(obj)resetvec.S
 
 $(obj)fixed_ivor.S:
 	@rm -f $(obj)fixed_ivor.S
-	ln -sf $(SRCTREE)/cpu/mpc85xx/fixed_ivor.S $(obj)fixed_ivor.S
+	ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/fixed_ivor.S $(obj)fixed_ivor.S
 
 $(obj)start.S: $(obj)fixed_ivor.S
 	@rm -f $(obj)start.S
-	ln -sf $(SRCTREE)/cpu/mpc85xx/start.S $(obj)start.S
+	ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/start.S $(obj)start.S
 
 $(obj)tlb.c:
 	@rm -f $(obj)tlb.c
-	ln -sf $(SRCTREE)/cpu/mpc85xx/tlb.c $(obj)tlb.c
+	ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/tlb.c $(obj)tlb.c
 
 $(obj)tlb_table.c:
 	@rm -f $(obj)tlb_table.c
diff --git a/nand_spl/board/freescale/mpc8569mds/nand_boot.c b/nand_spl/board/freescale/mpc8569mds/nand_boot.c
index e03065699c..047da3470f 100644
--- a/nand_spl/board/freescale/mpc8569mds/nand_boot.c
+++ b/nand_spl/board/freescale/mpc8569mds/nand_boot.c
@@ -20,7 +20,7 @@
  */
 #include <common.h>
 #include <mpc85xx.h>
-#include <asm-ppc/io.h>
+#include <asm/io.h>
 #include <ns16550.h>
 #include <nand.h>
 #include <asm/mmu.h>
diff --git a/nand_spl/board/freescale/mx31pdk/Makefile b/nand_spl/board/freescale/mx31pdk/Makefile
index 0e13d5de26..c1dcf05f3b 100644
--- a/nand_spl/board/freescale/mx31pdk/Makefile
+++ b/nand_spl/board/freescale/mx31pdk/Makefile
@@ -12,7 +12,7 @@ SOBJS	= start.o lowlevel_init.o
 COBJS	= nand_boot_fsl_nfc.o
 
 SRCS	:= $(SRCTREE)/nand_spl/nand_boot_fsl_nfc.c
-SRCS	+= $(SRCTREE)/cpu/arm1136/start.S
+SRCS	+= $(SRCTREE)/arch/arm/cpu/arm1136/start.S
 SRCS	+= $(SRCTREE)/board/freescale/mx31pdk/lowlevel_init.S
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
 __OBJS	:= $(SOBJS) $(COBJS)
@@ -40,7 +40,7 @@ $(nandobj)u-boot.lds: $(LDSCRIPT)
 
 #########################################################################
 
-$(obj)%.o:	$(SRCTREE)/cpu/arm1136/%.S
+$(obj)%.o:	$(SRCTREE)/arch/arm/cpu/arm1136/%.S
 	$(CC) $(AFLAGS) -c -o $@ $<
 
 $(obj)%.o:	$(SRCTREE)/board/freescale/mx31pdk/%.S
diff --git a/nand_spl/board/freescale/p1_p2_rdb/Makefile b/nand_spl/board/freescale/p1_p2_rdb/Makefile
index 7ed9d619dc..7f75afcb50 100644
--- a/nand_spl/board/freescale/p1_p2_rdb/Makefile
+++ b/nand_spl/board/freescale/p1_p2_rdb/Makefile
@@ -29,7 +29,7 @@ PAD_TO := 0xfff01000
 
 include $(TOPDIR)/config.mk
 
-LDSCRIPT= $(TOPDIR)/cpu/$(CPU)/u-boot-nand_spl.lds
+LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds
 LDFLAGS	= -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
 AFLAGS	+= -DCONFIG_NAND_SPL
 CFLAGS	+= -DCONFIG_NAND_SPL
@@ -64,15 +64,15 @@ $(nandobj)u-boot-spl:	$(OBJS)
 
 $(obj)cache.c:
 	@rm -f $(obj)cache.c
-	ln -sf $(SRCTREE)/lib_ppc/cache.c $(obj)cache.c
+	ln -sf $(SRCTREE)/arch/ppc/lib/cache.c $(obj)cache.c
 
 $(obj)cpu_init_early.c:
 	@rm -f $(obj)cpu_init_early.c
-	ln -sf $(SRCTREE)/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c
+	ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c
 
 $(obj)cpu_init_nand.c:
 	@rm -f $(obj)cpu_init_nand.c
-	ln -sf $(SRCTREE)/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c
+	ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c
 
 $(obj)fsl_law.c:
 	@rm -f $(obj)fsl_law.c
@@ -93,19 +93,19 @@ $(obj)ns16550.c:
 
 $(obj)resetvec.S:
 	@rm -f $(obj)resetvec.S
-	ln -s $(SRCTREE)/cpu/$(CPU)/resetvec.S $(obj)resetvec.S
+	ln -s $(SRCTREE)/$(CPUDIR)/resetvec.S $(obj)resetvec.S
 
 $(obj)fixed_ivor.S:
 	@rm -f $(obj)fixed_ivor.S
-	ln -sf $(SRCTREE)/cpu/mpc85xx/fixed_ivor.S $(obj)fixed_ivor.S
+	ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/fixed_ivor.S $(obj)fixed_ivor.S
 
 $(obj)start.S: $(obj)fixed_ivor.S
 	@rm -f $(obj)start.S
-	ln -sf $(SRCTREE)/cpu/mpc85xx/start.S $(obj)start.S
+	ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/start.S $(obj)start.S
 
 $(obj)tlb.c:
 	@rm -f $(obj)tlb.c
-	ln -sf $(SRCTREE)/cpu/mpc85xx/tlb.c $(obj)tlb.c
+	ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/tlb.c $(obj)tlb.c
 
 $(obj)tlb_table.c:
 	@rm -f $(obj)tlb_table.c
diff --git a/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c b/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c
index af442ea270..16a756c386 100644
--- a/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c
+++ b/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c
@@ -20,7 +20,7 @@
  */
 #include <common.h>
 #include <mpc85xx.h>
-#include <asm-ppc/io.h>
+#include <asm/io.h>
 #include <ns16550.h>
 #include <nand.h>
 #include <asm/mmu.h>
diff --git a/nand_spl/board/karo/tx25/Makefile b/nand_spl/board/karo/tx25/Makefile
index ae71f6695f..62aa58351c 100644
--- a/nand_spl/board/karo/tx25/Makefile
+++ b/nand_spl/board/karo/tx25/Makefile
@@ -33,7 +33,7 @@ SOBJS	= start.o lowlevel_init.o
 COBJS	= nand_boot_fsl_nfc.o
 
 SRCS	:= $(SRCTREE)/nand_spl/nand_boot_fsl_nfc.c
-SRCS	+= $(SRCTREE)/cpu/arm926ejs/start.S
+SRCS	+= $(SRCTREE)/arch/arm/cpu/arm926ejs/start.S
 SRCS	+= $(SRCTREE)/board/karo/tx25/lowlevel_init.S
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
 __OBJS	:= $(SOBJS) $(COBJS)
@@ -61,7 +61,7 @@ $(nandobj)u-boot.lds: $(LDSCRIPT)
 
 #########################################################################
 
-$(obj)%.o:	$(SRCTREE)/cpu/arm926ejs/%.S
+$(obj)%.o:	$(SRCTREE)/arch/arm/cpu/arm926ejs/%.S
 	$(CC) $(AFLAGS) -c -o $@ $<
 
 $(obj)%.o:	$(SRCTREE)/board/karo/tx25/%.S
diff --git a/nand_spl/board/samsung/smdk6400/Makefile b/nand_spl/board/samsung/smdk6400/Makefile
index 0fdda25ac5..9cb4853318 100644
--- a/nand_spl/board/samsung/smdk6400/Makefile
+++ b/nand_spl/board/samsung/smdk6400/Makefile
@@ -67,12 +67,12 @@ $(nandobj)u-boot.lds: $(LDSCRIPT)
 # from cpu directory
 $(obj)start.S:
 	@rm -f $@
-	@ln -s $(TOPDIR)/cpu/arm1176/start.S $@
+	@ln -s $(TOPDIR)/arch/arm/cpu/arm1176/start.S $@
 
 # from SoC directory
 $(obj)cpu_init.S:
 	@rm -f $@
-	@ln -s $(TOPDIR)/cpu/arm1176/s3c64xx/cpu_init.S $@
+	@ln -s $(TOPDIR)/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S $@
 
 # from board directory
 $(obj)lowlevel_init.S:
diff --git a/nand_spl/board/sheldon/simpc8313/Makefile b/nand_spl/board/sheldon/simpc8313/Makefile
index 6920fe886b..3ad6250db5 100644
--- a/nand_spl/board/sheldon/simpc8313/Makefile
+++ b/nand_spl/board/sheldon/simpc8313/Makefile
@@ -66,7 +66,7 @@ $(nandobj)u-boot.lds: $(LDSCRIPT)
 
 $(obj)start.S:
 	@rm -f $@
-	ln -s $(SRCTREE)/cpu/mpc83xx/start.S $@
+	ln -s $(SRCTREE)/arch/ppc/cpu/mpc83xx/start.S $@
 
 $(obj)nand_boot_fsl_elbc.c:
 	@rm -f $@
@@ -86,19 +86,19 @@ $(obj)ns16550.c:
 
 $(obj)nand_init.c:
 	@rm -f $@
-	ln -s $(SRCTREE)/cpu/mpc83xx/nand_init.c $@
+	ln -s $(SRCTREE)/arch/ppc/cpu/mpc83xx/nand_init.c $@
 
 $(obj)cache.c:
 	@rm -f $@
-	ln -s $(SRCTREE)/lib_ppc/cache.c $@
+	ln -s $(SRCTREE)/arch/ppc/lib/cache.c $@
 
 $(obj)time.c:
 	@rm -f $@
-	ln -s $(SRCTREE)/lib_ppc/time.c $@
+	ln -s $(SRCTREE)/arch/ppc/lib/time.c $@
 
 $(obj)ticks.S:
 	@rm -f $@
-	ln -s $(SRCTREE)/lib_ppc/ticks.S $@
+	ln -s $(SRCTREE)/arch/ppc/lib/ticks.S $@
 
 #########################################################################
 
diff --git a/nand_spl/nand_boot_fsl_nfc.c b/nand_spl/nand_boot_fsl_nfc.c
index f4040a7cf9..bfae30e460 100644
--- a/nand_spl/nand_boot_fsl_nfc.c
+++ b/nand_spl/nand_boot_fsl_nfc.c
@@ -27,9 +27,9 @@
 #include <common.h>
 #include <nand.h>
 #ifdef CONFIG_MX31
-#include <asm-arm/arch/mx31-regs.h>
+#include <asm/arch/mx31-regs.h>
 #else
-#include <asm-arm/arch/imx-regs.h>
+#include <asm/arch/imx-regs.h>
 #endif
 #include <asm/io.h>
 #include <fsl_nfc.h>
diff --git a/onenand_ipl/board/apollon/Makefile b/onenand_ipl/board/apollon/Makefile
index 193efffb56..6f1df01135 100644
--- a/onenand_ipl/board/apollon/Makefile
+++ b/onenand_ipl/board/apollon/Makefile
@@ -46,7 +46,7 @@ $(onenandobj)u-boot.lds:	$(LDSCRIPT)
 # from cpu directory
 $(obj)start.S:
 	@rm -f $@
-	ln -s $(SRCTREE)/cpu/$(CPU)/start.S $@
+	ln -s $(SRCTREE)/$(CPUDIR)/start.S $@
 
 # from onenand_ipl directory
 $(obj)onenand_ipl.h:
diff --git a/post/cpu/ppc4xx/spr.c b/post/cpu/ppc4xx/spr.c
index ecb87b53ac..6ff5c79aa9 100644
--- a/post/cpu/ppc4xx/spr.c
+++ b/post/cpu/ppc4xx/spr.c
@@ -69,7 +69,7 @@ static struct {
 
 	/* Additional Special-Purpose Registers.
 	 * The values must match the initialization
-	 * values from cpu/ppc4xx/start.S
+	 * values from arch/ppc/cpu/ppc4xx/start.S
 	 */
 	{0x30,	"PID",		0x00000000,	0x00000000},
 	{0x3a,	"CSRR0",	0x00000000,	0x00000000},
diff --git a/post/post.c b/post/post.c
index b29eb87fc2..00e835325c 100644
--- a/post/post.c
+++ b/post/post.c
@@ -231,6 +231,12 @@ static void post_get_flags (int *test_flags)
 	}
 }
 
+void __show_post_progress (unsigned int test_num, int before, int result)
+{
+}
+void show_post_progress (unsigned int, int, int)
+			__attribute__((weak, alias("__show_post_progress")));
+
 static int post_run_single (struct post_test *test,
 				int test_flags, int flags, unsigned int i)
 {
@@ -248,13 +254,18 @@ static int post_run_single (struct post_test *test,
 			if (test_flags & POST_PREREL)
 				post_log_mark_start ( test->testid );
 			else
-			post_log ("POST %s ", test->cmd);
+				post_log ("POST %s ", test->cmd);
 		}
 
+		show_post_progress(i, POST_BEFORE, POST_FAILED);
+
 		if (test_flags & POST_PREREL) {
-			if ((*test->test) (flags) == 0)
+			if ((*test->test) (flags) == 0) {
 				post_log_mark_succ ( test->testid );
+				show_post_progress(i, POST_AFTER, POST_PASSED);
+			}
 			else {
+				show_post_progress(i, POST_AFTER, POST_FAILED);
 				if (test_flags & POST_CRITICAL)
 					gd->flags |= GD_FLG_POSTFAIL;
 				if (test_flags & POST_STOP)
@@ -264,6 +275,7 @@ static int post_run_single (struct post_test *test,
 		if ((*test->test) (flags) != 0) {
 			post_log ("FAILED\n");
 			show_boot_progress (-32);
+			show_post_progress(i, POST_AFTER, POST_FAILED);
 			if (test_flags & POST_CRITICAL)
 				gd->flags |= GD_FLG_POSTFAIL;
 			if (test_flags & POST_STOP)
@@ -271,6 +283,7 @@ static int post_run_single (struct post_test *test,
 		}
 		else
 			post_log ("PASSED\n");
+			show_post_progress(i, POST_AFTER, POST_PASSED);
 		}
 
 		if ((test_flags & POST_REBOOT) && !(flags & POST_MANUAL)) {
diff --git a/tools/Makefile b/tools/Makefile
index 743505f929..749d994230 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -68,9 +68,9 @@ BIN_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX)
 # Source files which exist outside the tools directory
 EXT_OBJ_FILES-y += common/env_embedded.o
 EXT_OBJ_FILES-y += common/image.o
-EXT_OBJ_FILES-y += lib_generic/crc32.o
-EXT_OBJ_FILES-y += lib_generic/md5.o
-EXT_OBJ_FILES-y += lib_generic/sha1.o
+EXT_OBJ_FILES-y += lib/crc32.o
+EXT_OBJ_FILES-y += lib/md5.o
+EXT_OBJ_FILES-y += lib/sha1.o
 
 # Source files located in the tools directory
 OBJ_FILES-$(CONFIG_LCD_LOGO) += bmp_logo.o
@@ -122,7 +122,7 @@ endif
 # now $(obj) is defined
 HOSTSRCS += $(addprefix $(SRCTREE)/,$(EXT_OBJ_FILES-y:.o=.c))
 HOSTSRCS += $(addprefix $(SRCTREE)/tools/,$(OBJ_FILES-y:.o=.c))
-HOSTSRCS += $(addprefix $(SRCTREE)/libfdt/,$(LIBFDT_OBJ_FILES-y:.o=.c))
+HOSTSRCS += $(addprefix $(SRCTREE)/lib/libfdt/,$(LIBFDT_OBJ_FILES-y:.o=.c))
 BINS	:= $(addprefix $(obj),$(sort $(BIN_FILES-y)))
 LIBFDT_OBJS	:= $(addprefix $(obj),$(LIBFDT_OBJ_FILES-y))
 
@@ -136,7 +136,7 @@ NOPEDOBJS := $(addprefix $(obj),$(NOPED_OBJ_FILES-y))
 HOSTCPPFLAGS =	-idirafter $(SRCTREE)/include \
 		-idirafter $(OBJTREE)/include2 \
 		-idirafter $(OBJTREE)/include \
-	        -I $(SRCTREE)/libfdt \
+	        -I $(SRCTREE)/lib/libfdt \
 		-I $(SRCTREE)/tools \
 		-DTEXT_BASE=$(TEXT_BASE) -DUSE_HOSTCC \
 		-D__KERNEL_STRICT_NAMES
@@ -196,10 +196,10 @@ $(obj)ubsha1$(SFX):	$(obj)os_support.o $(obj)sha1.o $(obj)ubsha1.o
 $(obj)%.o: $(SRCTREE)/common/%.c
 	$(HOSTCC) -g $(HOSTCFLAGS_NOPED) -c -o $@ $<
 
-$(obj)%.o: $(SRCTREE)/lib_generic/%.c
+$(obj)%.o: $(SRCTREE)/lib/%.c
 	$(HOSTCC) -g $(HOSTCFLAGS) -c -o $@ $<
 
-$(obj)%.o: $(SRCTREE)/libfdt/%.c
+$(obj)%.o: $(SRCTREE)/lib/libfdt/%.c
 	$(HOSTCC) -g $(HOSTCFLAGS_NOPED) -c -o $@ $<
 
 subdirs:
diff --git a/tools/env/Makefile b/tools/env/Makefile
index 9629ee58ef..2df631e98a 100644
--- a/tools/env/Makefile
+++ b/tools/env/Makefile
@@ -41,7 +41,7 @@ clean:
 	rm -f $(obj)fw_printenv $(obj)crc32.c
 
 $(obj)crc32.c:
-	ln -s $(src)../../lib_generic/crc32.c $(obj)crc32.c
+	ln -s $(src)../../lib/crc32.c $(obj)crc32.c
 
 #########################################################################
 
diff --git a/tools/imls/Makefile b/tools/imls/Makefile
index 9b2afb0762..8407277071 100644
--- a/tools/imls/Makefile
+++ b/tools/imls/Makefile
@@ -23,9 +23,9 @@ include $(TOPDIR)/config.mk
 BIN_FILES-y += imls
 
 # Source files which exist outside the tools/imls directory
-EXT_OBJ_FILES-y += lib_generic/crc32.o
-EXT_OBJ_FILES-y += lib_generic/md5.o
-EXT_OBJ_FILES-y += lib_generic/sha1.o
+EXT_OBJ_FILES-y += lib/crc32.o
+EXT_OBJ_FILES-y += lib/md5.o
+EXT_OBJ_FILES-y += lib/sha1.o
 EXT_OBJ_FILES-y += common/image.o
 
 # Source files located in the tools/imls directory
@@ -41,7 +41,7 @@ LIBFDT_OBJ_FILES-y += fdt_wip.o
 # now $(obj) is defined
 SRCS	+= $(addprefix $(SRCTREE)/,$(EXT_OBJ_FILES-y:.o=.c))
 SRCS	+= $(addprefix $(SRCTREE)/tools/,$(OBJ_FILES-y:.o=.c))
-SRCS	+= $(addprefix $(SRCTREE)/libfdt/,$(LIBFDT_OBJ_FILES-y:.o=.c))
+SRCS	+= $(addprefix $(SRCTREE)/lib/libfdt/,$(LIBFDT_OBJ_FILES-y:.o=.c))
 BINS	:= $(addprefix $(obj),$(sort $(BIN_FILES-y)))
 LIBFDT_OBJS	:= $(addprefix $(obj),$(LIBFDT_OBJ_FILES-y))
 
@@ -52,7 +52,7 @@ LIBFDT_OBJS	:= $(addprefix $(obj),$(LIBFDT_OBJ_FILES-y))
 HOSTCPPFLAGS  = -idirafter $(SRCTREE)/include \
 		-idirafter $(OBJTREE)/include2 \
 		-idirafter $(OBJTREE)/include \
-	        -I $(SRCTREE)/libfdt \
+	        -I $(SRCTREE)/lib/libfdt \
 		-I $(SRCTREE)/tools \
 		-DUSE_HOSTCC -D__KERNEL_STRICT_NAMES
 
@@ -78,10 +78,10 @@ $(obj)imls.o: $(SRCTREE)/tools/imls/imls.c
 $(obj)%.o: $(SRCTREE)/common/%.c
 	$(CC) -g $(HOSTCFLAGS_NOPED) -c -o $@ $<
 
-$(obj)%.o: $(SRCTREE)/lib_generic/%.c
+$(obj)%.o: $(SRCTREE)/lib/%.c
 	$(CC) -g $(HOSTCFLAGS) -c -o $@ $<
 
-$(obj)%.o: $(SRCTREE)/libfdt/%.c
+$(obj)%.o: $(SRCTREE)/lib/libfdt/%.c
 	$(CC) -g $(HOSTCFLAGS_NOPED) -c -o $@ $<
 
 clean:
diff --git a/tools/mkimage.c b/tools/mkimage.c
index f71f8e732b..f5859d7764 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -37,6 +37,7 @@ struct mkimage_params params = {
 	.type = IH_TYPE_KERNEL,
 	.comp = IH_COMP_GZIP,
 	.dtc = MKIMAGE_DEFAULT_DTC_OPTIONS,
+	.imagename = "",
 };
 
 /*
@@ -144,7 +145,7 @@ main (int argc, char **argv)
 {
 	int ifd = -1;
 	struct stat sbuf;
-	unsigned char *ptr;
+	char *ptr;
 	int retval = 0;
 	struct image_type_params *tparams = NULL;
 
@@ -200,8 +201,7 @@ main (int argc, char **argv)
 			case 'a':
 				if (--argc <= 0)
 					usage ();
-				params.addr = strtoul (*++argv,
-					(char **)&ptr, 16);
+				params.addr = strtoul (*++argv, &ptr, 16);
 				if (*ptr) {
 					fprintf (stderr,
 						"%s: invalid load address %s\n",
@@ -218,8 +218,7 @@ main (int argc, char **argv)
 			case 'e':
 				if (--argc <= 0)
 					usage ();
-				params.ep = strtoul (*++argv,
-						(char **)&ptr, 16);
+				params.ep = strtoul (*++argv, &ptr, 16);
 				if (*ptr) {
 					fprintf (stderr,
 						"%s: invalid entry point %s\n",