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author | Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> | 2019-01-13 19:58:41 +0100 |
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committer | Marek Vasut <marex@denx.de> | 2019-02-18 13:00:53 +0100 |
commit | 6fb1eb1b7642d0d4dc984bc087939fb40142754c (patch) | |
tree | 9c6c8dcb5b89e548a99c06253ee3d302921ed95c | |
parent | 4f1267cea1e68395f5c6fd15624e88dfdc1c1540 (diff) | |
download | u-boot-6fb1eb1b7642d0d4dc984bc087939fb40142754c.tar.gz u-boot-6fb1eb1b7642d0d4dc984bc087939fb40142754c.tar.xz u-boot-6fb1eb1b7642d0d4dc984bc087939fb40142754c.zip |
arm: socfpga: gen5 enable designware_socfpga
Enable the socfpga specific designware ethernet driver by default for
socfpga by implying it when enabling CONFIG_ETH_DESIGNWARE for a
MACH_SOCFPGA config.
This is required to remove the hacky reset and phy mode handling in
arch/arm/mach-socfpga.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
-rw-r--r-- | drivers/net/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 1715023be6..77d0b3a01f 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -156,6 +156,7 @@ config ETH_SANDBOX_RAW config ETH_DESIGNWARE bool "Synopsys Designware Ethernet MAC" select PHYLIB + imply ETH_DESIGNWARE_SOCFPGA if ARCH_SOCFPGA help This MAC is present in SoCs from various vendors. It supports 100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to |