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| author | Bin Meng <bin.meng@windriver.com> | 2020-08-18 01:09:20 -0700 |
|---|---|---|
| committer | Andes <uboot@andestech.com> | 2020-08-25 09:33:16 +0800 |
| commit | 52dc7ae74918d01fa55ca103841a0eaa0dfa7409 (patch) | |
| tree | 93d7e5693f014ffc6f303d97ec759f69f0fc5f0d | |
| parent | 1aa3966173fe92fa3c46638ee8eb8b8491f521d6 (diff) | |
| download | u-boot-52dc7ae74918d01fa55ca103841a0eaa0dfa7409.tar.gz u-boot-52dc7ae74918d01fa55ca103841a0eaa0dfa7409.tar.xz u-boot-52dc7ae74918d01fa55ca103841a0eaa0dfa7409.zip | |
riscv: fu540: Use correct API to get L2 cache controller base address
At present fdtdec_get_addr() is used to get L2 cache controller base
address. This only works for a fixed #address-cells and #size-cells.
Change to use fdtdec_get_addr_size_auto_parent() instead.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
| -rw-r--r-- | arch/riscv/cpu/fu540/cache.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/riscv/cpu/fu540/cache.c b/arch/riscv/cpu/fu540/cache.c index 54de14238c..78f5ad9d60 100644 --- a/arch/riscv/cpu/fu540/cache.c +++ b/arch/riscv/cpu/fu540/cache.c @@ -35,7 +35,8 @@ int cache_enable_ways(void) if (node < 0) return node; - base = fdtdec_get_addr(blob, node, "reg"); + base = fdtdec_get_addr_size_auto_parent(blob, 0, node, "reg", 0, + NULL, false); if (base == FDT_ADDR_T_NONE) return FDT_ADDR_T_NONE; |