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| author | Simon Glass <sjg@chromium.org> | 2019-10-21 17:26:51 -0600 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2019-10-27 10:56:51 -0600 |
| commit | 5256beecb8a14efba805a2f3f14afb33752ac71a (patch) | |
| tree | 57ca586bf1bfa02d7653801595663ba3649ec7a5 | |
| parent | ac9cd4805c8b11f529b508921c2275b889265313 (diff) | |
| download | u-boot-5256beecb8a14efba805a2f3f14afb33752ac71a.tar.gz u-boot-5256beecb8a14efba805a2f3f14afb33752ac71a.tar.xz u-boot-5256beecb8a14efba805a2f3f14afb33752ac71a.zip | |
bootstage: Mark the start/end of TPL and SPL separately
At present bootstage in TPL and SPL use the same ID so it is not possible
to see the timing of each. Separate out the IDs and use the correct one
depending on which phase we are at.
Example output:
Timer summary in microseconds (14 records):
Mark Elapsed Stage
0 0 reset
224,787 224,787 TPL
282,248 57,461 end TPL
341,067 58,819 SPL
925,436 584,369 end SPL
931,710 6,274 board_init_f
1,035,482 103,772 board_init_r
1,387,852 352,370 main_loop
1,387,911 59 id=175
Accumulated time:
196 dm_r
8,300 dm_spl
14,139 dm_f
229,121 fsp-m
262,992 fsp-s
Signed-off-by: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | common/spl/spl.c | 9 | ||||
| -rw-r--r-- | include/bootstage.h | 2 |
2 files changed, 8 insertions, 3 deletions
diff --git a/common/spl/spl.c b/common/spl/spl.c index a9d3e847af..eabb1fbc13 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -402,7 +402,8 @@ static int spl_common_init(bool setup_malloc) ret); return ret; } - bootstage_mark_name(BOOTSTAGE_ID_START_SPL, "spl"); + bootstage_mark_name(spl_phase() == PHASE_TPL ? BOOTSTAGE_ID_START_TPL : + BOOTSTAGE_ID_START_SPL, SPL_TPL_NAME); #if CONFIG_IS_ENABLED(LOG) ret = log_init(); if (ret) { @@ -418,7 +419,8 @@ static int spl_common_init(bool setup_malloc) } } if (CONFIG_IS_ENABLED(DM)) { - bootstage_start(BOOTSTATE_ID_ACCUM_DM_SPL, "dm_spl"); + bootstage_start(BOOTSTATE_ID_ACCUM_DM_SPL, + spl_phase() == PHASE_TPL ? "dm tpl" : "dm_spl"); /* With CONFIG_SPL_OF_PLATDATA, bring in all devices */ ret = dm_init_and_scan(!CONFIG_IS_ENABLED(OF_PLATDATA)); bootstage_accum(BOOTSTATE_ID_ACCUM_DM_SPL); @@ -704,8 +706,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2) debug("SPL malloc() used 0x%lx bytes (%ld KB)\n", gd->malloc_ptr, gd->malloc_ptr / 1024); #endif + bootstage_mark_name(spl_phase() == PHASE_TPL ? BOOTSTAGE_ID_END_TPL : + BOOTSTAGE_ID_END_SPL, "end " SPL_TPL_NAME); #ifdef CONFIG_BOOTSTAGE_STASH - bootstage_mark_name(BOOTSTAGE_ID_END_SPL, "end_spl"); ret = bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR, CONFIG_BOOTSTAGE_STASH_SIZE); if (ret) diff --git a/include/bootstage.h b/include/bootstage.h index 5e7e242b83..d105ae0181 100644 --- a/include/bootstage.h +++ b/include/bootstage.h @@ -170,6 +170,8 @@ enum bootstage_id { * rough boot timing information. */ BOOTSTAGE_ID_AWAKE, + BOOTSTAGE_ID_START_TPL, + BOOTSTAGE_ID_END_TPL, BOOTSTAGE_ID_START_SPL, BOOTSTAGE_ID_END_SPL, BOOTSTAGE_ID_START_UBOOT_F, |