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| author | Chris Packham <judge.packham@gmail.com> | 2018-06-09 20:46:16 +1200 |
|---|---|---|
| committer | Joe Hershberger <joe.hershberger@ni.com> | 2018-06-13 13:54:17 -0500 |
| commit | 5194ed7edca2ca4eaa2a48a6ef248432e3a4421e (patch) | |
| tree | d3f460961e1fb6d525a9b8f2d58a19d5420bcaf4 | |
| parent | c61221948c30710f2316b264f61efbf61c92a4aa (diff) | |
| download | u-boot-5194ed7edca2ca4eaa2a48a6ef248432e3a4421e.tar.gz u-boot-5194ed7edca2ca4eaa2a48a6ef248432e3a4421e.tar.xz u-boot-5194ed7edca2ca4eaa2a48a6ef248432e3a4421e.zip | |
net: mvgbe: extract common code for SMI wait
Combine repeated code from smi_reg_read/smi_reg_write into a common
function smi_wait_ready.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| -rw-r--r-- | drivers/net/mvgbe.c | 47 | ||||
| -rw-r--r-- | drivers/net/mvgbe.h | 1 |
2 files changed, 24 insertions, 24 deletions
diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c index 4e1aff6e3a..e6585ef8b3 100644 --- a/drivers/net/mvgbe.c +++ b/drivers/net/mvgbe.c @@ -15,6 +15,7 @@ #include <net.h> #include <malloc.h> #include <miiphy.h> +#include <wait_bit.h> #include <asm/io.h> #include <linux/errno.h> #include <asm/types.h> @@ -40,10 +41,24 @@ DECLARE_GLOBAL_DATA_PTR; #define MVGBE_SMI_REG (((struct mvgbe_registers *)MVGBE0_BASE)->smi) #if defined(CONFIG_PHYLIB) || defined(CONFIG_MII) || defined(CONFIG_CMD_MII) +static int smi_wait_ready(struct mvgbe_device *dmvgbe) +{ + int ret; + + ret = wait_for_bit_le32(&MVGBE_SMI_REG, MVGBE_PHY_SMI_BUSY_MASK, false, + MVGBE_PHY_SMI_TIMEOUT_MS, false); + if (ret) { + printf("Error: SMI busy timeout\n"); + return ret; + } + + return 0; +} + /* * smi_reg_read - miiphy_read callback function. * - * Returns 16bit phy register value, or 0xffff on error + * Returns 16bit phy register value, or -EFAULT on error */ static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad, int reg_ofs) @@ -74,16 +89,9 @@ static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad, return -EFAULT; } - timeout = MVGBE_PHY_SMI_TIMEOUT; /* wait till the SMI is not busy */ - do { - /* read smi register */ - smi_reg = MVGBE_REG_RD(MVGBE_SMI_REG); - if (timeout-- == 0) { - printf("Err..(%s) SMI busy timeout\n", __func__); - return -EFAULT; - } - } while (smi_reg & MVGBE_PHY_SMI_BUSY_MASK); + if (smi_wait_ready(dmvgbe) < 0) + return -EFAULT; /* fill the phy address and regiser offset and read opcode */ smi_reg = (phy_adr << MVGBE_PHY_SMI_DEV_ADDR_OFFS) @@ -119,10 +127,9 @@ static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad, } /* - * smi_reg_write - imiiphy_write callback function. + * smi_reg_write - miiphy_write callback function. * - * Returns 0 if write succeed, -EINVAL on bad parameters - * -ETIME on timeout + * Returns 0 if write succeed, -EFAULT on error */ static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad, int reg_ofs, u16 data) @@ -131,7 +138,6 @@ static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad, struct mvgbe_device *dmvgbe = to_mvgbe(dev); struct mvgbe_registers *regs = dmvgbe->regs; u32 smi_reg; - u32 timeout; /* Phyadr write request*/ if (phy_adr == MV_PHY_ADR_REQUEST && @@ -147,19 +153,12 @@ static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad, } if (reg_ofs > PHYREG_MASK) { printf("Err..(%s) Invalid register offset\n", __func__); - return -EINVAL; + return -EFAULT; } /* wait till the SMI is not busy */ - timeout = MVGBE_PHY_SMI_TIMEOUT; - do { - /* read smi register */ - smi_reg = MVGBE_REG_RD(MVGBE_SMI_REG); - if (timeout-- == 0) { - printf("Err..(%s) SMI busy timeout\n", __func__); - return -ETIME; - } - } while (smi_reg & MVGBE_PHY_SMI_BUSY_MASK); + if (smi_wait_ready(dmvgbe) < 0) + return -EFAULT; /* fill the phy addr and reg offset and write opcode and data */ smi_reg = (data << MVGBE_PHY_SMI_DATA_OFFS); diff --git a/drivers/net/mvgbe.h b/drivers/net/mvgbe.h index c20d1d7edf..1dc9bbea2f 100644 --- a/drivers/net/mvgbe.h +++ b/drivers/net/mvgbe.h @@ -216,6 +216,7 @@ /* SMI register fields */ #define MVGBE_PHY_SMI_TIMEOUT 10000 +#define MVGBE_PHY_SMI_TIMEOUT_MS 1000 #define MVGBE_PHY_SMI_DATA_OFFS 0 /* Data */ #define MVGBE_PHY_SMI_DATA_MASK (0xffff << MVGBE_PHY_SMI_DATA_OFFS) #define MVGBE_PHY_SMI_DEV_ADDR_OFFS 16 /* PHY device address */ |