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authorMarek Vasut <marex@denx.de>2015-07-21 05:57:11 +0200
committerMarek Vasut <marex@denx.de>2015-08-08 14:14:23 +0200
commit4a82854b07f787ce61e4b2776738906b0118afa5 (patch)
tree88f21bf2327d2bbc894f0f963e9a6a8ac5d9b52e
parentb9452ea09f8756b2d43e527e86213bedf6007597 (diff)
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ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 3
Add kerneldoc. Signed-off-by: Marek Vasut <marex@denx.de>
-rw-r--r--drivers/ddr/altera/sequencer.c12
1 files changed, 11 insertions, 1 deletions
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c
index dd1ce8535f..ce53800553 100644
--- a/drivers/ddr/altera/sequencer.c
+++ b/drivers/ddr/altera/sequencer.c
@@ -1168,7 +1168,17 @@ static void rw_mgr_mem_calibrate_write_test_issue(uint32_t group,
writel(mcc_instruction, addr + (group << 2));
}
-/* Test writes, can check for a single bit pass or multiple bit pass */
+/**
+ * rw_mgr_mem_calibrate_write_test() - Test writes, check for single/multiple pass
+ * @rank_bgn: Rank number
+ * @write_group: Write Group
+ * @use_dm: Use DM
+ * @all_correct: All bits must be correct in the mask
+ * @bit_chk: Resulting bit mask after the test
+ * @all_ranks: Test all ranks
+ *
+ * Test writes, can check for a single bit pass or multiple bit pass.
+ */
static int
rw_mgr_mem_calibrate_write_test(const u32 rank_bgn, const u32 write_group,
const u32 use_dm, const u32 all_correct,