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| author | Jagan Teki <jagan@amarulasolutions.com> | 2018-05-07 13:03:21 +0530 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2018-05-28 16:40:43 +0530 |
| commit | 26fc4d6c5198910d09fe26ef7c556e3b1ef918a5 (patch) | |
| tree | 23cd4cfc7a241474959951f11c9c4abc3e0e7022 | |
| parent | 97202dd6ecd3465349264eba6fc124ceac22675a (diff) | |
| download | u-boot-26fc4d6c5198910d09fe26ef7c556e3b1ef918a5.tar.gz u-boot-26fc4d6c5198910d09fe26ef7c556e3b1ef918a5.tar.xz u-boot-26fc4d6c5198910d09fe26ef7c556e3b1ef918a5.zip | |
sunxi: clock: Fix clock gating for H3/H5/A64
clock gating bits on a64 are different than H3_H5, so fixed
only required bits on clock_sun6i.h.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
| -rw-r--r-- | arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h index 27a0da938c..87d82f205c 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h @@ -270,21 +270,27 @@ struct sunxi_ccm_reg { #define AXI_GATE_OFFSET_DRAM 0 /* ahb_gate0 offsets */ -#define AHB_GATE_OFFSET_USB_OHCI1 30 -#define AHB_GATE_OFFSET_USB_OHCI0 29 #ifdef CONFIG_MACH_SUNXI_H3_H5 /* * These are EHCI1 - EHCI3 in the datasheet (EHCI0 is for the OTG) we call * them 0 - 2 like they were called on older SoCs. */ +#define AHB_GATE_OFFSET_USB_OHCI0 28 #define AHB_GATE_OFFSET_USB_EHCI2 27 #define AHB_GATE_OFFSET_USB_EHCI1 26 +#define AHB_GATE_OFFSET_USB_EHCI0 24 +#elif defined(CONFIG_MACH_SUN50I) +#define AHB_GATE_OFFSET_USB_OHCI0 29 #define AHB_GATE_OFFSET_USB_EHCI0 25 #else +#define AHB_GATE_OFFSET_USB_OHCI1 30 +#define AHB_GATE_OFFSET_USB_OHCI0 29 #define AHB_GATE_OFFSET_USB_EHCI1 27 #define AHB_GATE_OFFSET_USB_EHCI0 26 #endif -#ifndef CONFIG_MACH_SUN8I_R40 +#ifdef CONFIG_MACH_SUN50I +#define AHB_GATE_OFFSET_USB0 23 +#elif !defined(CONFIG_MACH_SUN8I_R40) #define AHB_GATE_OFFSET_USB0 24 #else #define AHB_GATE_OFFSET_USB0 25 |