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authorVignesh R <vigneshr@ti.com>2016-08-02 10:14:26 +0530
committerTom Rini <trini@konsulko.com>2016-08-08 13:32:54 -0400
commit06974ea0e3357823d38da0e18921c5ed5fe6d510 (patch)
tree5bdf1eb8b90106489add4c0a6b10362ed64ad6cb
parent5d4dc282b40332f50e541377df39394a01e1d435 (diff)
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ARM: dts: dra7xx: Add u-boot specific property for PCF8575 nodes
PCF8575 does not have any registers hence, offset field needs to be ignored for i2c read/write. Therefore populate u-boot,i2c-offset-len with 0 in PCF8575 DT nodes. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
-rw-r--r--arch/arm/dts/dra7-evm.dts1
-rw-r--r--arch/arm/dts/dra72-evm.dts2
2 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/dts/dra7-evm.dts b/arch/arm/dts/dra7-evm.dts
index 8b77a761d2..06b7b367e4 100644
--- a/arch/arm/dts/dra7-evm.dts
+++ b/arch/arm/dts/dra7-evm.dts
@@ -415,6 +415,7 @@
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
+ u-boot,i2c-offset-len = <0>;
};
};
diff --git a/arch/arm/dts/dra72-evm.dts b/arch/arm/dts/dra72-evm.dts
index c7c5d40ada..277745fec9 100644
--- a/arch/arm/dts/dra72-evm.dts
+++ b/arch/arm/dts/dra72-evm.dts
@@ -348,6 +348,7 @@
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
+ u-boot,i2c-offset-len = <0>;
};
};
@@ -369,6 +370,7 @@
* VIN6_SEL_S0 is low, thus selecting McASP3 over VIN6
*/
lines-initial-states = <0x0f2b>;
+ u-boot,i2c-offset-len = <0>;
};
};