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* arm: Add support for Kobol Helios64 boardHEADmasterChristian Glombek2021-06-124-0/+1273
| | | | | | | | | | | | | | The hardware is described in detail on Kobol's wiki at https://wiki.kobol.io/helios64/intro/. This commit is based on downstream work in Armbian by Aditya Prayoga [1]. The devicetree is taken from Linux v5.12-rc1 and was originally submitted there by Uwe Kleine-Koenig [2]. [1] https://github.com/ukleinek/armbian-build/blob/35c85295d351830aa59b624db524ba04b238faae/patch/kernel/rockchip64-current/add-board-helios64.patch [2] https://github.com/torvalds/linux/blob/7a7fd0de4a9804299793e564a555a49c1fc924cb/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts Signed-off-by: Dennis Gilmore <dennis@ausil.us>
* arm: mvebu: dts: turris_mox: add nodes for SPI NOR partitionsMarek Behún2021-06-101-0/+31
| | | | | | | | Add nodes for SPI NOR partitions to the device tree of Turris MOX, as are in Linux' device tree. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
* arm: mvebu: dts: turris_mox: add button and LED nodesMarek Behún2021-06-101-0/+24
| | | | | | | | | Add nodes for indicator LED and reset button so that board code can implement board factory reset mechanism. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
* sandbox: correct determination of the text baseHeinrich Schuchardt2021-06-051-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | os_find_text_base() assumes that first line of /proc/self/maps holds information about the text. Hence we must call the function before calling os_malloc() which calls mmap(0x10000000,). Failure to do so has led to incorrect values for pc_reloc when an exception was reported => exception undefined Illegal instruction pc = 0x5628d82e9d3c, pc_reloc = 0x5628c82e9d3c as well as incorrect output of the bdinfo command => bdinfo relocaddr = 0x0000000007858000 reloc off = 0x0000000010000000 Fixes: b308d9fd18fa ("sandbox: Avoid using malloc() for system state") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* arm: a37xx: pci: Increase PCIe MEM size from 16 MiB to 127 MiBPali Rohár2021-06-041-3/+10
| | | | | | | | | | | | For some configurations with more PCIe cards and PCIe bridges, 16 MiB of PCIe MEM space may not be enough. Since TF-A already allocates a 128 MiB CPU window for PCIe, and since IO port space is only 64 KiB in total, use all the remaining space (64 + 32 + 16 + 8 + 4 + 2 + 1 = 127 MiB) for PCIe MEM. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
* arm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() functionPali Rohár2021-06-041-14/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current version of this function uses a lot of incorrect assumptions about the `ranges` DT property: * parent(#address-cells) == 2 * #size-cells == 2 * number of entries == 2 * address size of first entry == 0x1000000 * second child address entry == base + 0x1000000 Trying to increase PCIe MEM space to more than 16 MiB leads to an overlap with PCIe IO space, and trying to define additional MEM space (as a third entry in the `ranges` DT property) causes U-Boot to crash when booting the kernel. ## Flattened Device Tree blob at 04f00000 Booting using the fdt blob at 0x4f00000 Loading Device Tree to 000000001fb01000, end 000000001fb08f12 ... OK ERROR: board-specific fdt fixup failed: <unknown error> - must RESET the board to recover. Fix a3700_fdt_fix_pcie_regions() to properly parse and update all addresses in the `ranges` property according to https://elinux.org/Device_Tree_Usage#PCI_Address_Translation Now it is possible to increase PCIe MEM space from 16 MiB to maximal value of 127 MiB. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Fixes: cb2ddb291ee6 ("arm64: mvebu: a37xx: add device-tree fixer for PCIe regions") Reviewed-by: Stefan Roese <sr@denx.de>
* arm: a37xx: pci: Find PCIe controller node by compatible instead of pathPali Rohár2021-06-041-3/+1
| | | | | | | | | Find PCIe DT node by compatible string instead of retrieving it by using hardcoded DT path. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
* arm: a37xx: pci: Fix DT compatible string to Linux' DT compatiblePali Rohár2021-06-041-1/+1
| | | | | | | | | | Change DT compatible string for A3700 PCIe from 'marvell,armada-37xx-pcie' to 'marvell,armada-3700-pcie' to make U-Boot A3700 PCIe DT node compatible with Linux' DT node. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
* Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini2021-05-3119-1/+2525
|\ | | | | | | - SiFive FU740 and Unmatched support
| * riscv: cpu: fu740: clear feature disable CSRGreen Wan2021-05-311-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | Clear feature disable CSR to turn on all features of hart. The detail is specified at section, 'SiFive Feature Disable CSR', in user manual https://sifive.cdn.prismic.io/sifive/aee0dd4c-d156-496e-a6c4-db0cf54bbe68_sifive_U74MC_rtl_full_20G1.03.00_manual.pdf Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
| * board: sifive: add HiFive Unmatched board supportGreen Wan2021-05-311-0/+4
| | | | | | | | | | | | | | | | Add defconfig and board support for HiFive Unmatched. Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
| * riscv: dts: add SiFive Unmatched board supportGreen Wan2021-05-314-0/+1790
| | | | | | | | | | | | | | Add dts files for SiFive Unmatched board. Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Rick Chen <rick@andestech.com>
| * riscv: dts: add fu740 supportGreen Wan2021-05-312-0/+434
| | | | | | | | | | | | | | | | | | | | | | Add dts support for fu740. The HiFive Unmatched support is based on fu740 cpu and drivers in following patch set. Signed-off-by: Green Wan <green.wan@sifive.com> [greentime.hu: set fu740 speed to 1.2GHz] Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
| * drivers: clk: add fu740 supportGreen Wan2021-05-311-1/+1
| | | | | | | | | | | | | | Add fu740 support. One abstract layer is added for supporting multiple chips such as fu540 and fu740. Signed-off-by: Green Wan <green.wan@sifive.com>
| * riscv: cpu: fu740: Add support for cpu fu740Green Wan2021-05-3112-0/+281
| | | | | | | | | | | | | | Add SiFive fu740 cpu to support RISC-V arch Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | sunxi: Bring back SD card as MMC device 0Andre Przywara2021-05-311-0/+1
|/ | | | | | | | | | | | | | | | | | | | | Commit 2243d19e5618 ("mmc: mmc-uclass: Use dev_seq() to read aliases node's index") now actually enforces U-Boot's device enumeration policy, where explicitly named devices come first, then any other non-named devices follow, without filling gaps. For quite a while we have had an "mmc1 = &mmc2;" alias in our sunxi-u-boot.dtsi, which now leads to the problem that the SD card (which was always mmc device 0) now gets to be number 2. This breaks quite some boot scripts, including our own distro boot commands, and some other features looking at $mmc_bootdev, also fastboot. Just add an explicit mmc0 alias in the very same file to fix this and restore the old behaviour. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reported-by: Samuel Holland <samuel@sholland.org> Tested-by: Simon Baatz <gmbnomis@gmail.com>
* arm: dts: stm32mp157c-odyssey-som: enable the RNG1Grzegorz Szymaszek2021-05-281-0/+4
| | | | | | | | | | | | Enable the true random number generator. It can be used, for example, to generate partition UUIDs when partitioning with the gpt command. The generator is already enabled in the device trees of several other STM32MP1‐based boards, like DKx or DHCOM. Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* Merge tag 'ti-v2021.07-rc4' of ↵Tom Rini2021-05-273-0/+16
|\ | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-ti - Fix reset for AM64 platforms - Enable networking PHY driver for AM64 - Fix default R5F cluster setting in J7
| * arm: dts: k3-am642-sk: Add sysreset controller nodeSuman Anna2021-05-271-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | The AM64x SoC uses a central Device Management and Security Controller (DMSC) processor that manages all the low-level device controls including the system-wide SoC reset. The system-wide reset is managed through the system reset driver. Add a sysreset controller node as a child of the dmsc node to enable the "reset" command from U-Boot prompt for the K3 AM642 SK. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * arm: dts: k3-am642-evm: Add sysreset controller nodeSuman Anna2021-05-271-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | The AM64x SoC uses a central Device Management and Security Controller (DMSC) processor that manages all the low-level device controls including the system-wide SoC reset. The system-wide reset is managed through the system reset driver. Add a sysreset controller node as a child of the dmsc node to enable the "reset" command from U-Boot prompt for the K3 AM642 EVM. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * arm: dts: k3-j721e: Fix up MAIN R5FSS cluster mode back to Split-modeSuman Anna2021-05-271-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The default U-Boot environment variables and design are all set up for both the MAIN R5FSS clusters to be in Split-mode. This is the setting in v2021.01 U-Boot and the dt nodes are synched with the kernel binding property names in commit 468ec2f3ef8f ("remoteproc: k3_r5: Sync to upstreamed kernel DT property names") merged in v2021.04-rc2. The modes for both the clusters got switched back to LockStep mode by mistake in commit 70e167495ab2 ("arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot") also in v2021.04-rc2. This throws the following warning messages when early-booting the cores using default env variables, k3_r5f_rproc r5f at 5d00000: Invalid op: Trying to start secondary core 7 in lockstep mode Load Remote Processor 3 with data at addr=0x82000000 98484 bytes: Failed! k3_r5f_rproc r5f at 5f00000: Invalid op: Trying to start secondary core 9 in lockstep mode Load Remote Processor 5 with data at addr=0x82000000 98484 bytes: Failed! Fix this by switching back both the clusters to the expected Split-mode. Make this mode change in the u-boot specific dtsi file to avoid such sync overrides in the future until the kernel dts is also switched to Split-mode by default. Fixes: 70e167495ab2 ("arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot") Reported-by: Minas Hambardzumyan <minas@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | powerpc: fix regression in arch_initr_trap()Matt Merhar2021-05-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The assembly output of the arch_initr_trap() function differed by a single byte after common.h was removed from traps.c: fff49a18 <arch_initr_trap>: fff49a18: 94 21 ff f0 stwu r1,-16(r1) fff49a1c: 7c 08 02 a6 mflr r0 fff49a20: 90 01 00 14 stw r0,20(r1) -fff49a24: 80 62 00 44 lwz r3,68(r2) +fff49a24: 80 62 00 38 lwz r3,56(r2) fff49a28: 4b ff 76 19 bl fff41040 <trap_init> fff49a2c: 80 01 00 14 lwz r0,20(r1) fff49a30: 38 60 00 00 li r3,0 fff49a34: 38 21 00 10 addi r1,r1,16 fff49a38: 7c 08 03 a6 mtlr r0 This was causing a consistent hard lockup during the MMC read / loading of the QoriQ FMan firmware on a P2041RDB board. Re-adding the header causes identical assembly to be emitted and allows the firmware loading and subsequent boot to succeed. Fixes: 401d1c4f5d ("common: Drop asm/global_data.h from common header") Signed-off-by: Matt Merhar <mattmerhar@protonmail.com>
* | MIPS: remove deprecated qemu_mips boardDaniel Schwierzeck2021-05-251-11/+0
|/ | | | | | | | | | | | | | Remove qemu_mips boards because DM migration doesn't make sense. The board support for qemu_mips is already marked as deprecated in Qemu in favour of the Malta board. Also qemu_mips support has been removed from Linux a long time ago. The official replacement is the Malta board. The same Malta U-Boot image can be used with Qemu and on physical hardware. All combinations of Big Endian and Little Endian as well as 32 bit and 64 bit are supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* ARM: don't use --gc-sections with LTO when using private libgccMarek Behún2021-05-241-0/+2
| | | | | | | | | | | When using LTO, we can throw away the --gc-sections flag, but only if using private libgcc. When using system's libgcc, --gc-sections is still needed, otherwise linking will fail due to undefined references to libc's symbols. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
* ARM: don't use -ffunction-sections/-fdata-sections with LTO buildMarek Behún2021-05-241-2/+6
| | | | | | | | When building with LTO, using -ffunction-sections/-fdata-sections is not useful anymore. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
* ARM: make LTO availableMarek Behún2021-05-242-0/+3
| | | | | | | Make LTO available for ARM architecture. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
* armv8: SPL: discard relocation informationMarek Behún2021-05-241-0/+1
| | | | | | | | | | | | For some reason when building SPL for ARMv8 with LTO, the relocation information is not discarded. Discard it explicitly in the linker script. This fixes LTO build for imx8mm_venice_defconfig. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
* ARM: omap3: fix LTO for DM3730 (and possibly other omap3 boards)Marek Behún2021-05-241-0/+1
| | | | | | | Adam Ford says that DM3730 needs board.c compiled without LTO flags. Signed-off-by: Marek Behún <marek.behun@nic.cz> Tested-by: Adam Ford <aford173@gmail.com>
* ARM: fix LTO for rockchip and samsungMarek Behún2021-05-241-1/+1
| | | | | | | | | | | | | | | When building with LTO, the compiler complains about type mismatch of function usb_gadget_handle_interrupts(). This function is defined without parameters in files arch/arm/mach-rockchip/board.c board/samsung/common/exynos5-dt.c but it should have one parameter, int index. Fix this. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* ARM: fix LTO for seaboardMarek Behún2021-05-241-0/+1
| | | | | | | | | | | | | | When seaboard_defconfig is compiled with LTO, the compiler complains about some instructions not being supported in ARM mode. This is caused by arch/arm/mach-tegra/tegra20/warmboot_avp.c having different CFLAGS declared in Makefile. This file needs to be compiled without LTO. Fix this by removing -flto for this file. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
* ARM: imx8m: fix imx_eqos_txclk_set_rate() type mismatch for LTOMarek Behún2021-05-241-1/+1
| | | | | | | | | | | | | | When building imx8mp_evk_defconfig with LTO, the compiler complains about type mismatch of function imx_eqos_txclk_set_rate() in file drivers/net/dwc_eth_qos.c:845:12 which contains a weak definition of this function, vs file arch/arm/mach-imx/imx8m/clock_imx8mm.c which contains an implementation. Change the type of this function in the implementation to fix this. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* ARM: kona: fix clk_bsc_enable() type mismatch for LTOMarek Behún2021-05-241-1/+1
| | | | | | | | | | | | | When building with LTO, the compiler complains about type mismatch of function clk_bsc_enable() in file: arch/arm/cpu/armv7/kona-common/clk-stubs.c vs other files that define or use this function: warning: type of ‘clk_bsc_enable’ does not match original declaration. Change the type of this function to that of the other usages. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* ARM: fix LTO for keystoneMarek Behún2021-05-241-0/+1
| | | | | | | | | When building keystone with LTO the compiler complains: Error: selected processor does not support `smc #0' in Thumb mode Fix this by removing -flto for the file implementing these SMC calls. Signed-off-by: Marek Behún <marek.behun@nic.cz>
* ARM: fix LTO for imx28_xeaMarek Behún2021-05-242-2/+2
| | | | | | | | | | | | When imx28_xea_defconfig is built with LTO, the compiler complains about the two different declarations of _start: include/asm-generic/sections.h as extern void _start(void); arch/arm/cpu/arm926ejs/mxs/mxs.c as extern uint32_t _start; Fix this. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* ARM: fix LTO build for some thumb-interwork casesMarek Behún2021-05-242-0/+3
| | | | | | | | | | | | Fix LTO build for some thumb-interwork usecases (such as for da850evm_defconfig), where inline assmebly such as mrc p15,0,r2,c1,c0,0 causes the compiler to fail during LTO linking with Error: selected processor does not support `mrc p15,0,r2,c1,c0,0' in Thumb mode Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
* ARM: make gd a function call for LTO and set via set_gd()Marek Behún2021-05-245-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | On ARM, the gd pointer is stored in registers r9 / x18. For this the -ffixed-r9 / -ffixed-x18 flag is used when compiling, but using global register variables causes errors when building with LTO, and these errors are very difficult to overcome. Richard Biener says [1]: Note that global register vars shouldn't be used with LTO and if they are restricted to just a few compilation units the recommended fix is to build those CUs without -flto. We cannot do this for U-Boot since all CUs use -ffixed-reg flag. It seems that with LTO we could in fact store the gd pointer differently and gain performance or size benefit by allowing the compiler to use r9 / x18. But this would need more work. So for now, when building with LTO, go the clang way, and instead of declaring gd a global register variable, we make it a function call via macro. [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68384 Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
* ARM: global_data: make set_gd() work for armv5 and armv6Marek Behún2021-05-241-1/+3
| | | | | | | | The Thumb instruction `ldr` is able to move high registers only from armv7. For armv5 and armv6 we have to use `mov`. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
* sandbox: enable LTO by defaultMarek Behún2021-05-241-0/+1
| | | | | | | Build sandbox targets with LTO by default. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* sandbox: make LTO availableMarek Behún2021-05-242-0/+5
| | | | | | | Make LTO available for sandbox architecture. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* sandbox: use sections instead of symbols for getopt array boundariesMarek Behún2021-05-245-11/+32
| | | | | | | | | | | | | In style of linked lists, instead of declaring symbols for boundaries of getopt options array in the linker script, declare corresponding sections and retrieve the boundaries via static inline functions. Without this clang's LTO produces binary without any getopt options, because for some reason it thinks that array is empty (start and end symbols are at the same address). Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
* build: use thin archives instead of incremental linkingMarek Behún2021-05-241-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently we use incremental linking (ld -r) to link several object files from one directory into one built-in.o object file containing the linked code from that directory (and its subdirectories). Linux has, some time ago, moved to thin archives instead. Thin archives are archives (.a) that do not really contain the object files, only references to them. Using thin archives instead of incremental linking - saves disk space - apparently works better with dead code elimination - makes things easier for LTO The third point is the important one for us. With incremental linking there are several options how to do LTO, and that would unnecessarily complicate things. We have to use the --whole-archive/--no-whole-archive linking option instead of --start-group/--end-group, otherwise linking may fail because of unresolved symbols, or the resulting binary will be unusable. We also need to use the P flag for ar, otherwise final linking may fail. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
* treewide: Convert macro and uses of __section(foo) to __section("foo")Marek Behún2021-05-2429-65/+68
| | | | | | | | | | | | | | | | | This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini2021-05-201-2/+2
|\ | | | | | | | | - Sync Armada mvpp2 ethernet driver with Marvell version (misc Marvell authors)
| * arm: mvebu: armada-3720-uDPU.dts: Change back to phy-mode "2500base-x"Stefan Roese2021-05-201-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | With commit 8678776df6f5 (arm: mvebu: armada-3720-uDPU: fix PHY mode definition to sgmii-2500) the PHY mode was switch to "sgmii-2500", even when this is functionally incorrect since "2500base-x" was not supported in U-Boot at that time. As this mode is now supported (at least present in the headers), this patch moves back to the orinal version. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Jakov Petrina <jakov.petrina@sartura.hr> Cc: Vladimir Vid <vladimir.vid@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
* | Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini2021-05-208-101/+94
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| * riscv: Drop USE_SPL_FIT_GENERATORBin Meng2021-05-191-100/+0
| | | | | | | | | | | | | | | | | | Now that we have switched to binman to generate u-boot.itb for all RISC-V boards, USE_SPL_FIT_GENERATOR is no longer needed and can be dropped. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * riscv: ae350: Switch to use binman to generate u-boot.itbBin Meng2021-05-192-0/+4
| | | | | | | | | | | | | | | | | | Use the new BINMAN_STANDALONE_FDT option for AE350 based SPL defconfigs, so that binman is now used to generate u-boot.itb. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Rick Chen <rick@andestech.com>
| * riscv: qemu: Switch to use binman to generate u-boot.itbBin Meng2021-05-194-0/+18
| | | | | | | | | | | | | | | | | | By utilizing the newly introduced BINMAN_STANDALONE_FDT option, along with a new dedicated device tree source file for the QEMU virt target used for binman only, we can now use binman to generate u-boot.itb. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * riscv: dts: Sort build targets in alphabetical orderBin Meng2021-05-191-1/+1
| | | | | | | | | | | | | | | | Sort the RISC-V DTS build targets by their Kconfig target names in alphabetical order. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * riscv: sifive: unleashed: Switch to use binman to generate u-boot.itbBin Meng2021-05-192-0/+71
| | | | | | | | | | | | | | | | | | At present SiFive Unleashed board uses the Makefile to create the FIT, using USE_SPL_FIT_GENERATOR, which is deprecated as per the Makefile warning. Update to use binman instead. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit (git 2.34.1) at 2024-05-19 20:43:29 +0000