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| author | Michal Simek <michal.simek@xilinx.com> | 2019-10-04 15:25:18 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2019-10-24 13:37:01 +0200 |
| commit | 0f3604a2b3882bc0f6c66cfd5acbd074703a5814 (patch) | |
| tree | 820b0854fe7007fa3bf606f3ede9329ee818a425 /include/zynqmp_firmware.h | |
| parent | 680023c5fab6b1777c0c6f2e76e5d2effb7903a0 (diff) | |
| download | u-boot-0f3604a2b3882bc0f6c66cfd5acbd074703a5814.tar.gz u-boot-0f3604a2b3882bc0f6c66cfd5acbd074703a5814.tar.xz u-boot-0f3604a2b3882bc0f6c66cfd5acbd074703a5814.zip | |
arm64: versal: Clean pm_api_id usage
Copy enum values from platform code to firmware code. IDs are shared
between ZynqMP and Versal.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'include/zynqmp_firmware.h')
| -rw-r--r-- | include/zynqmp_firmware.h | 50 |
1 files changed, 49 insertions, 1 deletions
diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h index a20cbcdb86..742934814c 100644 --- a/include/zynqmp_firmware.h +++ b/include/zynqmp_firmware.h @@ -11,7 +11,55 @@ enum pm_api_id { PM_GET_API_VERSION = 1, PM_SET_CONFIGURATION, - PM_SECURE_IMAGE = 45, + PM_GET_NODE_STATUS, + PM_GET_OPERATING_CHARACTERISTIC, + PM_REGISTER_NOTIFIER, + PM_REQUEST_SUSPEND, + PM_SELF_SUSPEND, + PM_FORCE_POWERDOWN, + PM_ABORT_SUSPEND, + PM_REQUEST_WAKEUP, + PM_SET_WAKEUP_SOURCE, + PM_SYSTEM_SHUTDOWN, + PM_REQUEST_NODE, + PM_RELEASE_NODE, + PM_SET_REQUIREMENT, + PM_SET_MAX_LATENCY, + PM_RESET_ASSERT, + PM_RESET_GET_STATUS, + PM_MMIO_WRITE, + PM_MMIO_READ, + PM_PM_INIT_FINALIZE, + PM_FPGA_LOAD, + PM_FPGA_GET_STATUS, + PM_GET_CHIPID, + PM_SECURE_SHA = 26, + PM_SECURE_RSA, + PM_PINCTRL_REQUEST, + PM_PINCTRL_RELEASE, + PM_PINCTRL_GET_FUNCTION, + PM_PINCTRL_SET_FUNCTION, + PM_PINCTRL_CONFIG_PARAM_GET, + PM_PINCTRL_CONFIG_PARAM_SET, + PM_IOCTL, + PM_QUERY_DATA, + PM_CLOCK_ENABLE, + PM_CLOCK_DISABLE, + PM_CLOCK_GETSTATE, + PM_CLOCK_SETDIVIDER, + PM_CLOCK_GETDIVIDER, + PM_CLOCK_SETRATE, + PM_CLOCK_GETRATE, + PM_CLOCK_SETPARENT, + PM_CLOCK_GETPARENT, + PM_SECURE_IMAGE, + PM_FPGA_READ = 46, + PM_SECURE_AES, + PM_CLOCK_PLL_GETPARAM = 49, + PM_REGISTER_ACCESS = 52, + PM_EFUSE_ACCESS, + PM_FEATURE_CHECK = 63, + PM_API_MAX, }; #define PM_SIP_SVC 0xc2000000 |