From patchwork Mon Feb 24 14:34:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Hunter X-Patchwork-Id: 1243145 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.a=rsa-sha256 header.s=n1 header.b=duOxTEf6; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48R4Mz3K4gz9sRR for ; Tue, 25 Feb 2020 01:34:55 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727815AbgBXOew (ORCPT ); Mon, 24 Feb 2020 09:34:52 -0500 Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:6094 "EHLO hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727498AbgBXOew (ORCPT ); Mon, 24 Feb 2020 09:34:52 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 24 Feb 2020 06:33:35 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 24 Feb 2020 06:34:51 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 24 Feb 2020 06:34:51 -0800 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 24 Feb 2020 14:34:50 +0000 Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Mon, 24 Feb 2020 14:34:50 +0000 Received: from thunderball.nvidia.com (Not Verified[10.21.140.91]) by rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Mon, 24 Feb 2020 06:34:50 -0800 From: Jon Hunter To: Thierry Reding CC: , , Jon Hunter , Subject: [PATCH 1/4] ARM64: Tegra: Enable I2C controller for EEPROM Date: Mon, 24 Feb 2020 14:34:33 +0000 Message-ID: <20200224143436.5438-1-jonathanh@nvidia.com> X-Mailer: git-send-email 2.17.1 X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1582554815; bh=SKhUz0YkoB6pD4YoE/4KFxZbYw2qmSp519cZdmcBM3o=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: X-NVConfidentiality:MIME-Version:Content-Type; b=duOxTEf6wTpBnmdA4GzgtJ0CYXr5t34ZZNN48pc9hExmRqaCcppGHAY2wcXqnjNmL YwvDy0gfFikGS9gPJKICW2X6f4iOcgfnVhYOWdgnzSFD1bhtOoN+bEcXPC+LRDY89m uAwuuKQR4MMohz9C8MW8xyatlc13ZEU0jeW1+S3PYfX2GhwRUooeFCGnmLUso5s2DZ 65p26CoCGdQNBARsw2TNevBzLshNSXvHBdlFiKSs4S0hB7yJJrCwZx2JsjOm+aRtb3 dgVHvAZAd8GLLKC8NvPCAhbIRhDt0vkyWmqHnB5suduti7g4QA1Eb8HLAXB5ptvzeK jor+qP+NC8CVQ== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Commit a5b6b67364cb ("arm64: tegra: Add ID EEPROM for Jetson TX1 module") populated the EEPROM on the Jetson TX1 module, but did not enable the corresponding I2C controller. Enable the I2C controller so that this EEPROM can be accessed. Fixes: a5b6b67364cb ("arm64: tegra: Add ID EEPROM for Jetson TX1 module") Cc: Signed-off-by: Jon Hunter --- arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi index cb58f79deb48..95b1a6e76e6e 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi @@ -265,6 +265,8 @@ }; i2c@7000c500 { + status = "okay"; + /* module ID EEPROM */ eeprom@50 { compatible = "atmel,24c02"; From patchwork Mon Feb 24 14:34:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Hunter X-Patchwork-Id: 1243146 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.a=rsa-sha256 header.s=n1 header.b=YrupJt5o; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48R4N1059Pz9sRR for ; Tue, 25 Feb 2020 01:34:57 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727498AbgBXOe4 (ORCPT ); Mon, 24 Feb 2020 09:34:56 -0500 Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:8365 "EHLO hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727803AbgBXOe4 (ORCPT ); Mon, 24 Feb 2020 09:34:56 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 24 Feb 2020 06:34:20 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 24 Feb 2020 06:34:55 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 24 Feb 2020 06:34:55 -0800 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 24 Feb 2020 14:34:55 +0000 Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Mon, 24 Feb 2020 14:34:55 +0000 Received: from thunderball.nvidia.com (Not Verified[10.21.140.91]) by rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Mon, 24 Feb 2020 06:34:54 -0800 From: Jon Hunter To: Thierry Reding CC: , , Jon Hunter Subject: [PATCH 2/4] ARM64: tegra: Add EEPROM supplies Date: Mon, 24 Feb 2020 14:34:34 +0000 Message-ID: <20200224143436.5438-2-jonathanh@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200224143436.5438-1-jonathanh@nvidia.com> References: <20200224143436.5438-1-jonathanh@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1582554860; bh=XQRed+hM+dOmUn7lEyFBRTITiHe/kmVf6bYnTKyb4yU=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=YrupJt5osNrArZbD3/6N+E76P788S2kgwb7HnwldZ99/x70lrAIXTKHOx35uqz7o0 bsYj1jAiz+BrmkHt678TBaesev2pBBcp8G+zkGDX+M6MWEvTixhn0bBERoHpnmuhQl 1fWBcDKGg9r4KT46RFxrjCcRek8FB1gb1nM00FneNHFyguKuZEzRuMvoPfZEPr0Pm3 HaB3AybSYgm2KABS5aZo/a2/9sIP0Bx2St673Bx+9vz89pPr8lWjHZO9QjIUdJn2Qw 5rEeeEdOKkbx0RMyKaPAPIdhmrnVzrcyrnZYmf0KnxXJCWitqt2cyAu6uDjPI8kiL+ JhWqRAza5osKg== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The following warning is observed on Jetson TX1, Jetson Nano and Jetson TX2 platforms because the supply regulators are not specified for the EEPROMs. WARNING KERN at24 0-0050: 0-0050 supply vcc not found, using dummy regulator WARNING KERN at24 0-0057: 0-0057 supply vcc not found, using dummy regulator For both of these platforms the EEPROM is powered by the main 1.8V supply rail and so populate the supply for these devices to fix these warnings. Signed-off-by: Jon Hunter --- arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 1 + arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 1 + arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 1 + arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 1 + arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 2 ++ 5 files changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts index d7628f5afb85..961b1be0c56b 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts +++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts @@ -226,6 +226,7 @@ compatible = "atmel,24c02"; reg = <0x57>; + vcc-supply = <&vdd_1v8>; address-bits = <8>; page-size = <8>; size = <256>; diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi index 947744d0f04c..da96de04d003 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi @@ -171,6 +171,7 @@ compatible = "atmel,24c02"; reg = <0x50>; + vcc-supply = <&vdd_1v8>; address-bits = <8>; page-size = <8>; size = <256>; diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi index 95b1a6e76e6e..f87d2437d11c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi @@ -272,6 +272,7 @@ compatible = "atmel,24c02"; reg = <0x50>; + vcc-supply = <&vdd_1v8>; address-bits = <8>; page-size = <8>; size = <256>; diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts index a3cafe39ba4c..c70a610f8e3a 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts @@ -85,6 +85,7 @@ compatible = "atmel,24c02"; reg = <0x57>; + vcc-supply = <&vdd_1v8>; address-bits = <8>; page-size = <8>; size = <256>; diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts index 848afd855da6..21ed1756b889 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts @@ -114,6 +114,7 @@ compatible = "atmel,24c02"; reg = <0x50>; + vcc-supply = <&vdd_1v8>; address-bits = <8>; page-size = <8>; size = <256>; @@ -124,6 +125,7 @@ compatible = "atmel,24c02"; reg = <0x57>; + vcc-supply = <&vdd_1v8>; address-bits = <8>; page-size = <8>; size = <256>; From patchwork Mon Feb 24 14:34:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Hunter X-Patchwork-Id: 1243147 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.a=rsa-sha256 header.s=n1 header.b=cDDn02CY; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48R4N43Xmtz9sRQ for ; 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Mon, 24 Feb 2020 14:34:58 +0000 Received: from thunderball.nvidia.com (Not Verified[10.21.140.91]) by rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Mon, 24 Feb 2020 06:34:58 -0800 From: Jon Hunter To: Thierry Reding CC: , , Jon Hunter , Subject: [PATCH 3/4] ARM64: tegra: Fix Tegra186 SOR supply Date: Mon, 24 Feb 2020 14:34:35 +0000 Message-ID: <20200224143436.5438-3-jonathanh@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200224143436.5438-1-jonathanh@nvidia.com> References: <20200224143436.5438-1-jonathanh@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1582554864; bh=lUBb2WrI059cKuJQ/lQ6zAeA/dUVGu1GIMzWYnFLzuA=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=cDDn02CYOMd1x5bK/t7LoZ9fYn59xu8HcaGTMnsTAUfJYYkF5vUqcWjve/5PtksEv +bYF/ELx+KLrbyXQ4LtKHW1V8F2iDHhNR1Rrs+/MUuPuxuOXwTsaYJgLd2A/FWO54O men6fW7E5dJS7lmfJ050sgzZs+TABrFO/dyzOfrekczCVpqlnJEsPvdpFlBbzg125A ZW3sMSe1pW+54pvkCWL7YF/RFnb9zefc0feJmu0Ky+kMH2QOFPSvufzsFBxOr1bUaJ wqzLNTYwY6tWNy7axusq4KLKuCViERaAqSs/UlzzsrOQHJeecBOlH2GkFi8z7JASz2 ucv0C5PUNzlTg== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The following warning is observed on the Jetson TX2 platform ... WARNING KERN tegra-sor 15540000.sor: 15540000.sor supply \ vdd-hdmi-dp-pll not found, using dummy regulator The problem is caused because the regulator for the SOR device is missing the '-supply' suffix in Device-Tree. Therefore, add the '-supply' suffix to fix this warning. Fixes: 3fdfaf8718fa arm64: tegra: Enable DP support on Jetson TX2 Cc: Signed-off-by: Jon Hunter --- arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts index 961b1be0c56b..1af7f9ffb7b6 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts +++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts @@ -278,7 +278,7 @@ status = "okay"; avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>; - vdd-hdmi-dp-pll = <&vdd_1v8_ap>; + vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>; nvidia,dpaux = <&dpaux>; }; From patchwork Mon Feb 24 14:34:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Hunter X-Patchwork-Id: 1243148 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.a=rsa-sha256 header.s=n1 header.b=K9z8jYfd; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48R4N71cwzz9sRQ for ; Tue, 25 Feb 2020 01:35:03 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727830AbgBXOfC (ORCPT ); Mon, 24 Feb 2020 09:35:02 -0500 Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:6117 "EHLO hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727803AbgBXOfC (ORCPT ); Mon, 24 Feb 2020 09:35:02 -0500 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 24 Feb 2020 06:33:46 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Mon, 24 Feb 2020 06:35:01 -0800 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Mon, 24 Feb 2020 06:35:01 -0800 Received: from HQMAIL111.nvidia.com (172.20.187.18) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 24 Feb 2020 14:35:01 +0000 Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Mon, 24 Feb 2020 14:35:01 +0000 Received: from thunderball.nvidia.com (Not Verified[10.21.140.91]) by rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Mon, 24 Feb 2020 06:35:01 -0800 From: Jon Hunter To: Thierry Reding CC: , , Jon Hunter Subject: [PATCH 4/4] ARM64: tegra: Populate LP8557 backlight regulator Date: Mon, 24 Feb 2020 14:34:36 +0000 Message-ID: <20200224143436.5438-4-jonathanh@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200224143436.5438-1-jonathanh@nvidia.com> References: <20200224143436.5438-1-jonathanh@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1582554826; bh=8MBs7jrK7WrFNE7o6bG0zu41Sicfxu97bK94j6RYNJs=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=K9z8jYfdaYDh/XGz5S/vyzBWYN4ZPYT6jkue5E5YiUVIyQgLCoZqfSIh3h9luB+/C DhYTYMkUQRLasUE0VX9dr4Bn0Hxeaw8DjYS7BUq4LqfNwWjsCSsNEhk26FGBEUvhRH i2nMUMk5Ivw78ouR6qNZhI6freANsproJ+yQkA0cC9WXj5mQw4xcKRmL48dccxrX47 aQi0BDk3SCzZBAa+4G3yynAGiRNiFuLVWkg/vFMcq1JDp6a2mVs/CS3Qj0/heE9gPn Qr2Wy0Oa6tg3jhxR9hk7qyy5FlkfDAtJOlUt6sPloPS4bhqqDJtbnXZL7lzHDP+sw+ RZcjavnvJtCIQ== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The following warning is observed on Jetson TX1 platform because the supply regulator is not specified for the backlight. WARNING KERN lp855x 0-002c: 0-002c supply power not found, using dummy regulator The backlight supply is provided by the 3.3V SYS rail and so add this as the supply for the backlight. Signed-off-by: Jon Hunter --- arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts index c70a610f8e3a..ea0e1efa6973 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts @@ -56,6 +56,7 @@ backlight: backlight@2c { compatible = "ti,lp8557"; reg = <0x2c>; + power-supply = <&vdd_3v3_sys>; dev-ctrl = /bits/ 8 <0x80>; init-brt = /bits/ 8 <0xff>;