From 5a11487f7745892488cbfc8006cd133c000ffeb6 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sat, 22 Jun 2019 10:56:20 +0100 Subject: QCom ACPI fixes --- arm64-qcom-pinctrl-support-for-ACPI.patch | 293 ++++++++++++++++++++++++++++++ 1 file changed, 293 insertions(+) create mode 100644 arm64-qcom-pinctrl-support-for-ACPI.patch (limited to 'arm64-qcom-pinctrl-support-for-ACPI.patch') diff --git a/arm64-qcom-pinctrl-support-for-ACPI.patch b/arm64-qcom-pinctrl-support-for-ACPI.patch new file mode 100644 index 000000000..4548d4036 --- /dev/null +++ b/arm64-qcom-pinctrl-support-for-ACPI.patch @@ -0,0 +1,293 @@ +From 0ab5b9df0c9f07ae747ddc678d4e423c42f69624 Mon Sep 17 00:00:00 2001 +From: Lee Jones +Date: Mon, 10 Jun 2019 09:42:06 +0100 +Subject: [PATCH 1/8] i2c: i2c-qcom-geni: Provide support for ACPI + +Add a match table to allow automatic probing of ACPI device +QCOM0220. Ignore clock attainment errors. Set default clock +frequency value. + +Signed-off-by: Lee Jones +Acked-by: Ard Biesheuvel +--- + drivers/i2c/busses/i2c-qcom-geni.c | 15 ++++++++++++++- + 1 file changed, 14 insertions(+), 1 deletion(-) + +diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c +index db075bc0d952..9e3b8a98688d 100644 +--- a/drivers/i2c/busses/i2c-qcom-geni.c ++++ b/drivers/i2c/busses/i2c-qcom-geni.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0 + // Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + ++#include + #include + #include + #include +@@ -483,6 +484,14 @@ static const struct i2c_algorithm geni_i2c_algo = { + .functionality = geni_i2c_func, + }; + ++#ifdef CONFIG_ACPI ++static const struct acpi_device_id geni_i2c_acpi_match[] = { ++ { "QCOM0220"}, ++ { }, ++}; ++MODULE_DEVICE_TABLE(acpi, geni_i2c_acpi_match); ++#endif ++ + static int geni_i2c_probe(struct platform_device *pdev) + { + struct geni_i2c_dev *gi2c; +@@ -502,7 +511,7 @@ static int geni_i2c_probe(struct platform_device *pdev) + return PTR_ERR(gi2c->se.base); + + gi2c->se.clk = devm_clk_get(&pdev->dev, "se"); +- if (IS_ERR(gi2c->se.clk)) { ++ if (IS_ERR(gi2c->se.clk) && !has_acpi_companion(&pdev->dev)) { + ret = PTR_ERR(gi2c->se.clk); + dev_err(&pdev->dev, "Err getting SE Core clk %d\n", ret); + return ret; +@@ -516,6 +525,9 @@ static int geni_i2c_probe(struct platform_device *pdev) + gi2c->clk_freq_out = KHZ(100); + } + ++ if (has_acpi_companion(&pdev->dev)) ++ ACPI_COMPANION_SET(&gi2c->adap.dev, ACPI_COMPANION(&pdev->dev)); ++ + gi2c->irq = platform_get_irq(pdev, 0); + if (gi2c->irq < 0) { + dev_err(&pdev->dev, "IRQ error for i2c-geni\n"); +@@ -660,6 +672,7 @@ static struct platform_driver geni_i2c_driver = { + .name = "geni_i2c", + .pm = &geni_i2c_pm_ops, + .of_match_table = geni_i2c_dt_match, ++ .acpi_match_table = ACPI_PTR(geni_i2c_acpi_match), + }, + }; + +-- +2.21.0 + +From 5a0639fed6e05977d85c4824354e73d0a2fa92ef Mon Sep 17 00:00:00 2001 +From: Lee Jones +Date: Mon, 10 Jun 2019 09:42:07 +0100 +Subject: [PATCH 2/8] i2c: i2c-qcom-geni: Signify successful driver probe + +The Qualcomm Geni I2C driver currently probes silently which can be +confusing when debugging potential issues. Add a low level (INFO) +print when each I2C controller is successfully initially set-up. + +Signed-off-by: Lee Jones +Acked-by: Ard Biesheuvel +--- + drivers/i2c/busses/i2c-qcom-geni.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c +index 9e3b8a98688d..a89bfce5388e 100644 +--- a/drivers/i2c/busses/i2c-qcom-geni.c ++++ b/drivers/i2c/busses/i2c-qcom-geni.c +@@ -596,6 +596,8 @@ static int geni_i2c_probe(struct platform_device *pdev) + return ret; + } + ++ dev_dbg(&pdev->dev, "Geni-I2C adaptor successfully added\n"); ++ + return 0; + } + +-- +2.21.0 + +From 6f202eb6dbccf3172616a620faf934bf6195a0f9 Mon Sep 17 00:00:00 2001 +From: Lee Jones +Date: Mon, 10 Jun 2019 09:42:08 +0100 +Subject: [PATCH 3/8] pinctrl: msm: Add ability for drivers to supply a + reserved GPIO list + +When booting MSM based platforms with Device Tree or some ACPI +implementations, it is possible to provide a list of reserved pins +via the 'gpio-reserved-ranges' and 'gpios' properties respectively. +However some ACPI tables are not populated with this information, +thus it has to come from a knowledgable device driver instead. + +Here we provide the MSM common driver with additional support to +parse this informtion and correctly populate the widely used +'valid_mask'. + +Signed-off-by: Lee Jones +Reviewed-by: Bjorn Andersson +--- + drivers/pinctrl/qcom/pinctrl-msm.c | 18 ++++++++++++++++++ + drivers/pinctrl/qcom/pinctrl-msm.h | 1 + + 2 files changed, 19 insertions(+) + +diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c +index 6e319bcc2326..80682b017a47 100644 +--- a/drivers/pinctrl/qcom/pinctrl-msm.c ++++ b/drivers/pinctrl/qcom/pinctrl-msm.c +@@ -599,8 +599,23 @@ static int msm_gpio_init_valid_mask(struct gpio_chip *chip) + int ret; + unsigned int len, i; + unsigned int max_gpios = pctrl->soc->ngpios; ++ const int *reserved = pctrl->soc->reserved_gpios; + u16 *tmp; + ++ /* Driver provided reserved list overrides DT and ACPI */ ++ if (reserved) { ++ bitmap_fill(chip->valid_mask, max_gpios); ++ for (i = 0; reserved[i] >= 0; i++) { ++ if (i >= max_gpios || reserved[i] >= max_gpios) { ++ dev_err(pctrl->dev, "invalid list of reserved GPIOs\n"); ++ return -EINVAL; ++ } ++ clear_bit(reserved[i], chip->valid_mask); ++ } ++ ++ return 0; ++ } ++ + /* The number of GPIOs in the ACPI tables */ + len = ret = device_property_read_u16_array(pctrl->dev, "gpios", NULL, + 0); +@@ -956,6 +971,9 @@ static void msm_gpio_irq_handler(struct irq_desc *desc) + + static bool msm_gpio_needs_valid_mask(struct msm_pinctrl *pctrl) + { ++ if (pctrl->soc->reserved_gpios) ++ return true; ++ + return device_property_read_u16_array(pctrl->dev, "gpios", NULL, 0) > 0; + } + +diff --git a/drivers/pinctrl/qcom/pinctrl-msm.h b/drivers/pinctrl/qcom/pinctrl-msm.h +index b724581c605c..48569cda8471 100644 +--- a/drivers/pinctrl/qcom/pinctrl-msm.h ++++ b/drivers/pinctrl/qcom/pinctrl-msm.h +@@ -113,6 +113,7 @@ struct msm_pinctrl_soc_data { + bool pull_no_keeper; + const char *const *tiles; + unsigned int ntiles; ++ const int *reserved_gpios; + }; + + extern const struct dev_pm_ops msm_pinctrl_dev_pm_ops; +-- +2.21.0 + +From 568ff4c9723d761164416fdf876232f5b14cf3ad Mon Sep 17 00:00:00 2001 +From: Lee Jones +Date: Mon, 10 Jun 2019 09:42:09 +0100 +Subject: [PATCH 4/8] pinctrl: qcom: sdm845: Provide ACPI support + +This patch provides basic support for booting with ACPI instead +of the currently supported Device Tree. When doing so there are a +couple of differences which we need to taken into consideration. + +Firstly, the SDM850 ACPI tables omit information pertaining to the +4 reserved GPIOs on the platform. If Linux attempts to touch/ +initialise any of these lines, the firmware will restart the +platform. + +Secondly, when booting with ACPI, it is expected that the firmware +will set-up things like; Regulators, Clocks, Pin Functions, etc in +their ideal configuration. Thus, the possible Pin Functions +available to this platform are not advertised when providing the +higher GPIOD/Pinctrl APIs with pin information. + +Signed-off-by: Lee Jones +Acked-by: Ard Biesheuvel +--- + drivers/pinctrl/qcom/Kconfig | 2 +- + drivers/pinctrl/qcom/pinctrl-sdm845.c | 36 ++++++++++++++++++++++++++- + 2 files changed, 36 insertions(+), 2 deletions(-) + +diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig +index 890d0a3a790b..27ab585a639c 100644 +--- a/drivers/pinctrl/qcom/Kconfig ++++ b/drivers/pinctrl/qcom/Kconfig +@@ -169,7 +169,7 @@ config PINCTRL_SDM660 + + config PINCTRL_SDM845 + tristate "Qualcomm Technologies Inc SDM845 pin controller driver" +- depends on GPIOLIB && OF ++ depends on GPIOLIB && (OF || ACPI) + select PINCTRL_MSM + help + This is the pinctrl, pinmux, pinconf and gpiolib driver for the +diff --git a/drivers/pinctrl/qcom/pinctrl-sdm845.c b/drivers/pinctrl/qcom/pinctrl-sdm845.c +index c97f20fca5fd..98a438dba711 100644 +--- a/drivers/pinctrl/qcom/pinctrl-sdm845.c ++++ b/drivers/pinctrl/qcom/pinctrl-sdm845.c +@@ -3,6 +3,7 @@ + * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. + */ + ++#include + #include + #include + #include +@@ -1277,6 +1278,10 @@ static const struct msm_pingroup sdm845_groups[] = { + UFS_RESET(ufs_reset, 0x99f000), + }; + ++static const int sdm845_acpi_reserved_gpios[] = { ++ 0, 1, 2, 3, 81, 82, 83, 84, -1 ++}; ++ + static const struct msm_pinctrl_soc_data sdm845_pinctrl = { + .pins = sdm845_pins, + .npins = ARRAY_SIZE(sdm845_pins), +@@ -1287,11 +1292,39 @@ static const struct msm_pinctrl_soc_data sdm845_pinctrl = { + .ngpios = 150, + }; + ++static const struct msm_pinctrl_soc_data sdm845_acpi_pinctrl = { ++ .pins = sdm845_pins, ++ .npins = ARRAY_SIZE(sdm845_pins), ++ .groups = sdm845_groups, ++ .ngroups = ARRAY_SIZE(sdm845_groups), ++ .reserved_gpios = sdm845_acpi_reserved_gpios, ++ .ngpios = 150, ++}; ++ + static int sdm845_pinctrl_probe(struct platform_device *pdev) + { +- return msm_pinctrl_probe(pdev, &sdm845_pinctrl); ++ int ret; ++ ++ if (pdev->dev.of_node) { ++ ret = msm_pinctrl_probe(pdev, &sdm845_pinctrl); ++ } else if (has_acpi_companion(&pdev->dev)) { ++ ret = msm_pinctrl_probe(pdev, &sdm845_acpi_pinctrl); ++ } else { ++ dev_err(&pdev->dev, "DT and ACPI disabled\n"); ++ return -EINVAL; ++ } ++ ++ return ret; + } + ++#if CONFIG_ACPI ++static const struct acpi_device_id sdm845_pinctrl_acpi_match[] = { ++ { "QCOM0217"}, ++ { }, ++}; ++MODULE_DEVICE_TABLE(acpi, sdm845_pinctrl_acpi_match); ++#endif ++ + static const struct of_device_id sdm845_pinctrl_of_match[] = { + { .compatible = "qcom,sdm845-pinctrl", }, + { }, +@@ -1302,6 +1335,7 @@ static struct platform_driver sdm845_pinctrl_driver = { + .name = "sdm845-pinctrl", + .pm = &msm_pinctrl_dev_pm_ops, + .of_match_table = sdm845_pinctrl_of_match, ++ .acpi_match_table = ACPI_PTR(sdm845_pinctrl_acpi_match), + }, + .probe = sdm845_pinctrl_probe, + .remove = msm_pinctrl_remove, +-- +2.21.0 -- cgit