From 31e9d3500ae3d61411315adefd59e0f92e63135a Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Sun, 30 Apr 2017 21:14:52 +0100 Subject: Add initial ASUS Tinker board support --- arm-rk3288-tinker.patch | 573 ++++++++++++++++++++++++++++++++++++++++++++++++ kernel.spec | 5 + 2 files changed, 578 insertions(+) create mode 100644 arm-rk3288-tinker.patch diff --git a/arm-rk3288-tinker.patch b/arm-rk3288-tinker.patch new file mode 100644 index 000000000..d7a4897b3 --- /dev/null +++ b/arm-rk3288-tinker.patch @@ -0,0 +1,573 @@ +From 223599514133293bb9afe7b82937140c3b275877 Mon Sep 17 00:00:00 2001 +From: Eddie Cai +Date: Tue, 14 Feb 2017 18:07:31 +0800 +Subject: ARM: dts: rockchip: add dts for RK3288-Tinker board + +This patch add basic support for RK3288-Tinker board. We can boot in to rootfs +with this patch. + +Signed-off-by: Eddie Cai +Signed-off-by: Heiko Stuebner +--- + arch/arm/boot/dts/Makefile | 1 + + arch/arm/boot/dts/rk3288-tinker.dts | 536 ++++++++++++++++++++++++++++++++++++ + 2 files changed, 537 insertions(+) + create mode 100644 arch/arm/boot/dts/rk3288-tinker.dts + +diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile +index 0118084..fb46849 100644 +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -695,6 +695,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ + rk3288-popmetal.dtb \ + rk3288-r89.dtb \ + rk3288-rock2-square.dtb \ ++ rk3288-tinker.dtb \ + rk3288-veyron-brain.dtb \ + rk3288-veyron-jaq.dtb \ + rk3288-veyron-jerry.dtb \ +diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts +new file mode 100644 +index 0000000..f601c78 +--- /dev/null ++++ b/arch/arm/boot/dts/rk3288-tinker.dts +@@ -0,0 +1,536 @@ ++/* ++ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++ ++#include "rk3288.dtsi" ++#include ++ ++/ { ++ model = "Rockchip RK3288 Tinker Board"; ++ compatible = "asus,rk3288-tinker", "rockchip,rk3288"; ++ ++ memory { ++ reg = <0x0 0x80000000>; ++ device_type = "memory"; ++ }; ++ ++ ext_gmac: external-gmac-clock { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <125000000>; ++ clock-output-names = "ext_gmac"; ++ }; ++ ++ gpio-keys { ++ compatible = "gpio-keys"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ autorepeat; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwrbtn>; ++ ++ button@0 { ++ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; ++ linux,code = ; ++ label = "GPIO Key Power"; ++ linux,input-type = <1>; ++ wakeup-source; ++ debounce-interval = <100>; ++ }; ++ }; ++ ++ gpio-leds { ++ compatible = "gpio-leds"; ++ ++ act-led { ++ gpios=<&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger="mmc0"; ++ }; ++ ++ heartbeat-led { ++ gpios=<&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger="heartbeat"; ++ }; ++ ++ pwr-led { ++ gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "default-on"; ++ }; ++ }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "rockchip,tinker-codec"; ++ simple-audio-card,mclk-fs = <512>; ++ ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; ++ }; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s>; ++ }; ++ }; ++ ++ vcc_sys: vsys-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio7 11 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc_pwr>; ++ regulator-name = "vcc_sd"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ vin-supply = <&vcc_io>; ++ }; ++}; ++ ++&cpu0 { ++ cpu0-supply = <&vdd_cpu>; ++}; ++ ++&gmac { ++ assigned-clocks = <&cru SCLK_MAC>; ++ assigned-clock-parents = <&ext_gmac>; ++ clock_in_out = "input"; ++ phy-mode = "rgmii"; ++ phy-supply = <&vcc33_lan>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ snps,reset-gpio = <&gpio4 7 0>; ++ snps,reset-active-low; ++ snps,reset-delays-us = <0 10000 1000000>; ++ tx_delay = <0x30>; ++ rx_delay = <0x10>; ++ status = "ok"; ++}; ++ ++&hdmi { ++ ddc-i2c-bus = <&i2c5>; ++ status = "okay"; ++}; ++ ++&i2c0 { ++ clock-frequency = <400000>; ++ status = "okay"; ++ ++ rk808: pmic@1b { ++ compatible = "rockchip,rk808"; ++ reg = <0x1b>; ++ interrupt-parent = <&gpio0>; ++ interrupts = <4 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk808-clkout2"; ++ dvs-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>, ++ <&gpio0 12 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int &global_pwroff &dvs_1 &dvs_2>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vcc_sys>; ++ vcc2-supply = <&vcc_sys>; ++ vcc3-supply = <&vcc_sys>; ++ vcc4-supply = <&vcc_sys>; ++ vcc6-supply = <&vcc_sys>; ++ vcc7-supply = <&vcc_sys>; ++ vcc8-supply = <&vcc_io>; ++ vcc9-supply = <&vcc_io>; ++ vcc10-supply = <&vcc_io>; ++ vcc11-supply = <&vcc_sys>; ++ vcc12-supply = <&vcc_io>; ++ vddio-supply = <&vcc_io>; ++ ++ regulators { ++ vdd_cpu: DCDC_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-name = "vdd_arm"; ++ regulator-ramp-delay = <6000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: DCDC_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <1250000>; ++ regulator-name = "vdd_gpu"; ++ regulator-ramp-delay = <6000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_ddr"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io: DCDC_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc_io"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc18_ldo1: LDO_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc18_ldo1"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc33_mipi: LDO_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc33_mipi"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_10: LDO_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ regulator-name = "vdd_10"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vcc18_codec: LDO_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc18_codec"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vccio_sd: LDO_REG5 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_sd"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vdd10_lcd: LDO_REG6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ regulator-name = "vdd10_lcd"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vcc_18: LDO_REG7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_18"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_lcd: LDO_REG8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc18_lcd"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc33_sd: SWITCH_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc33_sd"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc33_lan: SWITCH_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc33_lan"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2c2 { ++ status = "okay"; ++}; ++ ++&i2c5 { ++ status = "okay"; ++}; ++ ++&i2s { ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&io_domains { ++ status = "okay"; ++ ++ sdcard-supply = <&vccio_sd>; ++}; ++ ++&pinctrl { ++ pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma { ++ drive-strength = <8>; ++ }; ++ ++ pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma { ++ bias-pull-up; ++ drive-strength = <8>; ++ }; ++ ++ backlight { ++ bl_en: bl-en { ++ rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ buttons { ++ pwrbtn: pwrbtn { ++ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ eth_phy { ++ eth_phy_pwr: eth-phy-pwr { ++ rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int: pmic-int { ++ rockchip,pins = ; ++ }; ++ ++ dvs_1: dvs-1 { ++ rockchip,pins = ; ++ }; ++ ++ dvs_2: dvs-2 { ++ rockchip,pins = ; ++ }; ++ }; ++ ++ sdmmc { ++ sdmmc_bus4: sdmmc-bus4 { ++ rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, ++ <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, ++ <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, ++ <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; ++ }; ++ ++ sdmmc_clk: sdmmc-clk { ++ rockchip,pins = <6 20 RK_FUNC_1 \ ++ &pcfg_pull_none_drv_8ma>; ++ }; ++ ++ sdmmc_cmd: sdmmc-cmd { ++ rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; ++ }; ++ ++ sdmmc_pwr: sdmmc-pwr { ++ rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb { ++ host_vbus_drv: host-vbus-drv { ++ rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ pwr_3g: pwr-3g { ++ rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pwm0 { ++ status = "okay"; ++}; ++ ++&saradc { ++ vref-supply = <&vcc18_ldo1>; ++ status ="okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ card-detect-delay = <200>; ++ disable-wp; /* wp not hooked up */ ++ num-slots = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; ++ status = "okay"; ++ vmmc-supply = <&vcc33_sd>; ++ vqmmc-supply = <&vccio_sd>; ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ ++ rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ ++ status = "okay"; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; ++ ++&uart1 { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&uart3 { ++ status = "okay"; ++}; ++ ++&uart4 { ++ status = "okay"; ++}; ++ ++&usbphy { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1 { ++ status = "okay"; ++}; ++ ++&usb_otg { ++ status= "okay"; ++}; ++ ++&vopb { ++ status = "okay"; ++}; ++ ++&vopb_mmu { ++ status = "okay"; ++}; ++ ++&vopl { ++ status = "okay"; ++}; ++ ++&vopl_mmu { ++ status = "okay"; ++}; ++ ++&wdt { ++ status = "okay"; ++}; +-- +cgit v1.1 + diff --git a/kernel.spec b/kernel.spec index e3200fffc..0b6167554 100644 --- a/kernel.spec +++ b/kernel.spec @@ -537,6 +537,8 @@ Patch429: arm64-hikey-fixes.patch # http://www.spinics.net/lists/devicetree/msg163238.html Patch430: bcm2837-initial-support.patch +Patch431: arm-rk3288-tinker.patch + # http://www.spinics.net/lists/dri-devel/msg132235.html Patch433: drm-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO..patch @@ -2186,6 +2188,9 @@ fi # # %changelog +* Sun Apr 30 2017 Peter Robinson +- Add initial ASUS Tinker board support + * Fri Apr 28 2017 Laura Abbott - 4.11.0-0.rc8.git4.1 - Linux v4.11-rc8-87-g8b5d11e -- cgit From 5865c6939346cfe1d2b18e09e66aa477b60f5086 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Mon, 1 May 2017 08:10:04 +0100 Subject: cleanup a few remanent s390 arch defines --- kernel.spec | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/kernel.spec b/kernel.spec index 0b6167554..15cd1ca73 100644 --- a/kernel.spec +++ b/kernel.spec @@ -219,7 +219,7 @@ Summary: The Linux kernel %if %{with_vdso_install} # These arches install vdso/ directories. -%define vdso_arches %{all_x86} x86_64 %{power64} s390 s390x aarch64 +%define vdso_arches %{all_x86} x86_64 %{power64} s390x aarch64 %endif # Overrides for generic default options @@ -329,7 +329,7 @@ Summary: The Linux kernel # Which is a BadThing(tm). # We only build kernel-headers on the following... -%define nobuildarches i386 s390 +%define nobuildarches i386 %ifarch %nobuildarches %define with_up 0 @@ -364,7 +364,7 @@ Version: %{rpmversion} Release: %{pkg_release} # DO NOT CHANGE THE 'ExclusiveArch' LINE TO TEMPORARILY EXCLUDE AN ARCHITECTURE BUILD. # SET %%nobuildarches (ABOVE) INSTEAD -ExclusiveArch: %{all_x86} x86_64 ppc64 ppc64p7 s390 s390x %{arm} aarch64 ppc64le +ExclusiveArch: %{all_x86} x86_64 ppc64 ppc64p7 s390x %{arm} aarch64 ppc64le ExclusiveOS: Linux %ifnarch %{nobuildarches} Requires: kernel-core-uname-r = %{KVERREL}%{?variant} @@ -385,7 +385,7 @@ BuildRequires: sparse %if %{with_perf} BuildRequires: zlib-devel binutils-devel newt-devel python-devel perl(ExtUtils::Embed) bison flex xz-devel BuildRequires: audit-libs-devel -%ifnarch s390 s390x %{arm} +%ifnarch s390x %{arm} BuildRequires: numactl-devel %endif %endif -- cgit From 768f1ac7ad70c166e65b4b613c258414decbcc20 Mon Sep 17 00:00:00 2001 From: Laura Abbott Date: Mon, 1 May 2017 08:06:59 -0700 Subject: Disable debugging options. --- kernel.spec | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/kernel.spec b/kernel.spec index 15cd1ca73..d2f59ba12 100644 --- a/kernel.spec +++ b/kernel.spec @@ -125,7 +125,7 @@ Summary: The Linux kernel # Set debugbuildsenabled to 1 for production (build separate debug kernels) # and 0 for rawhide (all kernels are debug kernels). # See also 'make debug' and 'make release'. -%define debugbuildsenabled 0 +%define debugbuildsenabled 1 # Want to build a vanilla kernel build without any non-upstream patches? %define with_vanilla %{?_with_vanilla: 1} %{?!_with_vanilla: 0} @@ -2188,6 +2188,9 @@ fi # # %changelog +* Mon May 01 2017 Laura Abbott +- Disable debugging options. + * Sun Apr 30 2017 Peter Robinson - Add initial ASUS Tinker board support -- cgit From a0fec333d0b5623db0d5b55710348163450a31cf Mon Sep 17 00:00:00 2001 From: Laura Abbott Date: Mon, 1 May 2017 08:17:08 -0700 Subject: Linux v4.11 --- kernel.spec | 11 +++++++---- sources | 6 ++---- 2 files changed, 9 insertions(+), 8 deletions(-) diff --git a/kernel.spec b/kernel.spec index d2f59ba12..31d64193d 100644 --- a/kernel.spec +++ b/kernel.spec @@ -6,7 +6,7 @@ Summary: The Linux kernel # For a stable, released kernel, released_kernel should be 1. For rawhide # and/or a kernel built from an rc or git snapshot, released_kernel should # be 0. -%global released_kernel 0 +%global released_kernel 1 # Sign modules on x86. Make sure the config files match this setting if more # architectures are added. @@ -48,7 +48,7 @@ Summary: The Linux kernel # base_sublevel is the kernel version we're starting with and patching # on top of -- for example, 3.1-rc7-git1 starts with a 3.0 base, # which yields a base_sublevel of 0. -%define base_sublevel 10 +%define base_sublevel 11 ## If this is a released kernel ## %if 0%{?released_kernel} @@ -67,9 +67,9 @@ Summary: The Linux kernel # The next upstream release sublevel (base_sublevel+1) %define upstream_sublevel %(echo $((%{base_sublevel} + 1))) # The rc snapshot level -%global rcrev 8 +%global rcrev 0 # The git snapshot level -%define gitrev 4 +%define gitrev 0 # Set rpm version accordingly %define rpmversion 4.%{upstream_sublevel}.0 %endif @@ -2188,6 +2188,9 @@ fi # # %changelog +* Mon May 01 2017 Laura Abbott - 4.11.0-1 +- Linux v4.11 + * Mon May 01 2017 Laura Abbott - Disable debugging options. diff --git a/sources b/sources index a57c3d7bd..47d35657c 100644 --- a/sources +++ b/sources @@ -1,4 +1,2 @@ -SHA512 (linux-4.10.tar.xz) = c3690125a8402df638095bd98a613fcf1a257b81de7611c84711d315cd11e2634ab4636302b3742aedf1e3ba9ce0fea53fe8c7d48e37865d8ee5db3565220d90 -SHA512 (perf-man-4.10.tar.gz) = 2c830e06f47211d70a8330961487af73a8bc01073019475e6b6131d3bb8c95658b77ca0ae5f1b44371accf103658bc5a3a4366b3e017a4088a8fd408dd6867e8 -SHA512 (patch-4.11-rc8.xz) = 07a3b08ad1ef9323df14f19995bdc261c303a150d58159791697389701f01ade2fdb55937c3c08f362772dd3e1337e466d653de81a9d49ff1015f4482d77c375 -SHA512 (patch-4.11-rc8-git4.xz) = 7d186c95a0090346eaa9f3ee1afe0be54e2091ae1afdf95d98c083e75f90e54276c05c4ec3f75cb47598ed22258bc10c7b60760a9628d7805dd97cd79b9a96d5 +SHA512 (perf-man-4.11.tar.gz) = 0b070d2f10a743329de2f532e2d7e19ef385a3e6ef3c700b591ae2697604dbe542b36e31121b3e37517ee8071ab800386fa8663c24a5b36520a18e096c6eefc8 +SHA512 (linux-4.11.tar.xz) = 6610eed97ffb7207c71771198c36179b8244ace7222bebb109507720e26c5f17d918079a56d5febdd8605844d67fb2df0ebe910fa2f2f53690daf6e2a8ad09c3 -- cgit