From d6b86222cd06d4b4e428c0cc4bd0b6c072f32fea Mon Sep 17 00:00:00 2001 From: Kyle McMartin Date: Tue, 30 Sep 2014 16:19:47 -0400 Subject: Revert some v3.16 changes to mach-highbank which broke L2 cache enablement. Will debug upstream separately, but we need F22/21 running there. (#1139762) --- arm-highbank-l2-reverts.patch | 47 +++++++++++++++++++++++++++++++++++++++++++ kernel.spec | 8 ++++++++ 2 files changed, 55 insertions(+) create mode 100644 arm-highbank-l2-reverts.patch diff --git a/arm-highbank-l2-reverts.patch b/arm-highbank-l2-reverts.patch new file mode 100644 index 000000000..7e46d9200 --- /dev/null +++ b/arm-highbank-l2-reverts.patch @@ -0,0 +1,47 @@ +diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c +index 8c35ae4..38e1dc3 100644 +--- a/arch/arm/mach-highbank/highbank.c ++++ b/arch/arm/mach-highbank/highbank.c +@@ -51,13 +51,11 @@ static void __init highbank_scu_map_io(void) + } + + +-static void highbank_l2c310_write_sec(unsigned long val, unsigned reg) ++static void highbank_l2x0_disable(void) + { +- if (reg == L2X0_CTRL) +- highbank_smc1(0x102, val); +- else +- WARN_ONCE(1, "Highbank L2C310: ignoring write to reg 0x%x\n", +- reg); ++ outer_flush_all(); ++ /* Disable PL310 L2 Cache controller */ ++ highbank_smc1(0x102, 0x0); + } + + static void __init highbank_init_irq(void) +@@ -66,6 +64,14 @@ static void __init highbank_init_irq(void) + + if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9")) + highbank_scu_map_io(); ++ ++ /* Enable PL310 L2 Cache controller */ ++ if (IS_ENABLED(CONFIG_CACHE_L2X0) && ++ of_find_compatible_node(NULL, NULL, "arm,pl310-cache")) { ++ highbank_smc1(0x102, 0x1); ++ l2x0_of_init(0, ~0); ++ outer_cache.disable = highbank_l2x0_disable; ++ } + } + + static void highbank_power_off(void) +@@ -179,9 +185,6 @@ DT_MACHINE_START(HIGHBANK, "Highbank") + #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE) + .dma_zone_size = (4ULL * SZ_1G), + #endif +- .l2c_aux_val = 0, +- .l2c_aux_mask = ~0, +- .l2c_write_sec = highbank_l2c310_write_sec, + .init_irq = highbank_init_irq, + .init_machine = highbank_init, + .dt_compat = highbank_match, diff --git a/kernel.spec b/kernel.spec index fb7782cc8..02a9f15cb 100644 --- a/kernel.spec +++ b/kernel.spec @@ -583,6 +583,8 @@ Patch21026: pinctrl-pinctrl-single-must-be-initialized-early.patch Patch21028: arm-i.MX6-Utilite-device-dtb.patch Patch21029: arm-dts-sun7i-bananapi.patch +Patch21100: arm-highbank-l2-reverts.patch + #rhbz 754518 Patch21235: scsi-sd_revalidate_disk-prevent-NULL-ptr-deref.patch @@ -1214,6 +1216,8 @@ ApplyPatch pinctrl-pinctrl-single-must-be-initialized-early.patch ApplyPatch arm-i.MX6-Utilite-device-dtb.patch ApplyPatch arm-dts-sun7i-bananapi.patch +ApplyPatch arm-highbank-l2-reverts.patch + # # bugfixes to drivers and filesystems # @@ -2226,6 +2230,10 @@ fi # ||----w | # || || %changelog +* Tue Sep 30 2014 Kyle McMartin +- Revert some v3.16 changes to mach-highbank which broke L2 cache enablement. + Will debug upstream separately, but we need F22/21 running there. (#1139762) + * Tue Sep 30 2014 Peter Robinson - Don't build Exynos4 on lpae kernel - Add dts for BananaPi -- cgit