From 37ff69b901efe19de5cd01093f048dd966660ae3 Mon Sep 17 00:00:00 2001 From: Jeremy Cline Date: Tue, 27 Feb 2018 09:40:26 -0500 Subject: Linux v4.16-rc3-88-g6f70eb2b00eb --- arm-gcc-8-build-fixes.patch | 164 -------------------------------------------- gitrev | 2 +- kernel.spec | 9 ++- sources | 1 + 4 files changed, 8 insertions(+), 168 deletions(-) delete mode 100644 arm-gcc-8-build-fixes.patch diff --git a/arm-gcc-8-build-fixes.patch b/arm-gcc-8-build-fixes.patch deleted file mode 100644 index 82b3165c3..000000000 --- a/arm-gcc-8-build-fixes.patch +++ /dev/null @@ -1,164 +0,0 @@ -From patchwork Fri Feb 2 15:07:34 2018 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [1/2] ARM: kvm: fix building with gcc-8 -From: Arnd Bergmann -X-Patchwork-Id: 10196985 -Message-Id: <20180202150756.420422-1-arnd@arndb.de> -To: Christoffer Dall , - Marc Zyngier , Russell King -Cc: Nicolas Pitre , Andi Kleen , - Richard Earnshaw , - Tamar Christina , - Arnd Bergmann , stable@vger.kernel.org, - Julien Thierry , - linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, - linux-kernel@vger.kernel.org -Date: Fri, 2 Feb 2018 16:07:34 +0100 - -In banked-sr.c, we use a top-level '__asm__(".arch_extension virt")' -statement to allow compilation of a multi-CPU kernel for ARMv6 -and older ARMv7-A that don't normally support access to the banked -registers. - -This is considered to be a programming error by the gcc developers -and will no longer work in gcc-8, where we now get a build error: - -/tmp/cc4Qy7GR.s:34: Error: Banked registers are not available with this architecture. -- `mrs r3,SP_usr' -/tmp/cc4Qy7GR.s:41: Error: Banked registers are not available with this architecture. -- `mrs r3,ELR_hyp' -/tmp/cc4Qy7GR.s:55: Error: Banked registers are not available with this architecture. -- `mrs r3,SP_svc' -/tmp/cc4Qy7GR.s:62: Error: Banked registers are not available with this architecture. -- `mrs r3,LR_svc' -/tmp/cc4Qy7GR.s:69: Error: Banked registers are not available with this architecture. -- `mrs r3,SPSR_svc' -/tmp/cc4Qy7GR.s:76: Error: Banked registers are not available with this architecture. -- `mrs r3,SP_abt' - -Passign the '-march-armv7ve' flag to gcc works, and is ok here, because -we know the functions won't ever be called on pre-ARMv7VE machines. -Unfortunately, older compiler versions (4.8 and earlier) do not understand -that flag, so we still need to keep the asm around. - -Backporting to stable kernels (4.6+) is needed to allow those to be built -with future compilers as well. - -Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84129 -Fixes: 33280b4cd1dc ("ARM: KVM: Add banked registers save/restore") -Cc: stable@vger.kernel.org -Signed-off-by: Arnd Bergmann -Acked-by: Christoffer Dall ---- - arch/arm/kvm/hyp/Makefile | 5 +++++ - arch/arm/kvm/hyp/banked-sr.c | 4 ++++ - 2 files changed, 9 insertions(+) - -diff --git a/arch/arm/kvm/hyp/Makefile b/arch/arm/kvm/hyp/Makefile -index 5638ce0c9524..63d6b404d88e 100644 ---- a/arch/arm/kvm/hyp/Makefile -+++ b/arch/arm/kvm/hyp/Makefile -@@ -7,6 +7,8 @@ ccflags-y += -fno-stack-protector -DDISABLE_BRANCH_PROFILING - - KVM=../../../../virt/kvm - -+CFLAGS_ARMV7VE :=$(call cc-option, -march=armv7ve) -+ - obj-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/hyp/vgic-v2-sr.o - obj-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/hyp/vgic-v3-sr.o - obj-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/hyp/timer-sr.o -@@ -15,7 +17,10 @@ obj-$(CONFIG_KVM_ARM_HOST) += tlb.o - obj-$(CONFIG_KVM_ARM_HOST) += cp15-sr.o - obj-$(CONFIG_KVM_ARM_HOST) += vfp.o - obj-$(CONFIG_KVM_ARM_HOST) += banked-sr.o -+CFLAGS_banked-sr.o += $(CFLAGS_ARMV7VE) -+ - obj-$(CONFIG_KVM_ARM_HOST) += entry.o - obj-$(CONFIG_KVM_ARM_HOST) += hyp-entry.o - obj-$(CONFIG_KVM_ARM_HOST) += switch.o -+CFLAGS_switch.o += $(CFLAGS_ARMV7VE) - obj-$(CONFIG_KVM_ARM_HOST) += s2-setup.o -diff --git a/arch/arm/kvm/hyp/banked-sr.c b/arch/arm/kvm/hyp/banked-sr.c -index 111bda8cdebd..be4b8b0a40ad 100644 ---- a/arch/arm/kvm/hyp/banked-sr.c -+++ b/arch/arm/kvm/hyp/banked-sr.c -@@ -20,6 +20,10 @@ - - #include - -+/* -+ * gcc before 4.9 doesn't understand -march=armv7ve, so we have to -+ * trick the assembler. -+ */ - __asm__(".arch_extension virt"); - - void __hyp_text __banked_save_state(struct kvm_cpu_context *ctxt) -From patchwork Fri Feb 2 15:07:35 2018 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [2/2] ARM: xscale: fix gcc-8 build -From: Arnd Bergmann -X-Patchwork-Id: 10196991 -Message-Id: <20180202150756.420422-2-arnd@arndb.de> -To: Russell King -Cc: Nicolas Pitre , Andi Kleen , - Richard Earnshaw , - Tamar Christina , Arnd Bergmann , - linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org -Date: Fri, 2 Feb 2018 16:07:35 +0100 - -We use a hack in xscale-cp0.c to allow building it for ARMv4 while -also using ARMv5TE and iWMMXt specific inline assembly, by -adding a top-level asm statement. - -Unfortunately that hack no longer works with gcc-8, since it will -revert back to the normal architecture. The recommended way of -handling this is to use __attribute__((target("armv5te"))) on the -functions that need it, or #pragma GCC target("arch=armv5te"). -Either of those work with gcc-8, but not earlier versions, and -it seems worse to combine that with the old hack. - -Instead, this adds the .arch statement to each inline assembler -statement that needs it individually. That is also slightly uglier -than the previous hack, but it works with all compiler versions -and documents better why we need the override in the first place. - -Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84129 -Signed-off-by: Arnd Bergmann -Acked-by: Nicolas Pitre ---- - arch/arm/kernel/xscale-cp0.c | 7 ++++--- - 1 file changed, 4 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/kernel/xscale-cp0.c b/arch/arm/kernel/xscale-cp0.c -index 77a2eef72115..e06a2f6dac4f 100644 ---- a/arch/arm/kernel/xscale-cp0.c -+++ b/arch/arm/kernel/xscale-cp0.c -@@ -17,11 +17,10 @@ - #include - #include - --asm(" .arch armv5te\n"); -- - static inline void dsp_save_state(u32 *state) - { - __asm__ __volatile__ ( -+ ".arch armv5te\n\t" - "mrrc p0, 0, %0, %1, c0\n" - : "=r" (state[0]), "=r" (state[1])); - } -@@ -29,6 +28,7 @@ static inline void dsp_save_state(u32 *state) - static inline void dsp_load_state(u32 *state) - { - __asm__ __volatile__ ( -+ ".arch armv5te\n\t" - "mcrr p0, 0, %0, %1, c0\n" - : : "r" (state[0]), "r" (state[1])); - } -@@ -134,7 +134,8 @@ static int __init cpu_has_iwmmxt(void) - * tmrrc %0, %1, wR0 - */ - __asm__ __volatile__ ( -- "mcrr p0, 0, %2, %3, c0\n" -+ ".arch armv5te\n\t" -+ "mcrr p0, 0, %2, %3, c0\n\t" - "mrrc p0, 0, %0, %1, c0\n" - : "=r" (lo), "=r" (hi) - : "r" (0), "r" (0x100)); diff --git a/gitrev b/gitrev index c3d874bc3..d21f16c4d 100644 --- a/gitrev +++ b/gitrev @@ -1 +1 @@ -0f9da844d87796ac31b04e81ee95e155e9043132 +6f70eb2b00eb416146247c65003d31f4df983ce0 diff --git a/kernel.spec b/kernel.spec index 3dc4df365..d795d09bc 100644 --- a/kernel.spec +++ b/kernel.spec @@ -69,7 +69,7 @@ Summary: The Linux kernel # The rc snapshot level %global rcrev 3 # The git snapshot level -%define gitrev 0 +%define gitrev 1 # Set rpm version accordingly %define rpmversion 4.%{upstream_sublevel}.0 %endif @@ -124,7 +124,7 @@ Summary: The Linux kernel # Set debugbuildsenabled to 1 for production (build separate debug kernels) # and 0 for rawhide (all kernels are debug kernels). # See also 'make debug' and 'make release'. -%define debugbuildsenabled 1 +%define debugbuildsenabled 0 %if %{with_verbose} %define make_opts V=1 @@ -507,7 +507,6 @@ Source5000: patch-4.%{base_sublevel}-git%{gitrev}.xz # ongoing complaint, full discussion delayed until ksummit/plumbers Patch002: 0001-iio-Use-event-header-from-kernel-tree.patch -Patch003: arm-gcc-8-build-fixes.patch %if !%{nopatches} @@ -1878,6 +1877,10 @@ fi # # %changelog +* Tue Feb 27 2018 Jeremy Cline - 4.16.0-0.rc3.git1.1 +- Linux v4.16-rc3-88-g6f70eb2b00eb +- Re-enable debugging options + * Mon Feb 26 2018 Jeremy Cline - 4.16.0-0.rc3.git0.1 - Linux v4.16-rc3 diff --git a/sources b/sources index f5530c2ac..d6550350f 100644 --- a/sources +++ b/sources @@ -1,2 +1,3 @@ SHA512 (linux-4.15.tar.xz) = c00d92659df815a53dcac7dde145b742b1f20867d380c07cb09ddb3295d6ff10f8931b21ef0b09d7156923a3957b39d74d87c883300173b2e20690d2b4ec35ea SHA512 (patch-4.16-rc3.xz) = fd7bbfd9ca423b06341ed83c86417443978d371ddf35987edfc3fcd75b674f24198913a7cab27cb3ff832ade52ae1feba5f9bff303bf6af7fbb64d517e730bb1 +SHA512 (patch-4.16-rc3-git1.xz) = 9ba6a55980ca7c9c8afc893b9152face2e584634640dd3b12a0aab0bbcd5868db1be0b62ea5586db4509ca030525ada47b05d5845115a3df5ad0ef8bfc3d5547 -- cgit