From 71893eb2f68d8dd59d462be73e9832ccb4ccfe9d Mon Sep 17 00:00:00 2001 From: "Justin M. Forbes" Date: Tue, 21 Apr 2020 08:43:50 -0500 Subject: Linux v5.6.6 rebase --- ...-workaround-runpm-fail-by-disabling-PCI-p.patch | 141 + ...ualBox-guest-shared-folder-vboxsf-support.patch | 3487 -------------------- ...-gr-gp107-gp108-implement-workaround-for-.patch | 68 + 20200310_chris_chris_wilson_co_uk.patch | 559 ---- ...Enable-thermal-support-for-Raspberry-Pi-4.patch | 905 ----- ARM-dts-bcm2711-Move-emmc2-into-its-own-bus.patch | 168 + ARM64-Tegra-fixes.patch | 477 +++ Add-LCD-support-for-Pine64-Pinebook-1080p.patch | 1033 ++++++ Add-support-for-PinePhone-LCD-panel.patch | 1121 +++++++ Add-support-for-the-pine64-Pinebook-Pro.patch | 1360 ++++++++ ...MCFG-quirks-for-Tegra194-host-controllers.patch | 481 +++ Raspberry-Pi-4-PCIe-support.patch | 1995 ----------- USB-pci-quirks-Add-Raspberry-Pi-4-quirk.patch | 671 ++++ alsa-5.6.patch | 398 --- ...sdhci-iproc-Add-custom-set_power-callback.patch | 374 +++ ...cm2835-serial-8250_early-support-aux-uart.patch | 47 + arm64-Fix-some-GPIO-setup-on-Pinebook-Pro.patch | 50 + arm64-a64-mbus.patch | 69 + ...Fix-SMMU-support-on-Tegra124-and-Tegra210.patch | 320 ++ ...-imx8mq-phanbell-Add-support-for-ethernet.patch | 200 ++ arm64-pine64-pinephone.patch | 568 ++++ arm64-pine64-pinetab.patch | 583 ++++ arm64-pinebook-fixes.patch | 429 +++ ...0_tegra-Create-Tegra-specific-8250-driver.patch | 396 +++ ...-Jetson-TX2-Allow-bootloader-to-configure.patch | 29 - arm64-tegra-fix-pcie.patch | 101 + arm64-tegra-jetson-tx1-fixes.patch | 39 - ...-regulators-are-disabled-on-probe-failure.patch | 186 ++ ...m-v3d-Add-ARCH_BCM2835-to-DRM_V3D-Kconfig.patch | 30 - configs/fedora/generic/CONFIG_AD7091R5 | 1 + configs/fedora/generic/CONFIG_ARCH_RANDOM | 1 + configs/fedora/generic/CONFIG_ATH11K | 1 + configs/fedora/generic/CONFIG_BACKLIGHT_LED | 1 + configs/fedora/generic/CONFIG_BCM84881_PHY | 1 + configs/fedora/generic/CONFIG_BMA400 | 1 + configs/fedora/generic/CONFIG_BOOTTIME_TRACING | 1 + configs/fedora/generic/CONFIG_BOOT_CONFIG | 1 + configs/fedora/generic/CONFIG_CAN_UCAN | 2 +- configs/fedora/generic/CONFIG_CAPI_AVM | 1 - configs/fedora/generic/CONFIG_COMMON_CLK_FSL_SAI | 1 + configs/fedora/generic/CONFIG_CPU_FREQ_THERMAL | 1 + configs/fedora/generic/CONFIG_DLHL60D | 1 + configs/fedora/generic/CONFIG_DMABUF_HEAPS | 1 + configs/fedora/generic/CONFIG_DM_CLONE | 2 +- configs/fedora/generic/CONFIG_DRM_ANALOGIX_ANX6345 | 1 + configs/fedora/generic/CONFIG_DRM_DP_CEC | 2 +- configs/fedora/generic/CONFIG_DRM_LVDS_CODEC | 1 + configs/fedora/generic/CONFIG_DRM_LVDS_ENCODER | 1 - .../fedora/generic/CONFIG_DRM_PANEL_BOE_HIMAX8279D | 1 + .../generic/CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 | 1 + .../fedora/generic/CONFIG_DRM_PANEL_SONY_ACX424AKP | 1 + .../generic/CONFIG_DRM_PANEL_XINGBANGDA_XBD599 | 1 + .../generic/CONFIG_DRM_PANEL_XINPENG_XPP055C272 | 1 + configs/fedora/generic/CONFIG_EFI_DISABLE_PCI_DMA | 1 + configs/fedora/generic/CONFIG_ETHTOOL_NETLINK | 1 + configs/fedora/generic/CONFIG_EXFAT_FS | 1 - configs/fedora/generic/CONFIG_F2FS_FS_COMPRESSION | 1 + configs/fedora/generic/CONFIG_F2FS_FS_LZ4 | 1 + configs/fedora/generic/CONFIG_F2FS_FS_LZO | 1 + configs/fedora/generic/CONFIG_GIGASET_BASE | 1 - configs/fedora/generic/CONFIG_GIGASET_CAPI | 1 - configs/fedora/generic/CONFIG_GIGASET_DEBUG | 1 - configs/fedora/generic/CONFIG_GIGASET_M101 | 1 - configs/fedora/generic/CONFIG_GIGASET_M105 | 1 - configs/fedora/generic/CONFIG_GPIO_LOGICVC | 1 + configs/fedora/generic/CONFIG_GPIO_MPC8XXX | 1 - configs/fedora/generic/CONFIG_GPIO_SIFIVE | 1 + configs/fedora/generic/CONFIG_HYSDN | 1 - configs/fedora/generic/CONFIG_HYSDN_CAPI | 1 - configs/fedora/generic/CONFIG_I2C_PARPORT_LIGHT | 1 - configs/fedora/generic/CONFIG_INET_ESPINTCP | 1 + .../generic/CONFIG_INITRAMFS_COMPRESSION_BZIP2 | 1 + .../generic/CONFIG_INITRAMFS_COMPRESSION_GZIP | 1 + .../generic/CONFIG_INITRAMFS_COMPRESSION_LZ4 | 1 + .../generic/CONFIG_INITRAMFS_COMPRESSION_LZMA | 1 + .../generic/CONFIG_INITRAMFS_COMPRESSION_LZO | 1 + .../generic/CONFIG_INITRAMFS_COMPRESSION_NONE | 1 + .../fedora/generic/CONFIG_INITRAMFS_COMPRESSION_XZ | 1 + .../fedora/generic/CONFIG_KPROBE_EVENT_GEN_TEST | 1 + configs/fedora/generic/CONFIG_LTC2496 | 1 + configs/fedora/generic/CONFIG_MFD_ROHM_BD71828 | 1 + configs/fedora/generic/CONFIG_MFD_WCD934X | 1 + configs/fedora/generic/CONFIG_MICROCHIP_PIT64B | 1 + configs/fedora/generic/CONFIG_MPTCP | 1 + configs/fedora/generic/CONFIG_MPTCP_HMAC_TEST | 1 + configs/fedora/generic/CONFIG_MPTCP_IPV6 | 1 + configs/fedora/generic/CONFIG_MSM_MMCC_8998 | 1 + configs/fedora/generic/CONFIG_MTD_NAND_FSL_IFC | 1 - configs/fedora/generic/CONFIG_NET_DSA_AR9331 | 1 + configs/fedora/generic/CONFIG_NET_DSA_TAG_AR9331 | 1 + configs/fedora/generic/CONFIG_NET_SCH_ETS | 1 + configs/fedora/generic/CONFIG_NET_SCH_FQ_PIE | 1 + configs/fedora/generic/CONFIG_NFSD_V4_2_INTER_SSC | 1 + .../fedora/generic/CONFIG_NFS_DISABLE_UDP_SUPPORT | 1 + configs/fedora/generic/CONFIG_PHY_INTEL_EMMC | 1 + configs/fedora/generic/CONFIG_PING | 1 + configs/fedora/generic/CONFIG_PLX_DMA | 1 + configs/fedora/generic/CONFIG_PTDUMP_DEBUGFS | 1 + configs/fedora/generic/CONFIG_PTP_1588_CLOCK_INES | 1 + configs/fedora/generic/CONFIG_QCOM_CPR | 1 + .../generic/CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT | 1 - configs/fedora/generic/CONFIG_REGULATOR_MP8859 | 1 + configs/fedora/generic/CONFIG_REGULATOR_MPQ7920 | 1 + .../fedora/generic/CONFIG_REGULATOR_VQMMC_IPQ4019 | 1 + configs/fedora/generic/CONFIG_RESET_BRCMSTB_RESCAL | 1 + configs/fedora/generic/CONFIG_RESET_INTEL_GW | 1 + configs/fedora/generic/CONFIG_SC_DISPCC_7180 | 1 + configs/fedora/generic/CONFIG_SC_GPUCC_7180 | 1 + configs/fedora/generic/CONFIG_SC_VIDEOCC_7180 | 1 + .../CONFIG_SECURITY_SELINUX_SID2STR_CACHE_SIZE | 1 + .../CONFIG_SECURITY_SELINUX_SIDTAB_HASH_BITS | 1 + configs/fedora/generic/CONFIG_SENSORS_ADM1177 | 1 + configs/fedora/generic/CONFIG_SENSORS_DRIVETEMP | 1 + configs/fedora/generic/CONFIG_SENSORS_MAX20730 | 1 + configs/fedora/generic/CONFIG_SENSORS_MAX31730 | 1 + configs/fedora/generic/CONFIG_SENSORS_XDPE122 | 1 + .../generic/CONFIG_SERIAL_8250_16550A_VARIANTS | 1 + configs/fedora/generic/CONFIG_SND_CTL_VALIDATION | 1 + configs/fedora/generic/CONFIG_SND_SOC_MT6660 | 1 + configs/fedora/generic/CONFIG_SND_SOC_RT1308_SDW | 1 + configs/fedora/generic/CONFIG_SND_SOC_RT700_SDW | 1 + configs/fedora/generic/CONFIG_SND_SOC_RT711_SDW | 1 + configs/fedora/generic/CONFIG_SND_SOC_RT715_SDW | 1 + configs/fedora/generic/CONFIG_SND_SOC_WSA881X | 1 + configs/fedora/generic/CONFIG_SPI_HISI_SFC_V3XX | 1 + configs/fedora/generic/CONFIG_STAGING_EXFAT_FS | 1 + configs/fedora/generic/CONFIG_STRICT_KERNEL_RWX | 1 + configs/fedora/generic/CONFIG_SYNTH_EVENT_GEN_TEST | 1 + configs/fedora/generic/CONFIG_THUNDERBOLT | 1 - configs/fedora/generic/CONFIG_VIRTIO_BLK_SCSI | 1 - configs/fedora/generic/CONFIG_VSOCKETS_LOOPBACK | 1 + configs/fedora/generic/CONFIG_WIREGUARD | 1 + configs/fedora/generic/CONFIG_WIREGUARD_DEBUG | 1 + configs/fedora/generic/CONFIG_X86_PTDUMP | 1 - configs/fedora/generic/CONFIG_ZONEFS_FS | 1 + .../generic/arm/CONFIG_ARM_IMX8M_DDRC_DEVFREQ | 1 + .../generic/arm/CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS | 1 + .../generic/arm/CONFIG_CRYPTO_DEV_QCE_ENABLE_ALL | 1 + .../generic/arm/CONFIG_CRYPTO_DEV_QCE_ENABLE_SHA | 1 + .../arm/CONFIG_CRYPTO_DEV_QCE_ENABLE_SKCIPHER | 1 + configs/fedora/generic/arm/CONFIG_DRM_LVDS_ENCODER | 1 - configs/fedora/generic/arm/CONFIG_GPIO_MPC8XXX | 1 + .../generic/arm/CONFIG_HW_RANDOM_IPROC_RNG200 | 1 + configs/fedora/generic/arm/CONFIG_IMX_DSP | 2 +- configs/fedora/generic/arm/CONFIG_INA2XX_ADC | 1 + .../generic/arm/CONFIG_INTERCONNECT_QCOM_MSM8916 | 1 + configs/fedora/generic/arm/CONFIG_IPQ_GCC_6018 | 1 + configs/fedora/generic/arm/CONFIG_MTD_DATAFLASH | 1 + .../fedora/generic/arm/CONFIG_MTD_DATAFLASH_OTP | 1 + .../generic/arm/CONFIG_MTD_DATAFLASH_WRITE_VERIFY | 1 + .../fedora/generic/arm/CONFIG_MTD_PHYSMAP_GEMINI | 1 + .../fedora/generic/arm/CONFIG_MTD_PHYSMAP_IXP4XX | 1 + configs/fedora/generic/arm/CONFIG_MTD_PHYSMAP_OF | 2 +- .../generic/arm/CONFIG_MTD_PHYSMAP_VERSATILE | 1 + configs/fedora/generic/arm/CONFIG_MTD_SST25L | 1 + configs/fedora/generic/arm/CONFIG_NVMEM_SPMI_SDAM | 1 + .../generic/arm/CONFIG_PHY_ROCKCHIP_DPHY_RX0 | 1 + configs/fedora/generic/arm/CONFIG_QCOM_SCM | 1 + .../arm/CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT | 1 + configs/fedora/generic/arm/CONFIG_QUICC_ENGINE | 1 + configs/fedora/generic/arm/CONFIG_ROCKCHIP_CDN_DP | 2 +- configs/fedora/generic/arm/CONFIG_RTC_DRV_PCF85363 | 1 + .../fedora/generic/arm/CONFIG_SERIAL_8250_TEGRA | 1 + configs/fedora/generic/arm/CONFIG_SND_IMX_SOC | 1 + .../fedora/generic/arm/CONFIG_SND_SOC_IMX_AUDMUX | 1 + .../fedora/generic/arm/CONFIG_SND_SOC_IMX_SGTL5000 | 1 + .../fedora/generic/arm/CONFIG_SND_SOC_IMX_SPDIF | 1 + configs/fedora/generic/arm/CONFIG_SND_SOC_WM8962 | 1 + configs/fedora/generic/arm/CONFIG_SUN8I_THERMAL | 1 + .../fedora/generic/arm/CONFIG_VIDEO_ROCKCHIP_ISP1 | 1 + .../fedora/generic/arm/aarch64/CONFIG_ARM64_E0PD | 1 + .../arm/aarch64/CONFIG_ARM64_ERRATUM_1530923 | 1 + .../arm/aarch64/CONFIG_ARM64_USE_LSE_ATOMICS | 1 + .../fedora/generic/arm/aarch64/CONFIG_CLK_IMX8MP | 1 + .../generic/arm/aarch64/CONFIG_CLK_LS1028A_PLLDIG | 1 + .../fedora/generic/arm/aarch64/CONFIG_CLK_QORIQ | 2 +- .../arm/aarch64/CONFIG_DRM_PANEL_XINGBANGDA_XBD599 | 1 + configs/fedora/generic/arm/aarch64/CONFIG_HISI_DMA | 1 + .../fedora/generic/arm/aarch64/CONFIG_INA2XX_ADC | 1 - .../generic/arm/aarch64/CONFIG_MTD_NAND_FSL_IFC | 1 + .../generic/arm/aarch64/CONFIG_NET_DSA_MSCC_FELIX | 1 + .../fedora/generic/arm/aarch64/CONFIG_OCTEONTX2_PF | 1 + .../generic/arm/aarch64/CONFIG_PINCTRL_IMX8MP | 1 + configs/fedora/generic/arm/aarch64/CONFIG_QCOM_CPR | 1 + .../fedora/generic/arm/aarch64/CONFIG_QCOM_SOCINFO | 1 - .../generic/arm/aarch64/CONFIG_QORIQ_CPUFREQ | 1 + .../generic/arm/aarch64/CONFIG_REGULATOR_MP8859 | 1 + .../fedora/generic/arm/aarch64/CONFIG_SND_IMX_SOC | 1 - .../generic/arm/aarch64/CONFIG_SOUNDWIRE_QCOM | 1 + .../generic/arm/aarch64/CONFIG_SPI_QCOM_GENI | 2 +- .../generic/arm/armv7/CONFIG_CRYPTO_DEV_OMAP_AES | 2 +- .../fedora/generic/arm/armv7/CONFIG_MTD_DATAFLASH | 1 - .../generic/arm/armv7/CONFIG_MTD_DATAFLASH_OTP | 1 - .../arm/armv7/CONFIG_MTD_DATAFLASH_WRITE_VERIFY | 1 - configs/fedora/generic/arm/armv7/CONFIG_MTD_SST25L | 1 - .../fedora/generic/arm/armv7/CONFIG_SOC_LS1021A | 1 + .../fedora/generic/arm/armv7/CONFIG_SPI_FSL_SPI | 1 + .../generic/arm/armv7/CONFIG_USB_MUSB_AM335X_CHILD | 1 - .../generic/arm/armv7/armv7/CONFIG_SND_IMX_SOC | 1 - .../arm/armv7/armv7/CONFIG_SND_SOC_IMX_AUDMUX | 1 - .../arm/armv7/armv7/CONFIG_SND_SOC_IMX_SGTL5000 | 1 - .../arm/armv7/armv7/CONFIG_SND_SOC_IMX_SPDIF | 1 - .../generic/arm/armv7/armv7/CONFIG_SND_SOC_WM8962 | 1 - .../generic/arm/armv7/armv7/CONFIG_SOC_LS1021A | 1 - .../generic/powerpc/CONFIG_HOTPLUG_PCI_POWERNV | 2 +- configs/fedora/generic/powerpc/CONFIG_QUICC_ENGINE | 1 + configs/fedora/generic/s390x/CONFIG_ARCH_RANDOM | 1 - configs/fedora/generic/s390x/CONFIG_ZLIB_DFLTCC | 1 + configs/fedora/generic/x86/CONFIG_EFI_RCI2_TABLE | 1 - .../fedora/generic/x86/CONFIG_I2C_PARPORT_LIGHT | 1 - .../CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON | 1 + configs/fedora/generic/x86/CONFIG_PCIE_INTEL_GW | 1 + configs/fedora/generic/x86/CONFIG_PHY_INTEL_EMMC | 1 + .../fedora/generic/x86/CONFIG_PINCTRL_LYNXPOINT | 1 + .../generic/x86/CONFIG_SND_HDA_PREALLOC_SIZE | 1 + .../x86/CONFIG_SND_SOC_INTEL_BDW_RT5650_MACH | 1 + .../CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC~ | 1 - ...CONFIG_SND_SOC_INTEL_SOF_CML_RT1011_RT5682_MACH | 1 - ...ONFIG_SND_SOC_INTEL_SOF_CML_RT1011_RT5682_MACH~ | 1 - .../CONFIG_SND_SOC_INTEL_SOF_DA7219_MAX98373_MACH | 1 + .../CONFIG_SND_SOC_SOF_HDA_ALWAYS_ENABLE_DMI_L1~ | 1 - .../generic/x86/CONFIG_STACKPROTECTOR_STRONG | 1 - configs/fedora/generic/x86/CONFIG_THUNDERBOLT_NET | 1 - configs/fedora/generic/x86/CONFIG_TIME_NS | 1 + configs/fedora/generic/x86/CONFIG_USB4 | 1 + configs/fedora/generic/x86/CONFIG_USB4_NET | 1 + configs/fedora/generic/x86/CONFIG_X86_INTEL_MPX | 1 - .../generic/x86/x86_64/CONFIG_EFI_RCI2_TABLE | 1 + .../fedora/generic/x86/x86_64/CONFIG_INTEL_IDXD | 1 + .../x86/x86_64/CONFIG_INTEL_UNCORE_FREQ_CONTROL | 1 + .../fedora/generic/x86/x86_64/CONFIG_THUNDERBOLT | 1 - drm-dp-mst-error-handling-improvements.patch | 471 +++ drm-i915-backports.patch | 894 +++++ drm-vc4-Fix-HDMI-mode-validation.patch | 65 + efi-secureboot.patch | 54 +- kernel-aarch64-debug-fedora.config | 166 +- kernel-aarch64-fedora.config | 167 +- kernel-armv7hl-debug-fedora.config | 138 +- kernel-armv7hl-fedora.config | 139 +- kernel-armv7hl-lpae-debug-fedora.config | 146 +- kernel-armv7hl-lpae-fedora.config | 147 +- kernel-i686-debug-fedora.config | 124 +- kernel-i686-fedora.config | 125 +- kernel-ppc64le-debug-fedora.config | 111 +- kernel-ppc64le-fedora.config | 112 +- kernel-s390x-debug-fedora.config | 108 +- kernel-s390x-fedora.config | 109 +- kernel-x86_64-debug-fedora.config | 124 +- kernel-x86_64-fedora.config | 125 +- kernel.spec | 85 +- regulator-pwm-Don-t-warn-on-probe-deferral.patch | 36 + sources | 4 +- usb-fusb302-Convert-to-use-GPIO-descriptors.patch | 155 + ...xhci-Raspberry-Pi-FW-loader-for-VIA-VL805.patch | 91 - 254 files changed, 12211 insertions(+), 7982 deletions(-) create mode 100644 0001-drm-nouveau-workaround-runpm-fail-by-disabling-PCI-p.patch delete mode 100644 0001-fs-Add-VirtualBox-guest-shared-folder-vboxsf-support.patch create mode 100644 0002-drm-nouveau-gr-gp107-gp108-implement-workaround-for-.patch delete mode 100644 20200310_chris_chris_wilson_co_uk.patch delete mode 100644 ARM-Enable-thermal-support-for-Raspberry-Pi-4.patch create mode 100644 ARM-dts-bcm2711-Move-emmc2-into-its-own-bus.patch create mode 100644 ARM64-Tegra-fixes.patch create mode 100644 Add-LCD-support-for-Pine64-Pinebook-1080p.patch create mode 100644 Add-support-for-PinePhone-LCD-panel.patch create mode 100644 Add-support-for-the-pine64-Pinebook-Pro.patch create mode 100644 PCI-Add-MCFG-quirks-for-Tegra194-host-controllers.patch delete mode 100644 Raspberry-Pi-4-PCIe-support.patch create mode 100644 USB-pci-quirks-Add-Raspberry-Pi-4-quirk.patch delete mode 100644 alsa-5.6.patch create mode 100644 arm-bcm2711-mmc-sdhci-iproc-Add-custom-set_power-callback.patch create mode 100644 arm-bcm2835-serial-8250_early-support-aux-uart.patch create mode 100644 arm64-Fix-some-GPIO-setup-on-Pinebook-Pro.patch create mode 100644 arm64-a64-mbus.patch create mode 100644 arm64-drm-tegra-Fix-SMMU-support-on-Tegra124-and-Tegra210.patch create mode 100644 arm64-dts-imx8mq-phanbell-Add-support-for-ethernet.patch create mode 100644 arm64-pine64-pinephone.patch create mode 100644 arm64-pine64-pinetab.patch create mode 100644 arm64-pinebook-fixes.patch create mode 100644 arm64-serial-8250_tegra-Create-Tegra-specific-8250-driver.patch delete mode 100644 arm64-tegra-Jetson-TX2-Allow-bootloader-to-configure.patch create mode 100644 arm64-tegra-fix-pcie.patch delete mode 100644 arm64-tegra-jetson-tx1-fixes.patch create mode 100644 backlight-lp855x-Ensure-regulators-are-disabled-on-probe-failure.patch delete mode 100644 bcm283x-gpu-drm-v3d-Add-ARCH_BCM2835-to-DRM_V3D-Kconfig.patch create mode 100644 configs/fedora/generic/CONFIG_AD7091R5 create mode 100644 configs/fedora/generic/CONFIG_ARCH_RANDOM create mode 100644 configs/fedora/generic/CONFIG_ATH11K create mode 100644 configs/fedora/generic/CONFIG_BACKLIGHT_LED create mode 100644 configs/fedora/generic/CONFIG_BCM84881_PHY create mode 100644 configs/fedora/generic/CONFIG_BMA400 create mode 100644 configs/fedora/generic/CONFIG_BOOTTIME_TRACING create mode 100644 configs/fedora/generic/CONFIG_BOOT_CONFIG delete mode 100644 configs/fedora/generic/CONFIG_CAPI_AVM create mode 100644 configs/fedora/generic/CONFIG_COMMON_CLK_FSL_SAI create mode 100644 configs/fedora/generic/CONFIG_CPU_FREQ_THERMAL create mode 100644 configs/fedora/generic/CONFIG_DLHL60D create mode 100644 configs/fedora/generic/CONFIG_DMABUF_HEAPS create mode 100644 configs/fedora/generic/CONFIG_DRM_ANALOGIX_ANX6345 create mode 100644 configs/fedora/generic/CONFIG_DRM_LVDS_CODEC delete mode 100644 configs/fedora/generic/CONFIG_DRM_LVDS_ENCODER create mode 100644 configs/fedora/generic/CONFIG_DRM_PANEL_BOE_HIMAX8279D create mode 100644 configs/fedora/generic/CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 create mode 100644 configs/fedora/generic/CONFIG_DRM_PANEL_SONY_ACX424AKP create mode 100644 configs/fedora/generic/CONFIG_DRM_PANEL_XINGBANGDA_XBD599 create mode 100644 configs/fedora/generic/CONFIG_DRM_PANEL_XINPENG_XPP055C272 create mode 100644 configs/fedora/generic/CONFIG_EFI_DISABLE_PCI_DMA create mode 100644 configs/fedora/generic/CONFIG_ETHTOOL_NETLINK delete mode 100644 configs/fedora/generic/CONFIG_EXFAT_FS create mode 100644 configs/fedora/generic/CONFIG_F2FS_FS_COMPRESSION create mode 100644 configs/fedora/generic/CONFIG_F2FS_FS_LZ4 create mode 100644 configs/fedora/generic/CONFIG_F2FS_FS_LZO delete mode 100644 configs/fedora/generic/CONFIG_GIGASET_BASE delete mode 100644 configs/fedora/generic/CONFIG_GIGASET_CAPI delete mode 100644 configs/fedora/generic/CONFIG_GIGASET_DEBUG delete mode 100644 configs/fedora/generic/CONFIG_GIGASET_M101 delete mode 100644 configs/fedora/generic/CONFIG_GIGASET_M105 create mode 100644 configs/fedora/generic/CONFIG_GPIO_LOGICVC delete mode 100644 configs/fedora/generic/CONFIG_GPIO_MPC8XXX create mode 100644 configs/fedora/generic/CONFIG_GPIO_SIFIVE delete mode 100644 configs/fedora/generic/CONFIG_HYSDN delete mode 100644 configs/fedora/generic/CONFIG_HYSDN_CAPI delete mode 100644 configs/fedora/generic/CONFIG_I2C_PARPORT_LIGHT create mode 100644 configs/fedora/generic/CONFIG_INET_ESPINTCP create mode 100644 configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_BZIP2 create mode 100644 configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_GZIP create mode 100644 configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_LZ4 create mode 100644 configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_LZMA create mode 100644 configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_LZO create mode 100644 configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_NONE create mode 100644 configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_XZ create mode 100644 configs/fedora/generic/CONFIG_KPROBE_EVENT_GEN_TEST create mode 100644 configs/fedora/generic/CONFIG_LTC2496 create mode 100644 configs/fedora/generic/CONFIG_MFD_ROHM_BD71828 create mode 100644 configs/fedora/generic/CONFIG_MFD_WCD934X create mode 100644 configs/fedora/generic/CONFIG_MICROCHIP_PIT64B create mode 100644 configs/fedora/generic/CONFIG_MPTCP create mode 100644 configs/fedora/generic/CONFIG_MPTCP_HMAC_TEST create mode 100644 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delete mode 100644 configs/fedora/generic/arm/armv7/armv7/CONFIG_SOC_LS1021A create mode 100644 configs/fedora/generic/powerpc/CONFIG_QUICC_ENGINE delete mode 100644 configs/fedora/generic/s390x/CONFIG_ARCH_RANDOM create mode 100644 configs/fedora/generic/s390x/CONFIG_ZLIB_DFLTCC delete mode 100644 configs/fedora/generic/x86/CONFIG_EFI_RCI2_TABLE delete mode 100644 configs/fedora/generic/x86/CONFIG_I2C_PARPORT_LIGHT create mode 100644 configs/fedora/generic/x86/CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON create mode 100644 configs/fedora/generic/x86/CONFIG_PCIE_INTEL_GW create mode 100644 configs/fedora/generic/x86/CONFIG_PHY_INTEL_EMMC create mode 100644 configs/fedora/generic/x86/CONFIG_PINCTRL_LYNXPOINT create mode 100644 configs/fedora/generic/x86/CONFIG_SND_HDA_PREALLOC_SIZE create mode 100644 configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_BDW_RT5650_MACH delete mode 100644 configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC~ delete mode 100644 configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_SOF_CML_RT1011_RT5682_MACH~ create mode 100644 configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_SOF_DA7219_MAX98373_MACH delete mode 100644 configs/fedora/generic/x86/CONFIG_SND_SOC_SOF_HDA_ALWAYS_ENABLE_DMI_L1~ delete mode 100644 configs/fedora/generic/x86/CONFIG_STACKPROTECTOR_STRONG delete mode 100644 configs/fedora/generic/x86/CONFIG_THUNDERBOLT_NET create mode 100644 configs/fedora/generic/x86/CONFIG_TIME_NS create mode 100644 configs/fedora/generic/x86/CONFIG_USB4 create mode 100644 configs/fedora/generic/x86/CONFIG_USB4_NET delete mode 100644 configs/fedora/generic/x86/CONFIG_X86_INTEL_MPX create mode 100644 configs/fedora/generic/x86/x86_64/CONFIG_EFI_RCI2_TABLE create mode 100644 configs/fedora/generic/x86/x86_64/CONFIG_INTEL_IDXD create mode 100644 configs/fedora/generic/x86/x86_64/CONFIG_INTEL_UNCORE_FREQ_CONTROL delete mode 100644 configs/fedora/generic/x86/x86_64/CONFIG_THUNDERBOLT create mode 100644 drm-dp-mst-error-handling-improvements.patch create mode 100644 drm-i915-backports.patch create mode 100644 drm-vc4-Fix-HDMI-mode-validation.patch create mode 100644 regulator-pwm-Don-t-warn-on-probe-deferral.patch create mode 100644 usb-fusb302-Convert-to-use-GPIO-descriptors.patch delete mode 100644 usb-xhci-Raspberry-Pi-FW-loader-for-VIA-VL805.patch diff --git a/0001-drm-nouveau-workaround-runpm-fail-by-disabling-PCI-p.patch b/0001-drm-nouveau-workaround-runpm-fail-by-disabling-PCI-p.patch new file mode 100644 index 000000000..1511e4a7a --- /dev/null +++ b/0001-drm-nouveau-workaround-runpm-fail-by-disabling-PCI-p.patch @@ -0,0 +1,141 @@ +From 7a7662fe09eb2ccd2eb93ce7261aa47c86111b4d Mon Sep 17 00:00:00 2001 +From: Karol Herbst +Date: Tue, 24 Mar 2020 21:29:23 +0100 +Subject: [PATCH 1/2] drm/nouveau: workaround runpm fail by disabling PCI power + management on certain intel bridges + +Fixes the infamous 'runtime PM' bug many users are facing on Laptops with +Nvidia Pascal GPUs by skipping said PCI power state changes on the GPU. + +Depending on the used kernel there might be messages like those in demsg: + +"nouveau 0000:01:00.0: Refused to change power state, currently in D3" +"nouveau 0000:01:00.0: can't change power state from D3cold to D0 (config +space inaccessible)" +followed by backtraces of kernel crashes or timeouts within nouveau. + +It's still unkown why this issue exists, but this is a reliable workaround +and solves a very annoying issue for user having to choose between a +crashing kernel or higher power consumption of their Laptops. + +Signed-off-by: Karol Herbst +Cc: Bjorn Helgaas +Cc: Lyude Paul +Cc: Rafael J. Wysocki +Cc: Mika Westerberg +Cc: linux-pci@vger.kernel.org +Cc: linux-pm@vger.kernel.org +Cc: dri-devel@lists.freedesktop.org +Cc: nouveau@lists.freedesktop.org +Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=205623 +Signed-off-by: Ben Skeggs +--- + drivers/gpu/drm/nouveau/nouveau_drm.c | 63 +++++++++++++++++++++++++++ + drivers/gpu/drm/nouveau/nouveau_drv.h | 2 + + 2 files changed, 65 insertions(+) + +diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c +index 6b1629c14dd7..ca4087f5a15b 100644 +--- a/drivers/gpu/drm/nouveau/nouveau_drm.c ++++ b/drivers/gpu/drm/nouveau/nouveau_drm.c +@@ -618,6 +618,64 @@ nouveau_drm_device_fini(struct drm_device *dev) + kfree(drm); + } + ++/* ++ * On some Intel PCIe bridge controllers doing a ++ * D0 -> D3hot -> D3cold -> D0 sequence causes Nvidia GPUs to not reappear. ++ * Skipping the intermediate D3hot step seems to make it work again. This is ++ * probably caused by not meeting the expectation the involved AML code has ++ * when the GPU is put into D3hot state before invoking it. ++ * ++ * This leads to various manifestations of this issue: ++ * - AML code execution to power on the GPU hits an infinite loop (as the ++ * code waits on device memory to change). ++ * - kernel crashes, as all PCI reads return -1, which most code isn't able ++ * to handle well enough. ++ * ++ * In all cases dmesg will contain at least one line like this: ++ * 'nouveau 0000:01:00.0: Refused to change power state, currently in D3' ++ * followed by a lot of nouveau timeouts. ++ * ++ * In the \_SB.PCI0.PEG0.PG00._OFF code deeper down writes bit 0x80 to the not ++ * documented PCI config space register 0x248 of the Intel PCIe bridge ++ * controller (0x1901) in order to change the state of the PCIe link between ++ * the PCIe port and the GPU. There are alternative code paths using other ++ * registers, which seem to work fine (executed pre Windows 8): ++ * - 0xbc bit 0x20 (publicly available documentation claims 'reserved') ++ * - 0xb0 bit 0x10 (link disable) ++ * Changing the conditions inside the firmware by poking into the relevant ++ * addresses does resolve the issue, but it seemed to be ACPI private memory ++ * and not any device accessible memory at all, so there is no portable way of ++ * changing the conditions. ++ * On a XPS 9560 that means bits [0,3] on \CPEX need to be cleared. ++ * ++ * The only systems where this behavior can be seen are hybrid graphics laptops ++ * with a secondary Nvidia Maxwell, Pascal or Turing GPU. It's unclear whether ++ * this issue only occurs in combination with listed Intel PCIe bridge ++ * controllers and the mentioned GPUs or other devices as well. ++ * ++ * documentation on the PCIe bridge controller can be found in the ++ * "7th Generation Intel® Processor Families for H Platforms Datasheet Volume 2" ++ * Section "12 PCI Express* Controller (x16) Registers" ++ */ ++ ++static void quirk_broken_nv_runpm(struct pci_dev *pdev) ++{ ++ struct drm_device *dev = pci_get_drvdata(pdev); ++ struct nouveau_drm *drm = nouveau_drm(dev); ++ struct pci_dev *bridge = pci_upstream_bridge(pdev); ++ ++ if (!bridge || bridge->vendor != PCI_VENDOR_ID_INTEL) ++ return; ++ ++ switch (bridge->device) { ++ case 0x1901: ++ drm->old_pm_cap = pdev->pm_cap; ++ pdev->pm_cap = 0; ++ NV_INFO(drm, "Disabling PCI power management to avoid bug\n"); ++ break; ++ } ++} ++ + static int nouveau_drm_probe(struct pci_dev *pdev, + const struct pci_device_id *pent) + { +@@ -699,6 +757,7 @@ static int nouveau_drm_probe(struct pci_dev *pdev, + if (ret) + goto fail_drm_dev_init; + ++ quirk_broken_nv_runpm(pdev); + return 0; + + fail_drm_dev_init: +@@ -734,7 +793,11 @@ static void + nouveau_drm_remove(struct pci_dev *pdev) + { + struct drm_device *dev = pci_get_drvdata(pdev); ++ struct nouveau_drm *drm = nouveau_drm(dev); + ++ /* revert our workaround */ ++ if (drm->old_pm_cap) ++ pdev->pm_cap = drm->old_pm_cap; + nouveau_drm_device_remove(dev); + pci_disable_device(pdev); + } +diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h +index c2c332fbde97..2a6519737800 100644 +--- a/drivers/gpu/drm/nouveau/nouveau_drv.h ++++ b/drivers/gpu/drm/nouveau/nouveau_drv.h +@@ -140,6 +140,8 @@ struct nouveau_drm { + + struct list_head clients; + ++ u8 old_pm_cap; ++ + struct { + struct agp_bridge_data *bridge; + u32 base; +-- +2.25.1 + diff --git a/0001-fs-Add-VirtualBox-guest-shared-folder-vboxsf-support.patch b/0001-fs-Add-VirtualBox-guest-shared-folder-vboxsf-support.patch deleted file mode 100644 index 531779ce6..000000000 --- a/0001-fs-Add-VirtualBox-guest-shared-folder-vboxsf-support.patch +++ /dev/null @@ -1,3487 +0,0 @@ -From 25bd71190fef59375de6115044556d062a965801 Mon Sep 17 00:00:00 2001 -From: Hans de Goede -Date: Mon, 25 Nov 2019 11:12:11 +0100 -Subject: [PATCH v3] fs: Add VirtualBox guest shared folder (vboxsf) support - -VirtualBox hosts can share folders with guests, this commit adds a -VFS driver implementing the Linux-guest side of this, allowing folders -exported by the host to be mounted under Linux. - -This driver depends on the guest <-> host IPC functions exported by -the vboxguest driver. - -Acked-by: Christoph Hellwig -Signed-off-by: Hans de Goede ---- -Changes in v19: -- Misc. small code tweaks suggested by Al Viro (no functional changes) -- Do not increment dir_context->pos when dir_emit has returned false. -- Add a WARN_ON check for trying to access beyond the end of a - vboxsf directory buffer, this uses WARN_ON as this means the host has - given us corrupt data -- Catch the user passing the "nls" opt more then once - -Changes in v18: -- Move back to fs/vboxsf for direct submission to Linus -- Squash in a few small fixes done during vboxsf's brief stint in staging -- Add handling of short copies to vboxsf_write_end -- Add a comment about our simple_write_begin usage (Suggested by David Howell) - -Changes in v17: -- Submit upstream through drivers/staging as this is not getting any - traction on the fsdevel list -- Add TODO file -- vboxsf_free_inode uses sbi->idr, call rcu_barrier from put_super to make - sure all delayed rcu free inodes are flushed - -Changes in v16: -- Make vboxsf_parse_monolithic() static, reported-by: kbuild test robot - -Changes in v15: -- Rebase on top of 5.4-rc1 - -Changes in v14 -- Add a commment explaining possible read cache strategies and which one - has been chosen -- Change pagecache-invalidation on open (inode_revalidate) to use - invalidate_inode_pages2() so that mmap-ed pages are dropped from - the cache too -- Add a comment to vboxsf_file_release explaining why the - filemap_write_and_wait() call is done there -- Some minor code tweaks - -Changes in v13 -- Add SPDX tag to Makefile, use foo-y := to set objectfile list -- Drop kerneldoc headers stating the obvious from vfs callbacks, - to avoid them going stale -- Replace sf_ prefix of functions and data-types with vboxsf_ -- Use more normal naming scheme for sbi and private inode data: - struct vboxsf_sbi *sbi = VBOXSF_SBI(inode->i_sb); - struct vboxsf_inode *sf_i = VBOXSF_I(inode); -- Refactor directory reading code -- Use goto based unwinding instead of nested if-s in a number of places -- Consolidate dir unlink and rmdir inode_operations into a single function -- Use the page-cache for regular reads/writes too -- Directly set super_operations.free_inode to what used to be our - vboxsf_i_callback, instead of setting super_operations.destroy_inode - to a function which just does: call_rcu(&inode->i_rcu, vboxsf_i_callback); -- Use spinlock_irqsafe for ino_idr_lock - vboxsf_free_inode may be called from a RCU callback, and thus from - softirq context, so we need to use spinlock_irqsafe vboxsf_new_inode. - On alloc_inode failure vboxsf_free_inode may be called from process - context, so it too needs to use spinlock_irqsafe. - -Changes in v12: -- Move make_kuid / make_kgid calls to option parsing time and add - uid_valid / gid_valid checks. -- In init_fs_context call current_uid_gid() to init uid and gid -- Validate dmode, fmode, dmask and fmask options during option parsing -- Use correct types for various mount option variables (kuid_t, kgid_t, umode_t) -- Some small coding-style tweaks - -Changes in v11: -- Convert to the new Documentation/filesystems/mount_api.txt mount API -- Fixed all the function kerneldoc comments to have things in the proper order -- Change type of d_type variable passed as type to dir_emit from int to - unsigned int -- Replaced the fake-ino overflow test with the one suggested by David Howells -- Fixed various coding style issues - -See cover-letter for full changelog including older versions ---- - MAINTAINERS | 6 + - fs/Kconfig | 1 + - fs/Makefile | 1 + - fs/vboxsf/Kconfig | 10 + - fs/vboxsf/Makefile | 5 + - fs/vboxsf/dir.c | 427 +++++++++++++++++ - fs/vboxsf/file.c | 379 +++++++++++++++ - fs/vboxsf/shfl_hostintf.h | 901 ++++++++++++++++++++++++++++++++++++ - fs/vboxsf/super.c | 497 ++++++++++++++++++++ - fs/vboxsf/utils.c | 551 ++++++++++++++++++++++ - fs/vboxsf/vboxsf_wrappers.c | 371 +++++++++++++++ - fs/vboxsf/vfsmod.h | 137 ++++++ - 12 files changed, 3286 insertions(+) - create mode 100644 fs/vboxsf/Kconfig - create mode 100644 fs/vboxsf/Makefile - create mode 100644 fs/vboxsf/dir.c - create mode 100644 fs/vboxsf/file.c - create mode 100644 fs/vboxsf/shfl_hostintf.h - create mode 100644 fs/vboxsf/super.c - create mode 100644 fs/vboxsf/utils.c - create mode 100644 fs/vboxsf/vboxsf_wrappers.c - create mode 100644 fs/vboxsf/vfsmod.h - -diff --git a/MAINTAINERS b/MAINTAINERS -index 56765f542244..db3cec531b32 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -17612,6 +17612,12 @@ F: include/linux/vbox_utils.h - F: include/uapi/linux/vbox*.h - F: drivers/virt/vboxguest/ - -+VIRTUAL BOX SHARED FOLDER VFS DRIVER: -+M: Hans de Goede -+L: linux-fsdevel@vger.kernel.org -+S: Maintained -+F: fs/vboxsf/* -+ - VIRTUAL SERIO DEVICE DRIVER - M: Stephen Chandler Paul - S: Maintained -diff --git a/fs/Kconfig b/fs/Kconfig -index 7b623e9fc1b0..8493a3f0c4b1 100644 ---- a/fs/Kconfig -+++ b/fs/Kconfig -@@ -264,6 +264,7 @@ source "fs/pstore/Kconfig" - source "fs/sysv/Kconfig" - source "fs/ufs/Kconfig" - source "fs/erofs/Kconfig" -+source "fs/vboxsf/Kconfig" - - endif # MISC_FILESYSTEMS - -diff --git a/fs/Makefile b/fs/Makefile -index 1148c555c4d3..b807cbff3790 100644 ---- a/fs/Makefile -+++ b/fs/Makefile -@@ -133,3 +133,4 @@ obj-$(CONFIG_CEPH_FS) += ceph/ - obj-$(CONFIG_PSTORE) += pstore/ - obj-$(CONFIG_EFIVAR_FS) += efivarfs/ - obj-$(CONFIG_EROFS_FS) += erofs/ -+obj-$(CONFIG_VBOXSF_FS) += vboxsf/ -diff --git a/fs/vboxsf/Kconfig b/fs/vboxsf/Kconfig -new file mode 100644 -index 000000000000..b84586ae08b3 ---- /dev/null -+++ b/fs/vboxsf/Kconfig -@@ -0,0 +1,10 @@ -+config VBOXSF_FS -+ tristate "VirtualBox guest shared folder (vboxsf) support" -+ depends on X86 && VBOXGUEST -+ select NLS -+ help -+ VirtualBox hosts can share folders with guests, this driver -+ implements the Linux-guest side of this allowing folders exported -+ by the host to be mounted under Linux. -+ -+ If you want to use shared folders in VirtualBox guests, answer Y or M. -diff --git a/fs/vboxsf/Makefile b/fs/vboxsf/Makefile -new file mode 100644 -index 000000000000..9e4328e79623 ---- /dev/null -+++ b/fs/vboxsf/Makefile -@@ -0,0 +1,5 @@ -+# SPDX-License-Identifier: MIT -+ -+obj-$(CONFIG_VBOXSF_FS) += vboxsf.o -+ -+vboxsf-y := dir.o file.o utils.o vboxsf_wrappers.o super.o -diff --git a/fs/vboxsf/dir.c b/fs/vboxsf/dir.c -new file mode 100644 -index 000000000000..dd147b490982 ---- /dev/null -+++ b/fs/vboxsf/dir.c -@@ -0,0 +1,427 @@ -+// SPDX-License-Identifier: MIT -+/* -+ * VirtualBox Guest Shared Folders support: Directory inode and file operations -+ * -+ * Copyright (C) 2006-2018 Oracle Corporation -+ */ -+ -+#include -+#include -+#include "vfsmod.h" -+ -+static int vboxsf_dir_open(struct inode *inode, struct file *file) -+{ -+ struct vboxsf_sbi *sbi = VBOXSF_SBI(inode->i_sb); -+ struct shfl_createparms params = {}; -+ struct vboxsf_dir_info *sf_d; -+ int err; -+ -+ sf_d = vboxsf_dir_info_alloc(); -+ if (!sf_d) -+ return -ENOMEM; -+ -+ params.handle = SHFL_HANDLE_NIL; -+ params.create_flags = SHFL_CF_DIRECTORY | SHFL_CF_ACT_OPEN_IF_EXISTS | -+ SHFL_CF_ACT_FAIL_IF_NEW | SHFL_CF_ACCESS_READ; -+ -+ err = vboxsf_create_at_dentry(file_dentry(file), ¶ms); -+ if (err) -+ goto err_free_dir_info; -+ -+ if (params.result != SHFL_FILE_EXISTS) { -+ err = -ENOENT; -+ goto err_close; -+ } -+ -+ err = vboxsf_dir_read_all(sbi, sf_d, params.handle); -+ if (err) -+ goto err_close; -+ -+ vboxsf_close(sbi->root, params.handle); -+ file->private_data = sf_d; -+ return 0; -+ -+err_close: -+ vboxsf_close(sbi->root, params.handle); -+err_free_dir_info: -+ vboxsf_dir_info_free(sf_d); -+ return err; -+} -+ -+static int vboxsf_dir_release(struct inode *inode, struct file *file) -+{ -+ if (file->private_data) -+ vboxsf_dir_info_free(file->private_data); -+ -+ return 0; -+} -+ -+static unsigned int vboxsf_get_d_type(u32 mode) -+{ -+ unsigned int d_type; -+ -+ switch (mode & SHFL_TYPE_MASK) { -+ case SHFL_TYPE_FIFO: -+ d_type = DT_FIFO; -+ break; -+ case SHFL_TYPE_DEV_CHAR: -+ d_type = DT_CHR; -+ break; -+ case SHFL_TYPE_DIRECTORY: -+ d_type = DT_DIR; -+ break; -+ case SHFL_TYPE_DEV_BLOCK: -+ d_type = DT_BLK; -+ break; -+ case SHFL_TYPE_FILE: -+ d_type = DT_REG; -+ break; -+ case SHFL_TYPE_SYMLINK: -+ d_type = DT_LNK; -+ break; -+ case SHFL_TYPE_SOCKET: -+ d_type = DT_SOCK; -+ break; -+ case SHFL_TYPE_WHITEOUT: -+ d_type = DT_WHT; -+ break; -+ default: -+ d_type = DT_UNKNOWN; -+ break; -+ } -+ return d_type; -+} -+ -+static bool vboxsf_dir_emit(struct file *dir, struct dir_context *ctx) -+{ -+ struct vboxsf_sbi *sbi = VBOXSF_SBI(file_inode(dir)->i_sb); -+ struct vboxsf_dir_info *sf_d = dir->private_data; -+ struct shfl_dirinfo *info; -+ struct vboxsf_dir_buf *b; -+ unsigned int d_type; -+ loff_t i, cur = 0; -+ ino_t fake_ino; -+ void *end; -+ int err; -+ -+ list_for_each_entry(b, &sf_d->info_list, head) { -+try_next_entry: -+ if (ctx->pos >= cur + b->entries) { -+ cur += b->entries; -+ continue; -+ } -+ -+ /* -+ * Note the vboxsf_dir_info objects we are iterating over here -+ * are variable sized, so the info pointer may end up being -+ * unaligned. This is how we get the data from the host. -+ * Since vboxsf is only supported on x86 machines this is not -+ * a problem. -+ */ -+ for (i = 0, info = b->buf; i < ctx->pos - cur; i++) { -+ end = &info->name.string.utf8[info->name.size]; -+ /* Only happens if the host gives us corrupt data */ -+ if (WARN_ON(end > (b->buf + b->used))) -+ return false; -+ info = end; -+ } -+ -+ end = &info->name.string.utf8[info->name.size]; -+ if (WARN_ON(end > (b->buf + b->used))) -+ return false; -+ -+ /* Info now points to the right entry, emit it. */ -+ d_type = vboxsf_get_d_type(info->info.attr.mode); -+ -+ /* -+ * On 32 bit systems pos is 64 signed, while ino is 32 bit -+ * unsigned so fake_ino may overflow, check for this. -+ */ -+ if ((ino_t)(ctx->pos + 1) != (u64)(ctx->pos + 1)) { -+ vbg_err("vboxsf: fake ino overflow, truncating dir\n"); -+ return false; -+ } -+ fake_ino = ctx->pos + 1; -+ -+ if (sbi->nls) { -+ char d_name[NAME_MAX]; -+ -+ err = vboxsf_nlscpy(sbi, d_name, NAME_MAX, -+ info->name.string.utf8, -+ info->name.length); -+ if (err) { -+ /* skip erroneous entry and proceed */ -+ ctx->pos += 1; -+ goto try_next_entry; -+ } -+ -+ return dir_emit(ctx, d_name, strlen(d_name), -+ fake_ino, d_type); -+ } -+ -+ return dir_emit(ctx, info->name.string.utf8, info->name.length, -+ fake_ino, d_type); -+ } -+ -+ return false; -+} -+ -+static int vboxsf_dir_iterate(struct file *dir, struct dir_context *ctx) -+{ -+ bool emitted; -+ -+ do { -+ emitted = vboxsf_dir_emit(dir, ctx); -+ if (emitted) -+ ctx->pos += 1; -+ } while (emitted); -+ -+ return 0; -+} -+ -+const struct file_operations vboxsf_dir_fops = { -+ .open = vboxsf_dir_open, -+ .iterate = vboxsf_dir_iterate, -+ .release = vboxsf_dir_release, -+ .read = generic_read_dir, -+ .llseek = generic_file_llseek, -+}; -+ -+/* -+ * This is called during name resolution/lookup to check if the @dentry in -+ * the cache is still valid. the job is handled by vboxsf_inode_revalidate. -+ */ -+static int vboxsf_dentry_revalidate(struct dentry *dentry, unsigned int flags) -+{ -+ if (flags & LOOKUP_RCU) -+ return -ECHILD; -+ -+ if (d_really_is_positive(dentry)) -+ return vboxsf_inode_revalidate(dentry) == 0; -+ else -+ return vboxsf_stat_dentry(dentry, NULL) == -ENOENT; -+} -+ -+const struct dentry_operations vboxsf_dentry_ops = { -+ .d_revalidate = vboxsf_dentry_revalidate -+}; -+ -+/* iops */ -+ -+static struct dentry *vboxsf_dir_lookup(struct inode *parent, -+ struct dentry *dentry, -+ unsigned int flags) -+{ -+ struct vboxsf_sbi *sbi = VBOXSF_SBI(parent->i_sb); -+ struct shfl_fsobjinfo fsinfo; -+ struct inode *inode; -+ int err; -+ -+ dentry->d_time = jiffies; -+ -+ err = vboxsf_stat_dentry(dentry, &fsinfo); -+ if (err) { -+ inode = (err == -ENOENT) ? NULL : ERR_PTR(err); -+ } else { -+ inode = vboxsf_new_inode(parent->i_sb); -+ if (!IS_ERR(inode)) -+ vboxsf_init_inode(sbi, inode, &fsinfo); -+ } -+ -+ return d_splice_alias(inode, dentry); -+} -+ -+static int vboxsf_dir_instantiate(struct inode *parent, struct dentry *dentry, -+ struct shfl_fsobjinfo *info) -+{ -+ struct vboxsf_sbi *sbi = VBOXSF_SBI(parent->i_sb); -+ struct vboxsf_inode *sf_i; -+ struct inode *inode; -+ -+ inode = vboxsf_new_inode(parent->i_sb); -+ if (IS_ERR(inode)) -+ return PTR_ERR(inode); -+ -+ sf_i = VBOXSF_I(inode); -+ /* The host may have given us different attr then requested */ -+ sf_i->force_restat = 1; -+ vboxsf_init_inode(sbi, inode, info); -+ -+ d_instantiate(dentry, inode); -+ -+ return 0; -+} -+ -+static int vboxsf_dir_create(struct inode *parent, struct dentry *dentry, -+ umode_t mode, int is_dir) -+{ -+ struct vboxsf_inode *sf_parent_i = VBOXSF_I(parent); -+ struct vboxsf_sbi *sbi = VBOXSF_SBI(parent->i_sb); -+ struct shfl_createparms params = {}; -+ int err; -+ -+ params.handle = SHFL_HANDLE_NIL; -+ params.create_flags = SHFL_CF_ACT_CREATE_IF_NEW | -+ SHFL_CF_ACT_FAIL_IF_EXISTS | -+ SHFL_CF_ACCESS_READWRITE | -+ (is_dir ? SHFL_CF_DIRECTORY : 0); -+ params.info.attr.mode = (mode & 0777) | -+ (is_dir ? SHFL_TYPE_DIRECTORY : SHFL_TYPE_FILE); -+ params.info.attr.additional = SHFLFSOBJATTRADD_NOTHING; -+ -+ err = vboxsf_create_at_dentry(dentry, ¶ms); -+ if (err) -+ return err; -+ -+ if (params.result != SHFL_FILE_CREATED) -+ return -EPERM; -+ -+ vboxsf_close(sbi->root, params.handle); -+ -+ err = vboxsf_dir_instantiate(parent, dentry, ¶ms.info); -+ if (err) -+ return err; -+ -+ /* parent directory access/change time changed */ -+ sf_parent_i->force_restat = 1; -+ -+ return 0; -+} -+ -+static int vboxsf_dir_mkfile(struct inode *parent, struct dentry *dentry, -+ umode_t mode, bool excl) -+{ -+ return vboxsf_dir_create(parent, dentry, mode, 0); -+} -+ -+static int vboxsf_dir_mkdir(struct inode *parent, struct dentry *dentry, -+ umode_t mode) -+{ -+ return vboxsf_dir_create(parent, dentry, mode, 1); -+} -+ -+static int vboxsf_dir_unlink(struct inode *parent, struct dentry *dentry) -+{ -+ struct vboxsf_sbi *sbi = VBOXSF_SBI(parent->i_sb); -+ struct vboxsf_inode *sf_parent_i = VBOXSF_I(parent); -+ struct inode *inode = d_inode(dentry); -+ struct shfl_string *path; -+ u32 flags; -+ int err; -+ -+ if (S_ISDIR(inode->i_mode)) -+ flags = SHFL_REMOVE_DIR; -+ else -+ flags = SHFL_REMOVE_FILE; -+ -+ if (S_ISLNK(inode->i_mode)) -+ flags |= SHFL_REMOVE_SYMLINK; -+ -+ path = vboxsf_path_from_dentry(sbi, dentry); -+ if (IS_ERR(path)) -+ return PTR_ERR(path); -+ -+ err = vboxsf_remove(sbi->root, path, flags); -+ __putname(path); -+ if (err) -+ return err; -+ -+ /* parent directory access/change time changed */ -+ sf_parent_i->force_restat = 1; -+ -+ return 0; -+} -+ -+static int vboxsf_dir_rename(struct inode *old_parent, -+ struct dentry *old_dentry, -+ struct inode *new_parent, -+ struct dentry *new_dentry, -+ unsigned int flags) -+{ -+ struct vboxsf_sbi *sbi = VBOXSF_SBI(old_parent->i_sb); -+ struct vboxsf_inode *sf_old_parent_i = VBOXSF_I(old_parent); -+ struct vboxsf_inode *sf_new_parent_i = VBOXSF_I(new_parent); -+ u32 shfl_flags = SHFL_RENAME_FILE | SHFL_RENAME_REPLACE_IF_EXISTS; -+ struct shfl_string *old_path, *new_path; -+ int err; -+ -+ if (flags) -+ return -EINVAL; -+ -+ old_path = vboxsf_path_from_dentry(sbi, old_dentry); -+ if (IS_ERR(old_path)) -+ return PTR_ERR(old_path); -+ -+ new_path = vboxsf_path_from_dentry(sbi, new_dentry); -+ if (IS_ERR(new_path)) { -+ err = PTR_ERR(new_path); -+ goto err_put_old_path; -+ } -+ -+ if (d_inode(old_dentry)->i_mode & S_IFDIR) -+ shfl_flags = 0; -+ -+ err = vboxsf_rename(sbi->root, old_path, new_path, shfl_flags); -+ if (err == 0) { -+ /* parent directories access/change time changed */ -+ sf_new_parent_i->force_restat = 1; -+ sf_old_parent_i->force_restat = 1; -+ } -+ -+ __putname(new_path); -+err_put_old_path: -+ __putname(old_path); -+ return err; -+} -+ -+static int vboxsf_dir_symlink(struct inode *parent, struct dentry *dentry, -+ const char *symname) -+{ -+ struct vboxsf_inode *sf_parent_i = VBOXSF_I(parent); -+ struct vboxsf_sbi *sbi = VBOXSF_SBI(parent->i_sb); -+ int symname_size = strlen(symname) + 1; -+ struct shfl_string *path, *ssymname; -+ struct shfl_fsobjinfo info; -+ int err; -+ -+ path = vboxsf_path_from_dentry(sbi, dentry); -+ if (IS_ERR(path)) -+ return PTR_ERR(path); -+ -+ ssymname = kmalloc(SHFLSTRING_HEADER_SIZE + symname_size, GFP_KERNEL); -+ if (!ssymname) { -+ __putname(path); -+ return -ENOMEM; -+ } -+ ssymname->length = symname_size - 1; -+ ssymname->size = symname_size; -+ memcpy(ssymname->string.utf8, symname, symname_size); -+ -+ err = vboxsf_symlink(sbi->root, path, ssymname, &info); -+ kfree(ssymname); -+ __putname(path); -+ if (err) { -+ /* -EROFS means symlinks are note support -> -EPERM */ -+ return (err == -EROFS) ? -EPERM : err; -+ } -+ -+ err = vboxsf_dir_instantiate(parent, dentry, &info); -+ if (err) -+ return err; -+ -+ /* parent directory access/change time changed */ -+ sf_parent_i->force_restat = 1; -+ return 0; -+} -+ -+const struct inode_operations vboxsf_dir_iops = { -+ .lookup = vboxsf_dir_lookup, -+ .create = vboxsf_dir_mkfile, -+ .mkdir = vboxsf_dir_mkdir, -+ .rmdir = vboxsf_dir_unlink, -+ .unlink = vboxsf_dir_unlink, -+ .rename = vboxsf_dir_rename, -+ .symlink = vboxsf_dir_symlink, -+ .getattr = vboxsf_getattr, -+ .setattr = vboxsf_setattr, -+}; -diff --git a/fs/vboxsf/file.c b/fs/vboxsf/file.c -new file mode 100644 -index 000000000000..c4ab5996d97a ---- /dev/null -+++ b/fs/vboxsf/file.c -@@ -0,0 +1,379 @@ -+// SPDX-License-Identifier: MIT -+/* -+ * VirtualBox Guest Shared Folders support: Regular file inode and file ops. -+ * -+ * Copyright (C) 2006-2018 Oracle Corporation -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include "vfsmod.h" -+ -+struct vboxsf_handle { -+ u64 handle; -+ u32 root; -+ u32 access_flags; -+ struct kref refcount; -+ struct list_head head; -+}; -+ -+static int vboxsf_file_open(struct inode *inode, struct file *file) -+{ -+ struct vboxsf_inode *sf_i = VBOXSF_I(inode); -+ struct shfl_createparms params = {}; -+ struct vboxsf_handle *sf_handle; -+ u32 access_flags = 0; -+ int err; -+ -+ sf_handle = kmalloc(sizeof(*sf_handle), GFP_KERNEL); -+ if (!sf_handle) -+ return -ENOMEM; -+ -+ /* -+ * We check the value of params.handle afterwards to find out if -+ * the call succeeded or failed, as the API does not seem to cleanly -+ * distinguish error and informational messages. -+ * -+ * Furthermore, we must set params.handle to SHFL_HANDLE_NIL to -+ * make the shared folders host service use our mode parameter. -+ */ -+ params.handle = SHFL_HANDLE_NIL; -+ if (file->f_flags & O_CREAT) { -+ params.create_flags |= SHFL_CF_ACT_CREATE_IF_NEW; -+ /* -+ * We ignore O_EXCL, as the Linux kernel seems to call create -+ * beforehand itself, so O_EXCL should always fail. -+ */ -+ if (file->f_flags & O_TRUNC) -+ params.create_flags |= SHFL_CF_ACT_OVERWRITE_IF_EXISTS; -+ else -+ params.create_flags |= SHFL_CF_ACT_OPEN_IF_EXISTS; -+ } else { -+ params.create_flags |= SHFL_CF_ACT_FAIL_IF_NEW; -+ if (file->f_flags & O_TRUNC) -+ params.create_flags |= SHFL_CF_ACT_OVERWRITE_IF_EXISTS; -+ } -+ -+ switch (file->f_flags & O_ACCMODE) { -+ case O_RDONLY: -+ access_flags |= SHFL_CF_ACCESS_READ; -+ break; -+ -+ case O_WRONLY: -+ access_flags |= SHFL_CF_ACCESS_WRITE; -+ break; -+ -+ case O_RDWR: -+ access_flags |= SHFL_CF_ACCESS_READWRITE; -+ break; -+ -+ default: -+ WARN_ON(1); -+ } -+ -+ if (file->f_flags & O_APPEND) -+ access_flags |= SHFL_CF_ACCESS_APPEND; -+ -+ params.create_flags |= access_flags; -+ params.info.attr.mode = inode->i_mode; -+ -+ err = vboxsf_create_at_dentry(file_dentry(file), ¶ms); -+ if (err == 0 && params.handle == SHFL_HANDLE_NIL) -+ err = (params.result == SHFL_FILE_EXISTS) ? -EEXIST : -ENOENT; -+ if (err) { -+ kfree(sf_handle); -+ return err; -+ } -+ -+ /* the host may have given us different attr then requested */ -+ sf_i->force_restat = 1; -+ -+ /* init our handle struct and add it to the inode's handles list */ -+ sf_handle->handle = params.handle; -+ sf_handle->root = VBOXSF_SBI(inode->i_sb)->root; -+ sf_handle->access_flags = access_flags; -+ kref_init(&sf_handle->refcount); -+ -+ mutex_lock(&sf_i->handle_list_mutex); -+ list_add(&sf_handle->head, &sf_i->handle_list); -+ mutex_unlock(&sf_i->handle_list_mutex); -+ -+ file->private_data = sf_handle; -+ return 0; -+} -+ -+static void vboxsf_handle_release(struct kref *refcount) -+{ -+ struct vboxsf_handle *sf_handle = -+ container_of(refcount, struct vboxsf_handle, refcount); -+ -+ vboxsf_close(sf_handle->root, sf_handle->handle); -+ kfree(sf_handle); -+} -+ -+static int vboxsf_file_release(struct inode *inode, struct file *file) -+{ -+ struct vboxsf_inode *sf_i = VBOXSF_I(inode); -+ struct vboxsf_handle *sf_handle = file->private_data; -+ -+ /* -+ * When a file is closed on our (the guest) side, we want any subsequent -+ * accesses done on the host side to see all changes done from our side. -+ */ -+ filemap_write_and_wait(inode->i_mapping); -+ -+ mutex_lock(&sf_i->handle_list_mutex); -+ list_del(&sf_handle->head); -+ mutex_unlock(&sf_i->handle_list_mutex); -+ -+ kref_put(&sf_handle->refcount, vboxsf_handle_release); -+ return 0; -+} -+ -+/* -+ * Write back dirty pages now, because there may not be any suitable -+ * open files later -+ */ -+static void vboxsf_vma_close(struct vm_area_struct *vma) -+{ -+ filemap_write_and_wait(vma->vm_file->f_mapping); -+} -+ -+static const struct vm_operations_struct vboxsf_file_vm_ops = { -+ .close = vboxsf_vma_close, -+ .fault = filemap_fault, -+ .map_pages = filemap_map_pages, -+}; -+ -+static int vboxsf_file_mmap(struct file *file, struct vm_area_struct *vma) -+{ -+ int err; -+ -+ err = generic_file_mmap(file, vma); -+ if (!err) -+ vma->vm_ops = &vboxsf_file_vm_ops; -+ -+ return err; -+} -+ -+/* -+ * Note that since we are accessing files on the host's filesystem, files -+ * may always be changed underneath us by the host! -+ * -+ * The vboxsf API between the guest and the host does not offer any functions -+ * to deal with this. There is no inode-generation to check for changes, no -+ * events / callback on changes and no way to lock files. -+ * -+ * To avoid returning stale data when a file gets *opened* on our (the guest) -+ * side, we do a "stat" on the host side, then compare the mtime with the -+ * last known mtime and invalidate the page-cache if they differ. -+ * This is done from vboxsf_inode_revalidate(). -+ * -+ * When reads are done through the read_iter fop, it is possible to do -+ * further cache revalidation then, there are 3 options to deal with this: -+ * -+ * 1) Rely solely on the revalidation done at open time -+ * 2) Do another "stat" and compare mtime again. Unfortunately the vboxsf -+ * host API does not allow stat on handles, so we would need to use -+ * file->f_path.dentry and the stat will then fail if the file was unlinked -+ * or renamed (and there is no thing like NFS' silly-rename). So we get: -+ * 2a) "stat" and compare mtime, on stat failure invalidate the cache -+ * 2b) "stat" and compare mtime, on stat failure do nothing -+ * 3) Simply always call invalidate_inode_pages2_range on the range of the read -+ * -+ * Currently we are keeping things KISS and using option 1. this allows -+ * directly using generic_file_read_iter without wrapping it. -+ * -+ * This means that only data written on the host side before open() on -+ * the guest side is guaranteed to be seen by the guest. If necessary -+ * we may provide other read-cache strategies in the future and make this -+ * configurable through a mount option. -+ */ -+const struct file_operations vboxsf_reg_fops = { -+ .llseek = generic_file_llseek, -+ .read_iter = generic_file_read_iter, -+ .write_iter = generic_file_write_iter, -+ .mmap = vboxsf_file_mmap, -+ .open = vboxsf_file_open, -+ .release = vboxsf_file_release, -+ .fsync = noop_fsync, -+ .splice_read = generic_file_splice_read, -+}; -+ -+const struct inode_operations vboxsf_reg_iops = { -+ .getattr = vboxsf_getattr, -+ .setattr = vboxsf_setattr -+}; -+ -+static int vboxsf_readpage(struct file *file, struct page *page) -+{ -+ struct vboxsf_handle *sf_handle = file->private_data; -+ loff_t off = page_offset(page); -+ u32 nread = PAGE_SIZE; -+ u8 *buf; -+ int err; -+ -+ buf = kmap(page); -+ -+ err = vboxsf_read(sf_handle->root, sf_handle->handle, off, &nread, buf); -+ if (err == 0) { -+ memset(&buf[nread], 0, PAGE_SIZE - nread); -+ flush_dcache_page(page); -+ SetPageUptodate(page); -+ } else { -+ SetPageError(page); -+ } -+ -+ kunmap(page); -+ unlock_page(page); -+ return err; -+} -+ -+static struct vboxsf_handle *vboxsf_get_write_handle(struct vboxsf_inode *sf_i) -+{ -+ struct vboxsf_handle *h, *sf_handle = NULL; -+ -+ mutex_lock(&sf_i->handle_list_mutex); -+ list_for_each_entry(h, &sf_i->handle_list, head) { -+ if (h->access_flags == SHFL_CF_ACCESS_WRITE || -+ h->access_flags == SHFL_CF_ACCESS_READWRITE) { -+ kref_get(&h->refcount); -+ sf_handle = h; -+ break; -+ } -+ } -+ mutex_unlock(&sf_i->handle_list_mutex); -+ -+ return sf_handle; -+} -+ -+static int vboxsf_writepage(struct page *page, struct writeback_control *wbc) -+{ -+ struct inode *inode = page->mapping->host; -+ struct vboxsf_inode *sf_i = VBOXSF_I(inode); -+ struct vboxsf_handle *sf_handle; -+ loff_t off = page_offset(page); -+ loff_t size = i_size_read(inode); -+ u32 nwrite = PAGE_SIZE; -+ u8 *buf; -+ int err; -+ -+ if (off + PAGE_SIZE > size) -+ nwrite = size & ~PAGE_MASK; -+ -+ sf_handle = vboxsf_get_write_handle(sf_i); -+ if (!sf_handle) -+ return -EBADF; -+ -+ buf = kmap(page); -+ err = vboxsf_write(sf_handle->root, sf_handle->handle, -+ off, &nwrite, buf); -+ kunmap(page); -+ -+ kref_put(&sf_handle->refcount, vboxsf_handle_release); -+ -+ if (err == 0) { -+ ClearPageError(page); -+ /* mtime changed */ -+ sf_i->force_restat = 1; -+ } else { -+ ClearPageUptodate(page); -+ } -+ -+ unlock_page(page); -+ return err; -+} -+ -+static int vboxsf_write_end(struct file *file, struct address_space *mapping, -+ loff_t pos, unsigned int len, unsigned int copied, -+ struct page *page, void *fsdata) -+{ -+ struct inode *inode = mapping->host; -+ struct vboxsf_handle *sf_handle = file->private_data; -+ unsigned int from = pos & ~PAGE_MASK; -+ u32 nwritten = len; -+ u8 *buf; -+ int err; -+ -+ /* zero the stale part of the page if we did a short copy */ -+ if (!PageUptodate(page) && copied < len) -+ zero_user(page, from + copied, len - copied); -+ -+ buf = kmap(page); -+ err = vboxsf_write(sf_handle->root, sf_handle->handle, -+ pos, &nwritten, buf + from); -+ kunmap(page); -+ -+ if (err) { -+ nwritten = 0; -+ goto out; -+ } -+ -+ /* mtime changed */ -+ VBOXSF_I(inode)->force_restat = 1; -+ -+ if (!PageUptodate(page) && nwritten == PAGE_SIZE) -+ SetPageUptodate(page); -+ -+ pos += nwritten; -+ if (pos > inode->i_size) -+ i_size_write(inode, pos); -+ -+out: -+ unlock_page(page); -+ put_page(page); -+ -+ return nwritten; -+} -+ -+/* -+ * Note simple_write_begin does not read the page from disk on partial writes -+ * this is ok since vboxsf_write_end only writes the written parts of the -+ * page and it does not call SetPageUptodate for partial writes. -+ */ -+const struct address_space_operations vboxsf_reg_aops = { -+ .readpage = vboxsf_readpage, -+ .writepage = vboxsf_writepage, -+ .set_page_dirty = __set_page_dirty_nobuffers, -+ .write_begin = simple_write_begin, -+ .write_end = vboxsf_write_end, -+}; -+ -+static const char *vboxsf_get_link(struct dentry *dentry, struct inode *inode, -+ struct delayed_call *done) -+{ -+ struct vboxsf_sbi *sbi = VBOXSF_SBI(inode->i_sb); -+ struct shfl_string *path; -+ char *link; -+ int err; -+ -+ if (!dentry) -+ return ERR_PTR(-ECHILD); -+ -+ path = vboxsf_path_from_dentry(sbi, dentry); -+ if (IS_ERR(path)) -+ return ERR_CAST(path); -+ -+ link = kzalloc(PATH_MAX, GFP_KERNEL); -+ if (!link) { -+ __putname(path); -+ return ERR_PTR(-ENOMEM); -+ } -+ -+ err = vboxsf_readlink(sbi->root, path, PATH_MAX, link); -+ __putname(path); -+ if (err) { -+ kfree(link); -+ return ERR_PTR(err); -+ } -+ -+ set_delayed_call(done, kfree_link, link); -+ return link; -+} -+ -+const struct inode_operations vboxsf_lnk_iops = { -+ .get_link = vboxsf_get_link -+}; -diff --git a/fs/vboxsf/shfl_hostintf.h b/fs/vboxsf/shfl_hostintf.h -new file mode 100644 -index 000000000000..aca829062c12 ---- /dev/null -+++ b/fs/vboxsf/shfl_hostintf.h -@@ -0,0 +1,901 @@ -+/* SPDX-License-Identifier: MIT */ -+/* -+ * VirtualBox Shared Folders: host interface definition. -+ * -+ * Copyright (C) 2006-2018 Oracle Corporation -+ */ -+ -+#ifndef SHFL_HOSTINTF_H -+#define SHFL_HOSTINTF_H -+ -+#include -+ -+/* The max in/out buffer size for a FN_READ or FN_WRITE call */ -+#define SHFL_MAX_RW_COUNT (16 * SZ_1M) -+ -+/* -+ * Structures shared between guest and the service -+ * can be relocated and use offsets to point to variable -+ * length parts. -+ * -+ * Shared folders protocol works with handles. -+ * Before doing any action on a file system object, -+ * one have to obtain the object handle via a SHFL_FN_CREATE -+ * request. A handle must be closed with SHFL_FN_CLOSE. -+ */ -+ -+enum { -+ SHFL_FN_QUERY_MAPPINGS = 1, /* Query mappings changes. */ -+ SHFL_FN_QUERY_MAP_NAME = 2, /* Query map name. */ -+ SHFL_FN_CREATE = 3, /* Open/create object. */ -+ SHFL_FN_CLOSE = 4, /* Close object handle. */ -+ SHFL_FN_READ = 5, /* Read object content. */ -+ SHFL_FN_WRITE = 6, /* Write new object content. */ -+ SHFL_FN_LOCK = 7, /* Lock/unlock a range in the object. */ -+ SHFL_FN_LIST = 8, /* List object content. */ -+ SHFL_FN_INFORMATION = 9, /* Query/set object information. */ -+ /* Note function number 10 is not used! */ -+ SHFL_FN_REMOVE = 11, /* Remove object */ -+ SHFL_FN_MAP_FOLDER_OLD = 12, /* Map folder (legacy) */ -+ SHFL_FN_UNMAP_FOLDER = 13, /* Unmap folder */ -+ SHFL_FN_RENAME = 14, /* Rename object */ -+ SHFL_FN_FLUSH = 15, /* Flush file */ -+ SHFL_FN_SET_UTF8 = 16, /* Select UTF8 filename encoding */ -+ SHFL_FN_MAP_FOLDER = 17, /* Map folder */ -+ SHFL_FN_READLINK = 18, /* Read symlink dest (as of VBox 4.0) */ -+ SHFL_FN_SYMLINK = 19, /* Create symlink (as of VBox 4.0) */ -+ SHFL_FN_SET_SYMLINKS = 20, /* Ask host to show symlinks (4.0+) */ -+}; -+ -+/* Root handles for a mapping are of type u32, Root handles are unique. */ -+#define SHFL_ROOT_NIL UINT_MAX -+ -+/* Shared folders handle for an opened object are of type u64. */ -+#define SHFL_HANDLE_NIL ULLONG_MAX -+ -+/* Hardcoded maximum length (in chars) of a shared folder name. */ -+#define SHFL_MAX_LEN (256) -+/* Hardcoded maximum number of shared folder mapping available to the guest. */ -+#define SHFL_MAX_MAPPINGS (64) -+ -+/** Shared folder string buffer structure. */ -+struct shfl_string { -+ /** Allocated size of the string member in bytes. */ -+ u16 size; -+ -+ /** Length of string without trailing nul in bytes. */ -+ u16 length; -+ -+ /** UTF-8 or UTF-16 string. Nul terminated. */ -+ union { -+ u8 utf8[2]; -+ u16 utf16[1]; -+ u16 ucs2[1]; /* misnomer, use utf16. */ -+ } string; -+}; -+VMMDEV_ASSERT_SIZE(shfl_string, 6); -+ -+/* The size of shfl_string w/o the string part. */ -+#define SHFLSTRING_HEADER_SIZE 4 -+ -+/* Calculate size of the string. */ -+static inline u32 shfl_string_buf_size(const struct shfl_string *string) -+{ -+ return string ? SHFLSTRING_HEADER_SIZE + string->size : 0; -+} -+ -+/* Set user id on execution (S_ISUID). */ -+#define SHFL_UNIX_ISUID 0004000U -+/* Set group id on execution (S_ISGID). */ -+#define SHFL_UNIX_ISGID 0002000U -+/* Sticky bit (S_ISVTX / S_ISTXT). */ -+#define SHFL_UNIX_ISTXT 0001000U -+ -+/* Owner readable (S_IRUSR). */ -+#define SHFL_UNIX_IRUSR 0000400U -+/* Owner writable (S_IWUSR). */ -+#define SHFL_UNIX_IWUSR 0000200U -+/* Owner executable (S_IXUSR). */ -+#define SHFL_UNIX_IXUSR 0000100U -+ -+/* Group readable (S_IRGRP). */ -+#define SHFL_UNIX_IRGRP 0000040U -+/* Group writable (S_IWGRP). */ -+#define SHFL_UNIX_IWGRP 0000020U -+/* Group executable (S_IXGRP). */ -+#define SHFL_UNIX_IXGRP 0000010U -+ -+/* Other readable (S_IROTH). */ -+#define SHFL_UNIX_IROTH 0000004U -+/* Other writable (S_IWOTH). */ -+#define SHFL_UNIX_IWOTH 0000002U -+/* Other executable (S_IXOTH). */ -+#define SHFL_UNIX_IXOTH 0000001U -+ -+/* Named pipe (fifo) (S_IFIFO). */ -+#define SHFL_TYPE_FIFO 0010000U -+/* Character device (S_IFCHR). */ -+#define SHFL_TYPE_DEV_CHAR 0020000U -+/* Directory (S_IFDIR). */ -+#define SHFL_TYPE_DIRECTORY 0040000U -+/* Block device (S_IFBLK). */ -+#define SHFL_TYPE_DEV_BLOCK 0060000U -+/* Regular file (S_IFREG). */ -+#define SHFL_TYPE_FILE 0100000U -+/* Symbolic link (S_IFLNK). */ -+#define SHFL_TYPE_SYMLINK 0120000U -+/* Socket (S_IFSOCK). */ -+#define SHFL_TYPE_SOCKET 0140000U -+/* Whiteout (S_IFWHT). */ -+#define SHFL_TYPE_WHITEOUT 0160000U -+/* Type mask (S_IFMT). */ -+#define SHFL_TYPE_MASK 0170000U -+ -+/* Checks the mode flags indicate a directory (S_ISDIR). */ -+#define SHFL_IS_DIRECTORY(m) (((m) & SHFL_TYPE_MASK) == SHFL_TYPE_DIRECTORY) -+/* Checks the mode flags indicate a symbolic link (S_ISLNK). */ -+#define SHFL_IS_SYMLINK(m) (((m) & SHFL_TYPE_MASK) == SHFL_TYPE_SYMLINK) -+ -+/** The available additional information in a shfl_fsobjattr object. */ -+enum shfl_fsobjattr_add { -+ /** No additional information is available / requested. */ -+ SHFLFSOBJATTRADD_NOTHING = 1, -+ /** -+ * The additional unix attributes (shfl_fsobjattr::u::unix_attr) are -+ * available / requested. -+ */ -+ SHFLFSOBJATTRADD_UNIX, -+ /** -+ * The additional extended attribute size (shfl_fsobjattr::u::size) is -+ * available / requested. -+ */ -+ SHFLFSOBJATTRADD_EASIZE, -+ /** -+ * The last valid item (inclusive). -+ * The valid range is SHFLFSOBJATTRADD_NOTHING thru -+ * SHFLFSOBJATTRADD_LAST. -+ */ -+ SHFLFSOBJATTRADD_LAST = SHFLFSOBJATTRADD_EASIZE, -+ -+ /** The usual 32-bit hack. */ -+ SHFLFSOBJATTRADD_32BIT_SIZE_HACK = 0x7fffffff -+}; -+ -+/** -+ * Additional unix Attributes, these are available when -+ * shfl_fsobjattr.additional == SHFLFSOBJATTRADD_UNIX. -+ */ -+struct shfl_fsobjattr_unix { -+ /** -+ * The user owning the filesystem object (st_uid). -+ * This field is ~0U if not supported. -+ */ -+ u32 uid; -+ -+ /** -+ * The group the filesystem object is assigned (st_gid). -+ * This field is ~0U if not supported. -+ */ -+ u32 gid; -+ -+ /** -+ * Number of hard links to this filesystem object (st_nlink). -+ * This field is 1 if the filesystem doesn't support hardlinking or -+ * the information isn't available. -+ */ -+ u32 hardlinks; -+ -+ /** -+ * The device number of the device which this filesystem object resides -+ * on (st_dev). This field is 0 if this information is not available. -+ */ -+ u32 inode_id_device; -+ -+ /** -+ * The unique identifier (within the filesystem) of this filesystem -+ * object (st_ino). Together with inode_id_device, this field can be -+ * used as a OS wide unique id, when both their values are not 0. -+ * This field is 0 if the information is not available. -+ */ -+ u64 inode_id; -+ -+ /** -+ * User flags (st_flags). -+ * This field is 0 if this information is not available. -+ */ -+ u32 flags; -+ -+ /** -+ * The current generation number (st_gen). -+ * This field is 0 if this information is not available. -+ */ -+ u32 generation_id; -+ -+ /** -+ * The device number of a char. or block device type object (st_rdev). -+ * This field is 0 if the file isn't a char. or block device or when -+ * the OS doesn't use the major+minor device idenfication scheme. -+ */ -+ u32 device; -+} __packed; -+ -+/** Extended attribute size. */ -+struct shfl_fsobjattr_easize { -+ /** Size of EAs. */ -+ s64 cb; -+} __packed; -+ -+/** Shared folder filesystem object attributes. */ -+struct shfl_fsobjattr { -+ /** Mode flags (st_mode). SHFL_UNIX_*, SHFL_TYPE_*, and SHFL_DOS_*. */ -+ u32 mode; -+ -+ /** The additional attributes available. */ -+ enum shfl_fsobjattr_add additional; -+ -+ /** -+ * Additional attributes. -+ * -+ * Unless explicitly specified to an API, the API can provide additional -+ * data as it is provided by the underlying OS. -+ */ -+ union { -+ struct shfl_fsobjattr_unix unix_attr; -+ struct shfl_fsobjattr_easize size; -+ } __packed u; -+} __packed; -+VMMDEV_ASSERT_SIZE(shfl_fsobjattr, 44); -+ -+struct shfl_timespec { -+ s64 ns_relative_to_unix_epoch; -+}; -+ -+/** Filesystem object information structure. */ -+struct shfl_fsobjinfo { -+ /** -+ * Logical size (st_size). -+ * For normal files this is the size of the file. -+ * For symbolic links, this is the length of the path name contained -+ * in the symbolic link. -+ * For other objects this fields needs to be specified. -+ */ -+ s64 size; -+ -+ /** Disk allocation size (st_blocks * DEV_BSIZE). */ -+ s64 allocated; -+ -+ /** Time of last access (st_atime). */ -+ struct shfl_timespec access_time; -+ -+ /** Time of last data modification (st_mtime). */ -+ struct shfl_timespec modification_time; -+ -+ /** -+ * Time of last status change (st_ctime). -+ * If not available this is set to modification_time. -+ */ -+ struct shfl_timespec change_time; -+ -+ /** -+ * Time of file birth (st_birthtime). -+ * If not available this is set to change_time. -+ */ -+ struct shfl_timespec birth_time; -+ -+ /** Attributes. */ -+ struct shfl_fsobjattr attr; -+ -+} __packed; -+VMMDEV_ASSERT_SIZE(shfl_fsobjinfo, 92); -+ -+/** -+ * result of an open/create request. -+ * Along with handle value the result code -+ * identifies what has happened while -+ * trying to open the object. -+ */ -+enum shfl_create_result { -+ SHFL_NO_RESULT, -+ /** Specified path does not exist. */ -+ SHFL_PATH_NOT_FOUND, -+ /** Path to file exists, but the last component does not. */ -+ SHFL_FILE_NOT_FOUND, -+ /** File already exists and either has been opened or not. */ -+ SHFL_FILE_EXISTS, -+ /** New file was created. */ -+ SHFL_FILE_CREATED, -+ /** Existing file was replaced or overwritten. */ -+ SHFL_FILE_REPLACED -+}; -+ -+/* No flags. Initialization value. */ -+#define SHFL_CF_NONE (0x00000000) -+ -+/* -+ * Only lookup the object, do not return a handle. When this is set all other -+ * flags are ignored. -+ */ -+#define SHFL_CF_LOOKUP (0x00000001) -+ -+/* -+ * Open parent directory of specified object. -+ * Useful for the corresponding Windows FSD flag -+ * and for opening paths like \\dir\\*.* to search the 'dir'. -+ */ -+#define SHFL_CF_OPEN_TARGET_DIRECTORY (0x00000002) -+ -+/* Create/open a directory. */ -+#define SHFL_CF_DIRECTORY (0x00000004) -+ -+/* -+ * Open/create action to do if object exists -+ * and if the object does not exists. -+ * REPLACE file means atomically DELETE and CREATE. -+ * OVERWRITE file means truncating the file to 0 and -+ * setting new size. -+ * When opening an existing directory REPLACE and OVERWRITE -+ * actions are considered invalid, and cause returning -+ * FILE_EXISTS with NIL handle. -+ */ -+#define SHFL_CF_ACT_MASK_IF_EXISTS (0x000000f0) -+#define SHFL_CF_ACT_MASK_IF_NEW (0x00000f00) -+ -+/* What to do if object exists. */ -+#define SHFL_CF_ACT_OPEN_IF_EXISTS (0x00000000) -+#define SHFL_CF_ACT_FAIL_IF_EXISTS (0x00000010) -+#define SHFL_CF_ACT_REPLACE_IF_EXISTS (0x00000020) -+#define SHFL_CF_ACT_OVERWRITE_IF_EXISTS (0x00000030) -+ -+/* What to do if object does not exist. */ -+#define SHFL_CF_ACT_CREATE_IF_NEW (0x00000000) -+#define SHFL_CF_ACT_FAIL_IF_NEW (0x00000100) -+ -+/* Read/write requested access for the object. */ -+#define SHFL_CF_ACCESS_MASK_RW (0x00003000) -+ -+/* No access requested. */ -+#define SHFL_CF_ACCESS_NONE (0x00000000) -+/* Read access requested. */ -+#define SHFL_CF_ACCESS_READ (0x00001000) -+/* Write access requested. */ -+#define SHFL_CF_ACCESS_WRITE (0x00002000) -+/* Read/Write access requested. */ -+#define SHFL_CF_ACCESS_READWRITE (0x00003000) -+ -+/* Requested share access for the object. */ -+#define SHFL_CF_ACCESS_MASK_DENY (0x0000c000) -+ -+/* Allow any access. */ -+#define SHFL_CF_ACCESS_DENYNONE (0x00000000) -+/* Do not allow read. */ -+#define SHFL_CF_ACCESS_DENYREAD (0x00004000) -+/* Do not allow write. */ -+#define SHFL_CF_ACCESS_DENYWRITE (0x00008000) -+/* Do not allow access. */ -+#define SHFL_CF_ACCESS_DENYALL (0x0000c000) -+ -+/* Requested access to attributes of the object. */ -+#define SHFL_CF_ACCESS_MASK_ATTR (0x00030000) -+ -+/* No access requested. */ -+#define SHFL_CF_ACCESS_ATTR_NONE (0x00000000) -+/* Read access requested. */ -+#define SHFL_CF_ACCESS_ATTR_READ (0x00010000) -+/* Write access requested. */ -+#define SHFL_CF_ACCESS_ATTR_WRITE (0x00020000) -+/* Read/Write access requested. */ -+#define SHFL_CF_ACCESS_ATTR_READWRITE (0x00030000) -+ -+/* -+ * The file is opened in append mode. -+ * Ignored if SHFL_CF_ACCESS_WRITE is not set. -+ */ -+#define SHFL_CF_ACCESS_APPEND (0x00040000) -+ -+/** Create parameters buffer struct for SHFL_FN_CREATE call */ -+struct shfl_createparms { -+ /** Returned handle of opened object. */ -+ u64 handle; -+ -+ /** Returned result of the operation */ -+ enum shfl_create_result result; -+ -+ /** SHFL_CF_* */ -+ u32 create_flags; -+ -+ /** -+ * Attributes of object to create and -+ * returned actual attributes of opened/created object. -+ */ -+ struct shfl_fsobjinfo info; -+} __packed; -+ -+/** Shared Folder directory information */ -+struct shfl_dirinfo { -+ /** Full information about the object. */ -+ struct shfl_fsobjinfo info; -+ /** -+ * The length of the short field (number of UTF16 chars). -+ * It is 16-bit for reasons of alignment. -+ */ -+ u16 short_name_len; -+ /** -+ * The short name for 8.3 compatibility. -+ * Empty string if not available. -+ */ -+ u16 short_name[14]; -+ struct shfl_string name; -+}; -+ -+/** Shared folder filesystem properties. */ -+struct shfl_fsproperties { -+ /** -+ * The maximum size of a filesystem object name. -+ * This does not include the '\\0'. -+ */ -+ u32 max_component_len; -+ -+ /** -+ * True if the filesystem is remote. -+ * False if the filesystem is local. -+ */ -+ bool remote; -+ -+ /** -+ * True if the filesystem is case sensitive. -+ * False if the filesystem is case insensitive. -+ */ -+ bool case_sensitive; -+ -+ /** -+ * True if the filesystem is mounted read only. -+ * False if the filesystem is mounted read write. -+ */ -+ bool read_only; -+ -+ /** -+ * True if the filesystem can encode unicode object names. -+ * False if it can't. -+ */ -+ bool supports_unicode; -+ -+ /** -+ * True if the filesystem is compresses. -+ * False if it isn't or we don't know. -+ */ -+ bool compressed; -+ -+ /** -+ * True if the filesystem compresses of individual files. -+ * False if it doesn't or we don't know. -+ */ -+ bool file_compression; -+}; -+VMMDEV_ASSERT_SIZE(shfl_fsproperties, 12); -+ -+struct shfl_volinfo { -+ s64 total_allocation_bytes; -+ s64 available_allocation_bytes; -+ u32 bytes_per_allocation_unit; -+ u32 bytes_per_sector; -+ u32 serial; -+ struct shfl_fsproperties properties; -+}; -+ -+ -+/** SHFL_FN_MAP_FOLDER Parameters structure. */ -+struct shfl_map_folder { -+ /** -+ * pointer, in: -+ * Points to struct shfl_string buffer. -+ */ -+ struct vmmdev_hgcm_function_parameter path; -+ -+ /** -+ * pointer, out: SHFLROOT (u32) -+ * Root handle of the mapping which name is queried. -+ */ -+ struct vmmdev_hgcm_function_parameter root; -+ -+ /** -+ * pointer, in: UTF16 -+ * Path delimiter -+ */ -+ struct vmmdev_hgcm_function_parameter delimiter; -+ -+ /** -+ * pointer, in: SHFLROOT (u32) -+ * Case senstive flag -+ */ -+ struct vmmdev_hgcm_function_parameter case_sensitive; -+ -+}; -+ -+/* Number of parameters */ -+#define SHFL_CPARMS_MAP_FOLDER (4) -+ -+ -+/** SHFL_FN_UNMAP_FOLDER Parameters structure. */ -+struct shfl_unmap_folder { -+ /** -+ * pointer, in: SHFLROOT (u32) -+ * Root handle of the mapping which name is queried. -+ */ -+ struct vmmdev_hgcm_function_parameter root; -+ -+}; -+ -+/* Number of parameters */ -+#define SHFL_CPARMS_UNMAP_FOLDER (1) -+ -+ -+/** SHFL_FN_CREATE Parameters structure. */ -+struct shfl_create { -+ /** -+ * pointer, in: SHFLROOT (u32) -+ * Root handle of the mapping which name is queried. -+ */ -+ struct vmmdev_hgcm_function_parameter root; -+ -+ /** -+ * pointer, in: -+ * Points to struct shfl_string buffer. -+ */ -+ struct vmmdev_hgcm_function_parameter path; -+ -+ /** -+ * pointer, in/out: -+ * Points to struct shfl_createparms buffer. -+ */ -+ struct vmmdev_hgcm_function_parameter parms; -+ -+}; -+ -+/* Number of parameters */ -+#define SHFL_CPARMS_CREATE (3) -+ -+ -+/** SHFL_FN_CLOSE Parameters structure. */ -+struct shfl_close { -+ /** -+ * pointer, in: SHFLROOT (u32) -+ * Root handle of the mapping which name is queried. -+ */ -+ struct vmmdev_hgcm_function_parameter root; -+ -+ /** -+ * value64, in: -+ * SHFLHANDLE (u64) of object to close. -+ */ -+ struct vmmdev_hgcm_function_parameter handle; -+ -+}; -+ -+/* Number of parameters */ -+#define SHFL_CPARMS_CLOSE (2) -+ -+ -+/** SHFL_FN_READ Parameters structure. */ -+struct shfl_read { -+ /** -+ * pointer, in: SHFLROOT (u32) -+ * Root handle of the mapping which name is queried. -+ */ -+ struct vmmdev_hgcm_function_parameter root; -+ -+ /** -+ * value64, in: -+ * SHFLHANDLE (u64) of object to read from. -+ */ -+ struct vmmdev_hgcm_function_parameter handle; -+ -+ /** -+ * value64, in: -+ * Offset to read from. -+ */ -+ struct vmmdev_hgcm_function_parameter offset; -+ -+ /** -+ * value64, in/out: -+ * Bytes to read/How many were read. -+ */ -+ struct vmmdev_hgcm_function_parameter cb; -+ -+ /** -+ * pointer, out: -+ * Buffer to place data to. -+ */ -+ struct vmmdev_hgcm_function_parameter buffer; -+ -+}; -+ -+/* Number of parameters */ -+#define SHFL_CPARMS_READ (5) -+ -+ -+/** SHFL_FN_WRITE Parameters structure. */ -+struct shfl_write { -+ /** -+ * pointer, in: SHFLROOT (u32) -+ * Root handle of the mapping which name is queried. -+ */ -+ struct vmmdev_hgcm_function_parameter root; -+ -+ /** -+ * value64, in: -+ * SHFLHANDLE (u64) of object to write to. -+ */ -+ struct vmmdev_hgcm_function_parameter handle; -+ -+ /** -+ * value64, in: -+ * Offset to write to. -+ */ -+ struct vmmdev_hgcm_function_parameter offset; -+ -+ /** -+ * value64, in/out: -+ * Bytes to write/How many were written. -+ */ -+ struct vmmdev_hgcm_function_parameter cb; -+ -+ /** -+ * pointer, in: -+ * Data to write. -+ */ -+ struct vmmdev_hgcm_function_parameter buffer; -+ -+}; -+ -+/* Number of parameters */ -+#define SHFL_CPARMS_WRITE (5) -+ -+ -+/* -+ * SHFL_FN_LIST -+ * Listing information includes variable length RTDIRENTRY[EX] structures. -+ */ -+ -+#define SHFL_LIST_NONE 0 -+#define SHFL_LIST_RETURN_ONE 1 -+ -+/** SHFL_FN_LIST Parameters structure. */ -+struct shfl_list { -+ /** -+ * pointer, in: SHFLROOT (u32) -+ * Root handle of the mapping which name is queried. -+ */ -+ struct vmmdev_hgcm_function_parameter root; -+ -+ /** -+ * value64, in: -+ * SHFLHANDLE (u64) of object to be listed. -+ */ -+ struct vmmdev_hgcm_function_parameter handle; -+ -+ /** -+ * value32, in: -+ * List flags SHFL_LIST_*. -+ */ -+ struct vmmdev_hgcm_function_parameter flags; -+ -+ /** -+ * value32, in/out: -+ * Bytes to be used for listing information/How many bytes were used. -+ */ -+ struct vmmdev_hgcm_function_parameter cb; -+ -+ /** -+ * pointer, in/optional -+ * Points to struct shfl_string buffer that specifies a search path. -+ */ -+ struct vmmdev_hgcm_function_parameter path; -+ -+ /** -+ * pointer, out: -+ * Buffer to place listing information to. (struct shfl_dirinfo) -+ */ -+ struct vmmdev_hgcm_function_parameter buffer; -+ -+ /** -+ * value32, in/out: -+ * Indicates a key where the listing must be resumed. -+ * in: 0 means start from begin of object. -+ * out: 0 means listing completed. -+ */ -+ struct vmmdev_hgcm_function_parameter resume_point; -+ -+ /** -+ * pointer, out: -+ * Number of files returned -+ */ -+ struct vmmdev_hgcm_function_parameter file_count; -+}; -+ -+/* Number of parameters */ -+#define SHFL_CPARMS_LIST (8) -+ -+ -+/** SHFL_FN_READLINK Parameters structure. */ -+struct shfl_readLink { -+ /** -+ * pointer, in: SHFLROOT (u32) -+ * Root handle of the mapping which name is queried. -+ */ -+ struct vmmdev_hgcm_function_parameter root; -+ -+ /** -+ * pointer, in: -+ * Points to struct shfl_string buffer. -+ */ -+ struct vmmdev_hgcm_function_parameter path; -+ -+ /** -+ * pointer, out: -+ * Buffer to place data to. -+ */ -+ struct vmmdev_hgcm_function_parameter buffer; -+ -+}; -+ -+/* Number of parameters */ -+#define SHFL_CPARMS_READLINK (3) -+ -+ -+/* SHFL_FN_INFORMATION */ -+ -+/* Mask of Set/Get bit. */ -+#define SHFL_INFO_MODE_MASK (0x1) -+/* Get information */ -+#define SHFL_INFO_GET (0x0) -+/* Set information */ -+#define SHFL_INFO_SET (0x1) -+ -+/* Get name of the object. */ -+#define SHFL_INFO_NAME (0x2) -+/* Set size of object (extend/trucate); only applies to file objects */ -+#define SHFL_INFO_SIZE (0x4) -+/* Get/Set file object info. */ -+#define SHFL_INFO_FILE (0x8) -+/* Get volume information. */ -+#define SHFL_INFO_VOLUME (0x10) -+ -+/** SHFL_FN_INFORMATION Parameters structure. */ -+struct shfl_information { -+ /** -+ * pointer, in: SHFLROOT (u32) -+ * Root handle of the mapping which name is queried. -+ */ -+ struct vmmdev_hgcm_function_parameter root; -+ -+ /** -+ * value64, in: -+ * SHFLHANDLE (u64) of object to be listed. -+ */ -+ struct vmmdev_hgcm_function_parameter handle; -+ -+ /** -+ * value32, in: -+ * SHFL_INFO_* -+ */ -+ struct vmmdev_hgcm_function_parameter flags; -+ -+ /** -+ * value32, in/out: -+ * Bytes to be used for information/How many bytes were used. -+ */ -+ struct vmmdev_hgcm_function_parameter cb; -+ -+ /** -+ * pointer, in/out: -+ * Information to be set/get (shfl_fsobjinfo or shfl_string). Do not -+ * forget to set the shfl_fsobjinfo::attr::additional for a get -+ * operation as well. -+ */ -+ struct vmmdev_hgcm_function_parameter info; -+ -+}; -+ -+/* Number of parameters */ -+#define SHFL_CPARMS_INFORMATION (5) -+ -+ -+/* SHFL_FN_REMOVE */ -+ -+#define SHFL_REMOVE_FILE (0x1) -+#define SHFL_REMOVE_DIR (0x2) -+#define SHFL_REMOVE_SYMLINK (0x4) -+ -+/** SHFL_FN_REMOVE Parameters structure. */ -+struct shfl_remove { -+ /** -+ * pointer, in: SHFLROOT (u32) -+ * Root handle of the mapping which name is queried. -+ */ -+ struct vmmdev_hgcm_function_parameter root; -+ -+ /** -+ * pointer, in: -+ * Points to struct shfl_string buffer. -+ */ -+ struct vmmdev_hgcm_function_parameter path; -+ -+ /** -+ * value32, in: -+ * remove flags (file/directory) -+ */ -+ struct vmmdev_hgcm_function_parameter flags; -+ -+}; -+ -+#define SHFL_CPARMS_REMOVE (3) -+ -+ -+/* SHFL_FN_RENAME */ -+ -+#define SHFL_RENAME_FILE (0x1) -+#define SHFL_RENAME_DIR (0x2) -+#define SHFL_RENAME_REPLACE_IF_EXISTS (0x4) -+ -+/** SHFL_FN_RENAME Parameters structure. */ -+struct shfl_rename { -+ /** -+ * pointer, in: SHFLROOT (u32) -+ * Root handle of the mapping which name is queried. -+ */ -+ struct vmmdev_hgcm_function_parameter root; -+ -+ /** -+ * pointer, in: -+ * Points to struct shfl_string src. -+ */ -+ struct vmmdev_hgcm_function_parameter src; -+ -+ /** -+ * pointer, in: -+ * Points to struct shfl_string dest. -+ */ -+ struct vmmdev_hgcm_function_parameter dest; -+ -+ /** -+ * value32, in: -+ * rename flags (file/directory) -+ */ -+ struct vmmdev_hgcm_function_parameter flags; -+ -+}; -+ -+#define SHFL_CPARMS_RENAME (4) -+ -+ -+/** SHFL_FN_SYMLINK Parameters structure. */ -+struct shfl_symlink { -+ /** -+ * pointer, in: SHFLROOT (u32) -+ * Root handle of the mapping which name is queried. -+ */ -+ struct vmmdev_hgcm_function_parameter root; -+ -+ /** -+ * pointer, in: -+ * Points to struct shfl_string of path for the new symlink. -+ */ -+ struct vmmdev_hgcm_function_parameter new_path; -+ -+ /** -+ * pointer, in: -+ * Points to struct shfl_string of destination for symlink. -+ */ -+ struct vmmdev_hgcm_function_parameter old_path; -+ -+ /** -+ * pointer, out: -+ * Information about created symlink. -+ */ -+ struct vmmdev_hgcm_function_parameter info; -+ -+}; -+ -+#define SHFL_CPARMS_SYMLINK (4) -+ -+#endif -diff --git a/fs/vboxsf/super.c b/fs/vboxsf/super.c -new file mode 100644 -index 000000000000..b14ecd2948f4 ---- /dev/null -+++ b/fs/vboxsf/super.c -@@ -0,0 +1,497 @@ -+// SPDX-License-Identifier: MIT -+/* -+ * VirtualBox Guest Shared Folders support: Virtual File System. -+ * -+ * Module initialization/finalization -+ * File system registration/deregistration -+ * Superblock reading -+ * Few utility functions -+ * -+ * Copyright (C) 2006-2018 Oracle Corporation -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "vfsmod.h" -+ -+#define VBOXSF_SUPER_MAGIC 0x786f4256 /* 'VBox' little endian */ -+ -+#define VBSF_MOUNT_SIGNATURE_BYTE_0 ('\000') -+#define VBSF_MOUNT_SIGNATURE_BYTE_1 ('\377') -+#define VBSF_MOUNT_SIGNATURE_BYTE_2 ('\376') -+#define VBSF_MOUNT_SIGNATURE_BYTE_3 ('\375') -+ -+static int follow_symlinks; -+module_param(follow_symlinks, int, 0444); -+MODULE_PARM_DESC(follow_symlinks, -+ "Let host resolve symlinks rather than showing them"); -+ -+static DEFINE_IDA(vboxsf_bdi_ida); -+static DEFINE_MUTEX(vboxsf_setup_mutex); -+static bool vboxsf_setup_done; -+static struct super_operations vboxsf_super_ops; /* forward declaration */ -+static struct kmem_cache *vboxsf_inode_cachep; -+ -+static char * const vboxsf_default_nls = CONFIG_NLS_DEFAULT; -+ -+enum { opt_nls, opt_uid, opt_gid, opt_ttl, opt_dmode, opt_fmode, -+ opt_dmask, opt_fmask }; -+ -+static const struct fs_parameter_spec vboxsf_param_specs[] = { -+ fsparam_string ("nls", opt_nls), -+ fsparam_u32 ("uid", opt_uid), -+ fsparam_u32 ("gid", opt_gid), -+ fsparam_u32 ("ttl", opt_ttl), -+ fsparam_u32oct ("dmode", opt_dmode), -+ fsparam_u32oct ("fmode", opt_fmode), -+ fsparam_u32oct ("dmask", opt_dmask), -+ fsparam_u32oct ("fmask", opt_fmask), -+ {} -+}; -+ -+static const struct fs_parameter_description vboxsf_fs_parameters = { -+ .name = "vboxsf", -+ .specs = vboxsf_param_specs, -+}; -+ -+static int vboxsf_parse_param(struct fs_context *fc, struct fs_parameter *param) -+{ -+ struct vboxsf_fs_context *ctx = fc->fs_private; -+ struct fs_parse_result result; -+ kuid_t uid; -+ kgid_t gid; -+ int opt; -+ -+ opt = fs_parse(fc, &vboxsf_fs_parameters, param, &result); -+ if (opt < 0) -+ return opt; -+ -+ switch (opt) { -+ case opt_nls: -+ if (ctx->nls_name || fc->purpose != FS_CONTEXT_FOR_MOUNT) { -+ vbg_err("vboxsf: Cannot reconfigure nls option\n"); -+ return -EINVAL; -+ } -+ ctx->nls_name = param->string; -+ param->string = NULL; -+ break; -+ case opt_uid: -+ uid = make_kuid(current_user_ns(), result.uint_32); -+ if (!uid_valid(uid)) -+ return -EINVAL; -+ ctx->o.uid = uid; -+ break; -+ case opt_gid: -+ gid = make_kgid(current_user_ns(), result.uint_32); -+ if (!gid_valid(gid)) -+ return -EINVAL; -+ ctx->o.gid = gid; -+ break; -+ case opt_ttl: -+ ctx->o.ttl = msecs_to_jiffies(result.uint_32); -+ break; -+ case opt_dmode: -+ if (result.uint_32 & ~0777) -+ return -EINVAL; -+ ctx->o.dmode = result.uint_32; -+ ctx->o.dmode_set = true; -+ break; -+ case opt_fmode: -+ if (result.uint_32 & ~0777) -+ return -EINVAL; -+ ctx->o.fmode = result.uint_32; -+ ctx->o.fmode_set = true; -+ break; -+ case opt_dmask: -+ if (result.uint_32 & ~07777) -+ return -EINVAL; -+ ctx->o.dmask = result.uint_32; -+ break; -+ case opt_fmask: -+ if (result.uint_32 & ~07777) -+ return -EINVAL; -+ ctx->o.fmask = result.uint_32; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int vboxsf_fill_super(struct super_block *sb, struct fs_context *fc) -+{ -+ struct vboxsf_fs_context *ctx = fc->fs_private; -+ struct shfl_string *folder_name, root_path; -+ struct vboxsf_sbi *sbi; -+ struct dentry *droot; -+ struct inode *iroot; -+ char *nls_name; -+ size_t size; -+ int err; -+ -+ if (!fc->source) -+ return -EINVAL; -+ -+ sbi = kzalloc(sizeof(*sbi), GFP_KERNEL); -+ if (!sbi) -+ return -ENOMEM; -+ -+ sbi->o = ctx->o; -+ idr_init(&sbi->ino_idr); -+ spin_lock_init(&sbi->ino_idr_lock); -+ sbi->next_generation = 1; -+ sbi->bdi_id = -1; -+ -+ /* Load nls if not utf8 */ -+ nls_name = ctx->nls_name ? ctx->nls_name : vboxsf_default_nls; -+ if (strcmp(nls_name, "utf8") != 0) { -+ if (nls_name == vboxsf_default_nls) -+ sbi->nls = load_nls_default(); -+ else -+ sbi->nls = load_nls(nls_name); -+ -+ if (!sbi->nls) { -+ vbg_err("vboxsf: Count not load '%s' nls\n", nls_name); -+ err = -EINVAL; -+ goto fail_free; -+ } -+ } -+ -+ sbi->bdi_id = ida_simple_get(&vboxsf_bdi_ida, 0, 0, GFP_KERNEL); -+ if (sbi->bdi_id < 0) { -+ err = sbi->bdi_id; -+ goto fail_free; -+ } -+ -+ err = super_setup_bdi_name(sb, "vboxsf-%s.%d", fc->source, sbi->bdi_id); -+ if (err) -+ goto fail_free; -+ -+ /* Turn source into a shfl_string and map the folder */ -+ size = strlen(fc->source) + 1; -+ folder_name = kmalloc(SHFLSTRING_HEADER_SIZE + size, GFP_KERNEL); -+ if (!folder_name) { -+ err = -ENOMEM; -+ goto fail_free; -+ } -+ folder_name->size = size; -+ folder_name->length = size - 1; -+ strlcpy(folder_name->string.utf8, fc->source, size); -+ err = vboxsf_map_folder(folder_name, &sbi->root); -+ kfree(folder_name); -+ if (err) { -+ vbg_err("vboxsf: Host rejected mount of '%s' with error %d\n", -+ fc->source, err); -+ goto fail_free; -+ } -+ -+ root_path.length = 1; -+ root_path.size = 2; -+ root_path.string.utf8[0] = '/'; -+ root_path.string.utf8[1] = 0; -+ err = vboxsf_stat(sbi, &root_path, &sbi->root_info); -+ if (err) -+ goto fail_unmap; -+ -+ sb->s_magic = VBOXSF_SUPER_MAGIC; -+ sb->s_blocksize = 1024; -+ sb->s_maxbytes = MAX_LFS_FILESIZE; -+ sb->s_op = &vboxsf_super_ops; -+ sb->s_d_op = &vboxsf_dentry_ops; -+ -+ iroot = iget_locked(sb, 0); -+ if (!iroot) { -+ err = -ENOMEM; -+ goto fail_unmap; -+ } -+ vboxsf_init_inode(sbi, iroot, &sbi->root_info); -+ unlock_new_inode(iroot); -+ -+ droot = d_make_root(iroot); -+ if (!droot) { -+ err = -ENOMEM; -+ goto fail_unmap; -+ } -+ -+ sb->s_root = droot; -+ sb->s_fs_info = sbi; -+ return 0; -+ -+fail_unmap: -+ vboxsf_unmap_folder(sbi->root); -+fail_free: -+ if (sbi->bdi_id >= 0) -+ ida_simple_remove(&vboxsf_bdi_ida, sbi->bdi_id); -+ if (sbi->nls) -+ unload_nls(sbi->nls); -+ idr_destroy(&sbi->ino_idr); -+ kfree(sbi); -+ return err; -+} -+ -+static void vboxsf_inode_init_once(void *data) -+{ -+ struct vboxsf_inode *sf_i = data; -+ -+ mutex_init(&sf_i->handle_list_mutex); -+ inode_init_once(&sf_i->vfs_inode); -+} -+ -+static struct inode *vboxsf_alloc_inode(struct super_block *sb) -+{ -+ struct vboxsf_inode *sf_i; -+ -+ sf_i = kmem_cache_alloc(vboxsf_inode_cachep, GFP_NOFS); -+ if (!sf_i) -+ return NULL; -+ -+ sf_i->force_restat = 0; -+ INIT_LIST_HEAD(&sf_i->handle_list); -+ -+ return &sf_i->vfs_inode; -+} -+ -+static void vboxsf_free_inode(struct inode *inode) -+{ -+ struct vboxsf_sbi *sbi = VBOXSF_SBI(inode->i_sb); -+ unsigned long flags; -+ -+ spin_lock_irqsave(&sbi->ino_idr_lock, flags); -+ idr_remove(&sbi->ino_idr, inode->i_ino); -+ spin_unlock_irqrestore(&sbi->ino_idr_lock, flags); -+ kmem_cache_free(vboxsf_inode_cachep, VBOXSF_I(inode)); -+} -+ -+static void vboxsf_put_super(struct super_block *sb) -+{ -+ struct vboxsf_sbi *sbi = VBOXSF_SBI(sb); -+ -+ vboxsf_unmap_folder(sbi->root); -+ if (sbi->bdi_id >= 0) -+ ida_simple_remove(&vboxsf_bdi_ida, sbi->bdi_id); -+ if (sbi->nls) -+ unload_nls(sbi->nls); -+ -+ /* -+ * vboxsf_free_inode uses the idr, make sure all delayed rcu free -+ * inodes are flushed. -+ */ -+ rcu_barrier(); -+ idr_destroy(&sbi->ino_idr); -+ kfree(sbi); -+} -+ -+static int vboxsf_statfs(struct dentry *dentry, struct kstatfs *stat) -+{ -+ struct super_block *sb = dentry->d_sb; -+ struct shfl_volinfo shfl_volinfo; -+ struct vboxsf_sbi *sbi; -+ u32 buf_len; -+ int err; -+ -+ sbi = VBOXSF_SBI(sb); -+ buf_len = sizeof(shfl_volinfo); -+ err = vboxsf_fsinfo(sbi->root, 0, SHFL_INFO_GET | SHFL_INFO_VOLUME, -+ &buf_len, &shfl_volinfo); -+ if (err) -+ return err; -+ -+ stat->f_type = VBOXSF_SUPER_MAGIC; -+ stat->f_bsize = shfl_volinfo.bytes_per_allocation_unit; -+ -+ do_div(shfl_volinfo.total_allocation_bytes, -+ shfl_volinfo.bytes_per_allocation_unit); -+ stat->f_blocks = shfl_volinfo.total_allocation_bytes; -+ -+ do_div(shfl_volinfo.available_allocation_bytes, -+ shfl_volinfo.bytes_per_allocation_unit); -+ stat->f_bfree = shfl_volinfo.available_allocation_bytes; -+ stat->f_bavail = shfl_volinfo.available_allocation_bytes; -+ -+ stat->f_files = 1000; -+ /* -+ * Don't return 0 here since the guest may then think that it is not -+ * possible to create any more files. -+ */ -+ stat->f_ffree = 1000000; -+ stat->f_fsid.val[0] = 0; -+ stat->f_fsid.val[1] = 0; -+ stat->f_namelen = 255; -+ return 0; -+} -+ -+static struct super_operations vboxsf_super_ops = { -+ .alloc_inode = vboxsf_alloc_inode, -+ .free_inode = vboxsf_free_inode, -+ .put_super = vboxsf_put_super, -+ .statfs = vboxsf_statfs, -+}; -+ -+static int vboxsf_setup(void) -+{ -+ int err; -+ -+ mutex_lock(&vboxsf_setup_mutex); -+ -+ if (vboxsf_setup_done) -+ goto success; -+ -+ vboxsf_inode_cachep = -+ kmem_cache_create("vboxsf_inode_cache", -+ sizeof(struct vboxsf_inode), 0, -+ (SLAB_RECLAIM_ACCOUNT | SLAB_MEM_SPREAD | -+ SLAB_ACCOUNT), -+ vboxsf_inode_init_once); -+ if (!vboxsf_inode_cachep) { -+ err = -ENOMEM; -+ goto fail_nomem; -+ } -+ -+ err = vboxsf_connect(); -+ if (err) { -+ vbg_err("vboxsf: err %d connecting to guest PCI-device\n", err); -+ vbg_err("vboxsf: make sure you are inside a VirtualBox VM\n"); -+ vbg_err("vboxsf: and check dmesg for vboxguest errors\n"); -+ goto fail_free_cache; -+ } -+ -+ err = vboxsf_set_utf8(); -+ if (err) { -+ vbg_err("vboxsf_setutf8 error %d\n", err); -+ goto fail_disconnect; -+ } -+ -+ if (!follow_symlinks) { -+ err = vboxsf_set_symlinks(); -+ if (err) -+ vbg_warn("vboxsf: Unable to show symlinks: %d\n", err); -+ } -+ -+ vboxsf_setup_done = true; -+success: -+ mutex_unlock(&vboxsf_setup_mutex); -+ return 0; -+ -+fail_disconnect: -+ vboxsf_disconnect(); -+fail_free_cache: -+ kmem_cache_destroy(vboxsf_inode_cachep); -+fail_nomem: -+ mutex_unlock(&vboxsf_setup_mutex); -+ return err; -+} -+ -+static int vboxsf_parse_monolithic(struct fs_context *fc, void *data) -+{ -+ char *options = data; -+ -+ if (options && options[0] == VBSF_MOUNT_SIGNATURE_BYTE_0 && -+ options[1] == VBSF_MOUNT_SIGNATURE_BYTE_1 && -+ options[2] == VBSF_MOUNT_SIGNATURE_BYTE_2 && -+ options[3] == VBSF_MOUNT_SIGNATURE_BYTE_3) { -+ vbg_err("vboxsf: Old binary mount data not supported, remove obsolete mount.vboxsf and/or update your VBoxService.\n"); -+ return -EINVAL; -+ } -+ -+ return generic_parse_monolithic(fc, data); -+} -+ -+static int vboxsf_get_tree(struct fs_context *fc) -+{ -+ int err; -+ -+ err = vboxsf_setup(); -+ if (err) -+ return err; -+ -+ return get_tree_nodev(fc, vboxsf_fill_super); -+} -+ -+static int vboxsf_reconfigure(struct fs_context *fc) -+{ -+ struct vboxsf_sbi *sbi = VBOXSF_SBI(fc->root->d_sb); -+ struct vboxsf_fs_context *ctx = fc->fs_private; -+ struct inode *iroot = fc->root->d_sb->s_root->d_inode; -+ -+ /* Apply changed options to the root inode */ -+ sbi->o = ctx->o; -+ vboxsf_init_inode(sbi, iroot, &sbi->root_info); -+ -+ return 0; -+} -+ -+static void vboxsf_free_fc(struct fs_context *fc) -+{ -+ struct vboxsf_fs_context *ctx = fc->fs_private; -+ -+ kfree(ctx->nls_name); -+ kfree(ctx); -+} -+ -+static const struct fs_context_operations vboxsf_context_ops = { -+ .free = vboxsf_free_fc, -+ .parse_param = vboxsf_parse_param, -+ .parse_monolithic = vboxsf_parse_monolithic, -+ .get_tree = vboxsf_get_tree, -+ .reconfigure = vboxsf_reconfigure, -+}; -+ -+static int vboxsf_init_fs_context(struct fs_context *fc) -+{ -+ struct vboxsf_fs_context *ctx; -+ -+ ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); -+ if (!ctx) -+ return -ENOMEM; -+ -+ current_uid_gid(&ctx->o.uid, &ctx->o.gid); -+ -+ fc->fs_private = ctx; -+ fc->ops = &vboxsf_context_ops; -+ return 0; -+} -+ -+static struct file_system_type vboxsf_fs_type = { -+ .owner = THIS_MODULE, -+ .name = "vboxsf", -+ .init_fs_context = vboxsf_init_fs_context, -+ .parameters = &vboxsf_fs_parameters, -+ .kill_sb = kill_anon_super -+}; -+ -+/* Module initialization/finalization handlers */ -+static int __init vboxsf_init(void) -+{ -+ return register_filesystem(&vboxsf_fs_type); -+} -+ -+static void __exit vboxsf_fini(void) -+{ -+ unregister_filesystem(&vboxsf_fs_type); -+ -+ mutex_lock(&vboxsf_setup_mutex); -+ if (vboxsf_setup_done) { -+ vboxsf_disconnect(); -+ /* -+ * Make sure all delayed rcu free inodes are flushed -+ * before we destroy the cache. -+ */ -+ rcu_barrier(); -+ kmem_cache_destroy(vboxsf_inode_cachep); -+ } -+ mutex_unlock(&vboxsf_setup_mutex); -+} -+ -+module_init(vboxsf_init); -+module_exit(vboxsf_fini); -+ -+MODULE_DESCRIPTION("Oracle VM VirtualBox Module for Host File System Access"); -+MODULE_AUTHOR("Oracle Corporation"); -+MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS_FS("vboxsf"); -diff --git a/fs/vboxsf/utils.c b/fs/vboxsf/utils.c -new file mode 100644 -index 000000000000..96bd160da48b ---- /dev/null -+++ b/fs/vboxsf/utils.c -@@ -0,0 +1,551 @@ -+// SPDX-License-Identifier: MIT -+/* -+ * VirtualBox Guest Shared Folders support: Utility functions. -+ * Mainly conversion from/to VirtualBox/Linux data structures. -+ * -+ * Copyright (C) 2006-2018 Oracle Corporation -+ */ -+ -+#include -+#include -+#include -+#include -+#include "vfsmod.h" -+ -+struct inode *vboxsf_new_inode(struct super_block *sb) -+{ -+ struct vboxsf_sbi *sbi = VBOXSF_SBI(sb); -+ struct inode *inode; -+ unsigned long flags; -+ int cursor, ret; -+ u32 gen; -+ -+ inode = new_inode(sb); -+ if (!inode) -+ return ERR_PTR(-ENOMEM); -+ -+ idr_preload(GFP_KERNEL); -+ spin_lock_irqsave(&sbi->ino_idr_lock, flags); -+ cursor = idr_get_cursor(&sbi->ino_idr); -+ ret = idr_alloc_cyclic(&sbi->ino_idr, inode, 1, 0, GFP_ATOMIC); -+ if (ret >= 0 && ret < cursor) -+ sbi->next_generation++; -+ gen = sbi->next_generation; -+ spin_unlock_irqrestore(&sbi->ino_idr_lock, flags); -+ idr_preload_end(); -+ -+ if (ret < 0) { -+ iput(inode); -+ return ERR_PTR(ret); -+ } -+ -+ inode->i_ino = ret; -+ inode->i_generation = gen; -+ return inode; -+} -+ -+/* set [inode] attributes based on [info], uid/gid based on [sbi] */ -+void vboxsf_init_inode(struct vboxsf_sbi *sbi, struct inode *inode, -+ const struct shfl_fsobjinfo *info) -+{ -+ const struct shfl_fsobjattr *attr; -+ s64 allocated; -+ int mode; -+ -+ attr = &info->attr; -+ -+#define mode_set(r) ((attr->mode & (SHFL_UNIX_##r)) ? (S_##r) : 0) -+ -+ mode = mode_set(IRUSR); -+ mode |= mode_set(IWUSR); -+ mode |= mode_set(IXUSR); -+ -+ mode |= mode_set(IRGRP); -+ mode |= mode_set(IWGRP); -+ mode |= mode_set(IXGRP); -+ -+ mode |= mode_set(IROTH); -+ mode |= mode_set(IWOTH); -+ mode |= mode_set(IXOTH); -+ -+#undef mode_set -+ -+ /* We use the host-side values for these */ -+ inode->i_flags |= S_NOATIME | S_NOCMTIME; -+ inode->i_mapping->a_ops = &vboxsf_reg_aops; -+ -+ if (SHFL_IS_DIRECTORY(attr->mode)) { -+ inode->i_mode = sbi->o.dmode_set ? sbi->o.dmode : mode; -+ inode->i_mode &= ~sbi->o.dmask; -+ inode->i_mode |= S_IFDIR; -+ inode->i_op = &vboxsf_dir_iops; -+ inode->i_fop = &vboxsf_dir_fops; -+ /* -+ * XXX: this probably should be set to the number of entries -+ * in the directory plus two (. ..) -+ */ -+ set_nlink(inode, 1); -+ } else if (SHFL_IS_SYMLINK(attr->mode)) { -+ inode->i_mode = sbi->o.fmode_set ? sbi->o.fmode : mode; -+ inode->i_mode &= ~sbi->o.fmask; -+ inode->i_mode |= S_IFLNK; -+ inode->i_op = &vboxsf_lnk_iops; -+ set_nlink(inode, 1); -+ } else { -+ inode->i_mode = sbi->o.fmode_set ? sbi->o.fmode : mode; -+ inode->i_mode &= ~sbi->o.fmask; -+ inode->i_mode |= S_IFREG; -+ inode->i_op = &vboxsf_reg_iops; -+ inode->i_fop = &vboxsf_reg_fops; -+ set_nlink(inode, 1); -+ } -+ -+ inode->i_uid = sbi->o.uid; -+ inode->i_gid = sbi->o.gid; -+ -+ inode->i_size = info->size; -+ inode->i_blkbits = 12; -+ /* i_blocks always in units of 512 bytes! */ -+ allocated = info->allocated + 511; -+ do_div(allocated, 512); -+ inode->i_blocks = allocated; -+ -+ inode->i_atime = ns_to_timespec64( -+ info->access_time.ns_relative_to_unix_epoch); -+ inode->i_ctime = ns_to_timespec64( -+ info->change_time.ns_relative_to_unix_epoch); -+ inode->i_mtime = ns_to_timespec64( -+ info->modification_time.ns_relative_to_unix_epoch); -+} -+ -+int vboxsf_create_at_dentry(struct dentry *dentry, -+ struct shfl_createparms *params) -+{ -+ struct vboxsf_sbi *sbi = VBOXSF_SBI(dentry->d_sb); -+ struct shfl_string *path; -+ int err; -+ -+ path = vboxsf_path_from_dentry(sbi, dentry); -+ if (IS_ERR(path)) -+ return PTR_ERR(path); -+ -+ err = vboxsf_create(sbi->root, path, params); -+ __putname(path); -+ -+ return err; -+} -+ -+int vboxsf_stat(struct vboxsf_sbi *sbi, struct shfl_string *path, -+ struct shfl_fsobjinfo *info) -+{ -+ struct shfl_createparms params = {}; -+ int err; -+ -+ params.handle = SHFL_HANDLE_NIL; -+ params.create_flags = SHFL_CF_LOOKUP | SHFL_CF_ACT_FAIL_IF_NEW; -+ -+ err = vboxsf_create(sbi->root, path, ¶ms); -+ if (err) -+ return err; -+ -+ if (params.result != SHFL_FILE_EXISTS) -+ return -ENOENT; -+ -+ if (info) -+ *info = params.info; -+ -+ return 0; -+} -+ -+int vboxsf_stat_dentry(struct dentry *dentry, struct shfl_fsobjinfo *info) -+{ -+ struct vboxsf_sbi *sbi = VBOXSF_SBI(dentry->d_sb); -+ struct shfl_string *path; -+ int err; -+ -+ path = vboxsf_path_from_dentry(sbi, dentry); -+ if (IS_ERR(path)) -+ return PTR_ERR(path); -+ -+ err = vboxsf_stat(sbi, path, info); -+ __putname(path); -+ return err; -+} -+ -+int vboxsf_inode_revalidate(struct dentry *dentry) -+{ -+ struct vboxsf_sbi *sbi; -+ struct vboxsf_inode *sf_i; -+ struct shfl_fsobjinfo info; -+ struct timespec64 prev_mtime; -+ struct inode *inode; -+ int err; -+ -+ if (!dentry || !d_really_is_positive(dentry)) -+ return -EINVAL; -+ -+ inode = d_inode(dentry); -+ prev_mtime = inode->i_mtime; -+ sf_i = VBOXSF_I(inode); -+ sbi = VBOXSF_SBI(dentry->d_sb); -+ if (!sf_i->force_restat) { -+ if (time_before(jiffies, dentry->d_time + sbi->o.ttl)) -+ return 0; -+ } -+ -+ err = vboxsf_stat_dentry(dentry, &info); -+ if (err) -+ return err; -+ -+ dentry->d_time = jiffies; -+ sf_i->force_restat = 0; -+ vboxsf_init_inode(sbi, inode, &info); -+ -+ /* -+ * If the file was changed on the host side we need to invalidate the -+ * page-cache for it. Note this also gets triggered by our own writes, -+ * this is unavoidable. -+ */ -+ if (timespec64_compare(&inode->i_mtime, &prev_mtime) > 0) -+ invalidate_inode_pages2(inode->i_mapping); -+ -+ return 0; -+} -+ -+int vboxsf_getattr(const struct path *path, struct kstat *kstat, -+ u32 request_mask, unsigned int flags) -+{ -+ int err; -+ struct dentry *dentry = path->dentry; -+ struct inode *inode = d_inode(dentry); -+ struct vboxsf_inode *sf_i = VBOXSF_I(inode); -+ -+ switch (flags & AT_STATX_SYNC_TYPE) { -+ case AT_STATX_DONT_SYNC: -+ err = 0; -+ break; -+ case AT_STATX_FORCE_SYNC: -+ sf_i->force_restat = 1; -+ /* fall-through */ -+ default: -+ err = vboxsf_inode_revalidate(dentry); -+ } -+ if (err) -+ return err; -+ -+ generic_fillattr(d_inode(dentry), kstat); -+ return 0; -+} -+ -+int vboxsf_setattr(struct dentry *dentry, struct iattr *iattr) -+{ -+ struct vboxsf_inode *sf_i = VBOXSF_I(d_inode(dentry)); -+ struct vboxsf_sbi *sbi = VBOXSF_SBI(dentry->d_sb); -+ struct shfl_createparms params = {}; -+ struct shfl_fsobjinfo info = {}; -+ u32 buf_len; -+ int err; -+ -+ params.handle = SHFL_HANDLE_NIL; -+ params.create_flags = SHFL_CF_ACT_OPEN_IF_EXISTS | -+ SHFL_CF_ACT_FAIL_IF_NEW | -+ SHFL_CF_ACCESS_ATTR_WRITE; -+ -+ /* this is at least required for Posix hosts */ -+ if (iattr->ia_valid & ATTR_SIZE) -+ params.create_flags |= SHFL_CF_ACCESS_WRITE; -+ -+ err = vboxsf_create_at_dentry(dentry, ¶ms); -+ if (err || params.result != SHFL_FILE_EXISTS) -+ return err ? err : -ENOENT; -+ -+#define mode_set(r) ((iattr->ia_mode & (S_##r)) ? SHFL_UNIX_##r : 0) -+ -+ /* -+ * Setting the file size and setting the other attributes has to -+ * be handled separately. -+ */ -+ if (iattr->ia_valid & (ATTR_MODE | ATTR_ATIME | ATTR_MTIME)) { -+ if (iattr->ia_valid & ATTR_MODE) { -+ info.attr.mode = mode_set(IRUSR); -+ info.attr.mode |= mode_set(IWUSR); -+ info.attr.mode |= mode_set(IXUSR); -+ info.attr.mode |= mode_set(IRGRP); -+ info.attr.mode |= mode_set(IWGRP); -+ info.attr.mode |= mode_set(IXGRP); -+ info.attr.mode |= mode_set(IROTH); -+ info.attr.mode |= mode_set(IWOTH); -+ info.attr.mode |= mode_set(IXOTH); -+ -+ if (iattr->ia_mode & S_IFDIR) -+ info.attr.mode |= SHFL_TYPE_DIRECTORY; -+ else -+ info.attr.mode |= SHFL_TYPE_FILE; -+ } -+ -+ if (iattr->ia_valid & ATTR_ATIME) -+ info.access_time.ns_relative_to_unix_epoch = -+ timespec64_to_ns(&iattr->ia_atime); -+ -+ if (iattr->ia_valid & ATTR_MTIME) -+ info.modification_time.ns_relative_to_unix_epoch = -+ timespec64_to_ns(&iattr->ia_mtime); -+ -+ /* -+ * Ignore ctime (inode change time) as it can't be set -+ * from userland anyway. -+ */ -+ -+ buf_len = sizeof(info); -+ err = vboxsf_fsinfo(sbi->root, params.handle, -+ SHFL_INFO_SET | SHFL_INFO_FILE, &buf_len, -+ &info); -+ if (err) { -+ vboxsf_close(sbi->root, params.handle); -+ return err; -+ } -+ -+ /* the host may have given us different attr then requested */ -+ sf_i->force_restat = 1; -+ } -+ -+#undef mode_set -+ -+ if (iattr->ia_valid & ATTR_SIZE) { -+ memset(&info, 0, sizeof(info)); -+ info.size = iattr->ia_size; -+ buf_len = sizeof(info); -+ err = vboxsf_fsinfo(sbi->root, params.handle, -+ SHFL_INFO_SET | SHFL_INFO_SIZE, &buf_len, -+ &info); -+ if (err) { -+ vboxsf_close(sbi->root, params.handle); -+ return err; -+ } -+ -+ /* the host may have given us different attr then requested */ -+ sf_i->force_restat = 1; -+ } -+ -+ vboxsf_close(sbi->root, params.handle); -+ -+ /* Update the inode with what the host has actually given us. */ -+ if (sf_i->force_restat) -+ vboxsf_inode_revalidate(dentry); -+ -+ return 0; -+} -+ -+/* -+ * [dentry] contains string encoded in coding system that corresponds -+ * to [sbi]->nls, we must convert it to UTF8 here. -+ * Returns a shfl_string allocated through __getname (must be freed using -+ * __putname), or an ERR_PTR on error. -+ */ -+struct shfl_string *vboxsf_path_from_dentry(struct vboxsf_sbi *sbi, -+ struct dentry *dentry) -+{ -+ struct shfl_string *shfl_path; -+ int path_len, out_len, nb; -+ char *buf, *path; -+ wchar_t uni; -+ u8 *out; -+ -+ buf = __getname(); -+ if (!buf) -+ return ERR_PTR(-ENOMEM); -+ -+ path = dentry_path_raw(dentry, buf, PATH_MAX); -+ if (IS_ERR(path)) { -+ __putname(buf); -+ return ERR_CAST(path); -+ } -+ path_len = strlen(path); -+ -+ if (sbi->nls) { -+ shfl_path = __getname(); -+ if (!shfl_path) { -+ __putname(buf); -+ return ERR_PTR(-ENOMEM); -+ } -+ -+ out = shfl_path->string.utf8; -+ out_len = PATH_MAX - SHFLSTRING_HEADER_SIZE - 1; -+ -+ while (path_len) { -+ nb = sbi->nls->char2uni(path, path_len, &uni); -+ if (nb < 0) { -+ __putname(shfl_path); -+ __putname(buf); -+ return ERR_PTR(-EINVAL); -+ } -+ path += nb; -+ path_len -= nb; -+ -+ nb = utf32_to_utf8(uni, out, out_len); -+ if (nb < 0) { -+ __putname(shfl_path); -+ __putname(buf); -+ return ERR_PTR(-ENAMETOOLONG); -+ } -+ out += nb; -+ out_len -= nb; -+ } -+ *out = 0; -+ shfl_path->length = out - shfl_path->string.utf8; -+ shfl_path->size = shfl_path->length + 1; -+ __putname(buf); -+ } else { -+ if ((SHFLSTRING_HEADER_SIZE + path_len + 1) > PATH_MAX) { -+ __putname(buf); -+ return ERR_PTR(-ENAMETOOLONG); -+ } -+ /* -+ * dentry_path stores the name at the end of buf, but the -+ * shfl_string string we return must be properly aligned. -+ */ -+ shfl_path = (struct shfl_string *)buf; -+ memmove(shfl_path->string.utf8, path, path_len); -+ shfl_path->string.utf8[path_len] = 0; -+ shfl_path->length = path_len; -+ shfl_path->size = path_len + 1; -+ } -+ -+ return shfl_path; -+} -+ -+int vboxsf_nlscpy(struct vboxsf_sbi *sbi, char *name, size_t name_bound_len, -+ const unsigned char *utf8_name, size_t utf8_len) -+{ -+ const char *in; -+ char *out; -+ size_t out_len; -+ size_t out_bound_len; -+ size_t in_bound_len; -+ -+ in = utf8_name; -+ in_bound_len = utf8_len; -+ -+ out = name; -+ out_len = 0; -+ /* Reserve space for terminating 0 */ -+ out_bound_len = name_bound_len - 1; -+ -+ while (in_bound_len) { -+ int nb; -+ unicode_t uni; -+ -+ nb = utf8_to_utf32(in, in_bound_len, &uni); -+ if (nb < 0) -+ return -EINVAL; -+ -+ in += nb; -+ in_bound_len -= nb; -+ -+ nb = sbi->nls->uni2char(uni, out, out_bound_len); -+ if (nb < 0) -+ return nb; -+ -+ out += nb; -+ out_bound_len -= nb; -+ out_len += nb; -+ } -+ -+ *out = 0; -+ -+ return 0; -+} -+ -+static struct vboxsf_dir_buf *vboxsf_dir_buf_alloc(struct list_head *list) -+{ -+ struct vboxsf_dir_buf *b; -+ -+ b = kmalloc(sizeof(*b), GFP_KERNEL); -+ if (!b) -+ return NULL; -+ -+ b->buf = kmalloc(DIR_BUFFER_SIZE, GFP_KERNEL); -+ if (!b->buf) { -+ kfree(b); -+ return NULL; -+ } -+ -+ b->entries = 0; -+ b->used = 0; -+ b->free = DIR_BUFFER_SIZE; -+ list_add(&b->head, list); -+ -+ return b; -+} -+ -+static void vboxsf_dir_buf_free(struct vboxsf_dir_buf *b) -+{ -+ list_del(&b->head); -+ kfree(b->buf); -+ kfree(b); -+} -+ -+struct vboxsf_dir_info *vboxsf_dir_info_alloc(void) -+{ -+ struct vboxsf_dir_info *p; -+ -+ p = kmalloc(sizeof(*p), GFP_KERNEL); -+ if (!p) -+ return NULL; -+ -+ INIT_LIST_HEAD(&p->info_list); -+ return p; -+} -+ -+void vboxsf_dir_info_free(struct vboxsf_dir_info *p) -+{ -+ struct list_head *list, *pos, *tmp; -+ -+ list = &p->info_list; -+ list_for_each_safe(pos, tmp, list) { -+ struct vboxsf_dir_buf *b; -+ -+ b = list_entry(pos, struct vboxsf_dir_buf, head); -+ vboxsf_dir_buf_free(b); -+ } -+ kfree(p); -+} -+ -+int vboxsf_dir_read_all(struct vboxsf_sbi *sbi, struct vboxsf_dir_info *sf_d, -+ u64 handle) -+{ -+ struct vboxsf_dir_buf *b; -+ u32 entries, size; -+ int err = 0; -+ void *buf; -+ -+ /* vboxsf_dirinfo returns 1 on end of dir */ -+ while (err == 0) { -+ b = vboxsf_dir_buf_alloc(&sf_d->info_list); -+ if (!b) { -+ err = -ENOMEM; -+ break; -+ } -+ -+ buf = b->buf; -+ size = b->free; -+ -+ err = vboxsf_dirinfo(sbi->root, handle, NULL, 0, 0, -+ &size, buf, &entries); -+ if (err < 0) -+ break; -+ -+ b->entries += entries; -+ b->free -= size; -+ b->used += size; -+ } -+ -+ if (b && b->used == 0) -+ vboxsf_dir_buf_free(b); -+ -+ /* -EILSEQ means the host could not translate a filename, ignore */ -+ if (err > 0 || err == -EILSEQ) -+ err = 0; -+ -+ return err; -+} -diff --git a/fs/vboxsf/vboxsf_wrappers.c b/fs/vboxsf/vboxsf_wrappers.c -new file mode 100644 -index 000000000000..bfc78a097dae ---- /dev/null -+++ b/fs/vboxsf/vboxsf_wrappers.c -@@ -0,0 +1,371 @@ -+// SPDX-License-Identifier: MIT -+/* -+ * Wrapper functions for the shfl host calls. -+ * -+ * Copyright (C) 2006-2018 Oracle Corporation -+ */ -+ -+#include -+#include -+#include -+#include -+#include "vfsmod.h" -+ -+#define SHFL_REQUEST \ -+ (VMMDEV_REQUESTOR_KERNEL | VMMDEV_REQUESTOR_USR_DRV_OTHER | \ -+ VMMDEV_REQUESTOR_CON_DONT_KNOW | VMMDEV_REQUESTOR_TRUST_NOT_GIVEN) -+ -+static u32 vboxsf_client_id; -+ -+int vboxsf_connect(void) -+{ -+ struct vbg_dev *gdev; -+ struct vmmdev_hgcm_service_location loc; -+ int err, vbox_status; -+ -+ loc.type = VMMDEV_HGCM_LOC_LOCALHOST_EXISTING; -+ strcpy(loc.u.localhost.service_name, "VBoxSharedFolders"); -+ -+ gdev = vbg_get_gdev(); -+ if (IS_ERR(gdev)) -+ return -ENODEV; /* No guest-device */ -+ -+ err = vbg_hgcm_connect(gdev, SHFL_REQUEST, &loc, -+ &vboxsf_client_id, &vbox_status); -+ vbg_put_gdev(gdev); -+ -+ return err ? err : vbg_status_code_to_errno(vbox_status); -+} -+ -+void vboxsf_disconnect(void) -+{ -+ struct vbg_dev *gdev; -+ int vbox_status; -+ -+ gdev = vbg_get_gdev(); -+ if (IS_ERR(gdev)) -+ return; /* guest-device is gone, already disconnected */ -+ -+ vbg_hgcm_disconnect(gdev, SHFL_REQUEST, vboxsf_client_id, &vbox_status); -+ vbg_put_gdev(gdev); -+} -+ -+static int vboxsf_call(u32 function, void *parms, u32 parm_count, int *status) -+{ -+ struct vbg_dev *gdev; -+ int err, vbox_status; -+ -+ gdev = vbg_get_gdev(); -+ if (IS_ERR(gdev)) -+ return -ESHUTDOWN; /* guest-dev removed underneath us */ -+ -+ err = vbg_hgcm_call(gdev, SHFL_REQUEST, vboxsf_client_id, function, -+ U32_MAX, parms, parm_count, &vbox_status); -+ vbg_put_gdev(gdev); -+ -+ if (err < 0) -+ return err; -+ -+ if (status) -+ *status = vbox_status; -+ -+ return vbg_status_code_to_errno(vbox_status); -+} -+ -+int vboxsf_map_folder(struct shfl_string *folder_name, u32 *root) -+{ -+ struct shfl_map_folder parms; -+ int err, status; -+ -+ parms.path.type = VMMDEV_HGCM_PARM_TYPE_LINADDR_KERNEL; -+ parms.path.u.pointer.size = shfl_string_buf_size(folder_name); -+ parms.path.u.pointer.u.linear_addr = (uintptr_t)folder_name; -+ -+ parms.root.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.root.u.value32 = 0; -+ -+ parms.delimiter.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.delimiter.u.value32 = '/'; -+ -+ parms.case_sensitive.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.case_sensitive.u.value32 = 1; -+ -+ err = vboxsf_call(SHFL_FN_MAP_FOLDER, &parms, SHFL_CPARMS_MAP_FOLDER, -+ &status); -+ if (err == -ENOSYS && status == VERR_NOT_IMPLEMENTED) -+ vbg_err("%s: Error host is too old\n", __func__); -+ -+ *root = parms.root.u.value32; -+ return err; -+} -+ -+int vboxsf_unmap_folder(u32 root) -+{ -+ struct shfl_unmap_folder parms; -+ -+ parms.root.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.root.u.value32 = root; -+ -+ return vboxsf_call(SHFL_FN_UNMAP_FOLDER, &parms, -+ SHFL_CPARMS_UNMAP_FOLDER, NULL); -+} -+ -+/** -+ * vboxsf_create - Create a new file or folder -+ * @root: Root of the shared folder in which to create the file -+ * @parsed_path: The path of the file or folder relative to the shared folder -+ * @param: create_parms Parameters for file/folder creation. -+ * -+ * Create a new file or folder or open an existing one in a shared folder. -+ * Note this function always returns 0 / success unless an exceptional condition -+ * occurs - out of memory, invalid arguments, etc. If the file or folder could -+ * not be opened or created, create_parms->handle will be set to -+ * SHFL_HANDLE_NIL on return. In this case the value in create_parms->result -+ * provides information as to why (e.g. SHFL_FILE_EXISTS), create_parms->result -+ * is also set on success as additional information. -+ * -+ * Returns: -+ * 0 or negative errno value. -+ */ -+int vboxsf_create(u32 root, struct shfl_string *parsed_path, -+ struct shfl_createparms *create_parms) -+{ -+ struct shfl_create parms; -+ -+ parms.root.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.root.u.value32 = root; -+ -+ parms.path.type = VMMDEV_HGCM_PARM_TYPE_LINADDR_KERNEL; -+ parms.path.u.pointer.size = shfl_string_buf_size(parsed_path); -+ parms.path.u.pointer.u.linear_addr = (uintptr_t)parsed_path; -+ -+ parms.parms.type = VMMDEV_HGCM_PARM_TYPE_LINADDR_KERNEL; -+ parms.parms.u.pointer.size = sizeof(struct shfl_createparms); -+ parms.parms.u.pointer.u.linear_addr = (uintptr_t)create_parms; -+ -+ return vboxsf_call(SHFL_FN_CREATE, &parms, SHFL_CPARMS_CREATE, NULL); -+} -+ -+int vboxsf_close(u32 root, u64 handle) -+{ -+ struct shfl_close parms; -+ -+ parms.root.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.root.u.value32 = root; -+ -+ parms.handle.type = VMMDEV_HGCM_PARM_TYPE_64BIT; -+ parms.handle.u.value64 = handle; -+ -+ return vboxsf_call(SHFL_FN_CLOSE, &parms, SHFL_CPARMS_CLOSE, NULL); -+} -+ -+int vboxsf_remove(u32 root, struct shfl_string *parsed_path, u32 flags) -+{ -+ struct shfl_remove parms; -+ -+ parms.root.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.root.u.value32 = root; -+ -+ parms.path.type = VMMDEV_HGCM_PARM_TYPE_LINADDR_KERNEL_IN; -+ parms.path.u.pointer.size = shfl_string_buf_size(parsed_path); -+ parms.path.u.pointer.u.linear_addr = (uintptr_t)parsed_path; -+ -+ parms.flags.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.flags.u.value32 = flags; -+ -+ return vboxsf_call(SHFL_FN_REMOVE, &parms, SHFL_CPARMS_REMOVE, NULL); -+} -+ -+int vboxsf_rename(u32 root, struct shfl_string *src_path, -+ struct shfl_string *dest_path, u32 flags) -+{ -+ struct shfl_rename parms; -+ -+ parms.root.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.root.u.value32 = root; -+ -+ parms.src.type = VMMDEV_HGCM_PARM_TYPE_LINADDR_KERNEL_IN; -+ parms.src.u.pointer.size = shfl_string_buf_size(src_path); -+ parms.src.u.pointer.u.linear_addr = (uintptr_t)src_path; -+ -+ parms.dest.type = VMMDEV_HGCM_PARM_TYPE_LINADDR_KERNEL_IN; -+ parms.dest.u.pointer.size = shfl_string_buf_size(dest_path); -+ parms.dest.u.pointer.u.linear_addr = (uintptr_t)dest_path; -+ -+ parms.flags.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.flags.u.value32 = flags; -+ -+ return vboxsf_call(SHFL_FN_RENAME, &parms, SHFL_CPARMS_RENAME, NULL); -+} -+ -+int vboxsf_read(u32 root, u64 handle, u64 offset, u32 *buf_len, u8 *buf) -+{ -+ struct shfl_read parms; -+ int err; -+ -+ parms.root.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.root.u.value32 = root; -+ -+ parms.handle.type = VMMDEV_HGCM_PARM_TYPE_64BIT; -+ parms.handle.u.value64 = handle; -+ parms.offset.type = VMMDEV_HGCM_PARM_TYPE_64BIT; -+ parms.offset.u.value64 = offset; -+ parms.cb.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.cb.u.value32 = *buf_len; -+ parms.buffer.type = VMMDEV_HGCM_PARM_TYPE_LINADDR_KERNEL_OUT; -+ parms.buffer.u.pointer.size = *buf_len; -+ parms.buffer.u.pointer.u.linear_addr = (uintptr_t)buf; -+ -+ err = vboxsf_call(SHFL_FN_READ, &parms, SHFL_CPARMS_READ, NULL); -+ -+ *buf_len = parms.cb.u.value32; -+ return err; -+} -+ -+int vboxsf_write(u32 root, u64 handle, u64 offset, u32 *buf_len, u8 *buf) -+{ -+ struct shfl_write parms; -+ int err; -+ -+ parms.root.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.root.u.value32 = root; -+ -+ parms.handle.type = VMMDEV_HGCM_PARM_TYPE_64BIT; -+ parms.handle.u.value64 = handle; -+ parms.offset.type = VMMDEV_HGCM_PARM_TYPE_64BIT; -+ parms.offset.u.value64 = offset; -+ parms.cb.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.cb.u.value32 = *buf_len; -+ parms.buffer.type = VMMDEV_HGCM_PARM_TYPE_LINADDR_KERNEL_IN; -+ parms.buffer.u.pointer.size = *buf_len; -+ parms.buffer.u.pointer.u.linear_addr = (uintptr_t)buf; -+ -+ err = vboxsf_call(SHFL_FN_WRITE, &parms, SHFL_CPARMS_WRITE, NULL); -+ -+ *buf_len = parms.cb.u.value32; -+ return err; -+} -+ -+/* Returns 0 on success, 1 on end-of-dir, negative errno otherwise */ -+int vboxsf_dirinfo(u32 root, u64 handle, -+ struct shfl_string *parsed_path, u32 flags, u32 index, -+ u32 *buf_len, struct shfl_dirinfo *buf, u32 *file_count) -+{ -+ struct shfl_list parms; -+ int err, status; -+ -+ parms.root.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.root.u.value32 = root; -+ -+ parms.handle.type = VMMDEV_HGCM_PARM_TYPE_64BIT; -+ parms.handle.u.value64 = handle; -+ parms.flags.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.flags.u.value32 = flags; -+ parms.cb.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.cb.u.value32 = *buf_len; -+ if (parsed_path) { -+ parms.path.type = VMMDEV_HGCM_PARM_TYPE_LINADDR_KERNEL_IN; -+ parms.path.u.pointer.size = shfl_string_buf_size(parsed_path); -+ parms.path.u.pointer.u.linear_addr = (uintptr_t)parsed_path; -+ } else { -+ parms.path.type = VMMDEV_HGCM_PARM_TYPE_LINADDR_IN; -+ parms.path.u.pointer.size = 0; -+ parms.path.u.pointer.u.linear_addr = 0; -+ } -+ -+ parms.buffer.type = VMMDEV_HGCM_PARM_TYPE_LINADDR_KERNEL_OUT; -+ parms.buffer.u.pointer.size = *buf_len; -+ parms.buffer.u.pointer.u.linear_addr = (uintptr_t)buf; -+ -+ parms.resume_point.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.resume_point.u.value32 = index; -+ parms.file_count.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.file_count.u.value32 = 0; /* out parameter only */ -+ -+ err = vboxsf_call(SHFL_FN_LIST, &parms, SHFL_CPARMS_LIST, &status); -+ if (err == -ENODATA && status == VERR_NO_MORE_FILES) -+ err = 1; -+ -+ *buf_len = parms.cb.u.value32; -+ *file_count = parms.file_count.u.value32; -+ return err; -+} -+ -+int vboxsf_fsinfo(u32 root, u64 handle, u32 flags, -+ u32 *buf_len, void *buf) -+{ -+ struct shfl_information parms; -+ int err; -+ -+ parms.root.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.root.u.value32 = root; -+ -+ parms.handle.type = VMMDEV_HGCM_PARM_TYPE_64BIT; -+ parms.handle.u.value64 = handle; -+ parms.flags.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.flags.u.value32 = flags; -+ parms.cb.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.cb.u.value32 = *buf_len; -+ parms.info.type = VMMDEV_HGCM_PARM_TYPE_LINADDR_KERNEL; -+ parms.info.u.pointer.size = *buf_len; -+ parms.info.u.pointer.u.linear_addr = (uintptr_t)buf; -+ -+ err = vboxsf_call(SHFL_FN_INFORMATION, &parms, SHFL_CPARMS_INFORMATION, -+ NULL); -+ -+ *buf_len = parms.cb.u.value32; -+ return err; -+} -+ -+int vboxsf_readlink(u32 root, struct shfl_string *parsed_path, -+ u32 buf_len, u8 *buf) -+{ -+ struct shfl_readLink parms; -+ -+ parms.root.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.root.u.value32 = root; -+ -+ parms.path.type = VMMDEV_HGCM_PARM_TYPE_LINADDR_KERNEL_IN; -+ parms.path.u.pointer.size = shfl_string_buf_size(parsed_path); -+ parms.path.u.pointer.u.linear_addr = (uintptr_t)parsed_path; -+ -+ parms.buffer.type = VMMDEV_HGCM_PARM_TYPE_LINADDR_KERNEL_OUT; -+ parms.buffer.u.pointer.size = buf_len; -+ parms.buffer.u.pointer.u.linear_addr = (uintptr_t)buf; -+ -+ return vboxsf_call(SHFL_FN_READLINK, &parms, SHFL_CPARMS_READLINK, -+ NULL); -+} -+ -+int vboxsf_symlink(u32 root, struct shfl_string *new_path, -+ struct shfl_string *old_path, struct shfl_fsobjinfo *buf) -+{ -+ struct shfl_symlink parms; -+ -+ parms.root.type = VMMDEV_HGCM_PARM_TYPE_32BIT; -+ parms.root.u.value32 = root; -+ -+ parms.new_path.type = VMMDEV_HGCM_PARM_TYPE_LINADDR_KERNEL_IN; -+ parms.new_path.u.pointer.size = shfl_string_buf_size(new_path); -+ parms.new_path.u.pointer.u.linear_addr = (uintptr_t)new_path; -+ -+ parms.old_path.type = VMMDEV_HGCM_PARM_TYPE_LINADDR_KERNEL_IN; -+ parms.old_path.u.pointer.size = shfl_string_buf_size(old_path); -+ parms.old_path.u.pointer.u.linear_addr = (uintptr_t)old_path; -+ -+ parms.info.type = VMMDEV_HGCM_PARM_TYPE_LINADDR_KERNEL_OUT; -+ parms.info.u.pointer.size = sizeof(struct shfl_fsobjinfo); -+ parms.info.u.pointer.u.linear_addr = (uintptr_t)buf; -+ -+ return vboxsf_call(SHFL_FN_SYMLINK, &parms, SHFL_CPARMS_SYMLINK, NULL); -+} -+ -+int vboxsf_set_utf8(void) -+{ -+ return vboxsf_call(SHFL_FN_SET_UTF8, NULL, 0, NULL); -+} -+ -+int vboxsf_set_symlinks(void) -+{ -+ return vboxsf_call(SHFL_FN_SET_SYMLINKS, NULL, 0, NULL); -+} -diff --git a/fs/vboxsf/vfsmod.h b/fs/vboxsf/vfsmod.h -new file mode 100644 -index 000000000000..18f95b00fc33 ---- /dev/null -+++ b/fs/vboxsf/vfsmod.h -@@ -0,0 +1,137 @@ -+/* SPDX-License-Identifier: MIT */ -+/* -+ * VirtualBox Guest Shared Folders support: module header. -+ * -+ * Copyright (C) 2006-2018 Oracle Corporation -+ */ -+ -+#ifndef VFSMOD_H -+#define VFSMOD_H -+ -+#include -+#include -+#include "shfl_hostintf.h" -+ -+#define DIR_BUFFER_SIZE SZ_16K -+ -+/* The cast is to prevent assignment of void * to pointers of arbitrary type */ -+#define VBOXSF_SBI(sb) ((struct vboxsf_sbi *)(sb)->s_fs_info) -+#define VBOXSF_I(i) container_of(i, struct vboxsf_inode, vfs_inode) -+ -+struct vboxsf_options { -+ unsigned long ttl; -+ kuid_t uid; -+ kgid_t gid; -+ bool dmode_set; -+ bool fmode_set; -+ umode_t dmode; -+ umode_t fmode; -+ umode_t dmask; -+ umode_t fmask; -+}; -+ -+struct vboxsf_fs_context { -+ struct vboxsf_options o; -+ char *nls_name; -+}; -+ -+/* per-shared folder information */ -+struct vboxsf_sbi { -+ struct vboxsf_options o; -+ struct shfl_fsobjinfo root_info; -+ struct idr ino_idr; -+ spinlock_t ino_idr_lock; /* This protects ino_idr */ -+ struct nls_table *nls; -+ u32 next_generation; -+ u32 root; -+ int bdi_id; -+}; -+ -+/* per-inode information */ -+struct vboxsf_inode { -+ /* some information was changed, update data on next revalidate */ -+ int force_restat; -+ /* list of open handles for this inode + lock protecting it */ -+ struct list_head handle_list; -+ /* This mutex protects handle_list accesses */ -+ struct mutex handle_list_mutex; -+ /* The VFS inode struct */ -+ struct inode vfs_inode; -+}; -+ -+struct vboxsf_dir_info { -+ struct list_head info_list; -+}; -+ -+struct vboxsf_dir_buf { -+ size_t entries; -+ size_t free; -+ size_t used; -+ void *buf; -+ struct list_head head; -+}; -+ -+/* globals */ -+extern const struct inode_operations vboxsf_dir_iops; -+extern const struct inode_operations vboxsf_lnk_iops; -+extern const struct inode_operations vboxsf_reg_iops; -+extern const struct file_operations vboxsf_dir_fops; -+extern const struct file_operations vboxsf_reg_fops; -+extern const struct address_space_operations vboxsf_reg_aops; -+extern const struct dentry_operations vboxsf_dentry_ops; -+ -+/* from utils.c */ -+struct inode *vboxsf_new_inode(struct super_block *sb); -+void vboxsf_init_inode(struct vboxsf_sbi *sbi, struct inode *inode, -+ const struct shfl_fsobjinfo *info); -+int vboxsf_create_at_dentry(struct dentry *dentry, -+ struct shfl_createparms *params); -+int vboxsf_stat(struct vboxsf_sbi *sbi, struct shfl_string *path, -+ struct shfl_fsobjinfo *info); -+int vboxsf_stat_dentry(struct dentry *dentry, struct shfl_fsobjinfo *info); -+int vboxsf_inode_revalidate(struct dentry *dentry); -+int vboxsf_getattr(const struct path *path, struct kstat *kstat, -+ u32 request_mask, unsigned int query_flags); -+int vboxsf_setattr(struct dentry *dentry, struct iattr *iattr); -+struct shfl_string *vboxsf_path_from_dentry(struct vboxsf_sbi *sbi, -+ struct dentry *dentry); -+int vboxsf_nlscpy(struct vboxsf_sbi *sbi, char *name, size_t name_bound_len, -+ const unsigned char *utf8_name, size_t utf8_len); -+struct vboxsf_dir_info *vboxsf_dir_info_alloc(void); -+void vboxsf_dir_info_free(struct vboxsf_dir_info *p); -+int vboxsf_dir_read_all(struct vboxsf_sbi *sbi, struct vboxsf_dir_info *sf_d, -+ u64 handle); -+ -+/* from vboxsf_wrappers.c */ -+int vboxsf_connect(void); -+void vboxsf_disconnect(void); -+ -+int vboxsf_create(u32 root, struct shfl_string *parsed_path, -+ struct shfl_createparms *create_parms); -+ -+int vboxsf_close(u32 root, u64 handle); -+int vboxsf_remove(u32 root, struct shfl_string *parsed_path, u32 flags); -+int vboxsf_rename(u32 root, struct shfl_string *src_path, -+ struct shfl_string *dest_path, u32 flags); -+ -+int vboxsf_read(u32 root, u64 handle, u64 offset, u32 *buf_len, u8 *buf); -+int vboxsf_write(u32 root, u64 handle, u64 offset, u32 *buf_len, u8 *buf); -+ -+int vboxsf_dirinfo(u32 root, u64 handle, -+ struct shfl_string *parsed_path, u32 flags, u32 index, -+ u32 *buf_len, struct shfl_dirinfo *buf, u32 *file_count); -+int vboxsf_fsinfo(u32 root, u64 handle, u32 flags, -+ u32 *buf_len, void *buf); -+ -+int vboxsf_map_folder(struct shfl_string *folder_name, u32 *root); -+int vboxsf_unmap_folder(u32 root); -+ -+int vboxsf_readlink(u32 root, struct shfl_string *parsed_path, -+ u32 buf_len, u8 *buf); -+int vboxsf_symlink(u32 root, struct shfl_string *new_path, -+ struct shfl_string *old_path, struct shfl_fsobjinfo *buf); -+ -+int vboxsf_set_utf8(void); -+int vboxsf_set_symlinks(void); -+ -+#endif --- -2.25.0 - diff --git a/0002-drm-nouveau-gr-gp107-gp108-implement-workaround-for-.patch b/0002-drm-nouveau-gr-gp107-gp108-implement-workaround-for-.patch new file mode 100644 index 000000000..554800010 --- /dev/null +++ b/0002-drm-nouveau-gr-gp107-gp108-implement-workaround-for-.patch @@ -0,0 +1,68 @@ +From 37b556606d1217b4367e622d88cef11c65764386 Mon Sep 17 00:00:00 2001 +From: Ben Skeggs +Date: Tue, 31 Mar 2020 16:08:44 +1000 +Subject: [PATCH 2/2] drm/nouveau/gr/gp107,gp108: implement workaround for HW + hanging during init + +Certain boards with GP107/GP108 chipsets hang (often, but randomly) for +unknown reasons during GR initialisation. + +The first tell-tale symptom of this issue is: + +nouveau 0000:01:00.0: bus: MMIO read of 00000000 FAULT at 409800 [ TIMEOUT ] + +appearing in dmesg, likely followed by many other failures being logged. + +Karol found this WAR for the issue a while back, but efforts to isolate +the root cause and proper fix have not yielded success so far. I've +modified the original patch to include a few more details, limit it to +GP107/GP108 by default, and added a config option to override this choice. + +Signed-off-by: Ben Skeggs +Reviewed-by: Karol Herbst +--- + .../gpu/drm/nouveau/nvkm/engine/gr/gf100.c | 26 +++++++++++++++++++ + 1 file changed, 26 insertions(+) + +diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c +index dd8f85b8b3a7..f2f5636efac4 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c ++++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c +@@ -1981,8 +1981,34 @@ gf100_gr_init_(struct nvkm_gr *base) + { + struct gf100_gr *gr = gf100_gr(base); + struct nvkm_subdev *subdev = &base->engine.subdev; ++ struct nvkm_device *device = subdev->device; ++ bool reset = device->chipset == 0x137 || device->chipset == 0x138; + u32 ret; + ++ /* On certain GP107/GP108 boards, we trigger a weird issue where ++ * GR will stop responding to PRI accesses after we've asked the ++ * SEC2 RTOS to boot the GR falcons. This happens with far more ++ * frequency when cold-booting a board (ie. returning from D3). ++ * ++ * The root cause for this is not known and has proven difficult ++ * to isolate, with many avenues being dead-ends. ++ * ++ * A workaround was discovered by Karol, whereby putting GR into ++ * reset for an extended period right before initialisation ++ * prevents the problem from occuring. ++ * ++ * XXX: As RM does not require any such workaround, this is more ++ * of a hack than a true fix. ++ */ ++ reset = nvkm_boolopt(device->cfgopt, "NvGrResetWar", reset); ++ if (reset) { ++ nvkm_mask(device, 0x000200, 0x00001000, 0x00000000); ++ nvkm_rd32(device, 0x000200); ++ msleep(50); ++ nvkm_mask(device, 0x000200, 0x00001000, 0x00001000); ++ nvkm_rd32(device, 0x000200); ++ } ++ + nvkm_pmu_pgob(gr->base.engine.subdev.device->pmu, false); + + ret = nvkm_falcon_get(&gr->fecs.falcon, subdev); +-- +2.25.1 + diff --git a/20200310_chris_chris_wilson_co_uk.patch b/20200310_chris_chris_wilson_co_uk.patch deleted file mode 100644 index 9b2dad2ed..000000000 --- a/20200310_chris_chris_wilson_co_uk.patch +++ /dev/null @@ -1,559 +0,0 @@ -From MAILER-DAEMON Thu Mar 12 13:30:18 2020 -From: Chris Wilson -To: stable@vger.kernel.org -Cc: Chris Wilson , Tvrtko Ursulin , Jani Nikula -Subject: [PATCH 1/5] drm/i915: Check activity on i915_vma after confirming pin_count==0 -Date: Tue, 10 Mar 2020 20:40:42 +0000 -Message-Id: <20200310204046.3995087-1-chris@chris-wilson.co.uk> -Sender: stable-owner@vger.kernel.org -List-ID: -X-Mailing-List: stable@vger.kernel.org -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -Only assert that the i915_vma is now idle if and only if no other pins -are present. If another user has the i915_vma pinned, they may submit -more work to the i915_vma skipping the vm->mutex used to serialise the -unbind. We need to wait again, if we want to continue and unbind this -vma. - -However, if we own the i915_vma (we hold the vm->mutex for the unbind -and the pin_count is 0), we can assert that the vma remains idle as we -unbind. - -Fixes: 2850748ef876 ("drm/i915: Pull i915_vma_pin under the vm->mutex") -Closes: https://gitlab.freedesktop.org/drm/intel/issues/530 -Signed-off-by: Chris Wilson -Cc: Tvrtko Ursulin -Reviewed-by: Tvrtko Ursulin -Link: https://patchwork.freedesktop.org/patch/msgid/20200123224459.38128-1-chris@chris-wilson.co.uk -(cherry picked from commit 60e94557fff1f5514c7fc4da7ddc2c7a13ffff26) -Signed-off-by: Jani Nikula -(cherry picked from commit e4edd4fcbf4daf9d4319bef0bfaf350cb672239a) ---- - drivers/gpu/drm/i915/i915_vma.c | 14 ++++++++++++-- - 1 file changed, 12 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c -index 01c822256b39..7c7e152cc5ff 100644 ---- a/drivers/gpu/drm/i915/i915_vma.c -+++ b/drivers/gpu/drm/i915/i915_vma.c -@@ -1149,16 +1149,26 @@ int __i915_vma_unbind(struct i915_vma *vma) - if (ret) - return ret; - -- GEM_BUG_ON(i915_vma_is_active(vma)); - if (i915_vma_is_pinned(vma)) { - vma_print_allocator(vma, "is pinned"); - return -EBUSY; - } - -- GEM_BUG_ON(i915_vma_is_active(vma)); -+ /* -+ * After confirming that no one else is pinning this vma, wait for -+ * any laggards who may have crept in during the wait (through -+ * a residual pin skipping the vm->mutex) to complete. -+ */ -+ ret = i915_vma_sync(vma); -+ if (ret) -+ return ret; -+ - if (!drm_mm_node_allocated(&vma->node)) - return 0; - -+ GEM_BUG_ON(i915_vma_is_pinned(vma)); -+ GEM_BUG_ON(i915_vma_is_active(vma)); -+ - if (i915_vma_is_map_and_fenceable(vma)) { - /* - * Check that we have flushed all writes through the GGTT --- -2.25.1 - - -From MAILER-DAEMON Thu Mar 12 13:30:18 2020 -From: Chris Wilson -To: stable@vger.kernel.org -Cc: Chris Wilson , Matthew Auld -Subject: [PATCH 2/5] drm/i915/gem: Avoid parking the vma as we unbind -Date: Tue, 10 Mar 2020 20:40:43 +0000 -Message-Id: <20200310204046.3995087-2-chris@chris-wilson.co.uk> -In-Reply-To: <20200310204046.3995087-1-chris@chris-wilson.co.uk> -References: <20200310204046.3995087-1-chris@chris-wilson.co.uk> -Sender: stable-owner@vger.kernel.org -List-ID: -X-Mailing-List: stable@vger.kernel.org -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -In order to avoid keeping a reference on the i915_vma (which is long -overdue!) we have to coordinate all the possible lifetimes and only use -the vma while we know it is alive. In this episode, we are reminded that -while idle, the closed vma are destroyed. So if the GT idles while we are -working with the vma, the vma itself becomes invalid. - -First class i915_vma here we come, but in the meantime keep piling on -the straw. - -Signed-off-by: Chris Wilson -Reviewed-by: Matthew Auld -Link: https://patchwork.freedesktop.org/patch/msgid/20191203155032.3137263-1-chris@chris-wilson.co.uk -(cherry picked from commit cb6c3d45f948f8f184687a23fea30017d01e892f) ---- - drivers/gpu/drm/i915/i915_gem.c | 17 ++++++++++++++++- - 1 file changed, 16 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c -index 3f07948ea4da..f7c52b437f6a 100644 ---- a/drivers/gpu/drm/i915/i915_gem.c -+++ b/drivers/gpu/drm/i915/i915_gem.c -@@ -128,18 +128,33 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj, - struct i915_vma, - obj_link))) { - struct i915_address_space *vm = vma->vm; -+ bool awake = false; - -- ret = -EBUSY; -+ ret = -EAGAIN; - if (!i915_vm_tryopen(vm)) - break; - -+ /* Prevent vma being freed by i915_vma_parked as we unbind */ -+ if (intel_gt_pm_get_if_awake(vm->gt)) { -+ awake = true; -+ } else { -+ if (i915_vma_is_closed(vma)) { -+ spin_unlock(&obj->vma.lock); -+ goto err_vm; -+ } -+ } -+ - list_move_tail(&vma->obj_link, &still_in_list); - spin_unlock(&obj->vma.lock); - -+ ret = -EBUSY; - if (flags & I915_GEM_OBJECT_UNBIND_ACTIVE || - !i915_vma_is_active(vma)) - ret = i915_vma_unbind(vma); - -+ if (awake) -+ intel_gt_pm_put(vm->gt); -+err_vm: - i915_vm_close(vm); - spin_lock(&obj->vma.lock); - } --- -2.25.1 - - -From MAILER-DAEMON Thu Mar 12 13:30:18 2020 -From: Chris Wilson -To: stable@vger.kernel.org -Cc: Chris Wilson , Imre Deak -Subject: [PATCH 3/5] drm/i915: Add a simple is-bound check before unbinding -Date: Tue, 10 Mar 2020 20:40:44 +0000 -Message-Id: <20200310204046.3995087-3-chris@chris-wilson.co.uk> -In-Reply-To: <20200310204046.3995087-1-chris@chris-wilson.co.uk> -References: <20200310204046.3995087-1-chris@chris-wilson.co.uk> -Sender: stable-owner@vger.kernel.org -List-ID: -X-Mailing-List: stable@vger.kernel.org -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -Only acquire the various atomic references required to unbind the vma if -we do need to unbind the vma. - -Signed-off-by: Chris Wilson -Acked-by: Imre Deak -Link: https://patchwork.freedesktop.org/patch/msgid/20191222210256.2066451-1-chris@chris-wilson.co.uk -(cherry picked from commit f5af1659d809e264d619e5f483fd8f47bced3b6a) ---- - drivers/gpu/drm/i915/i915_gem.c | 5 ++++- - 1 file changed, 4 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c -index f7c52b437f6a..998b67e3466e 100644 ---- a/drivers/gpu/drm/i915/i915_gem.c -+++ b/drivers/gpu/drm/i915/i915_gem.c -@@ -130,6 +130,10 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj, - struct i915_address_space *vm = vma->vm; - bool awake = false; - -+ list_move_tail(&vma->obj_link, &still_in_list); -+ if (!i915_vma_is_bound(vma, I915_VMA_BIND_MASK)) -+ continue; -+ - ret = -EAGAIN; - if (!i915_vm_tryopen(vm)) - break; -@@ -144,7 +148,6 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj, - } - } - -- list_move_tail(&vma->obj_link, &still_in_list); - spin_unlock(&obj->vma.lock); - - ret = -EBUSY; --- -2.25.1 - - -From MAILER-DAEMON Thu Mar 12 13:30:18 2020 -From: Chris Wilson -To: stable@vger.kernel.org -Cc: Chris Wilson , Imre Deak -Subject: [PATCH 4/5] drm/i915: Introduce a vma.kref -Date: Tue, 10 Mar 2020 20:40:45 +0000 -Message-Id: <20200310204046.3995087-4-chris@chris-wilson.co.uk> -In-Reply-To: <20200310204046.3995087-1-chris@chris-wilson.co.uk> -References: <20200310204046.3995087-1-chris@chris-wilson.co.uk> -Sender: stable-owner@vger.kernel.org -List-ID: -X-Mailing-List: stable@vger.kernel.org -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -Start introducing a kref on i915_vma in order to protect the vma unbind -(i915_gem_object_unbind) from a parallel destruction (i915_vma_parked). -Later, we will use the refcount to manage all access and turn i915_vma -into a first class container. - -Signed-off-by: Chris Wilson -Cc: Imre Deak -Acked-by: Imre Deak -Link: https://patchwork.freedesktop.org/patch/msgid/20191222210256.2066451-2-chris@chris-wilson.co.uk -(cherry picked from commit 76f9764cc3d538435262dea885bf69fac2415402) ---- - drivers/gpu/drm/i915/gem/i915_gem_object.c | 2 +- - .../gpu/drm/i915/gem/selftests/huge_pages.c | 3 +-- - .../drm/i915/gem/selftests/i915_gem_mman.c | 4 +-- - drivers/gpu/drm/i915/i915_gem.c | 26 +++++++------------ - drivers/gpu/drm/i915/i915_gem_gtt.c | 5 ++-- - drivers/gpu/drm/i915/i915_vma.c | 9 ++++--- - drivers/gpu/drm/i915/i915_vma.h | 25 +++++++++++++++--- - 7 files changed, 44 insertions(+), 30 deletions(-) - -diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c -index a596548c07bf..b6937469ffd3 100644 ---- a/drivers/gpu/drm/i915/gem/i915_gem_object.c -+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c -@@ -174,7 +174,7 @@ static void __i915_gem_free_objects(struct drm_i915_private *i915, - GEM_BUG_ON(vma->obj != obj); - spin_unlock(&obj->vma.lock); - -- i915_vma_destroy(vma); -+ __i915_vma_put(vma); - - spin_lock(&obj->vma.lock); - } -diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c -index 688c49a24f32..bd1e2c12de63 100644 ---- a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c -+++ b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c -@@ -1110,8 +1110,7 @@ static int __igt_write_huge(struct intel_context *ce, - out_vma_unpin: - i915_vma_unpin(vma); - out_vma_close: -- i915_vma_destroy(vma); -- -+ __i915_vma_put(vma); - return err; - } - -diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c -index 29b2077b73d2..d226e55df8b2 100644 ---- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c -+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c -@@ -161,7 +161,7 @@ static int check_partial_mapping(struct drm_i915_gem_object *obj, - kunmap(p); - - out: -- i915_vma_destroy(vma); -+ __i915_vma_put(vma); - return err; - } - -@@ -255,7 +255,7 @@ static int check_partial_mappings(struct drm_i915_gem_object *obj, - if (err) - return err; - -- i915_vma_destroy(vma); -+ __i915_vma_put(vma); - - if (igt_timeout(end_time, - "%s: timed out after tiling=%d stride=%d\n", -diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c -index 998b67e3466e..67a8e7408e67 100644 ---- a/drivers/gpu/drm/i915/i915_gem.c -+++ b/drivers/gpu/drm/i915/i915_gem.c -@@ -128,7 +128,6 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj, - struct i915_vma, - obj_link))) { - struct i915_address_space *vm = vma->vm; -- bool awake = false; - - list_move_tail(&vma->obj_link, &still_in_list); - if (!i915_vma_is_bound(vma, I915_VMA_BIND_MASK)) -@@ -139,25 +138,18 @@ int i915_gem_object_unbind(struct drm_i915_gem_object *obj, - break; - - /* Prevent vma being freed by i915_vma_parked as we unbind */ -- if (intel_gt_pm_get_if_awake(vm->gt)) { -- awake = true; -- } else { -- if (i915_vma_is_closed(vma)) { -- spin_unlock(&obj->vma.lock); -- goto err_vm; -- } -- } -- -+ vma = __i915_vma_get(vma); - spin_unlock(&obj->vma.lock); - -- ret = -EBUSY; -- if (flags & I915_GEM_OBJECT_UNBIND_ACTIVE || -- !i915_vma_is_active(vma)) -- ret = i915_vma_unbind(vma); -+ if (vma) { -+ ret = -EBUSY; -+ if (flags & I915_GEM_OBJECT_UNBIND_ACTIVE || -+ !i915_vma_is_active(vma)) -+ ret = i915_vma_unbind(vma); -+ -+ __i915_vma_put(vma); -+ } - -- if (awake) -- intel_gt_pm_put(vm->gt); --err_vm: - i915_vm_close(vm); - spin_lock(&obj->vma.lock); - } -diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c -index 44727806dfd7..dd2c20f7d4d2 100644 ---- a/drivers/gpu/drm/i915/i915_gem_gtt.c -+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c -@@ -522,7 +522,7 @@ void __i915_vm_close(struct i915_address_space *vm) - - atomic_and(~I915_VMA_PIN_MASK, &vma->flags); - WARN_ON(__i915_vma_unbind(vma)); -- i915_vma_destroy(vma); -+ __i915_vma_put(vma); - - i915_gem_object_put(obj); - } -@@ -1790,7 +1790,7 @@ static void gen6_ppgtt_cleanup(struct i915_address_space *vm) - { - struct gen6_ppgtt *ppgtt = to_gen6_ppgtt(i915_vm_to_ppgtt(vm)); - -- i915_vma_destroy(ppgtt->vma); -+ __i915_vma_put(ppgtt->vma); - - gen6_ppgtt_free_pd(ppgtt); - free_scratch(vm); -@@ -1878,6 +1878,7 @@ static struct i915_vma *pd_vma_create(struct gen6_ppgtt *ppgtt, int size) - - i915_active_init(&vma->active, NULL, NULL); - -+ kref_init(&vma->ref); - mutex_init(&vma->pages_mutex); - vma->vm = i915_vm_get(&ggtt->vm); - vma->ops = &pd_vma_ops; -diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c -index 7c7e152cc5ff..5309872442bc 100644 ---- a/drivers/gpu/drm/i915/i915_vma.c -+++ b/drivers/gpu/drm/i915/i915_vma.c -@@ -112,6 +112,7 @@ vma_create(struct drm_i915_gem_object *obj, - if (vma == NULL) - return ERR_PTR(-ENOMEM); - -+ kref_init(&vma->ref); - mutex_init(&vma->pages_mutex); - vma->vm = i915_vm_get(vm); - vma->ops = &vm->vma_ops; -@@ -978,8 +979,10 @@ void i915_vma_reopen(struct i915_vma *vma) - __i915_vma_remove_closed(vma); - } - --void i915_vma_destroy(struct i915_vma *vma) -+void i915_vma_release(struct kref *ref) - { -+ struct i915_vma *vma = container_of(ref, typeof(*vma), ref); -+ - if (drm_mm_node_allocated(&vma->node)) { - mutex_lock(&vma->vm->mutex); - atomic_and(~I915_VMA_PIN_MASK, &vma->flags); -@@ -1027,7 +1030,7 @@ void i915_vma_parked(struct intel_gt *gt) - spin_unlock_irq(>->closed_lock); - - if (obj) { -- i915_vma_destroy(vma); -+ __i915_vma_put(vma); - i915_gem_object_put(obj); - } - -@@ -1202,7 +1205,7 @@ int __i915_vma_unbind(struct i915_vma *vma) - i915_vma_detach(vma); - vma_unbind_pages(vma); - -- drm_mm_remove_node(&vma->node); /* pairs with i915_vma_destroy() */ -+ drm_mm_remove_node(&vma->node); /* pairs with i915_vma_release() */ - return 0; - } - -diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h -index 465932813bc5..ce1db908ad69 100644 ---- a/drivers/gpu/drm/i915/i915_vma.h -+++ b/drivers/gpu/drm/i915/i915_vma.h -@@ -51,14 +51,19 @@ enum i915_cache_level; - */ - struct i915_vma { - struct drm_mm_node node; -- struct drm_i915_gem_object *obj; -+ - struct i915_address_space *vm; - const struct i915_vma_ops *ops; -- struct i915_fence_reg *fence; -+ -+ struct drm_i915_gem_object *obj; - struct dma_resv *resv; /** Alias of obj->resv */ -+ - struct sg_table *pages; - void __iomem *iomap; - void *private; /* owned by creator */ -+ -+ struct i915_fence_reg *fence; -+ - u64 size; - u64 display_alignment; - struct i915_page_sizes page_sizes; -@@ -71,6 +76,7 @@ struct i915_vma { - * handles (but same file) for execbuf, i.e. the number of aliases - * that exist in the ctx->handle_vmas LUT for this vma. - */ -+ struct kref ref; - atomic_t open_count; - atomic_t flags; - /** -@@ -333,7 +339,20 @@ int __must_check i915_vma_unbind(struct i915_vma *vma); - void i915_vma_unlink_ctx(struct i915_vma *vma); - void i915_vma_close(struct i915_vma *vma); - void i915_vma_reopen(struct i915_vma *vma); --void i915_vma_destroy(struct i915_vma *vma); -+ -+static inline struct i915_vma *__i915_vma_get(struct i915_vma *vma) -+{ -+ if (kref_get_unless_zero(&vma->ref)) -+ return vma; -+ -+ return NULL; -+} -+ -+void i915_vma_release(struct kref *ref); -+static inline void __i915_vma_put(struct i915_vma *vma) -+{ -+ kref_put(&vma->ref, i915_vma_release); -+} - - #define assert_vma_held(vma) dma_resv_assert_held((vma)->resv) - --- -2.25.1 - - -From MAILER-DAEMON Thu Mar 12 13:30:18 2020 -From: Chris Wilson -To: stable@vger.kernel.org -Cc: Chris Wilson , Kenneth Graunke , Tvrtko Ursulin , Matthew Auld -Subject: [PATCH 5/5] drm/i915: Serialise i915_active_acquire() with __active_retire() -Date: Tue, 10 Mar 2020 20:40:46 +0000 -Message-Id: <20200310204046.3995087-5-chris@chris-wilson.co.uk> -In-Reply-To: <20200310204046.3995087-1-chris@chris-wilson.co.uk> -References: <20200310204046.3995087-1-chris@chris-wilson.co.uk> -Sender: stable-owner@vger.kernel.org -List-ID: -X-Mailing-List: stable@vger.kernel.org -MIME-Version: 1.0 -Content-Type: text/plain; charset="utf-8" -Content-Transfer-Encoding: 7bit - -As __active_retire() does it's final atomic_dec() under the -ref->tree_lock spinlock, in order to prevent ourselves from reusing the -ref->cache and ref->tree as they are being destroyed, we need to -serialise with the retirement during i915_active_acquire(). - -[ +0.000005] kernel BUG at drivers/gpu/drm/i915/i915_active.c:157! -[ +0.000011] invalid opcode: 0000 [#1] SMP -[ +0.000004] CPU: 7 PID: 188 Comm: kworker/u16:4 Not tainted 5.4.0-rc8-03070-gac5e57322614 #89 -[ +0.000002] Hardware name: Razer Razer Blade Stealth 13 Late 2019/LY320, BIOS 1.02 09/10/2019 -[ +0.000082] Workqueue: events_unbound active_work [i915] -[ +0.000059] RIP: 0010:__active_retire+0x115/0x120 [i915] -[ +0.000003] Code: 75 28 48 8b 3d 8c 6e 1a 00 48 89 ee e8 e4 5f a5 c0 48 8b 44 24 10 65 48 33 04 25 28 00 00 00 75 0f 48 83 c4 18 5b 5d 41 5c c3 <0f> 0b 0f 0b 0f 0b e8 a0 90 87 c0 0f 1f 44 00 00 48 8b 3d 54 6e 1a -[ +0.000002] RSP: 0018:ffffb833003f7e48 EFLAGS: 00010286 -[ +0.000003] RAX: ffff8d6e8d726d00 RBX: ffff8d6f9db4e840 RCX: 0000000000000000 -[ +0.000001] RDX: ffffffff82605930 RSI: ffff8d6f9adc4908 RDI: ffff8d6e96cefe28 -[ +0.000002] RBP: ffff8d6e96cefe00 R08: 0000000000000000 R09: ffff8d6f9ffe9a50 -[ +0.000002] R10: 0000000000000048 R11: 0000000000000018 R12: ffff8d6f9adc4930 -[ +0.000001] R13: ffff8d6f9e04fb00 R14: 0000000000000000 R15: ffff8d6f9adc4988 -[ +0.000002] FS: 0000000000000000(0000) GS:ffff8d6f9ffc0000(0000) knlGS:0000000000000000 -[ +0.000002] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 -[ +0.000002] CR2: 000055eb5a34cf10 CR3: 000000018d609002 CR4: 0000000000760ee0 -[ +0.000002] PKRU: 55555554 -[ +0.000001] Call Trace: -[ +0.000010] process_one_work+0x1aa/0x350 -[ +0.000004] worker_thread+0x4d/0x3a0 -[ +0.000004] kthread+0xfb/0x130 -[ +0.000004] ? process_one_work+0x350/0x350 -[ +0.000003] ? kthread_park+0x90/0x90 -[ +0.000005] ret_from_fork+0x1f/0x40 - -Reported-by: Kenneth Graunke -Fixes: c9ad602feabe ("drm/i915: Split i915_active.mutex into an irq-safe spinlock for the rbtree") -Signed-off-by: Chris Wilson -Cc: Tvrtko Ursulin -Cc: Kenneth Graunke -Cc: Matthew Auld -Tested-by: Kenneth Graunke -Reviewed-by: Kenneth Graunke -Link: https://patchwork.freedesktop.org/patch/msgid/20191205183332.801237-1-chris@chris-wilson.co.uk -(cherry picked from commit bbca083de291a03ffe1a1eb0832a0d74f8b64898) ---- - drivers/gpu/drm/i915/i915_active.c | 5 +++-- - 1 file changed, 3 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/i915/i915_active.c b/drivers/gpu/drm/i915/i915_active.c -index a19e7d89bc8a..378b52d1ab74 100644 ---- a/drivers/gpu/drm/i915/i915_active.c -+++ b/drivers/gpu/drm/i915/i915_active.c -@@ -91,10 +91,9 @@ static void debug_active_init(struct i915_active *ref) - - static void debug_active_activate(struct i915_active *ref) - { -- spin_lock_irq(&ref->tree_lock); -+ lockdep_assert_held(&ref->tree_lock); - if (!atomic_read(&ref->count)) /* before the first inc */ - debug_object_activate(ref, &active_debug_desc); -- spin_unlock_irq(&ref->tree_lock); - } - - static void debug_active_deactivate(struct i915_active *ref) -@@ -407,8 +406,10 @@ int i915_active_acquire(struct i915_active *ref) - if (!atomic_read(&ref->count) && ref->active) - err = ref->active(ref); - if (!err) { -+ spin_lock_irq(&ref->tree_lock); /* vs __active_retire() */ - debug_active_activate(ref); - atomic_inc(&ref->count); -+ spin_unlock_irq(&ref->tree_lock); - } - - mutex_unlock(&ref->mutex); --- -2.25.1 - - diff --git a/ARM-Enable-thermal-support-for-Raspberry-Pi-4.patch b/ARM-Enable-thermal-support-for-Raspberry-Pi-4.patch deleted file mode 100644 index 86824875b..000000000 --- a/ARM-Enable-thermal-support-for-Raspberry-Pi-4.patch +++ /dev/null @@ -1,905 +0,0 @@ -From patchwork Tue Jan 7 18:15:54 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Stefan Wahren -X-Patchwork-Id: 11321573 -Return-Path: - -Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org - [172.30.200.123]) - by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6D8381398 - for ; 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This block is part -of the AVS monitor which contains a bunch of raw sensors. - -Signed-off-by: Stefan Wahren -Reviewed-by: Rob Herring -Reviewed-by: Nicolas Saenz Julienne ---- - .../bindings/thermal/brcm,avs-ro-thermal.yaml | 45 ++++++++++++++++++++++ - 1 file changed, 45 insertions(+) - create mode 100644 Documentation/devicetree/bindings/thermal/brcm,avs-ro-thermal.yaml - --- -2.7.4 - -diff --git a/Documentation/devicetree/bindings/thermal/brcm,avs-ro-thermal.yaml b/Documentation/devicetree/bindings/thermal/brcm,avs-ro-thermal.yaml -new file mode 100644 -index 0000000..98e7b57 ---- /dev/null -+++ b/Documentation/devicetree/bindings/thermal/brcm,avs-ro-thermal.yaml -@@ -0,0 +1,45 @@ -+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/thermal/brcm,avs-ro-thermal.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Broadcom AVS ring oscillator thermal -+ -+maintainers: -+ - Stefan Wahren -+ -+description: |+ -+ The thermal node should be the child of a syscon node with the -+ required property: -+ -+ - compatible: Should be one of the following: -+ "brcm,bcm2711-avs-monitor", "syscon", "simple-mfd" -+ -+ Refer to the the bindings described in -+ Documentation/devicetree/bindings/mfd/syscon.txt -+ -+properties: -+ compatible: -+ const: brcm,bcm2711-thermal -+ -+ reg: -+ maxItems: 1 -+ -+required: -+ - compatible -+ - reg -+ -+examples: -+ - | -+ avs-monitor@7d5d2000 { -+ compatible = "brcm,bcm2711-avs-monitor", -+ "syscon", "simple-mfd"; -+ reg = <0x7d5d2000 0xf00>; -+ -+ thermal: thermal { -+ compatible = "brcm,bcm2711-thermal"; -+ #thermal-sensor-cells = <0>; -+ }; -+ }; -+... - -From patchwork Tue Jan 7 18:15:55 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Stefan Wahren -X-Patchwork-Id: 11321579 -Return-Path: - -Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org - [172.30.200.123]) - by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4EEC4138D - for ; - Tue, 7 Jan 2020 18:17:14 +0000 (UTC) -Received: from bombadil.infradead.org (bombadil.infradead.org - [198.137.202.133]) - (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) - (No client certificate requested) - by mail.kernel.org (Postfix) with ESMTPS id 1A18F20848 - for ; - Tue, 7 Jan 2020 18:17:14 +0000 (UTC) -Authentication-Results: mail.kernel.org; - dkim=pass (2048-bit key) header.d=lists.infradead.org - header.i=@lists.infradead.org header.b="WN1BmRCI"; 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Tue, 07 Jan 2020 19:16:05 +0100 -From: Stefan Wahren -To: Zhang Rui , - Daniel Lezcano , - Amit Kucheria , - Rob Herring , Mark Rutland , - Nicolas Saenz Julienne , - Florian Fainelli , - Catalin Marinas , Will Deacon -Subject: [PATCH V3 2/4] thermal: Add BCM2711 thermal driver -Date: Tue, 7 Jan 2020 19:15:55 +0100 -Message-Id: <1578420957-32229-3-git-send-email-wahrenst@gmx.net> -X-Mailer: git-send-email 2.7.4 -In-Reply-To: <1578420957-32229-1-git-send-email-wahrenst@gmx.net> -References: <1578420957-32229-1-git-send-email-wahrenst@gmx.net> -X-Provags-ID: V03:K1:yFvB7JDgtfyjUut8k1Chkrb/ErSVsg3EvQyWqLPXb8cBJL7dcQK - dsv56Ee8bmn70zRFQcp+ZxoKnJOLsQX8yr4SSStLpZInOQB1eFljwNlqO1yvOMTchBW9aNV - 8K/3K5y1XYvkIucOrqA4mcg/Abn6C2HRj+YX30kIzWXSZJYVPfGO7BlReGxXXeOS3RN/0+v - AxjdzIeF7ITk0B2E8IlXg== -X-Spam-Flag: NO -X-UI-Out-Filterresults: notjunk:1;V03:K0:jTzlGkSo9bo=:dlU7pPc0rf9QUy9ZULoDP9 - 8GSLL1VdjzaySpcK+jGdXJmnrTtTdrwOVCM13Yj+OFiXY9BhB02v3Y1/GACb0zByQF6m5R+HY - E9rP1h/ZotZ106drpf22Cq8qEcdAIN5naIaEYooguO0tmeziCzo2zdEeRvJQpiw0XPxJzNMRM - 6r/2TRXgeXb53bBysAa4tCjXgXGwqtbF0WKTAsWBjogBF/6lwK2AgGFC8X4mY7XOv8GZOq+EO - eCr92WcgDG5MIwJF7G+Q/SWbTCV+S7Fs8D52Iy3YYtdNKYJa8Mq2PmZs+zx2feLAmwfSxGctw - EuEMw9cv1bA2tVzuUn7GiFQYGlJpxGvvCrxvU6F99yw9ECI3c3zIOHKmsXPlWMBQo9AuD/0rF - P//MLHaS7rzJds2En+JKdP/bAR2XxC/qCtHnF7VIxMkbrXUU69CYWVTAz5gaxFv5CtBY5kqmi - /AkDqAJimergmP6IIVtmEpgO5aE2KcbFFWtqt8e+OshhR/JDJ6JP8+kZUnbV9e0nY2cUJQqeT - n30n/BPVfHDvMlXeHpI//Eo90SBCEVY9BRd90Q/9tmyRckXcLt+mK9USdZAkyrq7X+eXNlB2b - QPHkn7XPbEso/0K2GzZCEO+kh5IKoYf4o53VM++6q7SDY48oU7MGG29P36RlK40W4wxgYcnbQ - G6ofOpVasFvQlsfoWZAy3tMP3h7pzSXTMzfb+oBl+20O/5R32GpSWt/jO/Rfhyk+Ho+MGiQwA - TqHZK+xG6BWesd9jIKv+A0n/NnxbHfylDpSRa0x4Al27WH1GQcN70HE+B91a58+3NmNd8cl1u - nR++5B6h+UhxHjwY3mJFn6JaJE9tzHZYUcYYH6JeUq03cFXZC9Fxdns96ofekPi24KiO9T49q - byceV+B8w4shzosvTwbuExqTP6JvIQU0VGVNzFhWlFvoMardYHn0PWKlIy16TPVaRXEL7yl2U - +TRzGy2pXi4g1TkFMGGmRU17UYWsREIKw3+RqOSuq8riGSWZrUgVbk2wJLp/0kS4pLMUzaF/a - QMemNPTBJfdX15J9IiNHnOMDGmEdpRucbFs9HYRn4HhWDMl1TskP5nyUiG8p+7ET3PLjS+r4K - IFzT7g2tghwbdcDkMOjwK1CFXVblw2fUa5gjZoLCAb+psUornL0pyskLONpUQDgX+FONMdu5C - gXIa+nu2CgDmi+mxoDIx4hSim5yfx1eGeryexRr5UiX4wdT0jXDx3nyfK+z9DTgBbIwY0D0qM - gN5jbjyZRfDrlBl1cMJHAWyDEdL42xvNhWkeV0Q== -X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 -X-CRM114-CacheID: sfid-20200107_101615_404914_F8328398 -X-CRM114-Status: GOOD ( 17.41 ) -X-Spam-Score: -0.2 (/) -X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: - Content analysis details: (-0.2 points) - pts rule name description - ---- ---------------------- - -------------------------------------------------- - -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, - no trust [212.227.15.18 listed in list.dnswl.org] - 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail - provider (wahrenst[at]gmx.net) - -0.0 SPF_PASS SPF: sender matches SPF record - 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record - -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from - envelope-from domain - 0.1 DKIM_SIGNED Message has a DKIM or DK signature, - not necessarily - valid - -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from - author's domain - -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -X-BeenThere: linux-arm-kernel@lists.infradead.org -X-Mailman-Version: 2.1.29 -Precedence: list -List-Id: -List-Unsubscribe: - , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: - , - -Cc: devicetree@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, - Stefan Wahren , linux-arm-kernel@lists.infradead.org, - linux-pm@vger.kernel.org -MIME-Version: 1.0 -Sender: "linux-arm-kernel" -Errors-To: - linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org - -This adds the thermal sensor driver for the Broadcom BCM2711 SoC, -which is placed on the Raspberry Pi 4. The driver only provides -SoC temperature reading so far. - -Signed-off-by: Stefan Wahren -Reviewed-by: Florian Fainelli -Reviewed-by: Nicolas Saenz Julienne -Tested-by: Nicolas Saenz Julienne ---- - drivers/thermal/broadcom/Kconfig | 7 ++ - drivers/thermal/broadcom/Makefile | 1 + - drivers/thermal/broadcom/bcm2711_thermal.c | 129 +++++++++++++++++++++++++++++ - 3 files changed, 137 insertions(+) - create mode 100644 drivers/thermal/broadcom/bcm2711_thermal.c - --- -2.7.4 - -diff --git a/drivers/thermal/broadcom/Kconfig b/drivers/thermal/broadcom/Kconfig -index cf43e15..061f1db 100644 ---- a/drivers/thermal/broadcom/Kconfig -+++ b/drivers/thermal/broadcom/Kconfig -@@ -1,4 +1,11 @@ - # SPDX-License-Identifier: GPL-2.0-only -+config BCM2711_THERMAL -+ tristate "Broadcom AVS RO thermal sensor driver" -+ depends on ARCH_BCM2835 || COMPILE_TEST -+ depends on THERMAL_OF && MFD_SYSCON -+ help -+ Support for thermal sensors on Broadcom BCM2711 SoCs. -+ - config BCM2835_THERMAL - tristate "Thermal sensors on bcm2835 SoC" - depends on ARCH_BCM2835 || COMPILE_TEST -diff --git a/drivers/thermal/broadcom/Makefile b/drivers/thermal/broadcom/Makefile -index 490ab1f..c917b24 100644 ---- a/drivers/thermal/broadcom/Makefile -+++ b/drivers/thermal/broadcom/Makefile -@@ -1,4 +1,5 @@ - # SPDX-License-Identifier: GPL-2.0-only -+obj-$(CONFIG_BCM2711_THERMAL) += bcm2711_thermal.o - obj-$(CONFIG_BCM2835_THERMAL) += bcm2835_thermal.o - obj-$(CONFIG_BRCMSTB_THERMAL) += brcmstb_thermal.o - obj-$(CONFIG_BCM_NS_THERMAL) += ns-thermal.o -diff --git a/drivers/thermal/broadcom/bcm2711_thermal.c b/drivers/thermal/broadcom/bcm2711_thermal.c -new file mode 100644 -index 0000000..b1d3c4d ---- /dev/null -+++ b/drivers/thermal/broadcom/bcm2711_thermal.c -@@ -0,0 +1,129 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Broadcom AVS RO thermal sensor driver -+ * -+ * based on brcmstb_thermal -+ * -+ * Copyright (C) 2020 Stefan Wahren -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "../thermal_hwmon.h" -+ -+#define AVS_RO_TEMP_STATUS 0x200 -+ #define AVS_RO_TEMP_STATUS_valid_msk (BIT(16) | BIT(10)) -+ #define AVS_RO_TEMP_STATUS_data_msk GENMASK(9, 0) -+ -+struct bcm2711_thermal_priv { -+ struct regmap *regmap; -+ struct device *dev; -+ struct thermal_zone_device *thermal; -+}; -+ -+static int bcm2711_get_temp(void *data, int *temp) -+{ -+ struct bcm2711_thermal_priv *priv = data; -+ int slope = thermal_zone_get_slope(priv->thermal); -+ int offset = thermal_zone_get_offset(priv->thermal); -+ u32 val; -+ int ret; -+ long t; -+ -+ ret = regmap_read(priv->regmap, AVS_RO_TEMP_STATUS, &val); -+ if (ret) -+ return ret; -+ -+ if (!(val & AVS_RO_TEMP_STATUS_valid_msk)) { -+ dev_err(priv->dev, "reading not valid\n"); -+ return -EIO; -+ } -+ -+ val &= AVS_RO_TEMP_STATUS_data_msk; -+ -+ /* Convert a HW code to a temperature reading (millidegree celsius) */ -+ t = slope * val + offset; -+ if (t < 0) -+ *temp = 0; -+ else -+ *temp = t; -+ -+ return 0; -+} -+ -+static const struct thermal_zone_of_device_ops bcm2711_thermal_of_ops = { -+ .get_temp = bcm2711_get_temp, -+}; -+ -+static const struct of_device_id bcm2711_thermal_id_table[] = { -+ { .compatible = "brcm,bcm2711-thermal" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, bcm2711_thermal_id_table); -+ -+static int bcm2711_thermal_probe(struct platform_device *pdev) -+{ -+ struct thermal_zone_device *thermal; -+ struct bcm2711_thermal_priv *priv; -+ struct device *dev = &pdev->dev; -+ struct device_node *parent; -+ struct regmap *regmap; -+ int ret; -+ -+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ -+ /* get regmap from syscon node */ -+ parent = of_get_parent(dev->of_node); /* parent should be syscon node */ -+ regmap = syscon_node_to_regmap(parent); -+ of_node_put(parent); -+ if (IS_ERR(regmap)) { -+ ret = PTR_ERR(regmap); -+ dev_err(dev, "failed to get regmap: %d\n", ret); -+ return ret; -+ } -+ priv->regmap = regmap; -+ priv->dev = dev; -+ -+ thermal = devm_thermal_zone_of_sensor_register(dev, 0, priv, -+ &bcm2711_thermal_of_ops); -+ if (IS_ERR(thermal)) { -+ ret = PTR_ERR(thermal); -+ dev_err(dev, "could not register sensor: %d\n", ret); -+ return ret; -+ } -+ -+ priv->thermal = thermal; -+ -+ thermal->tzp->no_hwmon = false; -+ ret = thermal_add_hwmon_sysfs(thermal); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static struct platform_driver bcm2711_thermal_driver = { -+ .probe = bcm2711_thermal_probe, -+ .driver = { -+ .name = "bcm2711_thermal", -+ .of_match_table = bcm2711_thermal_id_table, -+ }, -+}; -+module_platform_driver(bcm2711_thermal_driver); -+ -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Stefan Wahren"); -+MODULE_DESCRIPTION("Broadcom AVS RO thermal sensor driver"); - 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1MoO2E-1jUaw13WDg-00onqT; Tue, 07 Jan 2020 19:16:05 +0100 -From: Stefan Wahren -To: Zhang Rui , - Daniel Lezcano , - Amit Kucheria , - Rob Herring , Mark Rutland , - Nicolas Saenz Julienne , - Florian Fainelli , - Catalin Marinas , Will Deacon -Subject: [PATCH V3 3/4] ARM: dts: bcm2711: Enable thermal -Date: Tue, 7 Jan 2020 19:15:56 +0100 -Message-Id: <1578420957-32229-4-git-send-email-wahrenst@gmx.net> -X-Mailer: git-send-email 2.7.4 -In-Reply-To: <1578420957-32229-1-git-send-email-wahrenst@gmx.net> -References: <1578420957-32229-1-git-send-email-wahrenst@gmx.net> -X-Provags-ID: V03:K1:nnCaGh26y5WZ7Y+Du8wo80ycqs5dd0zUOiU8IyxmRBut3vh+kbS - hWpSdRT6jUdGy0zdQC4p0GWbndKZlE8PcisuGyj1O6JS+PZF0lvHyqMgg93jy1GqVcINVAT - m9kwkGNF9DR+OKHvvajSgRYV5gRp3BIZpN7jBioSwAr2xEZCwI3aFYzZL0/nM1tdwZi08do - f9kojNp6jUr4vT/oaeL8g== -X-Spam-Flag: NO -X-UI-Out-Filterresults: notjunk:1;V03:K0:eypfnYKWbbQ=:3vD1OpSV55xSk4yzLYUc8F - ss17pikWe3sKTkGoI3BFvSL2dMCJntwyDYvcMBefgSpGcgd2z3eK3CjpAhx5Z35UkdK7cr6ep - lsMn51ut2iKyCZ1FGpPY5mDJroBPqJFUDxNCh0BAQJn/Vyd5aWvtIStBX8vhSZeSLwOpkgYtq - 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not necessarily - valid - -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from - author's domain - -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -X-BeenThere: linux-arm-kernel@lists.infradead.org -X-Mailman-Version: 2.1.29 -Precedence: list -List-Id: -List-Unsubscribe: - , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: - , - -Cc: devicetree@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, - Stefan Wahren , linux-arm-kernel@lists.infradead.org, - linux-pm@vger.kernel.org -MIME-Version: 1.0 -Sender: "linux-arm-kernel" -Errors-To: - linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org - -This enables thermal for the BCM2711 (used on Raspberry Pi 4) by adding -the AVS monitor and a subnode for the thermal part. - -Signed-off-by: Stefan Wahren -Reviewed-by: Nicolas Saenz Julienne -Tested-by: Nicolas Saenz Julienne ---- - arch/arm/boot/dts/bcm2711.dtsi | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - --- -2.7.4 - -diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi -index 961bed8..96f341d 100644 ---- a/arch/arm/boot/dts/bcm2711.dtsi -+++ b/arch/arm/boot/dts/bcm2711.dtsi -@@ -66,6 +66,17 @@ - IRQ_TYPE_LEVEL_HIGH)>; - }; - -+ avs_monitor: avs-monitor@7d5d2000 { -+ compatible = "brcm,bcm2711-avs-monitor", -+ "syscon", "simple-mfd"; -+ reg = <0x7d5d2000 0xf00>; -+ -+ thermal: thermal { -+ compatible = "brcm,bcm2711-thermal"; -+ #thermal-sensor-cells = <0>; -+ }; -+ }; -+ - dma: dma@7e007000 { - compatible = "brcm,bcm2835-dma"; - reg = <0x7e007000 0xb00>; -@@ -363,6 +374,7 @@ - - &cpu_thermal { - coefficients = <(-487) 410040>; -+ thermal-sensors = <&thermal>; - }; - - &dsi0 { - -From patchwork Tue Jan 7 18:15:57 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Stefan Wahren -X-Patchwork-Id: 11321575 -Return-Path: - -Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org - [172.30.200.123]) - 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-This builds the BCM2711 thermal driver as module for the Raspberry Pi 4. - -Signed-off-by: Stefan Wahren -Reviewed-by: Florian Fainelli -Reviewed-by: Nicolas Saenz Julienne -Tested-by: Nicolas Saenz Julienne ---- - arch/arm/configs/multi_v7_defconfig | 1 + - arch/arm64/configs/defconfig | 1 + - 2 files changed, 2 insertions(+) - --- -2.7.4 - -diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig -index 3f1b96d..f5d19cc 100644 ---- a/arch/arm/configs/multi_v7_defconfig -+++ b/arch/arm/configs/multi_v7_defconfig -@@ -496,6 +496,7 @@ CONFIG_IMX_THERMAL=y - CONFIG_ROCKCHIP_THERMAL=y - CONFIG_RCAR_THERMAL=y - CONFIG_ARMADA_THERMAL=y -+CONFIG_BCM2711_THERMAL=m - CONFIG_BCM2835_THERMAL=m - CONFIG_BRCMSTB_THERMAL=m - CONFIG_ST_THERMAL_MEMMAP=y -diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig -index 6a83ba2..b2f6673 100644 ---- a/arch/arm64/configs/defconfig -+++ b/arch/arm64/configs/defconfig -@@ -442,6 +442,7 @@ CONFIG_ROCKCHIP_THERMAL=m - CONFIG_RCAR_THERMAL=y - CONFIG_RCAR_GEN3_THERMAL=y - CONFIG_ARMADA_THERMAL=y -+CONFIG_BCM2711_THERMAL=m - CONFIG_BCM2835_THERMAL=m - CONFIG_BRCMSTB_THERMAL=m - CONFIG_EXYNOS_THERMAL=y diff --git a/ARM-dts-bcm2711-Move-emmc2-into-its-own-bus.patch b/ARM-dts-bcm2711-Move-emmc2-into-its-own-bus.patch new file mode 100644 index 000000000..dd0087104 --- /dev/null +++ b/ARM-dts-bcm2711-Move-emmc2-into-its-own-bus.patch @@ -0,0 +1,168 @@ +From patchwork Wed Mar 4 13:24:37 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 11420129 +Return-Path: + +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + [172.30.200.123]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C6D01139A + for ; + Wed, 4 Mar 2020 13:24:52 +0000 (UTC) +Received: from bombadil.infradead.org (bombadil.infradead.org + [198.137.202.133]) + (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by mail.kernel.org (Postfix) with ESMTPS id 8EA4C20848 + for ; + Wed, 4 Mar 2020 13:24:52 +0000 (UTC) +Authentication-Results: mail.kernel.org; + dkim=pass (2048-bit key) header.d=lists.infradead.org + header.i=@lists.infradead.org header.b="rVot4hOX" +DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8EA4C20848 +Authentication-Results: mail.kernel.org; + dmarc=none (p=none dis=none) header.from=suse.de +Authentication-Results: mail.kernel.org; + spf=none + smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org +DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; + d=lists.infradead.org; s=bombadil.20170209; h=Sender: + Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: + List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To + :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: + Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: + List-Owner; bh=8vOVvuwuEiZ/+aeWTFI6G54jitKev/MSiGHvL/NuYpM=; b=rVot4hOXzlJULi + AIV0tWo7xq5srSJPr0aW3ccsKyfTNsVGmB0Y4G8A2Wqd+29xOVNJGk9jIAaRqBaAEGozzfFQj8JuQ + YRKsDyKXSMgpM5EHFtlq7TSvY21pe6uHhTkMCYnhLdZu7BrX9V2BLfnG7b7kx+wVgh2SDk5Tu8iJI + 3vNkR22Qd4bIZAMQVwr97BN6IasYg2C9Q1hACZKKYVTxOvCw1MDDfedhRK9IxgZXV8eacZco5TlC+ + 3FlBQSP6dxBhpgAZ2VSD8k94TZe8Vnj1HMmja4MShu5hUOaBMzV/cvTA0y9OFseFvzL3YES1oyPzk + vPYT4iiUYIWQEEsfDJoA==; +Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) + by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) + id 1j9U10-0004Kq-KB; Wed, 04 Mar 2020 13:24:46 +0000 +Received: from mx2.suse.de ([195.135.220.15]) + by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) + id 1j9U0x-0004KG-Lg; Wed, 04 Mar 2020 13:24:45 +0000 +X-Virus-Scanned: by amavisd-new at test-mx.suse.de +Received: from relay2.suse.de (unknown [195.135.220.254]) + by mx2.suse.de (Postfix) with ESMTP id 28610AAC7; + Wed, 4 Mar 2020 13:24:42 +0000 (UTC) +From: Nicolas Saenz Julienne +To: Rob Herring , + Nicolas Saenz Julienne +Subject: [PATCH v2] ARM: dts: bcm2711: Move emmc2 into its own bus +Date: Wed, 4 Mar 2020 14:24:37 +0100 +Message-Id: <20200304132437.20164-1-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.25.1 +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200304_052443_860022_0913505C +X-CRM114-Status: GOOD ( 14.37 ) +X-Spam-Score: -2.3 (--) +X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: + Content analysis details: (-2.3 points) + pts rule name description + ---- ---------------------- + -------------------------------------------------- + -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, + medium trust [195.135.220.15 listed in list.dnswl.org] + -0.0 SPF_PASS SPF: sender matches SPF record + 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record + 0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) + [195.135.220.15 listed in wl.mailspike.net] + 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: +List-Unsubscribe: + , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: + , + +Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, phil@raspberrypi.org, + linux-kernel@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, + linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org +Sender: "linux-arm-kernel" +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +Depending on bcm2711's revision its emmc2 controller might have +different DMA constraints. Raspberry Pi 4's firmware will take care of +updating those, but only if a certain alias is found in the device tree. +So, move emmc2 into its own bus, so as not to pollute other devices with +dma-ranges changes and create the emmc2bus alias. + +Based in Phil ELwell's downstream implementation. + +Signed-off-by: Nicolas Saenz Julienne +--- + +Changes since v1: + - Add comment in dt + - Fix commit title + + arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 1 + + arch/arm/boot/dts/bcm2711.dtsi | 25 ++++++++++++++++++++----- + 2 files changed, 21 insertions(+), 5 deletions(-) + +diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +index 1d4b589fe233..e26ea9006378 100644 +--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts ++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +@@ -20,6 +20,7 @@ memory@0 { + }; + + aliases { ++ emmc2bus = &emmc2bus; + ethernet0 = &genet; + pcie0 = &pcie0; + }; +diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi +index d1e684d0acfd..a91cf68e3c4c 100644 +--- a/arch/arm/boot/dts/bcm2711.dtsi ++++ b/arch/arm/boot/dts/bcm2711.dtsi +@@ -241,17 +241,32 @@ pwm1: pwm@7e20c800 { + status = "disabled"; + }; + ++ hvs@7e400000 { ++ interrupts = ; ++ }; ++ }; ++ ++ /* ++ * emmc2 has different DMA constraints based on SoC revisions. It was ++ * moved into its own bus, so as for RPi4's firmware to update them. ++ * The firmware will find whether the emmc2bus alias is defined, and if ++ * so, it'll edit the dma-ranges property below accordingly. ++ */ ++ emmc2bus: emmc2bus { ++ compatible = "simple-bus"; ++ #address-cells = <2>; ++ #size-cells = <1>; ++ ++ ranges = <0x0 0x7e000000 0x0 0xfe000000 0x01800000>; ++ dma-ranges = <0x0 0xc0000000 0x0 0x00000000 0x40000000>; ++ + emmc2: emmc2@7e340000 { + compatible = "brcm,bcm2711-emmc2"; +- reg = <0x7e340000 0x100>; ++ reg = <0x0 0x7e340000 0x100>; + interrupts = ; + clocks = <&clocks BCM2711_CLOCK_EMMC2>; + status = "disabled"; + }; +- +- hvs@7e400000 { +- interrupts = ; +- }; + }; + + arm-pmu { diff --git a/ARM64-Tegra-fixes.patch b/ARM64-Tegra-fixes.patch new file mode 100644 index 000000000..6ddfc2322 --- /dev/null +++ b/ARM64-Tegra-fixes.patch @@ -0,0 +1,477 @@ +From patchwork Mon Feb 24 14:34:33 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Jon Hunter +X-Patchwork-Id: 1243145 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=none (no SPF record) + smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; + helo=vger.kernel.org; + envelope-from=linux-tegra-owner@vger.kernel.org; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=pass (p=none dis=none) header.from=nvidia.com +Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; + unprotected) header.d=nvidia.com header.i=@nvidia.com + header.a=rsa-sha256 header.s=n1 header.b=duOxTEf6; + dkim-atps=neutral +Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) + by ozlabs.org (Postfix) with ESMTP id 48R4Mz3K4gz9sRR + for ; + Tue, 25 Feb 2020 01:34:55 +1100 (AEDT) +Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand + id S1727815AbgBXOew (ORCPT ); + Mon, 24 Feb 2020 09:34:52 -0500 +Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:6094 "EHLO + hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org + with ESMTP id S1727498AbgBXOew (ORCPT + ); + Mon, 24 Feb 2020 09:34:52 -0500 +Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by + hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) + id ; Mon, 24 Feb 2020 06:33:35 -0800 +Received: from hqmail.nvidia.com ([172.20.161.6]) + by hqpgpgate101.nvidia.com (PGP Universal service); + Mon, 24 Feb 2020 06:34:51 -0800 +X-PGP-Universal: processed; + by hqpgpgate101.nvidia.com on Mon, 24 Feb 2020 06:34:51 -0800 +Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL101.nvidia.com + (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Mon, 24 Feb 2020 14:34:50 +0000 +Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL105.nvidia.com + (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Mon, 24 Feb 2020 14:34:50 +0000 +Received: from thunderball.nvidia.com (Not Verified[10.21.140.91]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id ; Mon, 24 Feb 2020 06:34:50 -0800 +From: Jon Hunter +To: Thierry Reding +CC: , , + Jon Hunter , +Subject: [PATCH 1/4] ARM64: Tegra: Enable I2C controller for EEPROM +Date: Mon, 24 Feb 2020 14:34:33 +0000 +Message-ID: <20200224143436.5438-1-jonathanh@nvidia.com> +X-Mailer: git-send-email 2.17.1 +X-NVConfidentiality: public +MIME-Version: 1.0 +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; + t=1582554815; bh=SKhUz0YkoB6pD4YoE/4KFxZbYw2qmSp519cZdmcBM3o=; + h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: + X-NVConfidentiality:MIME-Version:Content-Type; + b=duOxTEf6wTpBnmdA4GzgtJ0CYXr5t34ZZNN48pc9hExmRqaCcppGHAY2wcXqnjNmL + YwvDy0gfFikGS9gPJKICW2X6f4iOcgfnVhYOWdgnzSFD1bhtOoN+bEcXPC+LRDY89m + uAwuuKQR4MMohz9C8MW8xyatlc13ZEU0jeW1+S3PYfX2GhwRUooeFCGnmLUso5s2DZ + 65p26CoCGdQNBARsw2TNevBzLshNSXvHBdlFiKSs4S0hB7yJJrCwZx2JsjOm+aRtb3 + dgVHvAZAd8GLLKC8NvPCAhbIRhDt0vkyWmqHnB5suduti7g4QA1Eb8HLAXB5ptvzeK + jor+qP+NC8CVQ== +Sender: linux-tegra-owner@vger.kernel.org +Precedence: bulk +List-ID: +X-Mailing-List: linux-tegra@vger.kernel.org + +Commit a5b6b67364cb ("arm64: tegra: Add ID EEPROM for Jetson TX1 +module") populated the EEPROM on the Jetson TX1 module, but did not +enable the corresponding I2C controller. Enable the I2C controller so +that this EEPROM can be accessed. + +Fixes: a5b6b67364cb ("arm64: tegra: Add ID EEPROM for Jetson TX1 module") + +Cc: +Signed-off-by: Jon Hunter +--- + arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi +index cb58f79deb48..95b1a6e76e6e 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi +@@ -265,6 +265,8 @@ + }; + + i2c@7000c500 { ++ status = "okay"; ++ + /* module ID EEPROM */ + eeprom@50 { + compatible = "atmel,24c02"; + +From patchwork Mon Feb 24 14:34:34 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Jon Hunter +X-Patchwork-Id: 1243146 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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Mon, 24 Feb 2020 06:34:20 -0800 +Received: from hqmail.nvidia.com ([172.20.161.6]) + by hqpgpgate101.nvidia.com (PGP Universal service); + Mon, 24 Feb 2020 06:34:55 -0800 +X-PGP-Universal: processed; + by hqpgpgate101.nvidia.com on Mon, 24 Feb 2020 06:34:55 -0800 +Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL109.nvidia.com + (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Mon, 24 Feb 2020 14:34:55 +0000 +Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL107.nvidia.com + (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Mon, 24 Feb 2020 14:34:55 +0000 +Received: from thunderball.nvidia.com (Not Verified[10.21.140.91]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id ; Mon, 24 Feb 2020 06:34:54 -0800 +From: Jon Hunter +To: Thierry Reding +CC: , , + Jon Hunter +Subject: [PATCH 2/4] ARM64: tegra: Add EEPROM supplies +Date: Mon, 24 Feb 2020 14:34:34 +0000 +Message-ID: <20200224143436.5438-2-jonathanh@nvidia.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200224143436.5438-1-jonathanh@nvidia.com> +References: <20200224143436.5438-1-jonathanh@nvidia.com> +X-NVConfidentiality: public +MIME-Version: 1.0 +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; + t=1582554860; bh=XQRed+hM+dOmUn7lEyFBRTITiHe/kmVf6bYnTKyb4yU=; + h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: + In-Reply-To:References:X-NVConfidentiality:MIME-Version: + Content-Type; + b=YrupJt5osNrArZbD3/6N+E76P788S2kgwb7HnwldZ99/x70lrAIXTKHOx35uqz7o0 + bsYj1jAiz+BrmkHt678TBaesev2pBBcp8G+zkGDX+M6MWEvTixhn0bBERoHpnmuhQl + 1fWBcDKGg9r4KT46RFxrjCcRek8FB1gb1nM00FneNHFyguKuZEzRuMvoPfZEPr0Pm3 + HaB3AybSYgm2KABS5aZo/a2/9sIP0Bx2St673Bx+9vz89pPr8lWjHZO9QjIUdJn2Qw + 5rEeeEdOKkbx0RMyKaPAPIdhmrnVzrcyrnZYmf0KnxXJCWitqt2cyAu6uDjPI8kiL+ + JhWqRAza5osKg== +Sender: linux-tegra-owner@vger.kernel.org +Precedence: bulk +List-ID: +X-Mailing-List: linux-tegra@vger.kernel.org + +The following warning is observed on Jetson TX1, Jetson Nano and Jetson +TX2 platforms because the supply regulators are not specified for the +EEPROMs. + + WARNING KERN at24 0-0050: 0-0050 supply vcc not found, using dummy regulator + WARNING KERN at24 0-0057: 0-0057 supply vcc not found, using dummy regulator + +For both of these platforms the EEPROM is powered by the main 1.8V +supply rail and so populate the supply for these devices to fix these +warnings. + +Signed-off-by: Jon Hunter +--- + arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 1 + + arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 1 + + arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 1 + + arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 1 + + arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 2 ++ + 5 files changed, 6 insertions(+) + +diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts +index d7628f5afb85..961b1be0c56b 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts +@@ -226,6 +226,7 @@ + compatible = "atmel,24c02"; + reg = <0x57>; + ++ vcc-supply = <&vdd_1v8>; + address-bits = <8>; + page-size = <8>; + size = <256>; +diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi +index 947744d0f04c..da96de04d003 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi ++++ b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi +@@ -171,6 +171,7 @@ + compatible = "atmel,24c02"; + reg = <0x50>; + ++ vcc-supply = <&vdd_1v8>; + address-bits = <8>; + page-size = <8>; + size = <256>; +diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi +index 95b1a6e76e6e..f87d2437d11c 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi +@@ -272,6 +272,7 @@ + compatible = "atmel,24c02"; + reg = <0x50>; + ++ vcc-supply = <&vdd_1v8>; + address-bits = <8>; + page-size = <8>; + size = <256>; +diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts +index a3cafe39ba4c..c70a610f8e3a 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts +@@ -85,6 +85,7 @@ + compatible = "atmel,24c02"; + reg = <0x57>; + ++ vcc-supply = <&vdd_1v8>; + address-bits = <8>; + page-size = <8>; + size = <256>; +diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts +index 848afd855da6..21ed1756b889 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts +@@ -114,6 +114,7 @@ + compatible = "atmel,24c02"; + reg = <0x50>; + ++ vcc-supply = <&vdd_1v8>; + address-bits = <8>; + page-size = <8>; + size = <256>; +@@ -124,6 +125,7 @@ + compatible = "atmel,24c02"; + reg = <0x57>; + ++ vcc-supply = <&vdd_1v8>; + address-bits = <8>; + page-size = <8>; + size = <256>; + +From patchwork Mon Feb 24 14:34:35 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Jon Hunter +X-Patchwork-Id: 1243147 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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Mon, 24 Feb 2020 06:34:24 -0800 +Received: from hqmail.nvidia.com ([172.20.161.6]) + by hqpgpgate102.nvidia.com (PGP Universal service); + Mon, 24 Feb 2020 06:34:59 -0800 +X-PGP-Universal: processed; + by hqpgpgate102.nvidia.com on Mon, 24 Feb 2020 06:34:59 -0800 +Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL109.nvidia.com + (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Mon, 24 Feb 2020 14:34:59 +0000 +Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL107.nvidia.com + (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Mon, 24 Feb 2020 14:34:58 +0000 +Received: from thunderball.nvidia.com (Not Verified[10.21.140.91]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id ; Mon, 24 Feb 2020 06:34:58 -0800 +From: Jon Hunter +To: Thierry Reding +CC: , , + Jon Hunter , +Subject: [PATCH 3/4] ARM64: tegra: Fix Tegra186 SOR supply +Date: Mon, 24 Feb 2020 14:34:35 +0000 +Message-ID: <20200224143436.5438-3-jonathanh@nvidia.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200224143436.5438-1-jonathanh@nvidia.com> +References: <20200224143436.5438-1-jonathanh@nvidia.com> +X-NVConfidentiality: public +MIME-Version: 1.0 +DKIM-Signature: v=1; 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Therefore, add the +'-supply' suffix to fix this warning. + +Fixes: 3fdfaf8718fa arm64: tegra: Enable DP support on Jetson TX2 + +Cc: +Signed-off-by: Jon Hunter +--- + arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts +index 961b1be0c56b..1af7f9ffb7b6 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts +@@ -278,7 +278,7 @@ + status = "okay"; + + avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>; +- vdd-hdmi-dp-pll = <&vdd_1v8_ap>; ++ vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>; + + nvidia,dpaux = <&dpaux>; + }; + +From patchwork Mon Feb 24 14:34:36 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Jon Hunter +X-Patchwork-Id: 1243148 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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Mon, 24 Feb 2020 06:33:46 -0800 +Received: from hqmail.nvidia.com ([172.20.161.6]) + by hqpgpgate102.nvidia.com (PGP Universal service); + Mon, 24 Feb 2020 06:35:01 -0800 +X-PGP-Universal: processed; + by hqpgpgate102.nvidia.com on Mon, 24 Feb 2020 06:35:01 -0800 +Received: from HQMAIL111.nvidia.com (172.20.187.18) by HQMAIL111.nvidia.com + (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Mon, 24 Feb 2020 14:35:01 +0000 +Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL111.nvidia.com + (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Mon, 24 Feb 2020 14:35:01 +0000 +Received: from thunderball.nvidia.com (Not Verified[10.21.140.91]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id ; Mon, 24 Feb 2020 06:35:01 -0800 +From: Jon Hunter +To: Thierry Reding +CC: , , + Jon Hunter +Subject: [PATCH 4/4] ARM64: tegra: Populate LP8557 backlight regulator +Date: Mon, 24 Feb 2020 14:34:36 +0000 +Message-ID: <20200224143436.5438-4-jonathanh@nvidia.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200224143436.5438-1-jonathanh@nvidia.com> +References: <20200224143436.5438-1-jonathanh@nvidia.com> +X-NVConfidentiality: public +MIME-Version: 1.0 +DKIM-Signature: v=1; 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+ reg = <0x2c>; ++ power-supply = <&vdd_3v3_sys>; + + dev-ctrl = /bits/ 8 <0x80>; + init-brt = /bits/ 8 <0xff>; diff --git a/Add-LCD-support-for-Pine64-Pinebook-1080p.patch b/Add-LCD-support-for-Pine64-Pinebook-1080p.patch new file mode 100644 index 000000000..632601e4c --- /dev/null +++ b/Add-LCD-support-for-Pine64-Pinebook-1080p.patch @@ -0,0 +1,1033 @@ +From patchwork Wed Feb 26 08:10:07 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Vasily Khoruzhick +X-Patchwork-Id: 11405511 +Return-Path: + +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + [172.30.200.123]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7C17F138D + for ; + Wed, 26 Feb 2020 08:10:50 +0000 (UTC) +Received: from bombadil.infradead.org (bombadil.infradead.org + [198.137.202.133]) + (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by mail.kernel.org (Postfix) with ESMTPS id 285BF20714 + for ; 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+ Wed, 26 Feb 2020 00:10:44 -0800 (PST) +Received: from anarsoul-thinkpad.lan (216-71-213-236.dyn.novuscom.net. + [216.71.213.236]) + by smtp.gmail.com with ESMTPSA id v7sm1679230pfn.61.2020.02.26.00.10.43 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Wed, 26 Feb 2020 00:10:43 -0800 (PST) +From: Vasily Khoruzhick +To: Thierry Reding , + Sam Ravnborg , + David Airlie , Daniel Vetter , + Rob Herring , Mark Rutland , + Maxime Ripard , Chen-Yu Tsai , + Andrzej Hajda , + Neil Armstrong , + Laurent Pinchart , + Jonas Karlman , Jernej Skrabec , + Torsten Duwe , Icenowy Zheng , + Heiko Stuebner , + Stephan Gerhold , Mark Brown , + Stephen Rothwell , + Samuel Holland , dri-devel@lists.freedesktop.org, + devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + linux-arm-kernel@lists.infradead.org +Subject: [PATCH v2 2/6] drm/bridge: anx6345: don't print error message if + regulator is not ready +Date: Wed, 26 Feb 2020 00:10:07 -0800 +Message-Id: <20200226081011.1347245-3-anarsoul@gmail.com> +X-Mailer: git-send-email 2.25.0 +In-Reply-To: <20200226081011.1347245-1-anarsoul@gmail.com> +References: <20200226081011.1347245-1-anarsoul@gmail.com> +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200226_001045_305939_7F59723B +X-CRM114-Status: GOOD ( 13.16 ) +X-Spam-Score: -0.2 (/) +X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: + Content analysis details: (-0.2 points) + pts rule name description + ---- ---------------------- + -------------------------------------------------- + -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, + no trust [2607:f8b0:4864:20:0:0:0:644 listed in] + [list.dnswl.org] + 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record + 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail + provider [anarsoul[at]gmail.com] + -0.0 SPF_PASS SPF: sender matches SPF record + -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from + envelope-from domain + 0.1 DKIM_SIGNED Message has a DKIM or DK signature, + not necessarily + valid + -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from + author's domain + -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: +List-Unsubscribe: + , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: + , + +Cc: Laurent Pinchart +Sender: "linux-arm-kernel" +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +We don't want to print scary message if devm_regulator_get() returns +-EPROBE_DEFER + +Reviewed-by: Laurent Pinchart +Signed-off-by: Vasily Khoruzhick +--- + drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c +index 0d8d083b0207..0bf81b9b5faa 100644 +--- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c ++++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c +@@ -714,14 +714,18 @@ static int anx6345_i2c_probe(struct i2c_client *client, + /* 1.2V digital core power regulator */ + anx6345->dvdd12 = devm_regulator_get(dev, "dvdd12"); + if (IS_ERR(anx6345->dvdd12)) { +- DRM_ERROR("dvdd12-supply not found\n"); ++ if (PTR_ERR(anx6345->dvdd12) != -EPROBE_DEFER) ++ DRM_ERROR("Failed to get dvdd12 supply (%ld)\n", ++ PTR_ERR(anx6345->dvdd12)); + return PTR_ERR(anx6345->dvdd12); + } + + /* 2.5V digital core power regulator */ + anx6345->dvdd25 = devm_regulator_get(dev, "dvdd25"); + if (IS_ERR(anx6345->dvdd25)) { +- DRM_ERROR("dvdd25-supply not found\n"); ++ if (PTR_ERR(anx6345->dvdd25) != -EPROBE_DEFER) ++ DRM_ERROR("Failed to get dvdd25 supply (%ld)\n", ++ PTR_ERR(anx6345->dvdd25)); + return PTR_ERR(anx6345->dvdd25); + } + + +From patchwork Wed Feb 26 08:10:08 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Vasily Khoruzhick +X-Patchwork-Id: 11405525 +Return-Path: + +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + [172.30.200.123]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BA056930 + for ; + Wed, 26 Feb 2020 08:11:35 +0000 (UTC) +Received: from bombadil.infradead.org (bombadil.infradead.org + [198.137.202.133]) + (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by mail.kernel.org (Postfix) with ESMTPS id 9013820714 + for ; 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LTD + +Signed-off-by: Vasily Khoruzhick +Acked-by: Rob Herring +--- + Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml +index 6456a6dfd83d..5dfbad67aa81 100644 +--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml ++++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml +@@ -661,6 +661,8 @@ patternProperties: + description: Netron DY + "^netxeon,.*": + description: Shenzhen Netxeon Technology CO., LTD ++ "^neweast,.*": ++ description: Guangdong Neweast Optoelectronics CO., LTD + "^nexbox,.*": + description: Nexbox + "^nextthing,.*": + +From patchwork Wed Feb 26 08:10:09 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Vasily Khoruzhick +X-Patchwork-Id: 11405527 +Return-Path: + +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + [172.30.200.123]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2CC5A930 + for ; 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+ Wed, 26 Feb 2020 00:10:47 -0800 (PST) +From: Vasily Khoruzhick +To: Thierry Reding , + Sam Ravnborg , + David Airlie , Daniel Vetter , + Rob Herring , Mark Rutland , + Maxime Ripard , Chen-Yu Tsai , + Andrzej Hajda , + Neil Armstrong , + Laurent Pinchart , + Jonas Karlman , Jernej Skrabec , + Torsten Duwe , Icenowy Zheng , + Heiko Stuebner , + Stephan Gerhold , Mark Brown , + Stephen Rothwell , + Samuel Holland , dri-devel@lists.freedesktop.org, + devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + linux-arm-kernel@lists.infradead.org +Subject: [PATCH v2 5/6] drm/panel: simple: Add NewEast Optoelectronics CO., + LTD WJFH116008A panel support +Date: Wed, 26 Feb 2020 00:10:10 -0800 +Message-Id: <20200226081011.1347245-6-anarsoul@gmail.com> +X-Mailer: git-send-email 2.25.0 +In-Reply-To: <20200226081011.1347245-1-anarsoul@gmail.com> +References: <20200226081011.1347245-1-anarsoul@gmail.com> +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200226_001048_596182_84BBBB6A +X-CRM114-Status: GOOD ( 13.16 ) +X-Spam-Score: -0.2 (/) +X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: + Content analysis details: (-0.2 points) + pts rule name description + ---- ---------------------- + -------------------------------------------------- + -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, + no trust [2607:f8b0:4864:20:0:0:0:444 listed in] + [list.dnswl.org] + 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record + 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail + provider [anarsoul[at]gmail.com] + -0.0 SPF_PASS SPF: sender matches SPF record + -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from + envelope-from domain + 0.1 DKIM_SIGNED Message has a DKIM or DK signature, + not necessarily + valid + -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from + author's domain + -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: +List-Unsubscribe: + , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: + , + +Sender: "linux-arm-kernel" +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +This commit adds support for the NewEast Optoelectronics CO., LTD +WJFH116008A 11.6" 1920x1080 TFT LCD panel. + +Signed-off-by: Vasily Khoruzhick +--- + drivers/gpu/drm/panel/panel-simple.c | 48 ++++++++++++++++++++++++++++ + 1 file changed, 48 insertions(+) + +diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c +index e14c14ac62b5..4292e3e3a461 100644 +--- a/drivers/gpu/drm/panel/panel-simple.c ++++ b/drivers/gpu/drm/panel/panel-simple.c +@@ -2224,6 +2224,51 @@ static const struct panel_desc netron_dy_e231732 = { + .bus_format = MEDIA_BUS_FMT_RGB666_1X18, + }; + ++static const struct drm_display_mode neweast_wjfh116008a_modes[] = { ++ { ++ .clock = 138500, ++ .hdisplay = 1920, ++ .hsync_start = 1920 + 48, ++ .hsync_end = 1920 + 48 + 32, ++ .htotal = 1920 + 48 + 32 + 80, ++ .vdisplay = 1080, ++ .vsync_start = 1080 + 3, ++ .vsync_end = 1080 + 3 + 5, ++ .vtotal = 1080 + 3 + 5 + 23, ++ .vrefresh = 60, ++ .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, ++ }, { ++ .clock = 110920, ++ .hdisplay = 1920, ++ .hsync_start = 1920 + 48, ++ .hsync_end = 1920 + 48 + 32, ++ .htotal = 1920 + 48 + 32 + 80, ++ .vdisplay = 1080, ++ .vsync_start = 1080 + 3, ++ .vsync_end = 1080 + 3 + 5, ++ .vtotal = 1080 + 3 + 5 + 23, ++ .vrefresh = 48, ++ .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, ++ } ++}; ++ ++static const struct panel_desc neweast_wjfh116008a = { ++ .modes = neweast_wjfh116008a_modes, ++ .num_modes = 2, ++ .bpc = 6, ++ .size = { ++ .width = 260, ++ .height = 150, ++ }, ++ .delay = { ++ .prepare = 110, ++ .enable = 20, ++ .unprepare = 500, ++ }, ++ .bus_format = MEDIA_BUS_FMT_RGB666_1X18, ++ .connector_type = DRM_MODE_CONNECTOR_eDP, ++}; ++ + static const struct drm_display_mode newhaven_nhd_43_480272ef_atxl_mode = { + .clock = 9000, + .hdisplay = 480, +@@ -3399,6 +3444,9 @@ static const struct of_device_id platform_of_match[] = { + }, { + .compatible = "netron-dy,e231732", + .data = &netron_dy_e231732, ++ }, { ++ .compatible = "neweast,wjfh116008a", ++ .data = &neweast_wjfh116008a, + }, { + .compatible = "newhaven,nhd-4.3-480272ef-atxl", + .data = &newhaven_nhd_43_480272ef_atxl, + +From patchwork Wed Feb 26 08:10:11 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Vasily Khoruzhick +X-Patchwork-Id: 11405531 +Return-Path: + +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + [172.30.200.123]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 77856930 + for ; + Wed, 26 Feb 2020 08:12:17 +0000 (UTC) +Received: from bombadil.infradead.org (bombadil.infradead.org + [198.137.202.133]) + (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by mail.kernel.org (Postfix) with ESMTPS id 51B0C24670 + for ; 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+ Wed, 26 Feb 2020 00:10:49 -0800 (PST) +Received: from anarsoul-thinkpad.lan (216-71-213-236.dyn.novuscom.net. + [216.71.213.236]) + by smtp.gmail.com with ESMTPSA id v7sm1679230pfn.61.2020.02.26.00.10.48 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Wed, 26 Feb 2020 00:10:48 -0800 (PST) +From: Vasily Khoruzhick +To: Thierry Reding , + Sam Ravnborg , + David Airlie , Daniel Vetter , + Rob Herring , Mark Rutland , + Maxime Ripard , Chen-Yu Tsai , + Andrzej Hajda , + Neil Armstrong , + Laurent Pinchart , + Jonas Karlman , Jernej Skrabec , + Torsten Duwe , Icenowy Zheng , + Heiko Stuebner , + Stephan Gerhold , Mark Brown , + Stephen Rothwell , + Samuel Holland , dri-devel@lists.freedesktop.org, + devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + linux-arm-kernel@lists.infradead.org +Subject: [PATCH v2 6/6] arm64: allwinner: a64: enable LCD-related hardware for + Pinebook +Date: Wed, 26 Feb 2020 00:10:11 -0800 +Message-Id: <20200226081011.1347245-7-anarsoul@gmail.com> +X-Mailer: git-send-email 2.25.0 +In-Reply-To: <20200226081011.1347245-1-anarsoul@gmail.com> +References: <20200226081011.1347245-1-anarsoul@gmail.com> +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200226_001050_010315_52B91C3C +X-CRM114-Status: GOOD ( 14.29 ) +X-Spam-Score: -0.2 (/) +X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: + Content analysis details: (-0.2 points) + pts rule name description + ---- ---------------------- + -------------------------------------------------- + -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, + no trust [2607:f8b0:4864:20:0:0:0:441 listed in] + [list.dnswl.org] + 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record + 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail + provider [anarsoul[at]gmail.com] + -0.0 SPF_PASS SPF: sender matches SPF record + -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from + envelope-from domain + 0.1 DKIM_SIGNED Message has a DKIM or DK signature, + not necessarily + valid + -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from + author's domain + -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: +List-Unsubscribe: + , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: + , + +Cc: Laurent Pinchart +Sender: "linux-arm-kernel" +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +From: Icenowy Zheng + +Pinebook has an ANX6345 bridge connected to the RGB666 LCD output and +eDP panel input. The bridge is controlled via I2C that's connected to +R_I2C bus. + +Enable all this hardware in device tree. + +Reviewed-by: Laurent Pinchart +Signed-off-by: Icenowy Zheng +Signed-off-by: Vasily Khoruzhick +--- + .../dts/allwinner/sun50i-a64-pinebook.dts | 61 ++++++++++++++++++- + 1 file changed, 60 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +index c06c540e6c08..0033f6a43d98 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +@@ -48,6 +48,18 @@ lid_switch { + }; + }; + ++ panel_edp: panel-edp { ++ compatible = "neweast,wjfh116008a"; ++ backlight = <&backlight>; ++ power-supply = <®_dc1sw>; ++ ++ port { ++ panel_edp_in: endpoint { ++ remote-endpoint = <&anx6345_out_edp>; ++ }; ++ }; ++ }; ++ + reg_vbklt: vbklt { + compatible = "regulator-fixed"; + regulator-name = "vbklt"; +@@ -109,6 +121,10 @@ &dai { + status = "okay"; + }; + ++&de { ++ status = "okay"; ++}; ++ + &ehci0 { + phys = <&usbphy 0>; + phy-names = "usb"; +@@ -119,6 +135,10 @@ &ehci1 { + status = "okay"; + }; + ++&mixer0 { ++ status = "okay"; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; +@@ -177,12 +197,38 @@ &pwm { + status = "okay"; + }; + +-/* The ANX6345 eDP-bridge is on r_i2c */ + &r_i2c { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&r_i2c_pl89_pins>; + status = "okay"; ++ ++ anx6345: anx6345@38 { ++ compatible = "analogix,anx6345"; ++ reg = <0x38>; ++ reset-gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */ ++ dvdd25-supply = <®_dldo2>; ++ dvdd12-supply = <®_fldo1>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ anx6345_in: port@0 { ++ reg = <0>; ++ anx6345_in_tcon0: endpoint { ++ remote-endpoint = <&tcon0_out_anx6345>; ++ }; ++ }; ++ ++ anx6345_out: port@1 { ++ reg = <1>; ++ anx6345_out_edp: endpoint { ++ remote-endpoint = <&panel_edp_in>; ++ }; ++ }; ++ }; ++ }; + }; + + &r_pio { +@@ -357,6 +403,19 @@ &sound { + "MIC2", "Internal Microphone Right"; + }; + ++&tcon0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lcd_rgb666_pins>; ++ ++ status = "okay"; ++}; ++ ++&tcon0_out { ++ tcon0_out_anx6345: endpoint { ++ remote-endpoint = <&anx6345_in_tcon0>; ++ }; ++}; ++ + &uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pb_pins>; diff --git a/Add-support-for-PinePhone-LCD-panel.patch b/Add-support-for-PinePhone-LCD-panel.patch new file mode 100644 index 000000000..a8cfd239a --- /dev/null +++ b/Add-support-for-PinePhone-LCD-panel.patch @@ -0,0 +1,1121 @@ +From patchwork Mon Mar 16 13:35:00 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Icenowy Zheng +X-Patchwork-Id: 11440381 +Return-Path: + +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + [172.30.200.123]) + by pdx-korg-patchwork-2.web.codeaurora.org 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Reding , + Sam Ravnborg , + Rob Herring , Maxime Ripard , + Chen-Yu Tsai , Ondrej Jirman +Subject: [PATCH v2 2/5] dt-bindings: panel: add binding for Xingbangda XBD599 + panel +Date: Mon, 16 Mar 2020 21:35:00 +0800 +Message-Id: <20200316133503.144650-3-icenowy@aosc.io> +In-Reply-To: <20200316133503.144650-1-icenowy@aosc.io> +References: <20200316133503.144650-1-icenowy@aosc.io> +MIME-Version: 1.0 +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aosc.io; s=dkim; + t=1584365841; + h=from:subject:date:message-id:to:cc:mime-version:content-transfer-encoding:in-reply-to:references; + bh=k5dZsJ/q6rrXyDSO2nmOTWqvPhDI4C+8rut25MFD+Sk=; + b=OUlaYo/FyQ18QC+9N7l4EKPc9OYtnaEJ6rHTTmw5vWDG6bE4z3Dc0JryPNmmzGXHubXOqg + vnAixztTiQggjBI+b2WQ1uKGq0JCKJczHDkbgeZsFMqH3T47xzNMNhu6qv5Xdi+haGzyNU + I+cG4IhCqhUW5fahJroACP3Tm5imnHs= +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200316_063726_515303_1C969948 +X-CRM114-Status: GOOD ( 12.18 ) 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+List-Help: +List-Subscribe: + , + +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com, + linux-arm-kernel@lists.infradead.org, Icenowy Zheng +Sender: "linux-arm-kernel" +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI LCD panel. + +Add its device tree binding. + +Signed-off-by: Icenowy Zheng +--- +Changes in v2: +- Example fix. +- Format fix. + + .../display/panel/xingbangda,xbd599.yaml | 50 +++++++++++++++++++ + 1 file changed, 50 insertions(+) + create mode 100644 Documentation/devicetree/bindings/display/panel/xingbangda,xbd599.yaml + +diff --git a/Documentation/devicetree/bindings/display/panel/xingbangda,xbd599.yaml b/Documentation/devicetree/bindings/display/panel/xingbangda,xbd599.yaml +new file mode 100644 +index 000000000000..b27bcf11198f +--- /dev/null ++++ b/Documentation/devicetree/bindings/display/panel/xingbangda,xbd599.yaml +@@ -0,0 +1,50 @@ ++# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/display/panel/xingbangda,xbd599.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: Xingbangda XBD599 5.99in MIPI-DSI LCD panel ++ ++maintainers: ++ - Icenowy Zheng ++ ++allOf: ++ - $ref: panel-common.yaml# ++ ++properties: ++ compatible: ++ const: xingbangda,xbd599 ++ reg: true ++ backlight: true ++ reset-gpios: true ++ vcc-supply: ++ description: regulator that supplies the VCC voltage ++ iovcc-supply: ++ description: regulator that supplies the IOVCC voltage ++ ++required: ++ - compatible ++ - reg ++ - backlight ++ - vcc-supply ++ - iovcc-supply ++ ++additionalProperties: false ++ ++examples: ++ - | ++ dsi { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ panel@0 { ++ compatible = "xingbangda,xbd599"; ++ reg = <0>; ++ backlight = <&backlight>; ++ iovcc-supply = <®_dldo2>; ++ vcc-supply = <®_ldo_io0>; ++ }; ++ }; ++ ++... + +From patchwork Mon Mar 16 13:35:01 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Icenowy Zheng +X-Patchwork-Id: 11440383 +Return-Path: + +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + [172.30.200.123]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 04CA013B1 + for ; + Mon, 16 Mar 2020 13:37:50 +0000 (UTC) +Received: from bombadil.infradead.org (bombadil.infradead.org + [198.137.202.133]) + (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by mail.kernel.org (Postfix) with ESMTPS id D4F1120658 + for ; + Mon, 16 Mar 2020 13:37:49 +0000 (UTC) +Authentication-Results: mail.kernel.org; + dkim=pass (2048-bit key) header.d=lists.infradead.org + header.i=@lists.infradead.org header.b="Jauls22L"; + dkim=fail reason="signature verification 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an SPF Record + 0.1 DKIM_SIGNED Message has a DKIM or DK signature, + not necessarily + valid + -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from + envelope-from domain + -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature + -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from + author's domain +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: +List-Unsubscribe: + , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: + , + +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com, + linux-arm-kernel@lists.infradead.org, Icenowy Zheng +Sender: "linux-arm-kernel" +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI IPS LCD panel made by +Xingbangda, which is used on PinePhone final assembled phones. + +Add support for it. + +Signed-off-by: Icenowy Zheng +--- +Changes in v2: +- Raised copyright info to 2020. +- Sort panel operation functions. +- Sort inclusion. + + drivers/gpu/drm/panel/Kconfig | 9 + + drivers/gpu/drm/panel/Makefile | 1 + + .../gpu/drm/panel/panel-xingbangda-xbd599.c | 366 ++++++++++++++++++ + 3 files changed, 376 insertions(+) + create mode 100644 drivers/gpu/drm/panel/panel-xingbangda-xbd599.c + +diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig +index a1723c1b5fbf..cf0c59015a44 100644 +--- a/drivers/gpu/drm/panel/Kconfig ++++ b/drivers/gpu/drm/panel/Kconfig +@@ -433,6 +433,15 @@ config DRM_PANEL_TRULY_NT35597_WQXGA + Say Y here if you want to enable support for Truly NT35597 WQXGA Dual DSI + Video Mode panel + ++config DRM_PANEL_XINGBANGDA_XBD599 ++ tristate "Xingbangda XBD599 panel" ++ depends on OF ++ depends on DRM_MIPI_DSI ++ depends on BACKLIGHT_CLASS_DEVICE ++ help ++ Say Y here if you want to enable support for the Xingbangda XBD599 ++ MIPI DSI Video Mode panel. ++ + config DRM_PANEL_XINPENG_XPP055C272 + tristate "Xinpeng XPP055C272 panel driver" + depends on OF +diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile +index 96a883cd6630..c84ed5215984 100644 +--- a/drivers/gpu/drm/panel/Makefile ++++ b/drivers/gpu/drm/panel/Makefile +@@ -46,4 +46,5 @@ obj-$(CONFIG_DRM_PANEL_TPO_TD028TTEC1) += panel-tpo-td028ttec1.o + obj-$(CONFIG_DRM_PANEL_TPO_TD043MTEA1) += panel-tpo-td043mtea1.o + obj-$(CONFIG_DRM_PANEL_TPO_TPG110) += panel-tpo-tpg110.o + obj-$(CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA) += panel-truly-nt35597.o ++obj-$(CONFIG_DRM_PANEL_XINGBANGDA_XBD599) += panel-xingbangda-xbd599.o + obj-$(CONFIG_DRM_PANEL_XINPENG_XPP055C272) += panel-xinpeng-xpp055c272.o +diff --git a/drivers/gpu/drm/panel/panel-xingbangda-xbd599.c b/drivers/gpu/drm/panel/panel-xingbangda-xbd599.c +new file mode 100644 +index 000000000000..8d56b6579111 +--- /dev/null ++++ b/drivers/gpu/drm/panel/panel-xingbangda-xbd599.c +@@ -0,0 +1,366 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Xingbangda XBD599 MIPI-DSI panel driver ++ * ++ * Copyright (C) 2019-2020 Icenowy Zheng ++ * ++ * Based on panel-rocktech-jh057n00900.c, which is: ++ * Copyright (C) Purism SPC 2019 ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++/* Manufacturer specific Commands send via DSI */ ++#define ST7703_CMD_ALL_PIXEL_OFF 0x22 ++#define ST7703_CMD_ALL_PIXEL_ON 0x23 ++#define ST7703_CMD_SETDISP 0xB2 ++#define ST7703_CMD_SETRGBIF 0xB3 ++#define ST7703_CMD_SETCYC 0xB4 ++#define ST7703_CMD_SETBGP 0xB5 ++#define ST7703_CMD_SETVCOM 0xB6 ++#define ST7703_CMD_SETOTP 0xB7 ++#define ST7703_CMD_SETPOWER_EXT 0xB8 ++#define ST7703_CMD_SETEXTC 0xB9 ++#define ST7703_CMD_SETMIPI 0xBA ++#define ST7703_CMD_SETVDC 0xBC ++#define ST7703_CMD_SETSCR 0xC0 ++#define ST7703_CMD_SETPOWER 0xC1 ++#define ST7703_CMD_UNK_C6 0xC6 ++#define ST7703_CMD_SETPANEL 0xCC ++#define ST7703_CMD_SETGAMMA 0xE0 ++#define ST7703_CMD_SETEQ 0xE3 ++#define ST7703_CMD_SETGIP1 0xE9 ++#define ST7703_CMD_SETGIP2 0xEA ++ ++static const char * const regulator_names[] = { ++ "iovcc", ++ "vcc", ++}; ++ ++struct xbd599 { ++ struct device *dev; ++ struct drm_panel panel; ++ struct gpio_desc *reset_gpio; ++ struct regulator_bulk_data supplies[ARRAY_SIZE(regulator_names)]; ++ bool prepared; ++}; ++ ++static inline struct xbd599 *panel_to_xbd599(struct drm_panel *panel) ++{ ++ return container_of(panel, struct xbd599, panel); ++} ++ ++#define dsi_dcs_write_seq(dsi, cmd, seq...) do { \ ++ static const u8 d[] = { seq }; \ ++ int ret; \ ++ ret = mipi_dsi_dcs_write(dsi, cmd, d, ARRAY_SIZE(d)); \ ++ if (ret < 0) \ ++ return ret; \ ++ } while (0) ++ ++static int xbd599_init_sequence(struct xbd599 *ctx) ++{ ++ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); ++ struct device *dev = ctx->dev; ++ int ret; ++ ++ /* ++ * Init sequence was supplied by the panel vendor. ++ */ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETEXTC, ++ 0xF1, 0x12, 0x83); ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETMIPI, ++ 0x33, 0x81, 0x05, 0xF9, 0x0E, 0x0E, 0x20, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x25, ++ 0x00, 0x91, 0x0a, 0x00, 0x00, 0x02, 0x4F, 0x11, ++ 0x00, 0x00, 0x37); ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER_EXT, ++ 0x25, 0x22, 0x20, 0x03); ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETRGBIF, ++ 0x10, 0x10, 0x05, 0x05, 0x03, 0xFF, 0x00, 0x00, ++ 0x00, 0x00); ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETSCR, ++ 0x73, 0x73, 0x50, 0x50, 0x00, 0xC0, 0x08, 0x70, ++ 0x00); ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E); ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B); ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETCYC, 0x80); ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETDISP, 0xF0, 0x12, 0xF0); ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETEQ, ++ 0x00, 0x00, 0x0B, 0x0B, 0x10, 0x10, 0x00, 0x00, ++ 0x00, 0x00, 0xFF, 0x00, 0xC0, 0x10); ++ dsi_dcs_write_seq(dsi, 0xC6, 0x01, 0x00, 0xFF, 0xFF, 0x00); ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETPOWER, ++ 0x74, 0x00, 0x32, 0x32, 0x77, 0xF1, 0xFF, 0xFF, ++ 0xCC, 0xCC, 0x77, 0x77); ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETBGP, 0x07, 0x07); ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETVCOM, 0x2C, 0x2C); ++ dsi_dcs_write_seq(dsi, 0xBF, 0x02, 0x11, 0x00); ++ ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1, ++ 0x82, 0x10, 0x06, 0x05, 0xA2, 0x0A, 0xA5, 0x12, ++ 0x31, 0x23, 0x37, 0x83, 0x04, 0xBC, 0x27, 0x38, ++ 0x0C, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0C, 0x00, ++ 0x03, 0x00, 0x00, 0x00, 0x75, 0x75, 0x31, 0x88, ++ 0x88, 0x88, 0x88, 0x88, 0x88, 0x13, 0x88, 0x64, ++ 0x64, 0x20, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, ++ 0x02, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP2, ++ 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x02, 0x46, 0x02, 0x88, ++ 0x88, 0x88, 0x88, 0x88, 0x88, 0x64, 0x88, 0x13, ++ 0x57, 0x13, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, ++ 0x75, 0x88, 0x23, 0x14, 0x00, 0x00, 0x02, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x0A, ++ 0xA5, 0x00, 0x00, 0x00, 0x00); ++ dsi_dcs_write_seq(dsi, ST7703_CMD_SETGAMMA, ++ 0x00, 0x09, 0x0D, 0x23, 0x27, 0x3C, 0x41, 0x35, ++ 0x07, 0x0D, 0x0E, 0x12, 0x13, 0x10, 0x12, 0x12, ++ 0x18, 0x00, 0x09, 0x0D, 0x23, 0x27, 0x3C, 0x41, ++ 0x35, 0x07, 0x0D, 0x0E, 0x12, 0x13, 0x10, 0x12, ++ 0x12, 0x18); ++ msleep(20); ++ ++ ret = mipi_dsi_dcs_exit_sleep_mode(dsi); ++ if (ret < 0) { ++ DRM_DEV_ERROR(dev, "Failed to exit sleep mode\n"); ++ return ret; ++ } ++ msleep(250); ++ ++ ret = mipi_dsi_dcs_set_display_on(dsi); ++ if (ret) ++ return ret; ++ msleep(50); ++ ++ DRM_DEV_DEBUG_DRIVER(dev, "Panel init sequence done\n"); ++ return 0; ++} ++ ++static int xbd599_prepare(struct drm_panel *panel) ++{ ++ struct xbd599 *ctx = panel_to_xbd599(panel); ++ int ret; ++ ++ if (ctx->prepared) ++ return 0; ++ ++ ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies); ++ if (ret) ++ return ret; ++ ++ DRM_DEV_DEBUG_DRIVER(ctx->dev, "Resetting the panel\n"); ++ gpiod_set_value_cansleep(ctx->reset_gpio, 1); ++ usleep_range(20, 40); ++ gpiod_set_value_cansleep(ctx->reset_gpio, 0); ++ msleep(20); ++ ++ ctx->prepared = true; ++ ++ return 0; ++} ++ ++static int xbd599_enable(struct drm_panel *panel) ++{ ++ struct xbd599 *ctx = panel_to_xbd599(panel); ++ int ret; ++ ++ ret = xbd599_init_sequence(ctx); ++ if (ret < 0) { ++ DRM_DEV_ERROR(ctx->dev, "Panel init sequence failed: %d\n", ++ ret); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int xbd599_disable(struct drm_panel *panel) ++{ ++ struct xbd599 *ctx = panel_to_xbd599(panel); ++ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); ++ ++ return mipi_dsi_dcs_set_display_off(dsi); ++} ++ ++static int xbd599_unprepare(struct drm_panel *panel) ++{ ++ struct xbd599 *ctx = panel_to_xbd599(panel); ++ ++ if (!ctx->prepared) ++ return 0; ++ ++ gpiod_set_value_cansleep(ctx->reset_gpio, 1); ++ regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies); ++ ctx->prepared = false; ++ ++ return 0; ++} ++ ++static const struct drm_display_mode xbd599_default_mode = { ++ .hdisplay = 720, ++ .hsync_start = 720 + 40, ++ .hsync_end = 720 + 40 + 40, ++ .htotal = 720 + 40 + 40 + 40, ++ .vdisplay = 1440, ++ .vsync_start = 1440 + 18, ++ .vsync_end = 1440 + 18 + 10, ++ .vtotal = 1440 + 18 + 10 + 17, ++ .vrefresh = 60, ++ .clock = 69000, ++ .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, ++ ++ .width_mm = 68, ++ .height_mm = 136, ++ .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, ++}; ++ ++static int xbd599_get_modes(struct drm_panel *panel, ++ struct drm_connector *connector) ++{ ++ struct xbd599 *ctx = panel_to_xbd599(panel); ++ struct drm_display_mode *mode; ++ ++ mode = drm_mode_duplicate(connector->dev, &xbd599_default_mode); ++ if (!mode) { ++ DRM_DEV_ERROR(ctx->dev, "Failed to add mode\n"); ++ return -ENOMEM; ++ } ++ ++ drm_mode_set_name(mode); ++ ++ mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; ++ connector->display_info.width_mm = mode->width_mm; ++ connector->display_info.height_mm = mode->height_mm; ++ drm_mode_probed_add(connector, mode); ++ ++ return 1; ++} ++ ++static const struct drm_panel_funcs xbd599_drm_funcs = { ++ .prepare = xbd599_prepare, ++ .enable = xbd599_enable, ++ .disable = xbd599_disable, ++ .unprepare = xbd599_unprepare, ++ .get_modes = xbd599_get_modes, ++}; ++ ++static int xbd599_probe(struct mipi_dsi_device *dsi) ++{ ++ struct device *dev = &dsi->dev; ++ struct xbd599 *ctx; ++ int i, ret; ++ ++ ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); ++ if (!ctx) ++ return -ENOMEM; ++ ++ for (i = 0; i < ARRAY_SIZE(ctx->supplies); i++) ++ ctx->supplies[i].supply = regulator_names[i]; ++ ++ ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies), ++ ctx->supplies); ++ if (ret < 0) { ++ DRM_DEV_ERROR(&dsi->dev, "cannot get regulators\n"); ++ return ret; ++ } ++ ++ ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); ++ if (IS_ERR(ctx->reset_gpio)) { ++ DRM_DEV_ERROR(dev, "cannot get reset gpio\n"); ++ return PTR_ERR(ctx->reset_gpio); ++ } ++ ++ mipi_dsi_set_drvdata(dsi, ctx); ++ ++ ctx->dev = dev; ++ ++ dsi->lanes = 4; ++ dsi->format = MIPI_DSI_FMT_RGB888; ++ dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE; ++ ++ drm_panel_init(&ctx->panel, &dsi->dev, &xbd599_drm_funcs, ++ DRM_MODE_CONNECTOR_DSI); ++ ++ ret = drm_panel_of_backlight(&ctx->panel); ++ if (ret) ++ return ret; ++ ++ drm_panel_add(&ctx->panel); ++ ++ ret = mipi_dsi_attach(dsi); ++ if (ret < 0) { ++ DRM_DEV_ERROR(dev, "mipi_dsi_attach failed. Is host ready?\n"); ++ drm_panel_remove(&ctx->panel); ++ return ret; ++ } ++ ++ DRM_DEV_INFO(dev, "%ux%u@%u %ubpp dsi %udl - ready\n", ++ xbd599_default_mode.hdisplay, ++ xbd599_default_mode.vdisplay, ++ xbd599_default_mode.vrefresh, ++ mipi_dsi_pixel_format_to_bpp(dsi->format), dsi->lanes); ++ ++ return 0; ++} ++ ++static void xbd599_shutdown(struct mipi_dsi_device *dsi) ++{ ++ struct xbd599 *ctx = mipi_dsi_get_drvdata(dsi); ++ int ret; ++ ++ ret = drm_panel_unprepare(&ctx->panel); ++ if (ret < 0) ++ DRM_DEV_ERROR(&dsi->dev, "Failed to unprepare panel: %d\n", ++ ret); ++} ++ ++static int xbd599_remove(struct mipi_dsi_device *dsi) ++{ ++ struct xbd599 *ctx = mipi_dsi_get_drvdata(dsi); ++ int ret; ++ ++ xbd599_shutdown(dsi); ++ ++ ret = mipi_dsi_detach(dsi); ++ if (ret < 0) ++ DRM_DEV_ERROR(&dsi->dev, "Failed to detach from DSI host: %d\n", ++ ret); ++ ++ drm_panel_remove(&ctx->panel); ++ ++ return 0; ++} ++ ++static const struct of_device_id xbd599_of_match[] = { ++ { .compatible = "xingbangda,xbd599", }, ++ { /* sentinel */ } ++}; ++MODULE_DEVICE_TABLE(of, xbd599_of_match); ++ ++static struct mipi_dsi_driver xbd599_driver = { ++ .probe = xbd599_probe, ++ .remove = xbd599_remove, ++ .shutdown = xbd599_shutdown, ++ .driver = { ++ .name = "panel-xingbangda-xbd599", ++ .of_match_table = xbd599_of_match, ++ }, ++}; ++module_mipi_dsi_driver(xbd599_driver); ++ ++MODULE_AUTHOR("Icenowy Zheng "); ++MODULE_DESCRIPTION("DRM driver for Xingbangda XBD599 MIPI DSI panel"); ++MODULE_LICENSE("GPL v2"); + +From patchwork Mon Mar 16 13:35:02 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Icenowy Zheng +X-Patchwork-Id: 11440385 +Return-Path: + +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + [172.30.200.123]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3551613B1 + for ; + Mon, 16 Mar 2020 13:38:04 +0000 (UTC) +Received: from bombadil.infradead.org (bombadil.infradead.org + [198.137.202.133]) + (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by mail.kernel.org (Postfix) with ESMTPS id 12F1120658 + for ; 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+ Mon, 16 Mar 2020 06:37:56 -0700 (PDT) +Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: + icenowy@aosc.io) + by hermes.aosc.io (Postfix) with ESMTPSA id 904224CA5E; + Mon, 16 Mar 2020 13:37:47 +0000 (UTC) +From: Icenowy Zheng +To: Thierry Reding , + Sam Ravnborg , + Rob Herring , Maxime Ripard , + Chen-Yu Tsai , Ondrej Jirman +Subject: [PATCH v2 4/5] drm/sun4i: sun6i_mipi_dsi: fix horizontal timing + calculation +Date: Mon, 16 Mar 2020 21:35:02 +0800 +Message-Id: <20200316133503.144650-5-icenowy@aosc.io> +In-Reply-To: <20200316133503.144650-1-icenowy@aosc.io> +References: <20200316133503.144650-1-icenowy@aosc.io> +MIME-Version: 1.0 +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aosc.io; s=dkim; + t=1584365875; + h=from:subject:date:message-id:to:cc:mime-version:content-transfer-encoding:in-reply-to:references; + bh=I9YOqCvznKIa+lsR+6QqRxbL27UJzO8C40dZ4CFdKfA=; + b=quP9cKqYYDD232RMGPzPh7YZaHSfncJHKNCNVORZvb7EzFJyswyLBv7GzoCIM/6KvGiH5Z + xbpDQs4fRsR5P/Cp7hTcnx+MoFGO3XV0SD6R82gTqKwejhi4j3ozUQiiIMTMC0P2NzAMb0 + tDkRk8CMwU/bfv3YHZlXvgGaYrZkMd8= +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200316_063757_563065_ED0BFB74 +X-CRM114-Status: GOOD ( 13.77 ) +X-Spam-Score: -0.2 (/) +X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: + Content analysis details: (-0.2 points) + pts rule name description + ---- ---------------------- + -------------------------------------------------- + -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, + no trust [2001:19f0:8001:184d:5400:2ff:fe7b:e8bd listed in] + [list.dnswl.org] + -0.0 SPF_PASS SPF: sender matches SPF record + 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record + 0.1 DKIM_SIGNED Message has a DKIM or DK signature, + not necessarily + valid + -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from + envelope-from domain + -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature + -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from + author's domain +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: +List-Unsubscribe: + , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: + , + +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com, + linux-arm-kernel@lists.infradead.org, Icenowy Zheng +Sender: "linux-arm-kernel" +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +The max() function call in horizontal timing calculation shouldn't pad a +length already subtracted with overhead to overhead, instead it should +only prevent the set timing to underflow. + +Signed-off-by: Icenowy Zheng +--- +No changes in v2. + + drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c +index 059939789730..5f2313c40328 100644 +--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c ++++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c +@@ -555,7 +555,7 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi, + */ + #define HSA_PACKET_OVERHEAD 10 + hsa = max((unsigned int)HSA_PACKET_OVERHEAD, +- (mode->hsync_end - mode->hsync_start) * Bpp - HSA_PACKET_OVERHEAD); ++ (mode->hsync_end - mode->hsync_start) * Bpp) - HSA_PACKET_OVERHEAD; + + /* + * The backporch is set using a blanking packet (4 +@@ -564,7 +564,7 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi, + */ + #define HBP_PACKET_OVERHEAD 6 + hbp = max((unsigned int)HBP_PACKET_OVERHEAD, +- (mode->htotal - mode->hsync_end) * Bpp - HBP_PACKET_OVERHEAD); ++ (mode->htotal - mode->hsync_end) * Bpp) - HBP_PACKET_OVERHEAD; + + /* + * The frontporch is set using a sync event (4 bytes) +@@ -574,7 +574,7 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi, + */ + #define HFP_PACKET_OVERHEAD 16 + hfp = max((unsigned int)HFP_PACKET_OVERHEAD, +- (mode->hsync_start - mode->hdisplay) * Bpp - HFP_PACKET_OVERHEAD); ++ (mode->hsync_start - mode->hdisplay) * Bpp) - HFP_PACKET_OVERHEAD; + + /* + * The blanking is set using a sync event (4 bytes) +@@ -583,8 +583,8 @@ static void sun6i_dsi_setup_timings(struct sun6i_dsi *dsi, + */ + #define HBLK_PACKET_OVERHEAD 10 + hblk = max((unsigned int)HBLK_PACKET_OVERHEAD, +- (mode->htotal - (mode->hsync_end - mode->hsync_start)) * Bpp - +- HBLK_PACKET_OVERHEAD); ++ (mode->htotal - (mode->hsync_end - mode->hsync_start)) * Bpp) - ++ HBLK_PACKET_OVERHEAD; + + /* + * And I'm not entirely sure what vblk is about. The driver in + +From patchwork Mon Mar 16 13:35:03 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Icenowy Zheng +X-Patchwork-Id: 11440387 +Return-Path: + +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + [172.30.200.123]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7CB09913 + for ; + Mon, 16 Mar 2020 13:38:25 +0000 (UTC) +Received: from bombadil.infradead.org (bombadil.infradead.org + [198.137.202.133]) + (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by mail.kernel.org (Postfix) with ESMTPS id 5A3CF20663 + for ; + Mon, 16 Mar 2020 13:38:25 +0000 (UTC) +Authentication-Results: mail.kernel.org; + dkim=pass (2048-bit key) header.d=lists.infradead.org + header.i=@lists.infradead.org header.b="Dprxe0zU"; + dkim=fail reason="signature verification failed" (1024-bit key) + header.d=aosc.io header.i=@aosc.io header.b="gvv4Mt/p" +DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5A3CF20663 +Authentication-Results: mail.kernel.org; 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+ Mon, 16 Mar 2020 13:38:00 +0000 (UTC) +From: Icenowy Zheng +To: Thierry Reding , + Sam Ravnborg , + Rob Herring , Maxime Ripard , + Chen-Yu Tsai , Ondrej Jirman +Subject: [PATCH v2 5/5] arm64: allwinner: dts: a64: add LCD-related device + nodes for PinePhone +Date: Mon, 16 Mar 2020 21:35:03 +0800 +Message-Id: <20200316133503.144650-6-icenowy@aosc.io> +In-Reply-To: <20200316133503.144650-1-icenowy@aosc.io> +References: <20200316133503.144650-1-icenowy@aosc.io> +MIME-Version: 1.0 +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aosc.io; s=dkim; + t=1584365889; + h=from:subject:date:message-id:to:cc:mime-version:content-transfer-encoding:in-reply-to:references; + bh=vdJB1xaYREfjx8A1fc+UP5D7fCK/5ZczA3DRbH+hq08=; + b=gvv4Mt/ppP1U5dpUHA5n8qTEzN2afgaBkT+M0HHnD2QpiRBO0b4PVtnd5WiFOkLgnHm3Cm + uS+WljMpibhdzup+UJWKXGt9n3IFyflFgVAqemHSAFN5h+VJ1vskMjGMiiu1teCs1nUAhP + zGvHhAcI1EY4J2t587DsvuxH/d6lNFs= +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200316_063811_575168_FBAB174A +X-CRM114-Status: GOOD ( 11.16 ) +X-Spam-Score: -0.2 (/) +X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: + Content analysis details: (-0.2 points) + pts rule name description + ---- ---------------------- + -------------------------------------------------- + -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, + no trust [2001:19f0:8001:184d:5400:2ff:fe7b:e8bd listed in] + [list.dnswl.org] + -0.0 SPF_PASS SPF: sender matches SPF record + 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record + 0.1 DKIM_SIGNED Message has a DKIM or DK signature, + not necessarily + valid + -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from + envelope-from domain + -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature + -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from + author's domain +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: +List-Unsubscribe: + , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: + , + +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com, + linux-arm-kernel@lists.infradead.org, Icenowy Zheng +Sender: "linux-arm-kernel" +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +PinePhone uses PWM backlight and a XBD599 LCD panel over DSI for +display. + +Add its device nodes. + +Signed-off-by: Icenowy Zheng +--- +No changes in v2. + + .../dts/allwinner/sun50i-a64-pinephone.dtsi | 37 +++++++++++++++++++ + 1 file changed, 37 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi +index cefda145c3c9..96d9150423e0 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi +@@ -16,6 +16,15 @@ aliases { + serial0 = &uart0; + }; + ++ backlight: backlight { ++ compatible = "pwm-backlight"; ++ pwms = <&r_pwm 0 50000 PWM_POLARITY_INVERTED>; ++ brightness-levels = <0 16 18 20 22 24 26 29 32 35 38 42 46 51 56 62 68 75 83 91 100>; ++ default-brightness-level = <15>; ++ enable-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */ ++ power-supply = <®_ldo_io0>; ++ }; ++ + chosen { + stdout-path = "serial0:115200n8"; + }; +@@ -84,6 +93,30 @@ &dai { + status = "okay"; + }; + ++&de { ++ status = "okay"; ++}; ++ ++&dphy { ++ status = "okay"; ++}; ++ ++&dsi { ++ vcc-dsi-supply = <®_dldo1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ panel@0 { ++ compatible = "xingbangda,xbd599"; ++ reg = <0>; ++ reset-gpios = <&pio 3 23 GPIO_ACTIVE_LOW>; /* PD23 */ ++ iovcc-supply = <®_dldo2>; ++ vcc-supply = <®_ldo_io0>; ++ backlight = <&backlight>; ++ }; ++}; ++ + &ehci0 { + status = "okay"; + }; +@@ -188,6 +221,10 @@ &r_pio { + */ + }; + ++&r_pwm { ++ status = "okay"; ++}; ++ + &r_rsb { + status = "okay"; + diff --git a/Add-support-for-the-pine64-Pinebook-Pro.patch b/Add-support-for-the-pine64-Pinebook-Pro.patch new file mode 100644 index 000000000..d35ee323b --- /dev/null +++ b/Add-support-for-the-pine64-Pinebook-Pro.patch @@ -0,0 +1,1360 @@ +From patchwork Wed Mar 4 21:30:22 2020 +Content-Type: text/plain; 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Wed, 04 Mar 2020 21:31:09 +0000 +Received: from mail.manjaro.org ([176.9.38.148]) + by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) + id 1j9bbe-0003tI-SU; Wed, 04 Mar 2020 21:31:08 +0000 +Received: from localhost (localhost [127.0.0.1]) + by mail.manjaro.org (Postfix) with ESMTP id 9C0823701125; + Wed, 4 Mar 2020 22:31:05 +0100 (CET) +X-Virus-Scanned: Debian amavisd-new at manjaro.org +Received: from mail.manjaro.org ([127.0.0.1]) + by localhost (manjaro.org [127.0.0.1]) (amavisd-new, port 10024) + with ESMTP id fkagLefmcj9V; Wed, 4 Mar 2020 22:31:03 +0100 (CET) +From: Tobias Schramm +To: Rob Herring , Mark Rutland , + Heiko Stuebner , Andy Yan , + Johan Jonker +Subject: [PATCH v4 1/2] dt-bindings: Add doc for Pine64 Pinebook Pro +Date: Wed, 4 Mar 2020 22:30:22 +0100 +Message-Id: <20200304213023.689983-2-t.schramm@manjaro.org> +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200304_133107_065063_D9B62F20 +X-CRM114-Status: UNSURE ( 6.54 ) +X-CRM114-Notice: Please train this message. +X-Spam-Score: 0.0 (/) +X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: + Content analysis details: (0.0 points) + pts rule name description + ---- ---------------------- + -------------------------------------------------- + -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, + no trust [176.9.38.148 listed in list.dnswl.org] + -0.0 SPF_PASS SPF: sender matches SPF record + 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: +List-Unsubscribe: + , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: + , + +Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, + Emmanuel Vadot , Alexis Ballier , + Tobias Schramm , Rob Herring , + Katsuhiro Suzuki , linux-kernel@vger.kernel.org, + Douglas Anderson , + Kever Yang , + Markus Reichl , + linux-rockchip@lists.infradead.org, Matthias Kaehlcke , + Jagan Teki , Nick Xie , + Vivek Unune +Sender: "linux-arm-kernel" +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +From: Emmanuel Vadot + +Add a compatible for Pine64 Pinebook Pro + +Signed-off-by: Emmanuel Vadot +Reviewed-by: Rob Herring +--- + Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml +index 874b0eaa2a75..17f0ab0b8832 100644 +--- a/Documentation/devicetree/bindings/arm/rockchip.yaml ++++ b/Documentation/devicetree/bindings/arm/rockchip.yaml +@@ -415,6 +415,11 @@ properties: + - const: pine64,rockpro64 + - const: rockchip,rk3399 + ++ - description: Pine64 PinebookPro ++ items: ++ - const: pine64,pinebook-pro ++ - const: rockchip,rk3399 ++ + - description: Radxa Rock + items: + - const: radxa,rock + +From patchwork Wed Mar 4 21:30:23 2020 +Content-Type: text/plain; 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Wed, 04 Mar 2020 21:31:23 +0000 +Received: from mail.manjaro.org ([176.9.38.148]) + by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) + id 1j9bbk-0003vp-EA; Wed, 04 Mar 2020 21:31:15 +0000 +Received: from localhost (localhost [127.0.0.1]) + by mail.manjaro.org (Postfix) with ESMTP id 26030370112C; + Wed, 4 Mar 2020 22:31:11 +0100 (CET) +X-Virus-Scanned: Debian amavisd-new at manjaro.org +Received: from mail.manjaro.org ([127.0.0.1]) + by localhost (manjaro.org [127.0.0.1]) (amavisd-new, port 10024) + with ESMTP id OKG7wH7ZOt7o; Wed, 4 Mar 2020 22:31:07 +0100 (CET) +From: Tobias Schramm +To: Rob Herring , Mark Rutland , + Heiko Stuebner , Andy Yan , + Johan Jonker +Subject: [PATCH v4 2/2] arm64: dts: rockchip: Add initial support for Pinebook + Pro +Date: Wed, 4 Mar 2020 22:30:23 +0100 +Message-Id: <20200304213023.689983-3-t.schramm@manjaro.org> +In-Reply-To: <20200304213023.689983-2-t.schramm@manjaro.org> +References: <20200304213023.689983-2-t.schramm@manjaro.org> +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200304_133112_802914_89F85872 +X-CRM114-Status: GOOD ( 13.85 ) +X-Spam-Score: 0.0 (/) +X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: + Content analysis details: (0.0 points) + pts rule name description + ---- ---------------------- + -------------------------------------------------- + -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, + no trust [176.9.38.148 listed in list.dnswl.org] + -0.0 SPF_PASS SPF: sender matches SPF record + 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: +List-Unsubscribe: + , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: + , + +Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, + Emmanuel Vadot , Alexis Ballier , + Tobias Schramm , + Katsuhiro Suzuki , linux-kernel@vger.kernel.org, + Douglas Anderson , + Kever Yang , + Markus Reichl , + linux-rockchip@lists.infradead.org, Matthias Kaehlcke , + Jagan Teki , Nick Xie , + Vivek Unune +Sender: "linux-arm-kernel" +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +This commit adds initial dt support for the rk3399 based Pinebook Pro. + +Signed-off-by: Tobias Schramm +--- + arch/arm64/boot/dts/rockchip/Makefile | 1 + + .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 1096 +++++++++++++++++ + 2 files changed, 1097 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts + +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index 60d9437096c7..ae7621309e92 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -28,6 +28,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +new file mode 100644 +index 000000000000..8f77ee4f256c +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -0,0 +1,1098 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. ++ * Copyright (c) 2018 Akash Gajjar ++ * Copyright (c) 2020 Tobias Schramm ++ */ ++ ++/dts-v1/; ++#include ++#include ++#include ++#include ++#include ++#include "rk3399.dtsi" ++#include "rk3399-opp.dtsi" ++ ++/ { ++ model = "Pine64 Pinebook Pro"; ++ compatible = "pine64,pinebook-pro", "rockchip,rk3399"; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ backlight: edp-backlight { ++ compatible = "pwm-backlight"; ++ power-supply = <&vcc_12v>; ++ pwms = <&pwm0 0 740740 0>; ++ }; ++ ++ edp_panel: edp-panel { ++ compatible = "boe,nv140fhmn49"; ++ backlight = <&backlight>; ++ enable-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&panel_en_gpio>; ++ power-supply = <&vcc3v3_panel>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ port@0 { ++ reg = <0>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ panel_in_edp: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&edp_out_panel>; ++ }; ++ }; ++ }; ++ }; ++ ++ /* ++ * Use separate nodes for gpio-keys to allow for selective deactivation ++ * of wakeup sources via sysfs without disabling the whole key ++ */ ++ gpio-key-lid { ++ compatible = "gpio-keys"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lidbtn_gpio>; ++ ++ lid { ++ debounce-interval = <20>; ++ gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_LOW>; ++ label = "Lid"; ++ linux,code = ; ++ linux,input-type = ; ++ wakeup-event-action = ; ++ wakeup-source; ++ }; ++ }; ++ ++ gpio-key-power { ++ compatible = "gpio-keys"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwrbtn_gpio>; ++ ++ power { ++ debounce-interval = <20>; ++ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; ++ label = "Power"; ++ linux,code = ; ++ wakeup-source; ++ }; ++ }; ++ ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwrled_gpio &slpled_gpio>; ++ ++ green-led { ++ color = ; ++ default-state = "on"; ++ function = LED_FUNCTION_POWER; ++ gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; ++ label = "green:power"; ++ }; ++ ++ red-led { ++ color = ; ++ default-state = "off"; ++ function = LED_FUNCTION_STANDBY; ++ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; ++ label = "red:standby"; ++ panic-indicator; ++ retain-state-suspended; ++ }; ++ }; ++ ++ /* Power sequence for SDIO WiFi module */ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ clocks = <&rk808 1>; ++ clock-names = "ext_clock"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_enable_h_gpio>; ++ post-power-on-delay-ms = <100>; ++ power-off-delay-us = <500000>; ++ ++ /* WL_REG_ON on module */ ++ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; ++ }; ++ ++ /* Audio components */ ++ es8316-sound { ++ compatible = "simple-audio-card"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hp_det_gpio>; ++ simple-audio-card,name = "rockchip,es8316-codec"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <256>; ++ ++ simple-audio-card,widgets = ++ "Microphone", "Mic Jack", ++ "Headphone", "Headphones", ++ "Speaker", "Speaker"; ++ simple-audio-card,routing = ++ "MIC1", "Mic Jack", ++ "Headphones", "HPOL", ++ "Headphones", "HPOR", ++ "Speaker Amplifier INL", "HPOL", ++ "Speaker Amplifier INR", "HPOR", ++ "Speaker", "Speaker Amplifier OUTL", ++ "Speaker", "Speaker Amplifier OUTR"; ++ ++ simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>; ++ simple-audio-card,aux-devs = <&speaker_amp>; ++ simple-audio-card,pin-switches = "Speaker"; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s1>; ++ }; ++ ++ simple-audio-card,codec { ++ sound-dai = <&es8316>; ++ }; ++ }; ++ ++ speaker_amp: speaker-amplifier { ++ compatible = "simple-audio-amplifier"; ++ enable-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; ++ sound-name-prefix = "Speaker Amplifier"; ++ VCC-supply = <&pa_5v>; ++ }; ++ ++ /* Power tree */ ++ /* Root power source */ ++ vcc_sysin: vcc-sysin { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_sysin"; ++ }; ++ ++ /* Regulators supplied by vcc_sysin */ ++ /* LCD backlight supply */ ++ vcc_12v: vcc-12v { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ regulator-name = "vcc_12v"; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ /* Main 3.3 V supply */ ++ vcc3v3_sys: wifi_bat: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3_sys"; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ /* 5 V USB power supply */ ++ vcc5v0_usb: pa_5v: vcc5v0-usb-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwr_5v_gpio>; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-name = "vcc5v0_usb"; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ /* RK3399 logic supply */ ++ vdd_log: vdd-log { ++ compatible = "pwm-regulator"; ++ pwms = <&pwm2 0 25000 1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1400000>; ++ regulator-name = "vdd_log"; ++ vin-supply = <&vcc_sysin>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ /* Regulators supplied by vcc3v3_sys */ ++ /* 0.9 V supply, always on */ ++ vcc_0v9: vcc-0v9 { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vcc_0v9"; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ /* S3 1.8 V supply, switched by vcc1v8_s3 */ ++ vcca1v8_s3: vcc1v8-s3 { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_s3"; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ /* micro SD card power */ ++ vcc3v0_sd: vcc3v0-sd { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0_pwr_h_gpio>; ++ regulator-always-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-name = "vcc3v0_sd"; ++ vin-supply = <&vcc3v3_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ /* LCD panel power, called VCC3V3_S0 in schematic */ ++ vcc3v3_panel: vcc3v3-panel { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lcdvcc_en_gpio>; ++ regulator-always-on; ++ regulator-enable-ramp-delay = <100000>; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3_panel"; ++ vin-supply = <&vcc3v3_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ /* M.2 adapter power, switched by vcc1v8_s3 */ ++ vcc3v3_ssd: vcc3v3-ssd { ++ compatible = "regulator-fixed"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3_ssd"; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ /* Regulators supplied by vcc5v0_usb */ ++ /* USB 3 port power supply regulator */ ++ vcc5v0_otg: vcc5v0-otg { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_host_en_gpio>; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-name = "vcc5v0_otg"; ++ vin-supply = <&vcc5v0_usb>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ /* Regulators supplied by vcc5v0_usb */ ++ /* Type C port power supply regulator */ ++ vbus_5vout: vbus_typec: vbus-5vout { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_typec0_en_gpio>; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-name = "vbus_5vout"; ++ vin-supply = <&vcc5v0_usb>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ /* Regulators supplied by vcc_1v8 */ ++ /* Primary 0.9 V LDO */ ++ vcca0v9_s3: vcca0v9-s3 { ++ compatible = "regulator-fixed"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-name = "vcc0v9_s3"; ++ vin-supply = <&vcc_1v8>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ mains_charger: dc-charger { ++ compatible = "gpio-charger"; ++ charger-type = "mains"; ++ gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_LOW>; ++ ++ /* Also triggered by USB charger */ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&dc_det_gpio>; ++ }; ++}; ++ ++&cdn_dp { ++ status = "okay"; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&cpu_b1 { ++ cpu-supply = <&vdd_cpu_b>; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_l>; ++}; ++ ++&edp { ++ force-hpd; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&edp_hpd>; ++ status = "okay"; ++ ++ ports { ++ edp_out: port@1 { ++ reg = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ edp_out_panel: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&panel_in_edp>; ++ }; ++ }; ++ }; ++}; ++ ++&emmc_phy { ++ status = "okay"; ++}; ++ ++&gpu { ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ ++&hdmi_sound { ++ status = "okay"; ++}; ++ ++&i2c0 { ++ clock-frequency = <400000>; ++ i2c-scl-falling-time-ns = <4>; ++ i2c-scl-rising-time-ns = <168>; ++ status = "okay"; ++ ++ rk808: pmic@1b { ++ compatible = "rockchip,rk808"; ++ reg = <0x1b>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk808-clkout2"; ++ interrupt-parent = <&gpio3>; ++ interrupts = <10 IRQ_TYPE_LEVEL_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l_gpio>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vcc_sysin>; ++ vcc2-supply = <&vcc_sysin>; ++ vcc3-supply = <&vcc_sysin>; ++ vcc4-supply = <&vcc_sysin>; ++ vcc6-supply = <&vcc_sysin>; ++ vcc7-supply = <&vcc_sysin>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc_sysin>; ++ vcc10-supply = <&vcc_sysin>; ++ vcc11-supply = <&vcc_sysin>; ++ vcc12-supply = <&vcc3v3_sys>; ++ vcc13-supply = <&vcc_sysin>; ++ vcc14-supply = <&vcc_sysin>; ++ ++ regulators { ++ /* rk3399 center logic supply */ ++ vdd_center: DCDC_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-name = "vdd_center"; ++ regulator-ramp-delay = <6001>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_l: DCDC_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-name = "vdd_cpu_l"; ++ regulator-ramp-delay = <6001>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_ddr"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: vcc_wl: DCDC_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ /* not used */ ++ LDO_REG1 { ++ }; ++ ++ /* not used */ ++ LDO_REG2 { ++ }; ++ ++ vcc1v8_pmupll: LDO_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc1v8_pmupll"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc_sdio: LDO_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-name = "vcc_sdio"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcca3v0_codec: LDO_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-name = "vcca3v0_codec"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v5: LDO_REG6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-name = "vcc_1v5"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1500000>; ++ }; ++ }; ++ ++ vcca1v8_codec: LDO_REG7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_codec"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v0: LDO_REG8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-name = "vcc_3v0"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3000000>; ++ }; ++ }; ++ ++ vcc3v3_s3: SWITCH_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_s3"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_s0: SWITCH_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++ ++ vdd_cpu_b: regulator@40 { ++ compatible = "silergy,syr827"; ++ reg = <0x40>; ++ fcs,suspend-voltage-selector = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vsel1_gpio>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-compatible = "fan53555-reg"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-name = "vdd_cpu_b"; ++ regulator-ramp-delay = <1000>; ++ vin-supply = <&vcc_1v8>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: regulator@41 { ++ compatible = "silergy,syr828"; ++ reg = <0x41>; ++ fcs,suspend-voltage-selector = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vsel2_gpio>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-compatible = "fan53555-reg"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1500000>; ++ regulator-name = "vdd_gpu"; ++ regulator-ramp-delay = <1000>; ++ vin-supply = <&vcc_1v8>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ clock-frequency = <100000>; ++ i2c-scl-falling-time-ns = <4>; ++ i2c-scl-rising-time-ns = <168>; ++ status = "okay"; ++ ++ es8316: es8316@11 { ++ compatible = "everest,es8316"; ++ reg = <0x11>; ++ clocks = <&cru SCLK_I2S_8CH_OUT>; ++ clock-names = "mclk"; ++ #sound-dai-cells = <0>; ++ }; ++}; ++ ++&i2c3 { ++ i2c-scl-falling-time-ns = <15>; ++ i2c-scl-rising-time-ns = <450>; ++ status = "okay"; ++}; ++ ++&i2c4 { ++ i2c-scl-falling-time-ns = <20>; ++ i2c-scl-rising-time-ns = <600>; ++ status = "okay"; ++ ++ fusb0: fusb30x@22 { ++ compatible = "fcs,fusb302"; ++ reg = <0x22>; ++ fcs,int_n = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&fusb0_int_gpio>; ++ vbus-supply = <&vbus_typec>; ++ ++ connector { ++ compatible = "usb-c-connector"; ++ data-role = "host"; ++ label = "USB-C"; ++ op-sink-microwatt = <1000000>; ++ power-role = "dual"; ++ sink-pdos = ++ ; ++ source-pdos = ++ ; ++ try-power-role = "sink"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ ++ usbc_hs: endpoint { ++ remote-endpoint = ++ <&u2phy0_typec_hs>; ++ }; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ ++ usbc_ss: endpoint { ++ remote-endpoint = ++ <&tcphy0_typec_ss>; ++ }; ++ }; ++ ++ port@2 { ++ reg = <2>; ++ ++ usbc_dp: endpoint { ++ remote-endpoint = ++ <&tcphy0_typec_dp>; ++ }; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2s1 { ++ #sound-dai-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s_8ch_mclk_gpio>, <&i2s1_2ch_bus>; ++ rockchip,capture-channels = <8>; ++ rockchip,playback-channels = <8>; ++ status = "okay"; ++}; ++ ++&io_domains { ++ audio-supply = <&vcc_3v0>; ++ gpio1830-supply = <&vcc_3v0>; ++ sdmmc-supply = <&vcc_sdio>; ++ status = "okay"; ++}; ++ ++&pcie_phy { ++ status = "okay"; ++}; ++ ++&pcie0 { ++ bus-scan-delay-ms = <1000>; ++ ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; ++ max-link-speed = <2>; ++ num-lanes = <4>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_clkreqn_cpm>; ++ vpcie0v9-supply = <&vcca0v9_s3>; ++ vpcie1v8-supply = <&vcca1v8_s3>; ++ vpcie3v3-supply = <&vcc3v3_ssd>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ buttons { ++ pwrbtn_gpio: pwrbtn-gpio { ++ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ lidbtn_gpio: lidbtn-gpio { ++ rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ dc-charger { ++ dc_det_gpio: dc-det-gpio { ++ rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ es8316 { ++ hp_det_gpio: hp-det-gpio { ++ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ fusb302x { ++ fusb0_int_gpio: fusb0-int-gpio { ++ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ i2s1 { ++ i2s_8ch_mclk_gpio: i2s-8ch-mclk-gpio { ++ rockchip,pins = <4 RK_PA0 1 &pcfg_pull_none>; ++ }; ++ }; ++ ++ lcd-panel { ++ lcdvcc_en_gpio: lcdvcc-en-gpio { ++ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ panel_en_gpio: panel-en-gpio { ++ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ lcd_panel_reset_gpio: lcd-panel-reset-gpio { ++ rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ leds { ++ pwrled_gpio: pwrled_gpio { ++ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ slpled_gpio: slpled_gpio { ++ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l_gpio: pmic-int-l-gpio { ++ rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ vsel1_gpio: vsel1-gpio { ++ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ ++ vsel2_gpio: vsel2-gpio { ++ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ sdcard { ++ sdmmc0_pwr_h_gpio: sdmmc0-pwr-h-gpio { ++ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ }; ++ ++ sdio-pwrseq { ++ wifi_enable_h_gpio: wifi-enable-h-gpio { ++ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb-typec { ++ vcc5v0_typec0_en_gpio: vcc5v0-typec0-en-gpio { ++ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ usb2 { ++ pwr_5v_gpio: pwr-5v-gpio { ++ rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ vcc5v0_host_en_gpio: vcc5v0-host-en-gpio { ++ rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ wireless-bluetooth { ++ bt_wake_gpio: bt-wake-gpio { ++ rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_host_wake_gpio: bt-host-wake-gpio { ++ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_reset_gpio: bt-reset-gpio { ++ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pmu_io_domains { ++ pmu1830-supply = <&vcc_3v0>; ++ status = "okay"; ++}; ++ ++&pwm0 { ++ status = "okay"; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&saradc { ++ vref-supply = <&vcca1v8_s3>; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; ++ disable-wp; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; ++ sd-uhs-sdr104; ++ vmmc-supply = <&vcc3v0_sd>; ++ vqmmc-supply = <&vcc_sdio>; ++ status = "okay"; ++}; ++ ++&sdio0 { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ keep-power-in-suspend; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; ++ sd-uhs-sdr104; ++ status = "okay"; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ mmc-hs200-1_8v; ++ non-removable; ++ status = "okay"; ++}; ++ ++&spi1 { ++ max-freq = <10000000>; ++ status = "okay"; ++ ++ spiflash: flash@0 { ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ m25p,fast-read; ++ spi-max-frequency = <10000000>; ++ }; ++}; ++ ++&tcphy0 { ++ status = "okay"; ++}; ++ ++&tcphy0_dp { ++ port { ++ tcphy0_typec_dp: endpoint { ++ remote-endpoint = <&usbc_dp>; ++ }; ++ }; ++}; ++ ++&tcphy0_usb3 { ++ port { ++ tcphy0_typec_ss: endpoint { ++ remote-endpoint = <&usbc_ss>; ++ }; ++ }; ++}; ++ ++&tcphy1 { ++ status = "okay"; ++}; ++ ++&tsadc { ++ /* tshut mode 0:CRU 1:GPIO */ ++ rockchip,hw-tshut-mode = <1>; ++ /* tshut polarity 0:LOW 1:HIGH */ ++ rockchip,hw-tshut-polarity = <1>; ++ status = "okay"; ++}; ++ ++&u2phy0 { ++ status = "okay"; ++ ++ u2phy0_otg: otg-port { ++ status = "okay"; ++ }; ++ ++ u2phy0_host: host-port { ++ phy-supply = <&vcc5v0_otg>; ++ status = "okay"; ++ }; ++ ++ port { ++ u2phy0_typec_hs: endpoint { ++ remote-endpoint = <&usbc_hs>; ++ }; ++ }; ++}; ++ ++&u2phy1 { ++ status = "okay"; ++ ++ u2phy1_otg: otg-port { ++ status = "okay"; ++ }; ++ ++ u2phy1_host: host-port { ++ phy-supply = <&vcc5v0_otg>; ++ status = "okay"; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; ++ uart-has-rtscts; ++ status = "okay"; ++ ++ bluetooth { ++ compatible = "brcm,bcm4345c5"; ++ clocks = <&rk808 1>; ++ clock-names = "lpo"; ++ device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; ++ host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; ++ max-speed = <1500000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&bt_host_wake_gpio &bt_wake_gpio &bt_reset_gpio>; ++ shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; ++ vbat-supply = <&wifi_bat>; ++ vddio-supply = <&vcc_wl>; ++ }; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&usbdrd3_0 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_0 { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usbdrd3_1 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_1 { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&vopb { ++ status = "okay"; ++}; ++ ++&vopb_mmu { ++ status = "okay"; ++}; ++ ++&vopl { ++ status = "okay"; ++}; ++ ++&vopl_mmu { ++ status = "okay"; ++}; diff --git a/PCI-Add-MCFG-quirks-for-Tegra194-host-controllers.patch b/PCI-Add-MCFG-quirks-for-Tegra194-host-controllers.patch new file mode 100644 index 000000000..6b1090083 --- /dev/null +++ b/PCI-Add-MCFG-quirks-for-Tegra194-host-controllers.patch @@ -0,0 +1,481 @@ +From patchwork Fri Jan 10 19:14:59 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Vidya Sagar +X-Patchwork-Id: 1221384 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=none (no SPF record) + smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; 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a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; + t=1578683697; bh=A9295dTyR+j2yr8EqSviqtTgED4nGyVgvOv0oWR2ueU=; + h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: + In-Reply-To:References:X-NVConfidentiality:MIME-Version: + Content-Type; + b=gf35ja2k7JnAqX+jyF1OxPVsYL5Fk4U+zYrMvTudBnjv0lLjB+7vnkXuO5FnSX28a + o2Mvk9yks+a7NYLZkVfmKCXKbeDNoGPlPSy+g8CAyeAd5u7leSGONsy5awV83vmud7 + /KuuExw/Ko4JihAJdQ57/4EaaohgPWUNbodkmI5Wo0e7qyfgf5PvkAkwe1PdtgEKls + t9tsBwoqjGJn5WWPiQMaUZ8OHdSvPrUDuyKEFPjjr9IpczNvMzJE8SyHDZci42N+s+ + f0iCjfLLhugetglYqrGi5j8eknYwfvMIV+vnkZj0dSmiS70Y1G31dVfgR/s3ueHnRy + jBNjNRTUtey9w== +Sender: linux-pci-owner@vger.kernel.org +Precedence: bulk +List-ID: +X-Mailing-List: linux-pci@vger.kernel.org + +Re-order Tegra194's PCIe aperture mappings to have IO window moved to +64-bit aperture and have the entire 32-bit aperture used for accessing +the configuration space. This makes it to use the entire 32MB of the 32-bit +aperture for ECAM purpose while booting through ACPI. + +Signed-off-by: Vidya Sagar +--- +V3: +* New change in this series + + arch/arm64/boot/dts/nvidia/tegra194.dtsi | 36 ++++++++++++------------ + 1 file changed, 18 insertions(+), 18 deletions(-) + +diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi +index ccac43be12ac..5d790ec5bdef 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi ++++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi +@@ -1247,9 +1247,9 @@ + nvidia,aspm-l0s-entrance-latency-us = <3>; + + bus-range = <0x0 0xff>; +- ranges = <0x81000000 0x0 0x30100000 0x0 0x30100000 0x0 0x00100000 /* downstream I/O (1MB) */ +- 0xc2000000 0x12 0x00000000 0x12 0x00000000 0x0 0x30000000 /* prefetchable memory (768MB) */ +- 0x82000000 0x0 0x40000000 0x12 0x30000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */ ++ ranges = <0xc2000000 0x12 0x00000000 0x12 0x00000000 0x0 0x30000000 /* prefetchable memory (768MB) */ ++ 0x82000000 0x00 0x40000000 0x12 0x30000000 0x0 0x0fff0000 /* non-prefetchable memory (256MB - 64KB) */ ++ 0x81000000 0x00 0x00000000 0x12 0x3fff0000 0x0 0x00010000>; /* downstream I/O (64KB) */ + }; + + pcie@14120000 { +@@ -1292,9 +1292,9 @@ + nvidia,aspm-l0s-entrance-latency-us = <3>; + + bus-range = <0x0 0xff>; +- ranges = <0x81000000 0x0 0x32100000 0x0 0x32100000 0x0 0x00100000 /* downstream I/O (1MB) */ +- 0xc2000000 0x12 0x40000000 0x12 0x40000000 0x0 0x30000000 /* prefetchable memory (768MB) */ +- 0x82000000 0x0 0x40000000 0x12 0x70000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */ ++ ranges = <0xc2000000 0x12 0x40000000 0x12 0x40000000 0x0 0x30000000 /* prefetchable memory (768MB) */ ++ 0x82000000 0x00 0x40000000 0x12 0x70000000 0x0 0x0fff0000 /* non-prefetchable memory (256MB - 64KB) */ ++ 0x81000000 0x00 0x00000000 0x12 0x7fff0000 0x0 0x00010000>; /* downstream I/O (64KB) */ + }; + + pcie@14140000 { +@@ -1337,9 +1337,9 @@ + nvidia,aspm-l0s-entrance-latency-us = <3>; + + bus-range = <0x0 0xff>; +- ranges = <0x81000000 0x0 0x34100000 0x0 0x34100000 0x0 0x00100000 /* downstream I/O (1MB) */ +- 0xc2000000 0x12 0x80000000 0x12 0x80000000 0x0 0x30000000 /* prefetchable memory (768MB) */ +- 0x82000000 0x0 0x40000000 0x12 0xb0000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */ ++ ranges = <0xc2000000 0x12 0x80000000 0x12 0x80000000 0x0 0x30000000 /* prefetchable memory (768MB) */ ++ 0x82000000 0x00 0x40000000 0x12 0xb0000000 0x0 0x0fff0000 /* non-prefetchable memory (256MB - 64KB) */ ++ 0x81000000 0x00 0x00000000 0x12 0xbfff0000 0x0 0x00010000>; /* downstream I/O (64KB) */ + }; + + pcie@14160000 { +@@ -1382,9 +1382,9 @@ + nvidia,aspm-l0s-entrance-latency-us = <3>; + + bus-range = <0x0 0xff>; +- ranges = <0x81000000 0x0 0x36100000 0x0 0x36100000 0x0 0x00100000 /* downstream I/O (1MB) */ +- 0xc2000000 0x14 0x00000000 0x14 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */ +- 0x82000000 0x0 0x40000000 0x17 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */ ++ ranges = <0xc2000000 0x14 0x00000000 0x14 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */ ++ 0x82000000 0x00 0x40000000 0x17 0x40000000 0x0 0xbfff0000 /* non-prefetchable memory (3GB - 64KB) */ ++ 0x81000000 0x00 0x00000000 0x17 0xffff0000 0x0 0x00010000>; /* downstream I/O (64KB) */ + }; + + pcie@14180000 { +@@ -1427,9 +1427,9 @@ + nvidia,aspm-l0s-entrance-latency-us = <3>; + + bus-range = <0x0 0xff>; +- ranges = <0x81000000 0x0 0x38100000 0x0 0x38100000 0x0 0x00100000 /* downstream I/O (1MB) */ +- 0xc2000000 0x18 0x00000000 0x18 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */ +- 0x82000000 0x0 0x40000000 0x1b 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */ ++ ranges = <0xc2000000 0x18 0x00000000 0x18 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */ ++ 0x82000000 0x00 0x40000000 0x1b 0x40000000 0x0 0xbfff0000 /* non-prefetchable memory (3GB - 64KB) */ ++ 0x81000000 0x00 0x00000000 0x1b 0xffff0000 0x0 0x00010000>; /* downstream I/O (64KB) */ + }; + + pcie@141a0000 { +@@ -1476,9 +1476,9 @@ + nvidia,aspm-l0s-entrance-latency-us = <3>; + + bus-range = <0x0 0xff>; +- ranges = <0x81000000 0x0 0x3a100000 0x0 0x3a100000 0x0 0x00100000 /* downstream I/O (1MB) */ +- 0xc2000000 0x1c 0x00000000 0x1c 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */ +- 0x82000000 0x0 0x40000000 0x1f 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */ ++ ranges = <0xc2000000 0x1c 0x00000000 0x1c 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */ ++ 0x82000000 0x00 0x40000000 0x1f 0x40000000 0x0 0xbfff0000 /* non-prefetchable memory (3GB - 64KB) */ ++ 0x81000000 0x00 0x00000000 0x1f 0xffff0000 0x0 0x00010000>; /* downstream I/O (64KB) */ + }; + + sysram@40000000 { + +From patchwork Fri Jan 10 19:15:00 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Vidya Sagar +X-Patchwork-Id: 1221385 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=none (no SPF record) + smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; + helo=vger.kernel.org; + envelope-from=linux-pci-owner@vger.kernel.org; + receiver=) +Authentication-Results: ozlabs.org; + dmarc=pass (p=none dis=none) header.from=nvidia.com +Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; + unprotected) header.d=nvidia.com header.i=@nvidia.com + header.a=rsa-sha256 header.s=n1 header.b=KDh6KAfT; + dkim-atps=neutral +Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) + by ozlabs.org (Postfix) with ESMTP id 47vXkS04dtz9sR0 + for ; + Sat, 11 Jan 2020 06:15:28 +1100 (AEDT) +Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand + id S1728451AbgAJTPX (ORCPT ); + Fri, 10 Jan 2020 14:15:23 -0500 +Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:9177 "EHLO + hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org + with ESMTP id S1727612AbgAJTPX (ORCPT + ); Fri, 10 Jan 2020 14:15:23 -0500 +Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by + hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) + id ; Fri, 10 Jan 2020 11:14:30 -0800 +Received: from hqmail.nvidia.com ([172.20.161.6]) + by hqpgpgate101.nvidia.com (PGP Universal service); + Fri, 10 Jan 2020 11:15:21 -0800 +X-PGP-Universal: processed; + by hqpgpgate101.nvidia.com on Fri, 10 Jan 2020 11:15:21 -0800 +Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL111.nvidia.com + (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Fri, 10 Jan 2020 19:15:21 +0000 +Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL109.nvidia.com + (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Fri, 10 Jan 2020 19:15:21 +0000 +Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL109.nvidia.com + (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Fri, 10 Jan 2020 19:15:20 +0000 +Received: from vidyas-desktop.nvidia.com (Not Verified[10.24.37.48]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id ; Fri, 10 Jan 2020 11:15:20 -0800 +From: Vidya Sagar +To: , , + , , , + , +CC: , , + , , + , , , + +Subject: [PATCH V3 2/2] PCI: Add MCFG quirks for Tegra194 host controllers +Date: Sat, 11 Jan 2020 00:45:00 +0530 +Message-ID: <20200110191500.9538-3-vidyas@nvidia.com> +X-Mailer: git-send-email 2.17.1 +In-Reply-To: <20200110191500.9538-1-vidyas@nvidia.com> +References: <20200106082709.14370-1-vidyas@nvidia.com> + <20200110191500.9538-1-vidyas@nvidia.com> +X-NVConfidentiality: public +MIME-Version: 1.0 +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; + t=1578683671; bh=6wJT/II+S2upRtJe41MS3kcnFzRRB57EIPkoU3txnnc=; + h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: + In-Reply-To:References:X-NVConfidentiality:MIME-Version: + Content-Type; + b=KDh6KAfT+xBJE0n0yRibTvav8qocX0wdxtjjCMNH+VNrt1Gvwgt8htMQvTCpi08Hz + OLS6piubtsXb2Fk+J0rDcwmB2QM0YMKe6eA3DQkuJTPhl6PRxtvXdAYPfl/Z2pvG38 + dq6SIor6Yw4e76ncsvt69w6UXoLZHF7AywICq0jGnmPjWoKDnjID3qKSj5/u7tE+/L + 6hJUZ2QQebXRI17dRdfleyir+rRCS0wMl9tVNiAHplY3Wlxw895LJqvmVRZDVA+kg5 + 8DPKJY2JbazS6P4QcywESwuhDfejJGaJUz+1/6oSiHBMCI5OhfhFZ/lyTf0iZycdTQ + gnZUMkPu2QZOg== +Sender: linux-pci-owner@vger.kernel.org +Precedence: bulk +List-ID: +X-Mailing-List: linux-pci@vger.kernel.org + +The PCIe controller in Tegra194 SoC is not completely ECAM-compliant. +With the current hardware design limitations in place, ECAM can be enabled +only for one controller (C5 controller to be precise) with bus numbers +starting from 160 instead of 0. A different approach is taken to avoid this +abnormal way of enabling ECAM for just one controller but to enable +configuration space access for all the other controllers. In this approach, +ops are added through MCFG quirk mechanism which access the configuration +spaces by dynamically programming iATU (internal AddressTranslation Unit) +to generate respective configuration accesses just like the way it is +done in DesignWare core sub-system. + +Signed-off-by: Vidya Sagar +Reported-by: kbuild test robot +Acked-by: Thierry Reding +--- +V3: +* Removed MCFG address hardcoding in pci_mcfg.c file +* Started using 'dbi_base' for accessing root port's own config space +* and using 'config_base' for accessing config space of downstream hierarchy + +V2: +* Fixed build issues reported by kbuild test bot + + drivers/acpi/pci_mcfg.c | 7 ++ + drivers/pci/controller/dwc/Kconfig | 3 +- + drivers/pci/controller/dwc/Makefile | 2 +- + drivers/pci/controller/dwc/pcie-tegra194.c | 102 +++++++++++++++++++++ + include/linux/pci-ecam.h | 1 + + 5 files changed, 113 insertions(+), 2 deletions(-) + +diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c +index 6b347d9920cc..707181408173 100644 +--- a/drivers/acpi/pci_mcfg.c ++++ b/drivers/acpi/pci_mcfg.c +@@ -116,6 +116,13 @@ static struct mcfg_fixup mcfg_quirks[] = { + THUNDER_ECAM_QUIRK(2, 12), + THUNDER_ECAM_QUIRK(2, 13), + ++ { "NVIDIA", "TEGRA194", 1, 0, MCFG_BUS_ANY, &tegra194_pcie_ops}, ++ { "NVIDIA", "TEGRA194", 1, 1, MCFG_BUS_ANY, &tegra194_pcie_ops}, ++ { "NVIDIA", "TEGRA194", 1, 2, MCFG_BUS_ANY, &tegra194_pcie_ops}, ++ { "NVIDIA", "TEGRA194", 1, 3, MCFG_BUS_ANY, &tegra194_pcie_ops}, ++ { "NVIDIA", "TEGRA194", 1, 4, MCFG_BUS_ANY, &tegra194_pcie_ops}, ++ { "NVIDIA", "TEGRA194", 1, 5, MCFG_BUS_ANY, &tegra194_pcie_ops}, ++ + #define XGENE_V1_ECAM_MCFG(rev, seg) \ + {"APM ", "XGENE ", rev, seg, MCFG_BUS_ANY, \ + &xgene_v1_pcie_ecam_ops } +diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig +index 0830dfcfa43a..f5b9e75aceed 100644 +--- a/drivers/pci/controller/dwc/Kconfig ++++ b/drivers/pci/controller/dwc/Kconfig +@@ -255,7 +255,8 @@ config PCIE_TEGRA194 + select PHY_TEGRA194_P2U + help + Say Y here if you want support for DesignWare core based PCIe host +- controller found in NVIDIA Tegra194 SoC. ++ controller found in NVIDIA Tegra194 SoC. ACPI platforms with Tegra194 ++ don't need to enable this. + + config PCIE_UNIPHIER + bool "Socionext UniPhier PCIe controllers" +diff --git a/drivers/pci/controller/dwc/Makefile b/drivers/pci/controller/dwc/Makefile +index 8a637cfcf6e9..76a6c52b8500 100644 +--- a/drivers/pci/controller/dwc/Makefile ++++ b/drivers/pci/controller/dwc/Makefile +@@ -17,7 +17,6 @@ obj-$(CONFIG_PCIE_INTEL_GW) += pcie-intel-gw.o + obj-$(CONFIG_PCIE_KIRIN) += pcie-kirin.o + obj-$(CONFIG_PCIE_HISI_STB) += pcie-histb.o + obj-$(CONFIG_PCI_MESON) += pci-meson.o +-obj-$(CONFIG_PCIE_TEGRA194) += pcie-tegra194.o + obj-$(CONFIG_PCIE_UNIPHIER) += pcie-uniphier.o + + # The following drivers are for devices that use the generic ACPI +@@ -33,4 +32,5 @@ obj-$(CONFIG_PCIE_UNIPHIER) += pcie-uniphier.o + ifdef CONFIG_PCI + obj-$(CONFIG_ARM64) += pcie-al.o + obj-$(CONFIG_ARM64) += pcie-hisi.o ++obj-$(CONFIG_ARM64) += pcie-tegra194.o + endif +diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c +index cbe95f0ea0ca..660f55caa8be 100644 +--- a/drivers/pci/controller/dwc/pcie-tegra194.c ++++ b/drivers/pci/controller/dwc/pcie-tegra194.c +@@ -21,6 +21,8 @@ + #include + #include + #include ++#include ++#include + #include + #include + #include +@@ -285,6 +287,103 @@ struct tegra_pcie_dw { + struct dentry *debugfs; + }; + ++#if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS) ++struct tegra194_pcie_acpi { ++ void __iomem *config_base; ++ void __iomem *iatu_base; ++ void __iomem *dbi_base; ++}; ++ ++static int tegra194_acpi_init(struct pci_config_window *cfg) ++{ ++ struct device *dev = cfg->parent; ++ struct tegra194_pcie_acpi *pcie; ++ ++ pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); ++ if (!pcie) ++ return -ENOMEM; ++ ++ pcie->config_base = cfg->win; ++ pcie->iatu_base = cfg->win + SZ_256K; ++ pcie->dbi_base = cfg->win + SZ_512K; ++ cfg->priv = pcie; ++ ++ return 0; ++} ++ ++static inline void atu_reg_write(struct tegra194_pcie_acpi *pcie, int index, ++ u32 val, u32 reg) ++{ ++ u32 offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index); ++ ++ writel(val, pcie->iatu_base + offset + reg); ++} ++ ++static void program_outbound_atu(struct tegra194_pcie_acpi *pcie, int index, ++ int type, u64 cpu_addr, u64 pci_addr, u64 size) ++{ ++ atu_reg_write(pcie, index, lower_32_bits(cpu_addr), ++ PCIE_ATU_LOWER_BASE); ++ atu_reg_write(pcie, index, upper_32_bits(cpu_addr), ++ PCIE_ATU_UPPER_BASE); ++ atu_reg_write(pcie, index, lower_32_bits(pci_addr), ++ PCIE_ATU_LOWER_TARGET); ++ atu_reg_write(pcie, index, lower_32_bits(cpu_addr + size - 1), ++ PCIE_ATU_LIMIT); ++ atu_reg_write(pcie, index, upper_32_bits(pci_addr), ++ PCIE_ATU_UPPER_TARGET); ++ atu_reg_write(pcie, index, type, PCIE_ATU_CR1); ++ atu_reg_write(pcie, index, PCIE_ATU_ENABLE, PCIE_ATU_CR2); ++} ++ ++static void __iomem *tegra194_map_bus(struct pci_bus *bus, ++ unsigned int devfn, int where) ++{ ++ struct pci_config_window *cfg = bus->sysdata; ++ struct tegra194_pcie_acpi *pcie = cfg->priv; ++ u32 busdev; ++ int type; ++ ++ if (bus->number < cfg->busr.start || bus->number > cfg->busr.end) ++ return NULL; ++ ++ if (bus->number == cfg->busr.start) { ++ if (PCI_SLOT(devfn) == 0) ++ return pcie->dbi_base + where; ++ else ++ return NULL; ++ } ++ ++ busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) | ++ PCIE_ATU_FUNC(PCI_FUNC(devfn)); ++ ++ if (bus->parent->number == cfg->busr.start) { ++ if (PCI_SLOT(devfn) == 0) ++ type = PCIE_ATU_TYPE_CFG0; ++ else ++ return NULL; ++ } else { ++ type = PCIE_ATU_TYPE_CFG1; ++ } ++ ++ program_outbound_atu(pcie, PCIE_ATU_REGION_INDEX0, type, ++ cfg->res.start, busdev, SZ_256K); ++ return (void __iomem *)(pcie->config_base + where); ++} ++ ++struct pci_ecam_ops tegra194_pcie_ops = { ++ .bus_shift = 20, ++ .init = tegra194_acpi_init, ++ .pci_ops = { ++ .map_bus = tegra194_map_bus, ++ .read = pci_generic_config_read, ++ .write = pci_generic_config_write, ++ } ++}; ++#endif /* defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS) */ ++ ++#ifdef CONFIG_PCIE_TEGRA194 ++ + static inline struct tegra_pcie_dw *to_tegra_pcie(struct dw_pcie *pci) + { + return container_of(pci, struct tegra_pcie_dw, pci); +@@ -1728,3 +1827,6 @@ MODULE_DEVICE_TABLE(of, tegra_pcie_dw_of_match); + MODULE_AUTHOR("Vidya Sagar "); + MODULE_DESCRIPTION("NVIDIA PCIe host controller driver"); + MODULE_LICENSE("GPL v2"); ++ ++#endif /* CONFIG_PCIE_TEGRA194 */ ++ +diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h +index a73164c85e78..6156140dcbb6 100644 +--- a/include/linux/pci-ecam.h ++++ b/include/linux/pci-ecam.h +@@ -57,6 +57,7 @@ extern struct pci_ecam_ops pci_thunder_ecam_ops; /* Cavium ThunderX 1.x */ + extern struct pci_ecam_ops xgene_v1_pcie_ecam_ops; /* APM X-Gene PCIe v1 */ + extern struct pci_ecam_ops xgene_v2_pcie_ecam_ops; /* APM X-Gene PCIe v2.x */ + extern struct pci_ecam_ops al_pcie_ops; /* Amazon Annapurna Labs PCIe */ ++extern struct pci_ecam_ops tegra194_pcie_ops; /* Tegra194 PCIe */ + #endif + + #ifdef CONFIG_PCI_HOST_COMMON diff --git a/Raspberry-Pi-4-PCIe-support.patch b/Raspberry-Pi-4-PCIe-support.patch deleted file mode 100644 index d87f6f512..000000000 --- a/Raspberry-Pi-4-PCIe-support.patch +++ /dev/null @@ -1,1995 +0,0 @@ -From patchwork Mon Dec 16 11:01:07 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 11293801 -Return-Path: - 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linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org - -From: Jim Quinlan - -The DT bindings description of the brcmstb PCIe device is described. -This node can only be used for now on the Raspberry Pi 4. - -Signed-off-by: Jim Quinlan -Co-developed-by: Nicolas Saenz Julienne -Signed-off-by: Nicolas Saenz Julienne -Reviewed-by: Rob Herring -Reviewed-by: Andrew Murray ---- - -Changes since v2: - - Add pci reference schema - - Drop all default properties - - Assume msi-controller and msi-parent are properly defined - - Add num entries on multiple properties - - use unevaluatedProperties - - Update required properties - - Fix license - -Changes since v1: - - Fix commit Subject - - Remove linux,pci-domain - -This was based on Jim's original submission[1], converted to yaml and -adapted to the RPi4 case. - -[1] https://patchwork.kernel.org/patch/10605937/ - - .../bindings/pci/brcm,stb-pcie.yaml | 97 +++++++++++++++++++ - 1 file changed, 97 insertions(+) - create mode 100644 Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml - -diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml -new file mode 100644 -index 000000000000..77d3e81a437b ---- /dev/null -+++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml -@@ -0,0 +1,97 @@ -+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Brcmstb PCIe Host Controller Device Tree Bindings -+ -+maintainers: -+ - Nicolas Saenz Julienne -+ -+allOf: -+ - $ref: /schemas/pci/pci-bus.yaml# -+ -+properties: -+ compatible: -+ const: brcm,bcm2711-pcie # The Raspberry Pi 4 -+ -+ reg: -+ maxItems: 1 -+ -+ interrupts: -+ minItems: 1 -+ maxItems: 2 -+ items: -+ - description: PCIe host controller -+ - description: builtin MSI controller -+ -+ interrupt-names: -+ minItems: 1 -+ maxItems: 2 -+ items: -+ - const: pcie -+ - const: msi -+ -+ ranges: -+ maxItems: 1 -+ -+ dma-ranges: -+ maxItems: 1 -+ -+ clocks: -+ maxItems: 1 -+ -+ clock-names: -+ items: -+ - const: sw_pcie -+ -+ msi-controller: -+ description: Identifies the node as an MSI controller. -+ -+ msi-parent: -+ description: MSI controller the device is capable of using. -+ -+ brcm,enable-ssc: -+ description: Indicates usage of spread-spectrum clocking. -+ type: boolean -+ -+required: -+ - reg -+ - dma-ranges -+ - "#interrupt-cells" -+ - interrupts -+ - interrupt-names -+ - interrupt-map-mask -+ - interrupt-map -+ - msi-controller -+ -+unevaluatedProperties: false -+ -+examples: -+ - | -+ #include -+ #include -+ -+ scb { -+ #address-cells = <2>; -+ #size-cells = <1>; -+ pcie0: pcie@7d500000 { -+ compatible = "brcm,bcm2711-pcie"; -+ reg = <0x0 0x7d500000 0x9310>; -+ device_type = "pci"; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ #interrupt-cells = <1>; -+ interrupts = , -+ ; -+ interrupt-names = "pcie", "msi"; -+ interrupt-map-mask = <0x0 0x0 0x0 0x7>; -+ interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; -+ msi-parent = <&pcie0>; -+ msi-controller; -+ ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>; -+ dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>; -+ brcm,enable-ssc; -+ }; -+ }; - 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by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) - id 1igo8W-0003bB-8M; Mon, 16 Dec 2019 11:02:00 +0000 -Received: from mx2.suse.de ([195.135.220.15] helo=mx1.suse.de) - by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) - id 1igo81-00036I-17; Mon, 16 Dec 2019 11:01:31 +0000 -X-Virus-Scanned: by amavisd-new at test-mx.suse.de -Received: from relay2.suse.de (unknown [195.135.220.254]) - by mx1.suse.de (Postfix) with ESMTP id B9907ACA7; - Mon, 16 Dec 2019 11:01:27 +0000 (UTC) -From: Nicolas Saenz Julienne -To: andrew.murray@arm.com, maz@kernel.org, linux-kernel@vger.kernel.org, - Rob Herring , Mark Rutland , - Nicolas Saenz Julienne -Subject: [PATCH v5 2/6] ARM: dts: bcm2711: Enable PCIe controller -Date: Mon, 16 Dec 2019 12:01:08 +0100 -Message-Id: <20191216110113.30436-3-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.24.0 -In-Reply-To: <20191216110113.30436-1-nsaenzjulienne@suse.de> -References: <20191216110113.30436-1-nsaenzjulienne@suse.de> -MIME-Version: 1.0 -X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 -X-CRM114-CacheID: sfid-20191216_030129_211513_E7F95430 -X-CRM114-Status: GOOD ( 12.22 ) -X-Spam-Score: -2.3 (--) -X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: - 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linux-rpi-kernel@lists.infradead.org -Sender: "linux-arm-kernel" -Errors-To: - linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org - -This enables bcm2711's PCIe bus, which is hardwired to a VIA -Technologies XHCI USB 3.0 controller. - -Signed-off-by: Nicolas Saenz Julienne ---- - -Changes since v4: - - Rebase commit taking into account genet support series - -Changes since v3: - - Remove unwarranted comment - -Changes since v2: - - Remove unused interrupt-map - - correct dma-ranges to it's full size, non power of 2 bus DMA - constraints now supported in linux-next[1] - - add device_type - - rename alias from pcie_0 to pcie0 - -Changes since v1: - - remove linux,pci-domain - -[1] https://lkml.org/lkml/2019/11/21/235 - - arch/arm/boot/dts/bcm2711.dtsi | 31 ++++++++++++++++++++++++++++++- - 1 file changed, 30 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi -index e2f6ffb00aa9..b56388ce1216 100644 ---- a/arch/arm/boot/dts/bcm2711.dtsi -+++ b/arch/arm/boot/dts/bcm2711.dtsi -@@ -331,7 +331,36 @@ scb { - #address-cells = <2>; - #size-cells = <1>; - -- ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>; -+ ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>, -+ <0x6 0x00000000 0x6 0x00000000 0x40000000>; -+ -+ pcie0: pcie@7d500000 { -+ compatible = "brcm,bcm2711-pcie"; -+ reg = <0x0 0x7d500000 0x9310>; -+ device_type = "pci"; -+ #address-cells = <3>; -+ #interrupt-cells = <1>; -+ #size-cells = <2>; -+ interrupts = , -+ ; -+ interrupt-names = "pcie", "msi"; -+ interrupt-map-mask = <0x0 0x0 0x0 0x7>; -+ interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 -+ IRQ_TYPE_LEVEL_HIGH>; -+ msi-controller; -+ msi-parent = <&pcie0>; -+ -+ ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 -+ 0x0 0x04000000>; -+ /* -+ * The wrapper around the PCIe block has a bug -+ * preventing it from accessing beyond the first 3GB of -+ * memory. -+ */ -+ dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 -+ 0x0 0xc0000000>; -+ brcm,enable-ssc; -+ }; - - genet: ethernet@7d580000 { - compatible = "brcm,bcm2711-genet-v5"; - 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by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) - id 1igo8l-0003rT-Fs; Mon, 16 Dec 2019 11:02:15 +0000 -Received: from mx2.suse.de ([195.135.220.15] helo=mx1.suse.de) - by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) - id 1igo82-00036x-Ea; Mon, 16 Dec 2019 11:01:34 +0000 -X-Virus-Scanned: by amavisd-new at test-mx.suse.de -Received: from relay2.suse.de (unknown [195.135.220.254]) - by mx1.suse.de (Postfix) with ESMTP id 25A22ACC6; - Mon, 16 Dec 2019 11:01:29 +0000 (UTC) -From: Nicolas Saenz Julienne -To: andrew.murray@arm.com, maz@kernel.org, linux-kernel@vger.kernel.org, - Lorenzo Pieralisi , - Florian Fainelli , - bcm-kernel-feedback-list@broadcom.com, - Nicolas Saenz Julienne -Subject: [PATCH v5 3/6] PCI: brcmstb: Add Broadcom STB PCIe host controller - driver -Date: Mon, 16 Dec 2019 12:01:09 +0100 -Message-Id: <20191216110113.30436-4-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.24.0 -In-Reply-To: <20191216110113.30436-1-nsaenzjulienne@suse.de> -References: <20191216110113.30436-1-nsaenzjulienne@suse.de> -MIME-Version: 1.0 -X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 -X-CRM114-CacheID: sfid-20191216_030130_800432_3B8FE2E4 -X-CRM114-Status: GOOD ( 18.27 ) -X-Spam-Score: -2.3 (--) -X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: - Content analysis details: (-2.3 points) - pts rule name description - ---- ---------------------- - -------------------------------------------------- - 0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) - [195.135.220.15 listed in wl.mailspike.net] - -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, - medium trust [195.135.220.15 listed in list.dnswl.org] - 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record - -0.0 SPF_PASS SPF: sender matches SPF record - 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders -X-BeenThere: linux-arm-kernel@lists.infradead.org -X-Mailman-Version: 2.1.29 -Precedence: list -List-Id: -List-Unsubscribe: - , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: - , - -Cc: mbrugger@suse.com, linux-pci@vger.kernel.org, phil@raspberrypi.org, - jeremy.linton@arm.com, wahrenst@gmx.net, james.quinlan@broadcom.com, - Bjorn Helgaas , linux-arm-kernel@lists.infradead.org, - linux-rpi-kernel@lists.infradead.org -Sender: "linux-arm-kernel" -Errors-To: - linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org - -From: Jim Quinlan - -This adds a basic driver for Broadcom's STB PCIe controller, for now -aimed at Raspberry Pi 4's SoC, bcm2711. - -Signed-off-by: Jim Quinlan -Co-developed-by: Nicolas Saenz Julienne -Signed-off-by: Nicolas Saenz Julienne -Reviewed-by: Andrew Murray -Reviewed-by: Jeremy Linton ---- - -Changes since v3: - - Update commit message - - rollback roundup_pow_two usage, it'll be updated later down the line - - Remove comment in register definition - -Changes since v2: - - Correct rc_bar2_offset sign - - Invert IRQ clear and masking in setup code - - Use bitfield.h, redo all register ops while keeping the register - names intact - - Remove all SHIFT register definitions - - Get rid of all _RB writes - - Get rid of of_data - - Don't iterate over inexisting dma-ranges - - Add comment regarding dma-ranges validation - - Small cosmetic cleanups - - Fix license mismatch - - Set driver Kconfig tristate - - Didn't add any comment about the controller not being I/O coherent - for now as I wait for Jeremy's reply - -Changes since v1: - - Fix Kconfig - - Remove pci domain check - - Remove all MSI related code - - Remove supend/resume code - - Simplify link state wait routine - - Prefix all functions - - Use of_device_get_match_data() - - Use devm_clk_get_optional() - - Get rid of irq variable - - Use STB all over the driver - - Simplify map_bus() function - - Fix license mismatch - - Remove unused register definitions - - Small cleanups, spell errors - -This is based on Jim's original submission[1] but adapted and tailored -specifically to bcm2711's needs (that's the Raspberry Pi 4). Support for -the rest of the brcmstb family will soon follow once we get support for -multiple dma-ranges in dma/direct. - -[1] https://patchwork.kernel.org/patch/10605959/ - - drivers/pci/controller/Kconfig | 8 + - drivers/pci/controller/Makefile | 1 + - drivers/pci/controller/pcie-brcmstb.c | 748 ++++++++++++++++++++++++++ - 3 files changed, 757 insertions(+) - create mode 100644 drivers/pci/controller/pcie-brcmstb.c - -diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig -index c77069c8ee5d..27504f108ee5 100644 ---- a/drivers/pci/controller/Kconfig -+++ b/drivers/pci/controller/Kconfig -@@ -253,6 +253,14 @@ config VMD - To compile this driver as a module, choose M here: the - module will be called vmd. - -+config PCIE_BRCMSTB -+ tristate "Broadcom Brcmstb PCIe host controller" -+ depends on ARCH_BCM2835 || COMPILE_TEST -+ depends on OF -+ help -+ Say Y here to enable PCIe host controller support for -+ Broadcom STB based SoCs, like the Raspberry Pi 4. -+ - config PCI_HYPERV_INTERFACE - tristate "Hyper-V PCI Interface" - depends on X86 && HYPERV && PCI_MSI && PCI_MSI_IRQ_DOMAIN && X86_64 -diff --git a/drivers/pci/controller/Makefile b/drivers/pci/controller/Makefile -index 3d4f597f15ce..01b2502a5323 100644 ---- a/drivers/pci/controller/Makefile -+++ b/drivers/pci/controller/Makefile -@@ -28,6 +28,7 @@ obj-$(CONFIG_PCIE_MEDIATEK) += pcie-mediatek.o - obj-$(CONFIG_PCIE_MOBIVEIL) += pcie-mobiveil.o - obj-$(CONFIG_PCIE_TANGO_SMP8759) += pcie-tango.o - obj-$(CONFIG_VMD) += vmd.o -+obj-$(CONFIG_PCIE_BRCMSTB) += pcie-brcmstb.o - # pcie-hisi.o quirks are needed even without CONFIG_PCIE_DW - obj-y += dwc/ - -diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c -new file mode 100644 -index 000000000000..dd681164faa0 ---- /dev/null -+++ b/drivers/pci/controller/pcie-brcmstb.c -@@ -0,0 +1,748 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* Copyright (C) 2009 - 2019 Broadcom */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "../pci.h" -+ -+/* BRCM_PCIE_CAP_REGS - Offset for the mandatory capability config regs */ -+#define BRCM_PCIE_CAP_REGS 0x00ac -+ -+/* Broadcom STB PCIe Register Offsets */ -+#define PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1 0x0188 -+#define PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK 0xc -+#define PCIE_RC_CFG_VENDOR_SPCIFIC_REG1_LITTLE_ENDIAN 0x0 -+ -+#define PCIE_RC_CFG_PRIV1_ID_VAL3 0x043c -+#define PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK 0xffffff -+ -+#define PCIE_RC_DL_MDIO_ADDR 0x1100 -+#define PCIE_RC_DL_MDIO_WR_DATA 0x1104 -+#define PCIE_RC_DL_MDIO_RD_DATA 0x1108 -+ -+#define PCIE_MISC_MISC_CTRL 0x4008 -+#define PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_MASK 0x1000 -+#define PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_MASK 0x2000 -+#define PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_MASK 0x300000 -+#define PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_128 0x0 -+#define PCIE_MISC_MISC_CTRL_SCB0_SIZE_MASK 0xf8000000 -+ -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO 0x400c -+#define PCIE_MEM_WIN0_LO(win) \ -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + ((win) * 4) -+ -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI 0x4010 -+#define PCIE_MEM_WIN0_HI(win) \ -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + ((win) * 4) -+ -+#define PCIE_MISC_RC_BAR1_CONFIG_LO 0x402c -+#define PCIE_MISC_RC_BAR1_CONFIG_LO_SIZE_MASK 0x1f -+ -+#define PCIE_MISC_RC_BAR2_CONFIG_LO 0x4034 -+#define PCIE_MISC_RC_BAR2_CONFIG_LO_SIZE_MASK 0x1f -+#define PCIE_MISC_RC_BAR2_CONFIG_HI 0x4038 -+ -+#define PCIE_MISC_RC_BAR3_CONFIG_LO 0x403c -+#define PCIE_MISC_RC_BAR3_CONFIG_LO_SIZE_MASK 0x1f -+ -+#define PCIE_MISC_PCIE_CTRL 0x4064 -+#define PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_MASK 0x1 -+ -+#define PCIE_MISC_PCIE_STATUS 0x4068 -+#define PCIE_MISC_PCIE_STATUS_PCIE_PORT_MASK 0x80 -+#define PCIE_MISC_PCIE_STATUS_PCIE_DL_ACTIVE_MASK 0x20 -+#define PCIE_MISC_PCIE_STATUS_PCIE_PHYLINKUP_MASK 0x10 -+#define PCIE_MISC_PCIE_STATUS_PCIE_LINK_IN_L23_MASK 0x40 -+ -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT 0x4070 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_LIMIT_MASK 0xfff00000 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_BASE_MASK 0xfff0 -+#define PCIE_MEM_WIN0_BASE_LIMIT(win) \ -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT + ((win) * 4) -+ -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI 0x4080 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI_BASE_MASK 0xff -+#define PCIE_MEM_WIN0_BASE_HI(win) \ -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI + ((win) * 8) -+ -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI 0x4084 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK 0xff -+#define PCIE_MEM_WIN0_LIMIT_HI(win) \ -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI + ((win) * 8) -+ -+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG 0x4204 -+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK 0x2 -+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK 0x08000000 -+ -+#define PCIE_MSI_INTR2_STATUS 0x4500 -+#define PCIE_MSI_INTR2_CLR 0x4508 -+#define PCIE_MSI_INTR2_MASK_SET 0x4510 -+#define PCIE_MSI_INTR2_MASK_CLR 0x4514 -+ -+#define PCIE_EXT_CFG_DATA 0x8000 -+ -+#define PCIE_EXT_CFG_INDEX 0x9000 -+#define PCIE_EXT_BUSNUM_SHIFT 20 -+#define PCIE_EXT_SLOT_SHIFT 15 -+#define PCIE_EXT_FUNC_SHIFT 12 -+ -+#define PCIE_RGR1_SW_INIT_1 0x9210 -+#define PCIE_RGR1_SW_INIT_1_PERST_MASK 0x1 -+#define PCIE_RGR1_SW_INIT_1_INIT_MASK 0x2 -+ -+/* PCIe parameters */ -+#define BRCM_NUM_PCIE_OUT_WINS 0x4 -+ -+/* MDIO registers */ -+#define MDIO_PORT0 0x0 -+#define MDIO_DATA_MASK 0x7fffffff -+#define MDIO_PORT_MASK 0xf0000 -+#define MDIO_REGAD_MASK 0xffff -+#define MDIO_CMD_MASK 0xfff00000 -+#define MDIO_CMD_READ 0x1 -+#define MDIO_CMD_WRITE 0x0 -+#define MDIO_DATA_DONE_MASK 0x80000000 -+#define MDIO_RD_DONE(x) (((x) & MDIO_DATA_DONE_MASK) ? 1 : 0) -+#define MDIO_WT_DONE(x) (((x) & MDIO_DATA_DONE_MASK) ? 0 : 1) -+#define SSC_REGS_ADDR 0x1100 -+#define SET_ADDR_OFFSET 0x1f -+#define SSC_CNTL_OFFSET 0x2 -+#define SSC_CNTL_OVRD_EN_MASK 0x8000 -+#define SSC_CNTL_OVRD_VAL_MASK 0x4000 -+#define SSC_STATUS_OFFSET 0x1 -+#define SSC_STATUS_SSC_MASK 0x400 -+#define SSC_STATUS_PLL_LOCK_MASK 0x800 -+ -+/* Internal PCIe Host Controller Information.*/ -+struct brcm_pcie { -+ struct device *dev; -+ void __iomem *base; -+ struct clk *clk; -+ struct pci_bus *root_bus; -+ struct device_node *np; -+ bool ssc; -+ int gen; -+}; -+ -+/* -+ * This is to convert the size of the inbound "BAR" region to the -+ * non-linear values of PCIE_X_MISC_RC_BAR[123]_CONFIG_LO.SIZE -+ */ -+static int brcm_pcie_encode_ibar_size(u64 size) -+{ -+ int log2_in = ilog2(size); -+ -+ if (log2_in >= 12 && log2_in <= 15) -+ /* Covers 4KB to 32KB (inclusive) */ -+ return (log2_in - 12) + 0x1c; -+ else if (log2_in >= 16 && log2_in <= 35) -+ /* Covers 64KB to 32GB, (inclusive) */ -+ return log2_in - 15; -+ /* Something is awry so disable */ -+ return 0; -+} -+ -+static u32 brcm_pcie_mdio_form_pkt(int port, int regad, int cmd) -+{ -+ u32 pkt = 0; -+ -+ pkt |= FIELD_PREP(MDIO_PORT_MASK, port); -+ pkt |= FIELD_PREP(MDIO_REGAD_MASK, regad); -+ pkt |= FIELD_PREP(MDIO_CMD_MASK, cmd); -+ -+ return pkt; -+} -+ -+/* negative return value indicates error */ -+static int brcm_pcie_mdio_read(void __iomem *base, u8 port, u8 regad, u32 *val) -+{ -+ int tries; -+ u32 data; -+ -+ writel(brcm_pcie_mdio_form_pkt(port, regad, MDIO_CMD_READ), -+ base + PCIE_RC_DL_MDIO_ADDR); -+ readl(base + PCIE_RC_DL_MDIO_ADDR); -+ -+ data = readl(base + PCIE_RC_DL_MDIO_RD_DATA); -+ for (tries = 0; !MDIO_RD_DONE(data) && tries < 10; tries++) { -+ udelay(10); -+ data = readl(base + PCIE_RC_DL_MDIO_RD_DATA); -+ } -+ -+ *val = FIELD_GET(MDIO_DATA_MASK, data); -+ return MDIO_RD_DONE(data) ? 0 : -EIO; -+} -+ -+/* negative return value indicates error */ -+static int brcm_pcie_mdio_write(void __iomem *base, u8 port, -+ u8 regad, u16 wrdata) -+{ -+ int tries; -+ u32 data; -+ -+ writel(brcm_pcie_mdio_form_pkt(port, regad, MDIO_CMD_WRITE), -+ base + PCIE_RC_DL_MDIO_ADDR); -+ readl(base + PCIE_RC_DL_MDIO_ADDR); -+ writel(MDIO_DATA_DONE_MASK | wrdata, base + PCIE_RC_DL_MDIO_WR_DATA); -+ -+ data = readl(base + PCIE_RC_DL_MDIO_WR_DATA); -+ for (tries = 0; !MDIO_WT_DONE(data) && tries < 10; tries++) { -+ udelay(10); -+ data = readl(base + PCIE_RC_DL_MDIO_WR_DATA); -+ } -+ -+ return MDIO_WT_DONE(data) ? 0 : -EIO; -+} -+ -+/* -+ * Configures device for Spread Spectrum Clocking (SSC) mode; a negative -+ * return value indicates error. -+ */ -+static int brcm_pcie_set_ssc(struct brcm_pcie *pcie) -+{ -+ int pll, ssc; -+ int ret; -+ u32 tmp; -+ -+ ret = brcm_pcie_mdio_write(pcie->base, MDIO_PORT0, SET_ADDR_OFFSET, -+ SSC_REGS_ADDR); -+ if (ret < 0) -+ return ret; -+ -+ ret = brcm_pcie_mdio_read(pcie->base, MDIO_PORT0, -+ SSC_CNTL_OFFSET, &tmp); -+ if (ret < 0) -+ return ret; -+ -+ u32p_replace_bits(&tmp, 1, SSC_CNTL_OVRD_EN_MASK); -+ u32p_replace_bits(&tmp, 1, SSC_CNTL_OVRD_VAL_MASK); -+ ret = brcm_pcie_mdio_write(pcie->base, MDIO_PORT0, -+ SSC_CNTL_OFFSET, tmp); -+ if (ret < 0) -+ return ret; -+ -+ usleep_range(1000, 2000); -+ ret = brcm_pcie_mdio_read(pcie->base, MDIO_PORT0, -+ SSC_STATUS_OFFSET, &tmp); -+ if (ret < 0) -+ return ret; -+ -+ ssc = FIELD_GET(SSC_STATUS_SSC_MASK, tmp); -+ pll = FIELD_GET(SSC_STATUS_PLL_LOCK_MASK, tmp); -+ -+ return ssc && pll ? 0 : -EIO; -+} -+ -+/* Limits operation to a specific generation (1, 2, or 3) */ -+static void brcm_pcie_set_gen(struct brcm_pcie *pcie, int gen) -+{ -+ u16 lnkctl2 = readw(pcie->base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCTL2); -+ u32 lnkcap = readl(pcie->base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCAP); -+ -+ lnkcap = (lnkcap & ~PCI_EXP_LNKCAP_SLS) | gen; -+ writel(lnkcap, pcie->base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCAP); -+ -+ lnkctl2 = (lnkctl2 & ~0xf) | gen; -+ writew(lnkctl2, pcie->base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCTL2); -+} -+ -+static void brcm_pcie_set_outbound_win(struct brcm_pcie *pcie, -+ unsigned int win, u64 cpu_addr, -+ u64 pcie_addr, u64 size) -+{ -+ u32 cpu_addr_mb_high, limit_addr_mb_high; -+ phys_addr_t cpu_addr_mb, limit_addr_mb; -+ int high_addr_shift; -+ u32 tmp; -+ -+ /* Set the base of the pcie_addr window */ -+ writel(lower_32_bits(pcie_addr), pcie->base + PCIE_MEM_WIN0_LO(win)); -+ writel(upper_32_bits(pcie_addr), pcie->base + PCIE_MEM_WIN0_HI(win)); -+ -+ /* Write the addr base & limit lower bits (in MBs) */ -+ cpu_addr_mb = cpu_addr / SZ_1M; -+ limit_addr_mb = (cpu_addr + size - 1) / SZ_1M; -+ -+ tmp = readl(pcie->base + PCIE_MEM_WIN0_BASE_LIMIT(win)); -+ u32p_replace_bits(&tmp, cpu_addr_mb, -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_BASE_MASK); -+ u32p_replace_bits(&tmp, limit_addr_mb, -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_LIMIT_MASK); -+ writel(tmp, pcie->base + PCIE_MEM_WIN0_BASE_LIMIT(win)); -+ -+ /* Write the cpu & limit addr upper bits */ -+ high_addr_shift = -+ HWEIGHT32(PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_BASE_MASK); -+ -+ cpu_addr_mb_high = cpu_addr_mb >> high_addr_shift; -+ tmp = readl(pcie->base + PCIE_MEM_WIN0_BASE_HI(win)); -+ u32p_replace_bits(&tmp, cpu_addr_mb_high, -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI_BASE_MASK); -+ writel(tmp, pcie->base + PCIE_MEM_WIN0_BASE_HI(win)); -+ -+ limit_addr_mb_high = limit_addr_mb >> high_addr_shift; -+ tmp = readl(pcie->base + PCIE_MEM_WIN0_LIMIT_HI(win)); -+ u32p_replace_bits(&tmp, limit_addr_mb_high, -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK); -+ writel(tmp, pcie->base + PCIE_MEM_WIN0_LIMIT_HI(win)); -+} -+ -+/* The controller is capable of serving in both RC and EP roles */ -+static bool brcm_pcie_rc_mode(struct brcm_pcie *pcie) -+{ -+ void __iomem *base = pcie->base; -+ u32 val = readl(base + PCIE_MISC_PCIE_STATUS); -+ -+ return !!FIELD_GET(PCIE_MISC_PCIE_STATUS_PCIE_PORT_MASK, val); -+} -+ -+static bool brcm_pcie_link_up(struct brcm_pcie *pcie) -+{ -+ u32 val = readl(pcie->base + PCIE_MISC_PCIE_STATUS); -+ u32 dla = FIELD_GET(PCIE_MISC_PCIE_STATUS_PCIE_DL_ACTIVE_MASK, val); -+ u32 plu = FIELD_GET(PCIE_MISC_PCIE_STATUS_PCIE_PHYLINKUP_MASK, val); -+ -+ return dla && plu; -+} -+ -+/* Configuration space read/write support */ -+static inline int brcm_pcie_cfg_index(int busnr, int devfn, int reg) -+{ -+ return ((PCI_SLOT(devfn) & 0x1f) << PCIE_EXT_SLOT_SHIFT) -+ | ((PCI_FUNC(devfn) & 0x07) << PCIE_EXT_FUNC_SHIFT) -+ | (busnr << PCIE_EXT_BUSNUM_SHIFT) -+ | (reg & ~3); -+} -+ -+static void __iomem *brcm_pcie_map_conf(struct pci_bus *bus, unsigned int devfn, -+ int where) -+{ -+ struct brcm_pcie *pcie = bus->sysdata; -+ void __iomem *base = pcie->base; -+ int idx; -+ -+ /* Accesses to the RC go right to the RC registers if slot==0 */ -+ if (pci_is_root_bus(bus)) -+ return PCI_SLOT(devfn) ? NULL : base + where; -+ -+ /* For devices, write to the config space index register */ -+ idx = brcm_pcie_cfg_index(bus->number, devfn, 0); -+ writel(idx, pcie->base + PCIE_EXT_CFG_INDEX); -+ return base + PCIE_EXT_CFG_DATA + where; -+} -+ -+static struct pci_ops brcm_pcie_ops = { -+ .map_bus = brcm_pcie_map_conf, -+ .read = pci_generic_config_read, -+ .write = pci_generic_config_write, -+}; -+ -+static inline void brcm_pcie_bridge_sw_init_set(struct brcm_pcie *pcie, u32 val) -+{ -+ u32 tmp; -+ -+ tmp = readl(pcie->base + PCIE_RGR1_SW_INIT_1); -+ u32p_replace_bits(&tmp, val, PCIE_RGR1_SW_INIT_1_INIT_MASK); -+ writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1); -+} -+ -+static inline void brcm_pcie_perst_set(struct brcm_pcie *pcie, u32 val) -+{ -+ u32 tmp; -+ -+ tmp = readl(pcie->base + PCIE_RGR1_SW_INIT_1); -+ u32p_replace_bits(&tmp, val, PCIE_RGR1_SW_INIT_1_PERST_MASK); -+ writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1); -+} -+ -+static inline int brcm_pcie_get_rc_bar2_size_and_offset(struct brcm_pcie *pcie, -+ u64 *rc_bar2_size, -+ u64 *rc_bar2_offset) -+{ -+ struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie); -+ struct device *dev = pcie->dev; -+ struct resource_entry *entry; -+ -+ entry = resource_list_first_type(&bridge->dma_ranges, IORESOURCE_MEM); -+ if (!entry) -+ return -ENODEV; -+ -+ *rc_bar2_offset = -entry->offset; -+ *rc_bar2_size = 1ULL << fls64(entry->res->end - entry->res->start); -+ -+ /* -+ * We validate the inbound memory view even though we should trust -+ * whatever the device-tree provides. This is because of an HW issue on -+ * early Raspberry Pi 4's revisions (bcm2711). It turns out its -+ * firmware has to dynamically edit dma-ranges due to a bug on the -+ * PCIe controller integration, which prohibits any access above the -+ * lower 3GB of memory. Given this, we decided to keep the dma-ranges -+ * in check, avoiding hard to debug device-tree related issues in the -+ * future: -+ * -+ * The PCIe host controller by design must set the inbound viewport to -+ * be a contiguous arrangement of all of the system's memory. In -+ * addition, its size mut be a power of two. To further complicate -+ * matters, the viewport must start on a pcie-address that is aligned -+ * on a multiple of its size. If a portion of the viewport does not -+ * represent system memory -- e.g. 3GB of memory requires a 4GB -+ * viewport -- we can map the outbound memory in or after 3GB and even -+ * though the viewport will overlap the outbound memory the controller -+ * will know to send outbound memory downstream and everything else -+ * upstream. -+ * -+ * For example: -+ * -+ * - The best-case scenario, memory up to 3GB, is to place the inbound -+ * region in the first 4GB of pcie-space, as some legacy devices can -+ * only address 32bits. We would also like to put the MSI under 4GB -+ * as well, since some devices require a 32bit MSI target address. -+ * -+ * - If the system memory is 4GB or larger we cannot start the inbound -+ * region at location 0 (since we have to allow some space for -+ * outbound memory @ 3GB). So instead it will start at the 1x -+ * multiple of its size -+ */ -+ if (!*rc_bar2_size || *rc_bar2_offset % *rc_bar2_size || -+ (*rc_bar2_offset < SZ_4G && *rc_bar2_offset > SZ_2G)) { -+ dev_err(dev, "Invalid rc_bar2_offset/size: size 0x%llx, off 0x%llx\n", -+ *rc_bar2_size, *rc_bar2_offset); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int brcm_pcie_setup(struct brcm_pcie *pcie) -+{ -+ struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie); -+ u64 rc_bar2_offset, rc_bar2_size; -+ void __iomem *base = pcie->base; -+ struct device *dev = pcie->dev; -+ struct resource_entry *entry; -+ unsigned int scb_size_val; -+ bool ssc_good = false; -+ struct resource *res; -+ int num_out_wins = 0; -+ u16 nlw, cls, lnksta; -+ int i, ret; -+ u32 tmp; -+ -+ /* Reset the bridge */ -+ brcm_pcie_bridge_sw_init_set(pcie, 1); -+ -+ usleep_range(100, 200); -+ -+ /* Take the bridge out of reset */ -+ brcm_pcie_bridge_sw_init_set(pcie, 0); -+ -+ tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); -+ tmp &= ~PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK; -+ writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); -+ /* Wait for SerDes to be stable */ -+ usleep_range(100, 200); -+ -+ /* Set SCB_MAX_BURST_SIZE, CFG_READ_UR_MODE, SCB_ACCESS_EN */ -+ u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_MASK); -+ u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_MASK); -+ u32p_replace_bits(&tmp, PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_128, -+ PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_MASK); -+ writel(tmp, base + PCIE_MISC_MISC_CTRL); -+ -+ ret = brcm_pcie_get_rc_bar2_size_and_offset(pcie, &rc_bar2_size, -+ &rc_bar2_offset); -+ if (ret) -+ return ret; -+ -+ tmp = lower_32_bits(rc_bar2_offset); -+ u32p_replace_bits(&tmp, brcm_pcie_encode_ibar_size(rc_bar2_size), -+ PCIE_MISC_RC_BAR2_CONFIG_LO_SIZE_MASK); -+ writel(tmp, base + PCIE_MISC_RC_BAR2_CONFIG_LO); -+ writel(upper_32_bits(rc_bar2_offset), -+ base + PCIE_MISC_RC_BAR2_CONFIG_HI); -+ -+ scb_size_val = rc_bar2_size ? -+ ilog2(rc_bar2_size) - 15 : 0xf; /* 0xf is 1GB */ -+ tmp = readl(base + PCIE_MISC_MISC_CTRL); -+ u32p_replace_bits(&tmp, scb_size_val, -+ PCIE_MISC_MISC_CTRL_SCB0_SIZE_MASK); -+ writel(tmp, base + PCIE_MISC_MISC_CTRL); -+ -+ /* disable the PCIe->GISB memory window (RC_BAR1) */ -+ tmp = readl(base + PCIE_MISC_RC_BAR1_CONFIG_LO); -+ tmp &= ~PCIE_MISC_RC_BAR1_CONFIG_LO_SIZE_MASK; -+ writel(tmp, base + PCIE_MISC_RC_BAR1_CONFIG_LO); -+ -+ /* disable the PCIe->SCB memory window (RC_BAR3) */ -+ tmp = readl(base + PCIE_MISC_RC_BAR3_CONFIG_LO); -+ tmp &= ~PCIE_MISC_RC_BAR3_CONFIG_LO_SIZE_MASK; -+ writel(tmp, base + PCIE_MISC_RC_BAR3_CONFIG_LO); -+ -+ /* Mask all interrupts since we are not handling any yet */ -+ writel(0xffffffff, pcie->base + PCIE_MSI_INTR2_MASK_SET); -+ -+ /* clear any interrupts we find on boot */ -+ writel(0xffffffff, pcie->base + PCIE_MSI_INTR2_CLR); -+ -+ if (pcie->gen) -+ brcm_pcie_set_gen(pcie, pcie->gen); -+ -+ /* Unassert the fundamental reset */ -+ brcm_pcie_perst_set(pcie, 0); -+ -+ /* -+ * Give the RC/EP time to wake up, before trying to configure RC. -+ * Intermittently check status for link-up, up to a total of 100ms. -+ */ -+ for (i = 0; i < 100 && !brcm_pcie_link_up(pcie); i += 5) -+ msleep(5); -+ -+ if (!brcm_pcie_link_up(pcie)) { -+ dev_err(dev, "link down\n"); -+ return -ENODEV; -+ } -+ -+ if (!brcm_pcie_rc_mode(pcie)) { -+ dev_err(dev, "PCIe misconfigured; is in EP mode\n"); -+ return -EINVAL; -+ } -+ -+ resource_list_for_each_entry(entry, &bridge->windows) { -+ res = entry->res; -+ -+ if (resource_type(res) != IORESOURCE_MEM) -+ continue; -+ -+ if (num_out_wins >= BRCM_NUM_PCIE_OUT_WINS) { -+ dev_err(pcie->dev, "too many outbound wins\n"); -+ return -EINVAL; -+ } -+ -+ brcm_pcie_set_outbound_win(pcie, num_out_wins, res->start, -+ res->start - entry->offset, -+ res->end - res->start + 1); -+ num_out_wins++; -+ } -+ -+ /* -+ * For config space accesses on the RC, show the right class for -+ * a PCIe-PCIe bridge (the default setting is to be EP mode). -+ */ -+ tmp = readl(base + PCIE_RC_CFG_PRIV1_ID_VAL3); -+ u32p_replace_bits(&tmp, 0x060400, -+ PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK); -+ writel(tmp, base + PCIE_RC_CFG_PRIV1_ID_VAL3); -+ -+ if (pcie->ssc) { -+ ret = brcm_pcie_set_ssc(pcie); -+ if (ret == 0) -+ ssc_good = true; -+ else -+ dev_err(dev, "failed attempt to enter ssc mode\n"); -+ } -+ -+ lnksta = readw(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKSTA); -+ cls = FIELD_GET(PCI_EXP_LNKSTA_CLS, lnksta); -+ nlw = FIELD_GET(PCI_EXP_LNKSTA_NLW, lnksta); -+ dev_info(dev, "link up, %s x%u %s\n", -+ PCIE_SPEED2STR(cls + PCI_SPEED_133MHz_PCIX_533), -+ nlw, ssc_good ? "(SSC)" : "(!SSC)"); -+ -+ /* PCIe->SCB endian mode for BAR */ -+ tmp = readl(base + PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1); -+ u32p_replace_bits(&tmp, PCIE_RC_CFG_VENDOR_SPCIFIC_REG1_LITTLE_ENDIAN, -+ PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK); -+ writel(tmp, base + PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1); -+ -+ /* -+ * Refclk from RC should be gated with CLKREQ# input when ASPM L0s,L1 -+ * is enabled => setting the CLKREQ_DEBUG_ENABLE field to 1. -+ */ -+ tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); -+ tmp |= PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK; -+ writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); -+ -+ return 0; -+} -+ -+/* L23 is a low-power PCIe link state */ -+static void brcm_pcie_enter_l23(struct brcm_pcie *pcie) -+{ -+ void __iomem *base = pcie->base; -+ int l23, i; -+ u32 tmp; -+ -+ /* Assert request for L23 */ -+ tmp = readl(base + PCIE_MISC_PCIE_CTRL); -+ u32p_replace_bits(&tmp, 1, PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_MASK); -+ writel(tmp, base + PCIE_MISC_PCIE_CTRL); -+ -+ /* Wait up to 36 msec for L23 */ -+ tmp = readl(base + PCIE_MISC_PCIE_STATUS); -+ l23 = FIELD_GET(PCIE_MISC_PCIE_STATUS_PCIE_LINK_IN_L23_MASK, tmp); -+ for (i = 0; i < 15 && !l23; i++) { -+ usleep_range(2000, 2400); -+ tmp = readl(base + PCIE_MISC_PCIE_STATUS); -+ l23 = FIELD_GET(PCIE_MISC_PCIE_STATUS_PCIE_LINK_IN_L23_MASK, -+ tmp); -+ } -+ -+ if (!l23) -+ dev_err(pcie->dev, "failed to enter low-power link state\n"); -+} -+ -+static void brcm_pcie_turn_off(struct brcm_pcie *pcie) -+{ -+ void __iomem *base = pcie->base; -+ int tmp; -+ -+ if (brcm_pcie_link_up(pcie)) -+ brcm_pcie_enter_l23(pcie); -+ /* Assert fundamental reset */ -+ brcm_pcie_perst_set(pcie, 1); -+ -+ /* Deassert request for L23 in case it was asserted */ -+ tmp = readl(base + PCIE_MISC_PCIE_CTRL); -+ u32p_replace_bits(&tmp, 0, PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_MASK); -+ writel(tmp, base + PCIE_MISC_PCIE_CTRL); -+ -+ /* Turn off SerDes */ -+ tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); -+ u32p_replace_bits(&tmp, 1, PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK); -+ writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); -+ -+ /* Shutdown PCIe bridge */ -+ brcm_pcie_bridge_sw_init_set(pcie, 1); -+} -+ -+static void __brcm_pcie_remove(struct brcm_pcie *pcie) -+{ -+ brcm_pcie_turn_off(pcie); -+ clk_disable_unprepare(pcie->clk); -+ clk_put(pcie->clk); -+} -+ -+static int brcm_pcie_remove(struct platform_device *pdev) -+{ -+ struct brcm_pcie *pcie = platform_get_drvdata(pdev); -+ -+ pci_stop_root_bus(pcie->root_bus); -+ pci_remove_root_bus(pcie->root_bus); -+ __brcm_pcie_remove(pcie); -+ -+ return 0; -+} -+ -+static int brcm_pcie_probe(struct platform_device *pdev) -+{ -+ struct device_node *np = pdev->dev.of_node; -+ struct pci_host_bridge *bridge; -+ struct brcm_pcie *pcie; -+ struct pci_bus *child; -+ struct resource *res; -+ int ret; -+ -+ bridge = devm_pci_alloc_host_bridge(&pdev->dev, sizeof(*pcie)); -+ if (!bridge) -+ return -ENOMEM; -+ -+ pcie = pci_host_bridge_priv(bridge); -+ pcie->dev = &pdev->dev; -+ pcie->np = np; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ pcie->base = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(pcie->base)) -+ return PTR_ERR(pcie->base); -+ -+ pcie->clk = devm_clk_get_optional(&pdev->dev, "sw_pcie"); -+ if (IS_ERR(pcie->clk)) -+ return PTR_ERR(pcie->clk); -+ -+ ret = of_pci_get_max_link_speed(np); -+ pcie->gen = (ret < 0) ? 0 : ret; -+ -+ pcie->ssc = of_property_read_bool(np, "brcm,enable-ssc"); -+ -+ ret = pci_parse_request_of_pci_ranges(pcie->dev, &bridge->windows, -+ &bridge->dma_ranges, NULL); -+ if (ret) -+ return ret; -+ -+ ret = clk_prepare_enable(pcie->clk); -+ if (ret) { -+ dev_err(&pdev->dev, "could not enable clock\n"); -+ return ret; -+ } -+ -+ ret = brcm_pcie_setup(pcie); -+ if (ret) -+ goto fail; -+ -+ bridge->dev.parent = &pdev->dev; -+ bridge->busnr = 0; -+ bridge->ops = &brcm_pcie_ops; -+ bridge->sysdata = pcie; -+ bridge->map_irq = of_irq_parse_and_map_pci; -+ bridge->swizzle_irq = pci_common_swizzle; -+ -+ ret = pci_scan_root_bus_bridge(bridge); -+ if (ret < 0) { -+ dev_err(pcie->dev, "Scanning root bridge failed\n"); -+ goto fail; -+ } -+ -+ pci_assign_unassigned_bus_resources(bridge->bus); -+ list_for_each_entry(child, &bridge->bus->children, node) -+ pcie_bus_configure_settings(child); -+ pci_bus_add_devices(bridge->bus); -+ platform_set_drvdata(pdev, pcie); -+ pcie->root_bus = bridge->bus; -+ -+ return 0; -+fail: -+ __brcm_pcie_remove(pcie); -+ return ret; -+} -+ -+static const struct of_device_id brcm_pcie_match[] = { -+ { .compatible = "brcm,bcm2711-pcie" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, brcm_pcie_match); -+ -+static struct platform_driver brcm_pcie_driver = { -+ .probe = brcm_pcie_probe, -+ .remove = brcm_pcie_remove, -+ .driver = { -+ .name = "brcm-pcie", -+ .of_match_table = brcm_pcie_match, -+ }, -+}; -+module_platform_driver(brcm_pcie_driver); -+ -+MODULE_LICENSE("GPL"); -+MODULE_DESCRIPTION("Broadcom STB PCIe RC driver"); -+MODULE_AUTHOR("Broadcom"); - -From patchwork Mon Dec 16 11:01:10 2019 -Content-Type: text/plain; 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- spf=none - smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org -DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; - d=lists.infradead.org; s=bombadil.20170209; h=Sender: - Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: - List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: - Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: - Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: - List-Owner; bh=iItojdIKeV2oJC/4nHltnSdo0OFytKQEQSG83gc3mIo=; b=L57a4G/zV1L3EX - zFjTyLpmW4uweymZSoPuNKRbbLfHfV8GJzdk0+AIcGY8T/0LDSubyqm52QwbEIKIZF6q1tYQMV01x - dCx/B3rV8B0EcUM/RedeUUqXgMXKYn7pdmzUYR2jRB1NEOucFv6xZA1Ap8ZF1k7A2oACSkf/SBoXA - PKbjs2hB/33AoX7kK98vVxVctzuUBE2CkGB419pPh1eXx3QyybSGYoBsNLsQ1BFfL3YwCV2unHoCx - h4QSzJ7vBkuNHDVCdq/t6NRFs98dk6ooDHlISOhJW6F3bdR36Vx1/+5tC1MBjm/Wy1oZmLGR+MeSo - 0J11yccg2BRitcgEv2gw==; -Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) - by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) - id 1igo8u-00043K-US; Mon, 16 Dec 2019 11:02:24 +0000 -Received: from mx2.suse.de ([195.135.220.15] helo=mx1.suse.de) - by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) - id 1igo83-00037J-Ob; Mon, 16 Dec 2019 11:01:35 +0000 -X-Virus-Scanned: by amavisd-new at test-mx.suse.de -Received: from relay2.suse.de (unknown [195.135.220.254]) - by mx1.suse.de (Postfix) with ESMTP id 502A3AC7D; - Mon, 16 Dec 2019 11:01:30 +0000 (UTC) -From: Nicolas Saenz Julienne -To: andrew.murray@arm.com, maz@kernel.org, linux-kernel@vger.kernel.org, - Lorenzo Pieralisi , - Florian Fainelli , - bcm-kernel-feedback-list@broadcom.com, - Nicolas Saenz Julienne -Subject: [PATCH v5 4/6] PCI: brcmstb: Add MSI support -Date: Mon, 16 Dec 2019 12:01:10 +0100 -Message-Id: <20191216110113.30436-5-nsaenzjulienne@suse.de> -X-Mailer: git-send-email 2.24.0 -In-Reply-To: <20191216110113.30436-1-nsaenzjulienne@suse.de> -References: <20191216110113.30436-1-nsaenzjulienne@suse.de> -MIME-Version: 1.0 -X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 -X-CRM114-CacheID: sfid-20191216_030132_128008_DE7B462C -X-CRM114-Status: GOOD ( 23.12 ) -X-Spam-Score: -2.3 (--) -X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: - Content analysis details: (-2.3 points) - pts rule name description - ---- ---------------------- - -------------------------------------------------- - 0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) - [195.135.220.15 listed in wl.mailspike.net] - -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, - medium trust [195.135.220.15 listed in list.dnswl.org] - 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record - -0.0 SPF_PASS SPF: sender matches SPF record - 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders -X-BeenThere: linux-arm-kernel@lists.infradead.org -X-Mailman-Version: 2.1.29 -Precedence: list -List-Id: -List-Unsubscribe: - , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: - , - -Cc: mbrugger@suse.com, linux-pci@vger.kernel.org, phil@raspberrypi.org, - jeremy.linton@arm.com, wahrenst@gmx.net, james.quinlan@broadcom.com, - Bjorn Helgaas , linux-arm-kernel@lists.infradead.org, - linux-rpi-kernel@lists.infradead.org -Sender: "linux-arm-kernel" -Errors-To: - linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org - -From: Jim Quinlan - -This adds MSI support to the Broadcom STB PCIe host controller. The MSI -controller is physically located within the PCIe block, however, there -is no reason why the MSI controller could not be moved elsewhere in the -future. MSIX is not supported by the HW. - -Since the internal Brcmstb MSI controller is intertwined with the PCIe -controller, it is not its own platform device but rather part of the -PCIe platform device. - -Signed-off-by: Jim Quinlan -Co-developed-by: Nicolas Saenz Julienne -Signed-off-by: Nicolas Saenz Julienne -Reviewed-by: Marc Zyngier -Reviewed-by: Andrew Murray ---- - -Changes since v3 (kept Marc's reviewed by as changes seem small enough): - - Use define to access MSI_DATA_CONFIG_VAL - - Update commit message - -Changes since v2: - - Use standard APIs on register operations - - Get rid of revision code - - Update rules to msi_target_addr selection - - Remove unwarranted MSI_FLAG_PCI_MSIX - - Small cosmetic changes - -Changes since v1: - - Move revision code and some registers to this patch - - Use PCIE_MSI_IRQ_DOMAIN in Kconfig - - Remove redundant register read from ISR - - Fail probe on MSI init error - - Get rid of msi_internal - - Use bitmap family of functions - - Use edge triggered setup - - Add comment regarding MultiMSI - - Simplify compose_msi_msg to avoid reg read - -This is based on Jim's original submission[1] with some slight changes -regarding how pcie->msi_target_addr is decided. - -[1] https://patchwork.kernel.org/patch/10605955/ - - drivers/pci/controller/Kconfig | 1 + - drivers/pci/controller/pcie-brcmstb.c | 261 +++++++++++++++++++++++++- - 2 files changed, 261 insertions(+), 1 deletion(-) - -diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig -index 27504f108ee5..918e283bbff1 100644 ---- a/drivers/pci/controller/Kconfig -+++ b/drivers/pci/controller/Kconfig -@@ -257,6 +257,7 @@ config PCIE_BRCMSTB - tristate "Broadcom Brcmstb PCIe host controller" - depends on ARCH_BCM2835 || COMPILE_TEST - depends on OF -+ depends on PCI_MSI_IRQ_DOMAIN - help - Say Y here to enable PCIe host controller support for - Broadcom STB based SoCs, like the Raspberry Pi 4. -diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c -index dd681164faa0..7ba06a0e1a71 100644 ---- a/drivers/pci/controller/pcie-brcmstb.c -+++ b/drivers/pci/controller/pcie-brcmstb.c -@@ -2,6 +2,7 @@ - /* Copyright (C) 2009 - 2019 Broadcom */ - - #include -+#include - #include - #include - #include -@@ -9,11 +10,13 @@ - #include - #include - #include -+#include - #include - #include - #include - #include - #include -+#include - #include - #include - #include -@@ -67,6 +70,12 @@ - #define PCIE_MISC_RC_BAR3_CONFIG_LO 0x403c - #define PCIE_MISC_RC_BAR3_CONFIG_LO_SIZE_MASK 0x1f - -+#define PCIE_MISC_MSI_BAR_CONFIG_LO 0x4044 -+#define PCIE_MISC_MSI_BAR_CONFIG_HI 0x4048 -+ -+#define PCIE_MISC_MSI_DATA_CONFIG 0x404c -+#define PCIE_MISC_MSI_DATA_CONFIG_VAL 0xffe06540 -+ - #define PCIE_MISC_PCIE_CTRL 0x4064 - #define PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_MASK 0x1 - -@@ -114,6 +123,11 @@ - - /* PCIe parameters */ - #define BRCM_NUM_PCIE_OUT_WINS 0x4 -+#define BRCM_INT_PCI_MSI_NR 32 -+ -+/* MSI target adresses */ -+#define BRCM_MSI_TARGET_ADDR_LT_4GB 0x0fffffffcULL -+#define BRCM_MSI_TARGET_ADDR_GT_4GB 0xffffffffcULL - - /* MDIO registers */ - #define MDIO_PORT0 0x0 -@@ -135,6 +149,19 @@ - #define SSC_STATUS_SSC_MASK 0x400 - #define SSC_STATUS_PLL_LOCK_MASK 0x800 - -+struct brcm_msi { -+ struct device *dev; -+ void __iomem *base; -+ struct device_node *np; -+ struct irq_domain *msi_domain; -+ struct irq_domain *inner_domain; -+ struct mutex lock; /* guards the alloc/free operations */ -+ u64 target_addr; -+ int irq; -+ /* used indicates which MSI interrupts have been alloc'd */ -+ unsigned long used; -+}; -+ - /* Internal PCIe Host Controller Information.*/ - struct brcm_pcie { - struct device *dev; -@@ -144,6 +171,8 @@ struct brcm_pcie { - struct device_node *np; - bool ssc; - int gen; -+ u64 msi_target_addr; -+ struct brcm_msi *msi; - }; - - /* -@@ -309,6 +338,214 @@ static void brcm_pcie_set_outbound_win(struct brcm_pcie *pcie, - writel(tmp, pcie->base + PCIE_MEM_WIN0_LIMIT_HI(win)); - } - -+static struct irq_chip brcm_msi_irq_chip = { -+ .name = "BRCM STB PCIe MSI", -+ .irq_ack = irq_chip_ack_parent, -+ .irq_mask = pci_msi_mask_irq, -+ .irq_unmask = pci_msi_unmask_irq, -+}; -+ -+static struct msi_domain_info brcm_msi_domain_info = { -+ /* Multi MSI is supported by the controller, but not by this driver */ -+ .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS), -+ .chip = &brcm_msi_irq_chip, -+}; -+ -+static void brcm_pcie_msi_isr(struct irq_desc *desc) -+{ -+ struct irq_chip *chip = irq_desc_get_chip(desc); -+ unsigned long status, virq; -+ struct brcm_msi *msi; -+ struct device *dev; -+ u32 bit; -+ -+ chained_irq_enter(chip, desc); -+ msi = irq_desc_get_handler_data(desc); -+ dev = msi->dev; -+ -+ status = readl(msi->base + PCIE_MSI_INTR2_STATUS); -+ for_each_set_bit(bit, &status, BRCM_INT_PCI_MSI_NR) { -+ virq = irq_find_mapping(msi->inner_domain, bit); -+ if (virq) -+ generic_handle_irq(virq); -+ else -+ dev_dbg(dev, "unexpected MSI\n"); -+ } -+ -+ chained_irq_exit(chip, desc); -+} -+ -+static void brcm_msi_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) -+{ -+ struct brcm_msi *msi = irq_data_get_irq_chip_data(data); -+ -+ msg->address_lo = lower_32_bits(msi->target_addr); -+ msg->address_hi = upper_32_bits(msi->target_addr); -+ msg->data = (0xffff & PCIE_MISC_MSI_DATA_CONFIG_VAL) | data->hwirq; -+} -+ -+static int brcm_msi_set_affinity(struct irq_data *irq_data, -+ const struct cpumask *mask, bool force) -+{ -+ return -EINVAL; -+} -+ -+static void brcm_msi_ack_irq(struct irq_data *data) -+{ -+ struct brcm_msi *msi = irq_data_get_irq_chip_data(data); -+ -+ writel(1 << data->hwirq, msi->base + PCIE_MSI_INTR2_CLR); -+} -+ -+ -+static struct irq_chip brcm_msi_bottom_irq_chip = { -+ .name = "BRCM STB MSI", -+ .irq_compose_msi_msg = brcm_msi_compose_msi_msg, -+ .irq_set_affinity = brcm_msi_set_affinity, -+ .irq_ack = brcm_msi_ack_irq, -+}; -+ -+static int brcm_msi_alloc(struct brcm_msi *msi) -+{ -+ int hwirq; -+ -+ mutex_lock(&msi->lock); -+ hwirq = bitmap_find_free_region(&msi->used, BRCM_INT_PCI_MSI_NR, 0); -+ mutex_unlock(&msi->lock); -+ -+ return hwirq; -+} -+ -+static void brcm_msi_free(struct brcm_msi *msi, unsigned long hwirq) -+{ -+ mutex_lock(&msi->lock); -+ bitmap_release_region(&msi->used, hwirq, 0); -+ mutex_unlock(&msi->lock); -+} -+ -+static int brcm_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, -+ unsigned int nr_irqs, void *args) -+{ -+ struct brcm_msi *msi = domain->host_data; -+ int hwirq; -+ -+ hwirq = brcm_msi_alloc(msi); -+ -+ if (hwirq < 0) -+ return hwirq; -+ -+ irq_domain_set_info(domain, virq, (irq_hw_number_t)hwirq, -+ &brcm_msi_bottom_irq_chip, domain->host_data, -+ handle_edge_irq, NULL, NULL); -+ return 0; -+} -+ -+static void brcm_irq_domain_free(struct irq_domain *domain, -+ unsigned int virq, unsigned int nr_irqs) -+{ -+ struct irq_data *d = irq_domain_get_irq_data(domain, virq); -+ struct brcm_msi *msi = irq_data_get_irq_chip_data(d); -+ -+ brcm_msi_free(msi, d->hwirq); -+} -+ -+static const struct irq_domain_ops msi_domain_ops = { -+ .alloc = brcm_irq_domain_alloc, -+ .free = brcm_irq_domain_free, -+}; -+ -+static int brcm_allocate_domains(struct brcm_msi *msi) -+{ -+ struct fwnode_handle *fwnode = of_node_to_fwnode(msi->np); -+ struct device *dev = msi->dev; -+ -+ msi->inner_domain = irq_domain_add_linear(NULL, BRCM_INT_PCI_MSI_NR, -+ &msi_domain_ops, msi); -+ if (!msi->inner_domain) { -+ dev_err(dev, "failed to create IRQ domain\n"); -+ return -ENOMEM; -+ } -+ -+ msi->msi_domain = pci_msi_create_irq_domain(fwnode, -+ &brcm_msi_domain_info, -+ msi->inner_domain); -+ if (!msi->msi_domain) { -+ dev_err(dev, "failed to create MSI domain\n"); -+ irq_domain_remove(msi->inner_domain); -+ return -ENOMEM; -+ } -+ -+ return 0; -+} -+ -+static void brcm_free_domains(struct brcm_msi *msi) -+{ -+ irq_domain_remove(msi->msi_domain); -+ irq_domain_remove(msi->inner_domain); -+} -+ -+static void brcm_msi_remove(struct brcm_pcie *pcie) -+{ -+ struct brcm_msi *msi = pcie->msi; -+ -+ if (!msi) -+ return; -+ irq_set_chained_handler(msi->irq, NULL); -+ irq_set_handler_data(msi->irq, NULL); -+ brcm_free_domains(msi); -+} -+ -+static void brcm_msi_set_regs(struct brcm_msi *msi) -+{ -+ writel(0xffffffff, msi->base + PCIE_MSI_INTR2_MASK_CLR); -+ -+ /* -+ * The 0 bit of PCIE_MISC_MSI_BAR_CONFIG_LO is repurposed to MSI -+ * enable, which we set to 1. -+ */ -+ writel(lower_32_bits(msi->target_addr) | 0x1, -+ msi->base + PCIE_MISC_MSI_BAR_CONFIG_LO); -+ writel(upper_32_bits(msi->target_addr), -+ msi->base + PCIE_MISC_MSI_BAR_CONFIG_HI); -+ -+ writel(PCIE_MISC_MSI_DATA_CONFIG_VAL, -+ msi->base + PCIE_MISC_MSI_DATA_CONFIG); -+} -+ -+static int brcm_pcie_enable_msi(struct brcm_pcie *pcie) -+{ -+ struct brcm_msi *msi; -+ int irq, ret; -+ struct device *dev = pcie->dev; -+ -+ irq = irq_of_parse_and_map(dev->of_node, 1); -+ if (irq <= 0) { -+ dev_err(dev, "cannot map MSI interrupt\n"); -+ return -ENODEV; -+ } -+ -+ msi = devm_kzalloc(dev, sizeof(struct brcm_msi), GFP_KERNEL); -+ if (!msi) -+ return -ENOMEM; -+ -+ msi->dev = dev; -+ msi->base = pcie->base; -+ msi->np = pcie->np; -+ msi->target_addr = pcie->msi_target_addr; -+ msi->irq = irq; -+ -+ ret = brcm_allocate_domains(msi); -+ if (ret) -+ return ret; -+ -+ irq_set_chained_handler_and_data(msi->irq, brcm_pcie_msi_isr, msi); -+ -+ brcm_msi_set_regs(msi); -+ pcie->msi = msi; -+ -+ return 0; -+} -+ - /* The controller is capable of serving in both RC and EP roles */ - static bool brcm_pcie_rc_mode(struct brcm_pcie *pcie) - { -@@ -490,6 +727,18 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie) - PCIE_MISC_MISC_CTRL_SCB0_SIZE_MASK); - writel(tmp, base + PCIE_MISC_MISC_CTRL); - -+ /* -+ * We ideally want the MSI target address to be located in the 32bit -+ * addressable memory area. Some devices might depend on it. This is -+ * possible either when the inbound window is located above the lower -+ * 4GB or when the inbound area is smaller than 4GB (taking into -+ * account the rounding-up we're forced to perform). -+ */ -+ if (rc_bar2_offset >= SZ_4G || (rc_bar2_size + rc_bar2_offset) < SZ_4G) -+ pcie->msi_target_addr = BRCM_MSI_TARGET_ADDR_LT_4GB; -+ else -+ pcie->msi_target_addr = BRCM_MSI_TARGET_ADDR_GT_4GB; -+ - /* disable the PCIe->GISB memory window (RC_BAR1) */ - tmp = readl(base + PCIE_MISC_RC_BAR1_CONFIG_LO); - tmp &= ~PCIE_MISC_RC_BAR1_CONFIG_LO_SIZE_MASK; -@@ -639,6 +888,7 @@ static void brcm_pcie_turn_off(struct brcm_pcie *pcie) - - static void __brcm_pcie_remove(struct brcm_pcie *pcie) - { -+ brcm_msi_remove(pcie); - brcm_pcie_turn_off(pcie); - clk_disable_unprepare(pcie->clk); - clk_put(pcie->clk); -@@ -657,7 +907,7 @@ static int brcm_pcie_remove(struct platform_device *pdev) - - static int brcm_pcie_probe(struct platform_device *pdev) - { -- struct device_node *np = pdev->dev.of_node; -+ struct device_node *np = pdev->dev.of_node, *msi_np; - struct pci_host_bridge *bridge; - struct brcm_pcie *pcie; - struct pci_bus *child; -@@ -701,6 +951,15 @@ static int brcm_pcie_probe(struct platform_device *pdev) - if (ret) - goto fail; - -+ msi_np = of_parse_phandle(pcie->np, "msi-parent", 0); -+ if (pci_msi_enabled() && msi_np == pcie->np) { -+ ret = brcm_pcie_enable_msi(pcie); -+ if (ret) { -+ dev_err(pcie->dev, "probe of internal MSI failed"); -+ goto fail; -+ } -+ } -+ - bridge->dev.parent = &pdev->dev; - bridge->busnr = 0; - bridge->ops = &brcm_pcie_ops; - -From patchwork Mon Dec 16 11:01:12 2019 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Nicolas Saenz Julienne -X-Patchwork-Id: 11293821 -Return-Path: - -Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org - [172.30.200.123]) - by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 224E3930 - for ; - Mon, 16 Dec 2019 11:02:45 +0000 (UTC) -Received: from bombadil.infradead.org (bombadil.infradead.org - [198.137.202.133]) - (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) - (No client certificate requested) - by mail.kernel.org (Postfix) with ESMTPS id F26AB206EC - for ; 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Tue, 24 Mar 2020 18:29:01 +0000 +Received: from mx2.suse.de ([195.135.220.15]) + by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) + id 1jGoHq-00024O-PS; Tue, 24 Mar 2020 18:28:29 +0000 +X-Virus-Scanned: by amavisd-new at test-mx.suse.de +Received: from relay2.suse.de (unknown [195.135.220.254]) + by mx2.suse.de (Postfix) with ESMTP id 4A537ABD1; + Tue, 24 Mar 2020 18:28:22 +0000 (UTC) +From: Nicolas Saenz Julienne +To: linux-kernel@vger.kernel.org, Florian Fainelli , + Ray Jui , Scott Branden , + bcm-kernel-feedback-list@broadcom.com, + Nicolas Saenz Julienne +Subject: [PATCH v6 1/4] soc: bcm2835: Sync xHCI reset firmware property with + downstream +Date: Tue, 24 Mar 2020 19:28:09 +0100 +Message-Id: <20200324182812.20420-2-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.25.1 +In-Reply-To: <20200324182812.20420-1-nsaenzjulienne@suse.de> +References: <20200324182812.20420-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200324_112826_965603_11D899C2 +X-CRM114-Status: GOOD ( 13.71 ) +X-Spam-Score: -2.3 (--) +X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: + Content analysis details: (-2.3 points) + pts rule name description + ---- ---------------------- + -------------------------------------------------- + 0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) + [195.135.220.15 listed in wl.mailspike.net] + -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, + medium trust [195.135.220.15 listed in list.dnswl.org] + -0.0 SPF_PASS SPF: sender matches SPF record + 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record + 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: +List-Unsubscribe: + , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: + , + +Cc: tim.gover@raspberrypi.org, sergei.shtylyov@cogentembedded.com, + gregkh@linuxfoundation.org, linux-usb@vger.kernel.org, + linux-rpi-kernel@lists.infradead.org, linux-pci@vger.kernel.org, + linux-arm-kernel@lists.infradead.org, wahrenst@gmx.net +Sender: "linux-arm-kernel" +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +The property is needed in order to trigger VL805's firmware load. Note +that there is a gap between the property introduced and the previous +one. This is also the case downstream. + +Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Florian Fainelli +--- + include/soc/bcm2835/raspberrypi-firmware.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/include/soc/bcm2835/raspberrypi-firmware.h b/include/soc/bcm2835/raspberrypi-firmware.h +index 7800e12ee042..cc9cdbc66403 100644 +--- a/include/soc/bcm2835/raspberrypi-firmware.h ++++ b/include/soc/bcm2835/raspberrypi-firmware.h +@@ -90,7 +90,7 @@ enum rpi_firmware_property_tag { + RPI_FIRMWARE_SET_PERIPH_REG = 0x00038045, + RPI_FIRMWARE_GET_POE_HAT_VAL = 0x00030049, + RPI_FIRMWARE_SET_POE_HAT_VAL = 0x00030050, +- ++ RPI_FIRMWARE_NOTIFY_XHCI_RESET = 0x00030058, + + /* Dispmanx TAGS */ + RPI_FIRMWARE_FRAMEBUFFER_ALLOCATE = 0x00040001, + +From patchwork Tue Mar 24 18:28:10 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 11456191 +Return-Path: + +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + [172.30.200.123]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C4D571731 + for ; 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bh=kAIknZ2RVw6gB9CaOcG4KQjgkdNyrtcLcfH5XAGtITo=; b=Z5B/3JRWWCVYHI + AsxnYFEFit0NnrRvZDbi0ktp8wUbVrztmKRPQWvfaWSlelJEKdEpJhHItnpicKfR5JhfHFsPt3V3X + i29DtdYSOr/cjW/qeoakzXY0b1ApjrrK3MWjX/k0k9SVqGwkq6KT3T3qok969KInPAe0ERZ9bYkP1 + P2Jj1QT0QtCfcd0PsSjn4riMP09KNZVuviLm2bcg3Cr78qfIq6gDHHoS1nqPzdEt4gG+i/s66lTFY + Dd3vPgItuRBvzgAjWdT4Bvx41u82KONuYDshYftzUZX7pxh76o4PwtPoPt/A4hJT0pZZe9MB6pQlM + JwbBVC2fhM1afv00diOw==; +Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) + by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) + id 1jGoIm-00032a-5v; Tue, 24 Mar 2020 18:29:24 +0000 +Received: from mx2.suse.de ([195.135.220.15]) + by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) + id 1jGoHq-00024W-PL; Tue, 24 Mar 2020 18:28:29 +0000 +X-Virus-Scanned: by amavisd-new at test-mx.suse.de +Received: from relay2.suse.de (unknown [195.135.220.254]) + by mx2.suse.de (Postfix) with ESMTP id 3F0CFABE7; + Tue, 24 Mar 2020 18:28:23 +0000 (UTC) +From: Nicolas Saenz Julienne +To: linux-kernel@vger.kernel.org, + Nicolas Saenz Julienne , + Florian Fainelli , Ray Jui , + Scott Branden , + bcm-kernel-feedback-list@broadcom.com +Subject: [PATCH v6 2/4] firmware: raspberrypi: Introduce vl805 init routine +Date: Tue, 24 Mar 2020 19:28:10 +0100 +Message-Id: <20200324182812.20420-3-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.25.1 +In-Reply-To: <20200324182812.20420-1-nsaenzjulienne@suse.de> +References: <20200324182812.20420-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200324_112827_110873_06144E1C +X-CRM114-Status: GOOD ( 15.67 ) +X-Spam-Score: -2.3 (--) +X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: + Content analysis details: (-2.3 points) + pts rule name description + ---- ---------------------- + -------------------------------------------------- + 0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) + [195.135.220.15 listed in wl.mailspike.net] + -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, + medium trust [195.135.220.15 listed in list.dnswl.org] + -0.0 SPF_PASS SPF: sender matches SPF record + 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record + 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: +List-Unsubscribe: + , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: + , + +Cc: tim.gover@raspberrypi.org, sergei.shtylyov@cogentembedded.com, + gregkh@linuxfoundation.org, linux-usb@vger.kernel.org, + linux-rpi-kernel@lists.infradead.org, linux-pci@vger.kernel.org, + linux-arm-kernel@lists.infradead.org, wahrenst@gmx.net +Sender: "linux-arm-kernel" +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +On the Raspberry Pi 4, after a PCI reset, VL805's firmware may either be +loaded directly from an EEPROM or, if not present, by the SoC's +VideCore. The function informs VideCore that VL805 was just reset, or +requests for a probe defer. + +Based on Tim Gover's downstream implementation. + +Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Florian Fainelli +--- +Changes since v4: + - Inline function definition when RASPBERRYPI_FIRMWARE is not defined + +Changes since v1: + - Move include into .c file and add forward declaration to .h + + drivers/firmware/raspberrypi.c | 38 ++++++++++++++++++++++ + include/soc/bcm2835/raspberrypi-firmware.h | 7 ++++ + 2 files changed, 45 insertions(+) + +diff --git a/drivers/firmware/raspberrypi.c b/drivers/firmware/raspberrypi.c +index da26a584dca0..cbb495aff6a0 100644 +--- a/drivers/firmware/raspberrypi.c ++++ b/drivers/firmware/raspberrypi.c +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + #include + + #define MBOX_MSG(chan, data28) (((data28) & ~0xf) | ((chan) & 0xf)) +@@ -286,6 +287,43 @@ struct rpi_firmware *rpi_firmware_get(struct device_node *firmware_node) + } + EXPORT_SYMBOL_GPL(rpi_firmware_get); + ++/* ++ * On the Raspberry Pi 4, after a PCI reset, VL805's firmware may either be ++ * loaded directly from an EEPROM or, if not present, by the SoC's VideCore. ++ * Inform VideCore that VL805 was just reset, or defer xhci's probe if not yet ++ * joinable trough the mailbox interface. ++ */ ++int rpi_firmware_init_vl805(struct pci_dev *pdev) ++{ ++ struct device_node *fw_np; ++ struct rpi_firmware *fw; ++ u32 dev_addr; ++ int ret; ++ ++ fw_np = of_find_compatible_node(NULL, NULL, ++ "raspberrypi,bcm2835-firmware"); ++ if (!fw_np) ++ return 0; ++ ++ fw = rpi_firmware_get(fw_np); ++ of_node_put(fw_np); ++ if (!fw) ++ return -EPROBE_DEFER; ++ ++ dev_addr = pdev->bus->number << 20 | PCI_SLOT(pdev->devfn) << 15 | ++ PCI_FUNC(pdev->devfn) << 12; ++ ++ ret = rpi_firmware_property(fw, RPI_FIRMWARE_NOTIFY_XHCI_RESET, ++ &dev_addr, sizeof(dev_addr)); ++ if (ret) ++ return ret; ++ ++ dev_dbg(&pdev->dev, "loaded Raspberry Pi's VL805 firmware\n"); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(rpi_firmware_init_vl805); ++ + static const struct of_device_id rpi_firmware_of_match[] = { + { .compatible = "raspberrypi,bcm2835-firmware", }, + {}, +diff --git a/include/soc/bcm2835/raspberrypi-firmware.h b/include/soc/bcm2835/raspberrypi-firmware.h +index cc9cdbc66403..3025aca3c358 100644 +--- a/include/soc/bcm2835/raspberrypi-firmware.h ++++ b/include/soc/bcm2835/raspberrypi-firmware.h +@@ -10,6 +10,7 @@ + #include + + struct rpi_firmware; ++struct pci_dev; + + enum rpi_firmware_property_status { + RPI_FIRMWARE_STATUS_REQUEST = 0, +@@ -141,6 +142,7 @@ int rpi_firmware_property(struct rpi_firmware *fw, + int rpi_firmware_property_list(struct rpi_firmware *fw, + void *data, size_t tag_size); + struct rpi_firmware *rpi_firmware_get(struct device_node *firmware_node); ++int rpi_firmware_init_vl805(struct pci_dev *pdev); + #else + static inline int rpi_firmware_property(struct rpi_firmware *fw, u32 tag, + void *data, size_t len) +@@ -158,6 +160,11 @@ static inline struct rpi_firmware *rpi_firmware_get(struct device_node *firmware + { + return NULL; + } ++ ++static inline int rpi_firmware_init_vl805(struct pci_dev *pdev) ++{ ++ return 0; ++} + #endif + + #endif /* __SOC_RASPBERRY_FIRMWARE_H__ */ + +From patchwork Tue Mar 24 18:28:11 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 11456189 +Return-Path: + +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + [172.30.200.123]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 168CB1667 + for ; + Tue, 24 Mar 2020 18:29:15 +0000 (UTC) +Received: from bombadil.infradead.org (bombadil.infradead.org + [198.137.202.133]) + (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by mail.kernel.org (Postfix) with ESMTPS id EAB942076E + for ; + Tue, 24 Mar 2020 18:29:14 +0000 (UTC) +Authentication-Results: mail.kernel.org; + dkim=pass (2048-bit key) header.d=lists.infradead.org + header.i=@lists.infradead.org header.b="BOwwgdOE" +DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EAB942076E +Authentication-Results: mail.kernel.org; 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+Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) + by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) + id 1jGoIa-0002oW-NS; Tue, 24 Mar 2020 18:29:12 +0000 +Received: from mx2.suse.de ([195.135.220.15]) + by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) + id 1jGoHr-00024Z-2w; Tue, 24 Mar 2020 18:28:29 +0000 +X-Virus-Scanned: by amavisd-new at test-mx.suse.de +Received: from relay2.suse.de (unknown [195.135.220.254]) + by mx2.suse.de (Postfix) with ESMTP id 1A1A0ABF4; + Tue, 24 Mar 2020 18:28:24 +0000 (UTC) +From: Nicolas Saenz Julienne +To: linux-kernel@vger.kernel.org, + Nicolas Saenz Julienne , + Florian Fainelli , + bcm-kernel-feedback-list@broadcom.com, + Lorenzo Pieralisi , + Andrew Murray +Subject: [PATCH v6 3/4] PCI: brcmstb: Wait for Raspberry Pi's firmware when + present +Date: Tue, 24 Mar 2020 19:28:11 +0100 +Message-Id: <20200324182812.20420-4-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.25.1 +In-Reply-To: <20200324182812.20420-1-nsaenzjulienne@suse.de> +References: <20200324182812.20420-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200324_112827_267470_0540B982 +X-CRM114-Status: GOOD ( 12.13 ) +X-Spam-Score: -2.3 (--) +X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: + Content analysis details: (-2.3 points) + pts rule name description + ---- ---------------------- + -------------------------------------------------- + 0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) + [195.135.220.15 listed in wl.mailspike.net] + -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, + medium trust [195.135.220.15 listed in list.dnswl.org] + -0.0 SPF_PASS SPF: sender matches SPF record + 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record + 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: +List-Unsubscribe: + , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: + , + +Cc: tim.gover@raspberrypi.org, sergei.shtylyov@cogentembedded.com, + gregkh@linuxfoundation.org, linux-usb@vger.kernel.org, + linux-rpi-kernel@lists.infradead.org, linux-pci@vger.kernel.org, + Bjorn Helgaas , linux-arm-kernel@lists.infradead.org, + wahrenst@gmx.net +Sender: "linux-arm-kernel" +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +xHCI's PCI fixup, run at the end of pcie-brcmstb's probe, depends on +RPi4's VideoCore firmware interface to be up and running. It's possible +for both initializations to race, so make sure it's available prior to +starting. + +Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Florian Fainelli +--- + drivers/pci/controller/pcie-brcmstb.c | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c +index 3a10e678c7f4..a3d3070a5832 100644 +--- a/drivers/pci/controller/pcie-brcmstb.c ++++ b/drivers/pci/controller/pcie-brcmstb.c +@@ -28,6 +28,8 @@ + #include + #include + ++#include ++ + #include "../pci.h" + + /* BRCM_PCIE_CAP_REGS - Offset for the mandatory capability config regs */ +@@ -917,11 +919,24 @@ static int brcm_pcie_probe(struct platform_device *pdev) + { + struct device_node *np = pdev->dev.of_node, *msi_np; + struct pci_host_bridge *bridge; ++ struct device_node *fw_np; + struct brcm_pcie *pcie; + struct pci_bus *child; + struct resource *res; + int ret; + ++ /* ++ * We have to wait for the Raspberry Pi's firmware interface to be up ++ * as some PCI fixups depend on it. ++ */ ++ fw_np = of_find_compatible_node(NULL, NULL, ++ "raspberrypi,bcm2835-firmware"); ++ if (fw_np && !rpi_firmware_get(fw_np)) { ++ of_node_put(fw_np); ++ return -EPROBE_DEFER; ++ } ++ of_node_put(fw_np); ++ + bridge = devm_pci_alloc_host_bridge(&pdev->dev, sizeof(*pcie)); + if (!bridge) + return -ENOMEM; + +From patchwork Tue Mar 24 18:28:12 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 11456185 +Return-Path: + +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + [172.30.200.123]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AD453174A + for ; + Tue, 24 Mar 2020 18:28:41 +0000 (UTC) +Received: from bombadil.infradead.org (bombadil.infradead.org + [198.137.202.133]) + (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by mail.kernel.org (Postfix) with ESMTPS id 8690720789 + for ; + Tue, 24 Mar 2020 18:28:41 +0000 (UTC) +Authentication-Results: mail.kernel.org; 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+Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) + by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) + id 1jGoI3-0002Hl-Jz; Tue, 24 Mar 2020 18:28:39 +0000 +Received: from mx2.suse.de ([195.135.220.15]) + by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) + id 1jGoHq-00024d-Jc; Tue, 24 Mar 2020 18:28:28 +0000 +X-Virus-Scanned: by amavisd-new at test-mx.suse.de +Received: from relay2.suse.de (unknown [195.135.220.254]) + by mx2.suse.de (Postfix) with ESMTP id EE53FABF6; + Tue, 24 Mar 2020 18:28:24 +0000 (UTC) +From: Nicolas Saenz Julienne +To: linux-kernel@vger.kernel.org, + Mathias Nyman +Subject: [PATCH v6 4/4] USB: pci-quirks: Add Raspberry Pi 4 quirk +Date: Tue, 24 Mar 2020 19:28:12 +0100 +Message-Id: <20200324182812.20420-5-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.25.1 +In-Reply-To: <20200324182812.20420-1-nsaenzjulienne@suse.de> +References: <20200324182812.20420-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200324_112826_791336_2ABB38D1 +X-CRM114-Status: GOOD ( 16.34 ) +X-Spam-Score: -2.3 (--) +X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: + Content analysis details: (-2.3 points) + pts rule name description + ---- ---------------------- + -------------------------------------------------- + 0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) + [195.135.220.15 listed in wl.mailspike.net] + -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, + medium trust [195.135.220.15 listed in list.dnswl.org] + -0.0 SPF_PASS SPF: sender matches SPF record + 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record + 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: +List-Unsubscribe: + , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: + , + +Cc: f.fainelli@gmail.com, sergei.shtylyov@cogentembedded.com, + gregkh@linuxfoundation.org, linux-usb@vger.kernel.org, + Nicolas Saenz Julienne , tim.gover@raspberrypi.org, + bcm-kernel-feedback-list@broadcom.com, linux-rpi-kernel@lists.infradead.org, + linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + wahrenst@gmx.net +Sender: "linux-arm-kernel" +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +On the Raspberry Pi 4, after a PCI reset, VL805's firmware may either be +loaded directly from an EEPROM or, if not present, by the SoC's +VideCore. Inform VideCore that VL805 was just reset. + +Also, as this creates a dependency between USB_PCI and VideoCore's +firmware interface. Since USB_PCI can't be set as a module neither this +should. + +Signed-off-by: Nicolas Saenz Julienne +--- + +Changes since v5: + - Fix Kconfig issue with allmodconfig + +Changes since v4: + - Do not split up error message + +Changes since v3: + - Add more complete error message + +Changes since v1: + - Make RASPBERRYPI_FIRMWARE dependent on this quirk to make sure it + gets compiled when needed. + + drivers/firmware/Kconfig | 3 ++- + drivers/usb/host/pci-quirks.c | 16 ++++++++++++++++ + 2 files changed, 18 insertions(+), 1 deletion(-) + +diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig +index ea869addc89b..78ab2ad6d3f0 100644 +--- a/drivers/firmware/Kconfig ++++ b/drivers/firmware/Kconfig +@@ -178,8 +178,9 @@ config ISCSI_IBFT + Otherwise, say N. + + config RASPBERRYPI_FIRMWARE +- tristate "Raspberry Pi Firmware Driver" ++ bool "Raspberry Pi Firmware Driver" + depends on BCM2835_MBOX ++ default USB_PCI + help + This option enables support for communicating with the firmware on the + Raspberry Pi. +diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c +index beb2efa71341..0dc34668bb2a 100644 +--- a/drivers/usb/host/pci-quirks.c ++++ b/drivers/usb/host/pci-quirks.c +@@ -16,6 +16,9 @@ + #include + #include + #include ++ ++#include ++ + #include "pci-quirks.h" + #include "xhci-ext-caps.h" + +@@ -1243,11 +1246,24 @@ static void quirk_usb_handoff_xhci(struct pci_dev *pdev) + + static void quirk_usb_early_handoff(struct pci_dev *pdev) + { ++ int ret; ++ + /* Skip Netlogic mips SoC's internal PCI USB controller. + * This device does not need/support EHCI/OHCI handoff + */ + if (pdev->vendor == 0x184e) /* vendor Netlogic */ + return; ++ ++ if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) { ++ ret = rpi_firmware_init_vl805(pdev); ++ if (ret) { ++ /* Firmware might be outdated, or something failed */ ++ dev_warn(&pdev->dev, ++ "Failed to load VL805's firmware: %d. Will continue to attempt to work, but bad things might happen. You should fix this...\n", ++ ret); ++ } ++ } ++ + if (pdev->class != PCI_CLASS_SERIAL_USB_UHCI && + pdev->class != PCI_CLASS_SERIAL_USB_OHCI && + pdev->class != PCI_CLASS_SERIAL_USB_EHCI && diff --git a/alsa-5.6.patch b/alsa-5.6.patch deleted file mode 100644 index b33725784..000000000 --- a/alsa-5.6.patch +++ /dev/null @@ -1,398 +0,0 @@ -From 89be5f69889f7e9aeab05279869bba3e9e0d2002 Mon Sep 17 00:00:00 2001 -From: Jaroslav Kysela -Date: Wed, 4 Dec 2019 15:15:45 -0600 -Subject: [PATCH 2/4] ASoC: Intel - use control components to describe card - config - -Use the control interface (field 'components' in the info structure) -to pass the I/O configuration details. The goal is to replace -the card long name with this. - -Signed-off-by: Jaroslav Kysela -Signed-off-by: Pierre-Louis Bossart -Cc: Mark Brown -Link: https://lore.kernel.org/r/20191204211556.12671-3-pierre-louis.bossart@linux.intel.com -Signed-off-by: Mark Brown - -Signed-off-by: Jaroslav Kysela -(cherry picked from commit 0d5c8187562848b619a35f2ffc5e18ce703e9f3d) -Bugzilla: 1772498 ---- - sound/soc/intel/boards/bytcht_es8316.c | 9 ++++++++- - sound/soc/intel/boards/bytcr_rt5640.c | 6 ++++++ - sound/soc/intel/boards/bytcr_rt5651.c | 18 +++++++++++------- - 3 files changed, 25 insertions(+), 8 deletions(-) - -diff --git a/sound/soc/intel/boards/bytcht_es8316.c b/sound/soc/intel/boards/bytcht_es8316.c -index 46612331f5ea..efa33f30dcac 100644 ---- a/sound/soc/intel/boards/bytcht_es8316.c -+++ b/sound/soc/intel/boards/bytcht_es8316.c -@@ -361,6 +361,7 @@ static struct snd_soc_dai_link byt_cht_es8316_dais[] = { - /* SoC card */ - static char codec_name[SND_ACPI_I2C_ID_LEN]; - static char long_name[50]; /* = "bytcht-es8316-*-spk-*-mic" */ -+static char components_string[32]; /* = "cfg-spk:* cfg-mic:* */ - - static int byt_cht_es8316_suspend(struct snd_soc_card *card) - { -@@ -572,11 +573,17 @@ static int snd_byt_cht_es8316_mc_probe(struct platform_device *pdev) - } - } - -- /* register the soc card */ -+ snprintf(components_string, sizeof(components_string), -+ "cfg-spk:%s cfg-mic:%s", -+ (quirk & BYT_CHT_ES8316_MONO_SPEAKER) ? "1" : "2", -+ mic_name[BYT_CHT_ES8316_MAP(quirk)]); -+ byt_cht_es8316_card.components = components_string; - snprintf(long_name, sizeof(long_name), "bytcht-es8316-%s-spk-%s-mic", - (quirk & BYT_CHT_ES8316_MONO_SPEAKER) ? "mono" : "stereo", - mic_name[BYT_CHT_ES8316_MAP(quirk)]); - byt_cht_es8316_card.long_name = long_name; -+ -+ /* register the soc card */ - snd_soc_card_set_drvdata(&byt_cht_es8316_card, priv); - - ret = devm_snd_soc_register_card(dev, &byt_cht_es8316_card); -diff --git a/sound/soc/intel/boards/bytcr_rt5640.c b/sound/soc/intel/boards/bytcr_rt5640.c -index dd2b5ad08659..7bc6d3cec94c 100644 ---- a/sound/soc/intel/boards/bytcr_rt5640.c -+++ b/sound/soc/intel/boards/bytcr_rt5640.c -@@ -1083,6 +1083,7 @@ static char byt_rt5640_codec_name[SND_ACPI_I2C_ID_LEN]; - static char byt_rt5640_codec_aif_name[12]; /* = "rt5640-aif[1|2]" */ - static char byt_rt5640_cpu_dai_name[10]; /* = "ssp[0|2]-port" */ - static char byt_rt5640_long_name[40]; /* = "bytcr-rt5640-*-spk-*-mic" */ -+static char byt_rt5640_components[32]; /* = "cfg-spk:* cfg-mic:*" */ - - static int byt_rt5640_suspend(struct snd_soc_card *card) - { -@@ -1305,6 +1306,11 @@ static int snd_byt_rt5640_mc_probe(struct platform_device *pdev) - } - } - -+ snprintf(byt_rt5640_components, sizeof(byt_rt5640_components), -+ "cfg-spk:%s cfg-mic:%s", -+ (byt_rt5640_quirk & BYT_RT5640_MONO_SPEAKER) ? "1" : "2", -+ map_name[BYT_RT5640_MAP(byt_rt5640_quirk)]); -+ byt_rt5640_card.components = byt_rt5640_components; - snprintf(byt_rt5640_long_name, sizeof(byt_rt5640_long_name), - "bytcr-rt5640-%s-spk-%s-mic", - (byt_rt5640_quirk & BYT_RT5640_MONO_SPEAKER) ? -diff --git a/sound/soc/intel/boards/bytcr_rt5651.c b/sound/soc/intel/boards/bytcr_rt5651.c -index 4606f6f582d6..80a5674ddb1b 100644 ---- a/sound/soc/intel/boards/bytcr_rt5651.c -+++ b/sound/soc/intel/boards/bytcr_rt5651.c -@@ -798,6 +798,7 @@ static char byt_rt5651_codec_name[SND_ACPI_I2C_ID_LEN]; - static char byt_rt5651_codec_aif_name[12]; /* = "rt5651-aif[1|2]" */ - static char byt_rt5651_cpu_dai_name[10]; /* = "ssp[0|2]-port" */ - static char byt_rt5651_long_name[50]; /* = "bytcr-rt5651-*-spk-*-mic[-swapped-hp]" */ -+static char byt_rt5651_components[50]; /* = "cfg-spk:* cfg-mic:*" */ - - static int byt_rt5651_suspend(struct snd_soc_card *card) - { -@@ -876,7 +877,6 @@ static int snd_byt_rt5651_mc_probe(struct platform_device *pdev) - const char *platform_name; - struct acpi_device *adev; - struct device *codec_dev; -- const char *hp_swapped; - bool is_bytcr = false; - int ret_val = 0; - int dai_index = 0; -@@ -1080,16 +1080,20 @@ static int snd_byt_rt5651_mc_probe(struct platform_device *pdev) - } - } - -- if (byt_rt5651_quirk & BYT_RT5651_HP_LR_SWAPPED) -- hp_swapped = "-hp-swapped"; -- else -- hp_swapped = ""; -- -+ snprintf(byt_rt5651_components, sizeof(byt_rt5651_components), -+ "cfg-spk:%s cfg-mic:%s%s", -+ (byt_rt5651_quirk & BYT_RT5651_MONO_SPEAKER) ? "1" : "2", -+ mic_name[BYT_RT5651_MAP(byt_rt5651_quirk)], -+ (byt_rt5651_quirk & BYT_RT5651_HP_LR_SWAPPED) ? -+ " cfg-hp:lrswap" : ""); -+ byt_rt5651_card.components = byt_rt5651_components; - snprintf(byt_rt5651_long_name, sizeof(byt_rt5651_long_name), - "bytcr-rt5651-%s-spk-%s-mic%s", - (byt_rt5651_quirk & BYT_RT5651_MONO_SPEAKER) ? - "mono" : "stereo", -- mic_name[BYT_RT5651_MAP(byt_rt5651_quirk)], hp_swapped); -+ mic_name[BYT_RT5651_MAP(byt_rt5651_quirk)], -+ (byt_rt5651_quirk & BYT_RT5651_HP_LR_SWAPPED) ? -+ "-hp-swapped" : ""); - byt_rt5651_card.long_name = byt_rt5651_long_name; - - /* override plaform name, if required */ --- -2.20.1 - - -From 36c175e19e9cbb685708519d41e27cd803206737 Mon Sep 17 00:00:00 2001 -From: Jaroslav Kysela -Date: Wed, 4 Dec 2019 15:15:46 -0600 -Subject: [PATCH 3/4] ASoC: Intel - do not describe I/O configuration in the - long card name - -The long card name might be used in GUI. This information should be hidden. - -Add CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES configuration option. - -Signed-off-by: Jaroslav Kysela -Signed-off-by: Pierre-Louis Bossart -Cc: Mark Brown -Link: https://lore.kernel.org/r/20191204211556.12671-4-pierre-louis.bossart@linux.intel.com -Signed-off-by: Mark Brown - -Signed-off-by: Jaroslav Kysela -(cherry picked from commit b5706f8ec29fb461571d25e3e813ede121fe31cd) -Bugzilla: 1772498 ---- - sound/soc/intel/boards/Kconfig | 13 +++++++++++++ - sound/soc/intel/boards/bytcht_es8316.c | 4 ++++ - sound/soc/intel/boards/bytcr_rt5640.c | 4 ++++ - sound/soc/intel/boards/bytcr_rt5651.c | 4 ++++ - 4 files changed, 25 insertions(+) - -diff --git a/sound/soc/intel/boards/Kconfig b/sound/soc/intel/boards/Kconfig -index ef20316e83d1..145eb55bd691 100644 ---- a/sound/soc/intel/boards/Kconfig -+++ b/sound/soc/intel/boards/Kconfig -@@ -13,6 +13,19 @@ menuconfig SND_SOC_INTEL_MACH - - if SND_SOC_INTEL_MACH - -+config SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES -+ bool "Use more user friendly long card names" -+ help -+ Some drivers report the I/O configuration to userspace through the -+ soundcard's long card name in the control user space AP. An unfortunate -+ side effect is that this long name may also be used by the GUI, -+ confusing users with information they don't need. -+ This option prevents the long name from being modified, and the I/O -+ configuration will be provided through a different component interface. -+ Select Y if userspace like UCM (Use Case Manager) uses the component -+ interface. -+ If unsure select N. -+ - if SND_SOC_INTEL_HASWELL - - config SND_SOC_INTEL_HASWELL_MACH -diff --git a/sound/soc/intel/boards/bytcht_es8316.c b/sound/soc/intel/boards/bytcht_es8316.c -index efa33f30dcac..12a1c5255484 100644 ---- a/sound/soc/intel/boards/bytcht_es8316.c -+++ b/sound/soc/intel/boards/bytcht_es8316.c -@@ -360,7 +360,9 @@ static struct snd_soc_dai_link byt_cht_es8316_dais[] = { - - /* SoC card */ - static char codec_name[SND_ACPI_I2C_ID_LEN]; -+#if !IS_ENABLED(CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES) - static char long_name[50]; /* = "bytcht-es8316-*-spk-*-mic" */ -+#endif - static char components_string[32]; /* = "cfg-spk:* cfg-mic:* */ - - static int byt_cht_es8316_suspend(struct snd_soc_card *card) -@@ -578,10 +580,12 @@ static int snd_byt_cht_es8316_mc_probe(struct platform_device *pdev) - (quirk & BYT_CHT_ES8316_MONO_SPEAKER) ? "1" : "2", - mic_name[BYT_CHT_ES8316_MAP(quirk)]); - byt_cht_es8316_card.components = components_string; -+#if !IS_ENABLED(CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES) - snprintf(long_name, sizeof(long_name), "bytcht-es8316-%s-spk-%s-mic", - (quirk & BYT_CHT_ES8316_MONO_SPEAKER) ? "mono" : "stereo", - mic_name[BYT_CHT_ES8316_MAP(quirk)]); - byt_cht_es8316_card.long_name = long_name; -+#endif - - /* register the soc card */ - snd_soc_card_set_drvdata(&byt_cht_es8316_card, priv); -diff --git a/sound/soc/intel/boards/bytcr_rt5640.c b/sound/soc/intel/boards/bytcr_rt5640.c -index 7bc6d3cec94c..648fcc1d07b5 100644 ---- a/sound/soc/intel/boards/bytcr_rt5640.c -+++ b/sound/soc/intel/boards/bytcr_rt5640.c -@@ -1082,7 +1082,9 @@ static struct snd_soc_dai_link byt_rt5640_dais[] = { - static char byt_rt5640_codec_name[SND_ACPI_I2C_ID_LEN]; - static char byt_rt5640_codec_aif_name[12]; /* = "rt5640-aif[1|2]" */ - static char byt_rt5640_cpu_dai_name[10]; /* = "ssp[0|2]-port" */ -+#if !IS_ENABLED(CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES) - static char byt_rt5640_long_name[40]; /* = "bytcr-rt5640-*-spk-*-mic" */ -+#endif - static char byt_rt5640_components[32]; /* = "cfg-spk:* cfg-mic:*" */ - - static int byt_rt5640_suspend(struct snd_soc_card *card) -@@ -1311,12 +1313,14 @@ static int snd_byt_rt5640_mc_probe(struct platform_device *pdev) - (byt_rt5640_quirk & BYT_RT5640_MONO_SPEAKER) ? "1" : "2", - map_name[BYT_RT5640_MAP(byt_rt5640_quirk)]); - byt_rt5640_card.components = byt_rt5640_components; -+#if !IS_ENABLED(CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES) - snprintf(byt_rt5640_long_name, sizeof(byt_rt5640_long_name), - "bytcr-rt5640-%s-spk-%s-mic", - (byt_rt5640_quirk & BYT_RT5640_MONO_SPEAKER) ? - "mono" : "stereo", - map_name[BYT_RT5640_MAP(byt_rt5640_quirk)]); - byt_rt5640_card.long_name = byt_rt5640_long_name; -+#endif - - /* override plaform name, if required */ - platform_name = mach->mach_params.platform; -diff --git a/sound/soc/intel/boards/bytcr_rt5651.c b/sound/soc/intel/boards/bytcr_rt5651.c -index 80a5674ddb1b..c0d322a859f7 100644 ---- a/sound/soc/intel/boards/bytcr_rt5651.c -+++ b/sound/soc/intel/boards/bytcr_rt5651.c -@@ -797,7 +797,9 @@ static struct snd_soc_dai_link byt_rt5651_dais[] = { - static char byt_rt5651_codec_name[SND_ACPI_I2C_ID_LEN]; - static char byt_rt5651_codec_aif_name[12]; /* = "rt5651-aif[1|2]" */ - static char byt_rt5651_cpu_dai_name[10]; /* = "ssp[0|2]-port" */ -+#if !IS_ENABLED(CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES) - static char byt_rt5651_long_name[50]; /* = "bytcr-rt5651-*-spk-*-mic[-swapped-hp]" */ -+#endif - static char byt_rt5651_components[50]; /* = "cfg-spk:* cfg-mic:*" */ - - static int byt_rt5651_suspend(struct snd_soc_card *card) -@@ -1087,6 +1089,7 @@ static int snd_byt_rt5651_mc_probe(struct platform_device *pdev) - (byt_rt5651_quirk & BYT_RT5651_HP_LR_SWAPPED) ? - " cfg-hp:lrswap" : ""); - byt_rt5651_card.components = byt_rt5651_components; -+#if !IS_ENABLED(CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES) - snprintf(byt_rt5651_long_name, sizeof(byt_rt5651_long_name), - "bytcr-rt5651-%s-spk-%s-mic%s", - (byt_rt5651_quirk & BYT_RT5651_MONO_SPEAKER) ? -@@ -1095,6 +1098,7 @@ static int snd_byt_rt5651_mc_probe(struct platform_device *pdev) - (byt_rt5651_quirk & BYT_RT5651_HP_LR_SWAPPED) ? - "-hp-swapped" : ""); - byt_rt5651_card.long_name = byt_rt5651_long_name; -+#endif - - /* override plaform name, if required */ - platform_name = mach->mach_params.platform; --- -2.20.1 - - -From 9008dcbcf36b9d67ea24920e05b50c8754488ebd Mon Sep 17 00:00:00 2001 -From: Jaroslav Kysela -Date: Fri, 22 Nov 2019 09:31:03 +0100 -Subject: [PATCH] ASoC: SOF - topology - do not change the link trigger order - for pre-1.4 firmware - -This patch is for SOF v1.3 firmware. The DSP firmware will crash (DSP oops) -without this patch. The 1.4.1 firmare has this issue fixed. - -The ABI version is used for the comparison, because the firmware version -for the firmware files before 1.4.2 was not set properly (git hash was -used). - -BugLink: https://github.com/thesofproject/sof/issues/2102 -Signed-off-by: Jaroslav Kysela -Cc: Pierre-Louis Bossart -Cc: Mark Brown ---- - sound/soc/sof/topology.c | 10 +++++++--- - 1 file changed, 7 insertions(+), 3 deletions(-) - -diff --git a/sound/soc/sof/topology.c b/sound/soc/sof/topology.c -index 9f4f8868b386..58ff4766b47b 100644 ---- a/sound/soc/sof/topology.c -+++ b/sound/soc/sof/topology.c -@@ -3111,6 +3111,7 @@ static int sof_link_load(struct snd_soc_component *scomp, int index, - struct snd_soc_tplg_private *private = &cfg->priv; - struct sof_ipc_dai_config config; - struct snd_soc_tplg_hw_config *hw_config; -+ struct sof_ipc_fw_version *v = &sdev->fw_ready.version; - int num_hw_configs; - int ret; - int i = 0; -@@ -3128,9 +3129,12 @@ static int sof_link_load(struct snd_soc_component *scomp, int index, - if (!link->no_pcm) { - link->nonatomic = true; - -- /* set trigger order */ -- link->trigger[0] = SND_SOC_DPCM_TRIGGER_POST; -- link->trigger[1] = SND_SOC_DPCM_TRIGGER_POST; -+ /* this causes DSP panic on firmware v1.3 */ -+ if (v->abi_version > SOF_ABI_VER(3, 7, 0)) { -+ /* set trigger order */ -+ link->trigger[0] = SND_SOC_DPCM_TRIGGER_POST; -+ link->trigger[1] = SND_SOC_DPCM_TRIGGER_POST; -+ } - - /* nothing more to do for FE dai links */ - return 0; --- -2.24.1 - - -From af7aae1b1f6306a1cda4da393e920a1334eaa3d4 Mon Sep 17 00:00:00 2001 -From: Kai Vehmanen -Date: Thu, 6 Feb 2020 22:02:23 +0200 -Subject: [PATCH] ASoC: SOF: Intel: hda: move i915 init earlier - -To be compliant with i915 display driver requirements, i915 power-up -must be done before any HDA communication takes place, including -parsing the bus capabilities. Otherwise the initial codec probe -may fail. - -Move i915 initialization earlier in the SOF HDA sequence. This -sequence is now aligned with the snd-hda-intel driver where the -display_power() call is before snd_hdac_bus_parse_capabilities() -and rest of the capability parsing. - -Also remove unnecessary ifdef around hda_codec_i915_init(). There's -a dummy implementation provided if CONFIG_SND_SOC_SOF_HDA is not -enabled. - -Signed-off-by: Kai Vehmanen -Reviewed-by: Ranjani Sridharan -Reviewed-by: Pierre-Louis Bossart -Reviewed-by: Takashi Iwai -Link: https://lore.kernel.org/r/20200206200223.7715-3-kai.vehmanen@linux.intel.com -Signed-off-by: Mark Brown ---- - sound/soc/sof/intel/hda.c | 17 ++++++++--------- - 1 file changed, 8 insertions(+), 9 deletions(-) - -diff --git a/sound/soc/sof/intel/hda.c b/sound/soc/sof/intel/hda.c -index 8fddafb5c1d4..25946a1c2822 100644 ---- a/sound/soc/sof/intel/hda.c -+++ b/sound/soc/sof/intel/hda.c -@@ -286,6 +286,13 @@ static int hda_init(struct snd_sof_dev *sdev) - /* HDA base */ - sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr; - -+ /* init i915 and HDMI codecs */ -+ ret = hda_codec_i915_init(sdev); -+ if (ret < 0) { -+ dev_err(sdev->dev, "error: init i915 and HDMI codec failed\n"); -+ return ret; -+ } -+ - /* get controller capabilities */ - ret = hda_dsp_ctrl_get_caps(sdev); - if (ret < 0) -@@ -353,15 +360,6 @@ static int hda_init_caps(struct snd_sof_dev *sdev) - if (bus->ppcap) - dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n"); - --#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) -- /* init i915 and HDMI codecs */ -- ret = hda_codec_i915_init(sdev); -- if (ret < 0) { -- dev_err(sdev->dev, "error: init i915 and HDMI codec failed\n"); -- return ret; -- } --#endif -- - /* Init HDA controller after i915 init */ - ret = hda_dsp_ctrl_init_chip(sdev, true); - if (ret < 0) { -@@ -611,6 +609,7 @@ int hda_dsp_probe(struct snd_sof_dev *sdev) - iounmap(sdev->bar[HDA_DSP_BAR]); - hdac_bus_unmap: - iounmap(bus->remap_addr); -+ hda_codec_i915_exit(sdev); - err: - return ret; - } --- -2.24.1 - diff --git a/arm-bcm2711-mmc-sdhci-iproc-Add-custom-set_power-callback.patch b/arm-bcm2711-mmc-sdhci-iproc-Add-custom-set_power-callback.patch new file mode 100644 index 000000000..8c7a43185 --- /dev/null +++ b/arm-bcm2711-mmc-sdhci-iproc-Add-custom-set_power-callback.patch @@ -0,0 +1,374 @@ +From 6c92ae1e452ff3f4648b1450c9a3233a2ca53feb Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Fri, 6 Mar 2020 18:44:03 +0100 +Subject: mmc: sdhci: Introduce sdhci_set_power_and_bus_voltage() + +Some controllers diverge from the standard way of setting power and need +their bus voltage register to be configured regardless of the whether +they use regulators. As this is a common pattern across sdhci hosts, +create a helper function. + +Signed-off-by: Nicolas Saenz Julienne +Acked-by: Adrian Hunter +Link: https://lore.kernel.org/r/20200306174413.20634-2-nsaenzjulienne@suse.de +Signed-off-by: Ulf Hansson +--- + drivers/mmc/host/sdhci.c | 19 +++++++++++++++++++ + drivers/mmc/host/sdhci.h | 3 +++ + 2 files changed, 22 insertions(+) + +diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c +index c59566363a42..525e0c971c6a 100644 +--- a/drivers/mmc/host/sdhci.c ++++ b/drivers/mmc/host/sdhci.c +@@ -2010,6 +2010,25 @@ void sdhci_set_power(struct sdhci_host *host, unsigned char mode, + } + EXPORT_SYMBOL_GPL(sdhci_set_power); + ++/* ++ * Some controllers need to configure a valid bus voltage on their power ++ * register regardless of whether an external regulator is taking care of power ++ * supply. This helper function takes care of it if set as the controller's ++ * sdhci_ops.set_power callback. ++ */ ++void sdhci_set_power_and_bus_voltage(struct sdhci_host *host, ++ unsigned char mode, ++ unsigned short vdd) ++{ ++ if (!IS_ERR(host->mmc->supply.vmmc)) { ++ struct mmc_host *mmc = host->mmc; ++ ++ mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); ++ } ++ sdhci_set_power_noreg(host, mode, vdd); ++} ++EXPORT_SYMBOL_GPL(sdhci_set_power_and_bus_voltage); ++ + /*****************************************************************************\ + * * + * MMC callbacks * +diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h +index 249635692112..851b81565f46 100644 +--- a/drivers/mmc/host/sdhci.h ++++ b/drivers/mmc/host/sdhci.h +@@ -772,6 +772,9 @@ void sdhci_set_clock(struct sdhci_host *host, unsigned int clock); + void sdhci_enable_clk(struct sdhci_host *host, u16 clk); + void sdhci_set_power(struct sdhci_host *host, unsigned char mode, + unsigned short vdd); ++void sdhci_set_power_and_bus_voltage(struct sdhci_host *host, ++ unsigned char mode, ++ unsigned short vdd); + void sdhci_set_power_noreg(struct sdhci_host *host, unsigned char mode, + unsigned short vdd); + void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq); +-- +cgit 1.2-0.3.lf.el7 +From f87391eec2c5f54269e64d655da19f2c32515e4c Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Fri, 6 Mar 2020 18:44:11 +0100 +Subject: mmc: sdhci: iproc: Add custom set_power() callback for bcm2711 + +The controller needs a valid bus voltage in its power register +regardless of whether an external regulator is taking care of the power +supply. + +The sdhci core already provides a helper function for this, +sdhci_set_power_and_bus_voltage(), so create a bcm2711 specific 'struct +sdhci_ops' which makes use of it. + +Signed-off-by: Nicolas Saenz Julienne +Acked-by: Adrian Hunter +Link: https://lore.kernel.org/r/20200306174413.20634-10-nsaenzjulienne@suse.de +Signed-off-by: Ulf Hansson +--- + drivers/mmc/host/sdhci-iproc.c | 17 ++++++++++++++++- + 1 file changed, 16 insertions(+), 1 deletion(-) + +diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host/sdhci-iproc.c +index f4f5f0a70cda..225603148d7d 100644 +--- a/drivers/mmc/host/sdhci-iproc.c ++++ b/drivers/mmc/host/sdhci-iproc.c +@@ -261,9 +261,24 @@ static const struct sdhci_iproc_data bcm2835_data = { + .mmc_caps = 0x00000000, + }; + ++static const struct sdhci_ops sdhci_iproc_bcm2711_ops = { ++ .read_l = sdhci_iproc_readl, ++ .read_w = sdhci_iproc_readw, ++ .read_b = sdhci_iproc_readb, ++ .write_l = sdhci_iproc_writel, ++ .write_w = sdhci_iproc_writew, ++ .write_b = sdhci_iproc_writeb, ++ .set_clock = sdhci_set_clock, ++ .set_power = sdhci_set_power_and_bus_voltage, ++ .get_max_clock = sdhci_iproc_get_max_clock, ++ .set_bus_width = sdhci_set_bus_width, ++ .reset = sdhci_reset, ++ .set_uhs_signaling = sdhci_set_uhs_signaling, ++}; ++ + static const struct sdhci_pltfm_data sdhci_bcm2711_pltfm_data = { + .quirks = SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12, +- .ops = &sdhci_iproc_32only_ops, ++ .ops = &sdhci_iproc_bcm2711_ops, + }; + + static const struct sdhci_iproc_data bcm2711_data = { +-- +cgit 1.2-0.3.lf.el7 +From patchwork Fri Mar 6 17:44:12 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 11424593 +Return-Path: + +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + [172.30.200.123]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9D86014E3 + for ; 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+ status = "okay"; + }; +From patchwork Fri Mar 6 17:44:13 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Nicolas Saenz Julienne +X-Patchwork-Id: 11424599 +Return-Path: + +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + [172.30.200.123]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A9E8E14BC + for ; + Fri, 6 Mar 2020 17:47:49 +0000 (UTC) +Received: from bombadil.infradead.org (bombadil.infradead.org + [198.137.202.133]) + (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by mail.kernel.org (Postfix) with ESMTPS id 86F7120656 + for ; + Fri, 6 Mar 2020 17:47:49 +0000 (UTC) +Authentication-Results: mail.kernel.org; + dkim=pass (2048-bit key) header.d=lists.infradead.org + header.i=@lists.infradead.org header.b="nK9IFX75" +DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 86F7120656 +Authentication-Results: mail.kernel.org; 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+Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) + by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) + id 1jAH4a-0004vA-Os; Fri, 06 Mar 2020 17:47:44 +0000 +Received: from mx2.suse.de ([195.135.220.15]) + by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) + id 1jAH1W-00086J-W9; Fri, 06 Mar 2020 17:44:36 +0000 +X-Virus-Scanned: by amavisd-new at test-mx.suse.de +Received: from relay2.suse.de (unknown [195.135.220.254]) + by mx2.suse.de (Postfix) with ESMTP id 8D8E5AEC5; + Fri, 6 Mar 2020 17:44:33 +0000 (UTC) +From: Nicolas Saenz Julienne +To: adrian.hunter@intel.com, linux-kernel@vger.kernel.org, + Rob Herring , + Nicolas Saenz Julienne +Subject: [PATCH v2 11/11] ARM: dts: bcm2711: Add vmmc regulator in emmc2 +Date: Fri, 6 Mar 2020 18:44:13 +0100 +Message-Id: <20200306174413.20634-12-nsaenzjulienne@suse.de> +X-Mailer: git-send-email 2.25.1 +In-Reply-To: <20200306174413.20634-1-nsaenzjulienne@suse.de> +References: <20200306174413.20634-1-nsaenzjulienne@suse.de> +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200306_094435_205829_20FE02CB +X-CRM114-Status: GOOD ( 10.34 ) +X-Spam-Score: -2.3 (--) +X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: + Content analysis details: (-2.3 points) + pts rule name description + ---- ---------------------- + -------------------------------------------------- + 0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) + [195.135.220.15 listed in wl.mailspike.net] + -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, + medium trust [195.135.220.15 listed in list.dnswl.org] + 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record + -0.0 SPF_PASS SPF: sender matches SPF record + 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: +List-Unsubscribe: + , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: + , + +Cc: stefan.wahren@i2se.com, devicetree@vger.kernel.org, f.fainelli@gmail.com, + linux-mmc@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, + linux-rpi-kernel@lists.infradead.org, phil@raspberrypi.com, + linux-arm-kernel@lists.infradead.org +Sender: "linux-arm-kernel" +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +The SD card power can be controlled trough a pin routed into the board's +external GPIO expander. Turn that into a regulator and provide it to +emmc2. + +Signed-off-by: Nicolas Saenz Julienne +--- + arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +index b0ea8233b636..a2da058396fe 100644 +--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts ++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +@@ -55,6 +55,16 @@ sd_io_1v8_reg: sd_io_1v8_reg { + 3300000 0x0>; + status = "okay"; + }; ++ ++ sd_vcc_reg: sd_vcc_reg { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc-sd"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ enable-active-high; ++ gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>; ++ }; + }; + + &firmware { +@@ -173,6 +183,7 @@ brcmf: wifi@1 { + /* EMMC2 is used to drive the SD card */ + &emmc2 { + vqmmc-supply = <&sd_io_1v8_reg>; ++ vmmc-supply = <&sd_vcc_reg>; + broken-cd; + status = "okay"; + }; diff --git a/arm-bcm2835-serial-8250_early-support-aux-uart.patch b/arm-bcm2835-serial-8250_early-support-aux-uart.patch new file mode 100644 index 000000000..5ab954996 --- /dev/null +++ b/arm-bcm2835-serial-8250_early-support-aux-uart.patch @@ -0,0 +1,47 @@ +From 57b76faf1d7860f070a1ee2d0b7eccd9f37ecc55 Mon Sep 17 00:00:00 2001 +From: Matthias Brugger +Date: Sun, 26 Jan 2020 13:33:14 +0100 +Subject: serial: 8250_early: Add earlycon for BCM2835 aux uart + +Define the OF early console for BCM2835 aux UART, which can be enabled +by passing "earlycon" on the boot command line. This UART is found on +BCM283x and BCM27xx SoCs, a.k.a. Raspberry Pi in its variants. + +Signed-off-by: Matthias Brugger +Link: https://lore.kernel.org/r/20200126123314.3558-1-matthias.bgg@kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/tty/serial/8250/8250_bcm2835aux.c | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +diff --git a/drivers/tty/serial/8250/8250_bcm2835aux.c b/drivers/tty/serial/8250/8250_bcm2835aux.c +index e70e3cc30050..5cc03bf24f85 100644 +--- a/drivers/tty/serial/8250/8250_bcm2835aux.c ++++ b/drivers/tty/serial/8250/8250_bcm2835aux.c +@@ -137,6 +137,24 @@ static struct platform_driver bcm2835aux_serial_driver = { + }; + module_platform_driver(bcm2835aux_serial_driver); + ++#ifdef CONFIG_SERIAL_8250_CONSOLE ++ ++static int __init early_bcm2835aux_setup(struct earlycon_device *device, ++ const char *options) ++{ ++ if (!device->port.membase) ++ return -ENODEV; ++ ++ device->port.iotype = UPIO_MEM32; ++ device->port.regshift = 2; ++ ++ return early_serial8250_setup(device, NULL); ++} ++ ++OF_EARLYCON_DECLARE(bcm2835aux, "brcm,bcm2835-aux-uart", ++ early_bcm2835aux_setup); ++#endif ++ + MODULE_DESCRIPTION("BCM2835 auxiliar UART driver"); + MODULE_AUTHOR("Martin Sperl "); + MODULE_LICENSE("GPL v2"); +-- +cgit 1.2-0.3.lf.el7 diff --git a/arm64-Fix-some-GPIO-setup-on-Pinebook-Pro.patch b/arm64-Fix-some-GPIO-setup-on-Pinebook-Pro.patch new file mode 100644 index 000000000..7bfd204b5 --- /dev/null +++ b/arm64-Fix-some-GPIO-setup-on-Pinebook-Pro.patch @@ -0,0 +1,50 @@ +From c45fbddb2cd7ce6198e33ebe6dc4c1301d7875d4 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 19 Apr 2020 20:50:08 +0100 +Subject: [PATCH] Fix some GPIO setup on Pinebook Pro + +This patchset contains two small fixes for the dts of the Pinebook Pro. +The first fixes inverted logic on the headphone detect GPIO. +The second patch fixes unreliable DC charger detection. + +Tobias Schramm (2): + arm64: dts: rockchip: fix inverted headphone detection + arm64: dts: rockchip: enable DC charger detection pullup + +Signed-off-by: Peter Robinson +--- + arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +index 5ea281b55fe2..294d21bf45f5 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +@@ -147,7 +147,7 @@ es8316-sound { + "Speaker", "Speaker Amplifier OUTL", + "Speaker", "Speaker Amplifier OUTR"; + +- simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>; ++ simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; + simple-audio-card,aux-devs = <&speaker_amp>; + simple-audio-card,pin-switches = "Speaker"; + +@@ -788,13 +788,13 @@ lidbtn_gpio: lidbtn-gpio { + + dc-charger { + dc_det_gpio: dc-det-gpio { +- rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; ++ rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + es8316 { + hp_det_gpio: hp-det-gpio { +- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>; ++ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + +-- +2.26.1 + diff --git a/arm64-a64-mbus.patch b/arm64-a64-mbus.patch new file mode 100644 index 000000000..46efa29cf --- /dev/null +++ b/arm64-a64-mbus.patch @@ -0,0 +1,69 @@ +From daae9f66b29a04a94708b1b5a9b61e3ee14df031 Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Mon, 10 Feb 2020 18:06:52 +0100 +Subject: [PATCH 1/2] dt-bindings: interconnect: sunxi: Add A64 MBUS compatible + +A64 contains MBUS controller. Add a compatible for it. + +Acked-by: Rob Herring +Signed-off-by: Jernej Skrabec +Signed-off-by: Maxime Ripard +--- + .../devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml b/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml +index 9370e64992dd..aa0738b4d534 100644 +--- a/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml ++++ b/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml +@@ -30,6 +30,7 @@ properties: + enum: + - allwinner,sun5i-a13-mbus + - allwinner,sun8i-h3-mbus ++ - allwinner,sun50i-a64-mbus + + reg: + maxItems: 1 +-- +2.24.1 + +From 410bb2be7e1f1d329c238e2d6d06b6c25dcee404 Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Mon, 10 Feb 2020 18:06:54 +0100 +Subject: [PATCH 2/2] arm64: dts: allwinner: a64: Add MBUS controller node + +A64 contains MBUS, which is the bus used by DMA devices to access +system memory. + +MBUS controller is responsible for arbitration between channels based +on set priority and can do some other things as well, like report +bandwidth used. It also maps RAM region to different address than CPU. + +Signed-off-by: Jernej Skrabec +Signed-off-by: Maxime Ripard +--- + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +index 862b47dc9dc9..251c91724de1 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +@@ -1061,6 +1061,14 @@ pwm: pwm@1c21400 { + status = "disabled"; + }; + ++ mbus: dram-controller@1c62000 { ++ compatible = "allwinner,sun50i-a64-mbus"; ++ reg = <0x01c62000 0x1000>; ++ clocks = <&ccu 112>; ++ dma-ranges = <0x00000000 0x40000000 0xc0000000>; ++ #interconnect-cells = <1>; ++ }; ++ + csi: csi@1cb0000 { + compatible = "allwinner,sun50i-a64-csi"; + reg = <0x01cb0000 0x1000>; +-- +2.24.1 + diff --git a/arm64-drm-tegra-Fix-SMMU-support-on-Tegra124-and-Tegra210.patch b/arm64-drm-tegra-Fix-SMMU-support-on-Tegra124-and-Tegra210.patch new file mode 100644 index 000000000..3d43cd710 --- /dev/null +++ b/arm64-drm-tegra-Fix-SMMU-support-on-Tegra124-and-Tegra210.patch @@ -0,0 +1,320 @@ +From patchwork Wed Mar 25 20:16:03 2020 +Content-Type: text/plain; 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+ Wed, 25 Mar 2020 13:16:05 -0700 (PDT) +From: Thierry Reding +To: Thierry Reding +Cc: dri-devel@lists.freedesktop.org, linux-tegra@vger.kernel.org +Subject: [PATCH 1/2] drm/tegra: Fix SMMU support on Tegra124 and Tegra210 +Date: Wed, 25 Mar 2020 21:16:03 +0100 +Message-Id: <20200325201604.833898-1-thierry.reding@gmail.com> +X-Mailer: git-send-email 2.24.1 +MIME-Version: 1.0 +Sender: linux-tegra-owner@vger.kernel.org +Precedence: bulk +List-ID: +X-Mailing-List: linux-tegra@vger.kernel.org + +From: Thierry Reding + +When testing whether or not to enable the use of the SMMU, consult the +supported DMA mask rather than the actually configured DMA mask, since +the latter might already have been restricted. + +Fixes: 2d9384ff9177 ("drm/tegra: Relax IOMMU usage criteria on old Tegra") +Signed-off-by: Thierry Reding +Tested-by: Jon Hunter +--- + drivers/gpu/drm/tegra/drm.c | 3 ++- + drivers/gpu/host1x/dev.c | 13 +++++++++++++ + include/linux/host1x.h | 3 +++ + 3 files changed, 18 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c +index bd268028fb3d..583cd6e0ae27 100644 +--- a/drivers/gpu/drm/tegra/drm.c ++++ b/drivers/gpu/drm/tegra/drm.c +@@ -1039,6 +1039,7 @@ void tegra_drm_free(struct tegra_drm *tegra, size_t size, void *virt, + + static bool host1x_drm_wants_iommu(struct host1x_device *dev) + { ++ struct host1x *host1x = dev_get_drvdata(dev->dev.parent); + struct iommu_domain *domain; + + /* +@@ -1076,7 +1077,7 @@ static bool host1x_drm_wants_iommu(struct host1x_device *dev) + * sufficient and whether or not the host1x is attached to an IOMMU + * doesn't matter. + */ +- if (!domain && dma_get_mask(dev->dev.parent) <= DMA_BIT_MASK(32)) ++ if (!domain && host1x_get_dma_mask(host1x) <= DMA_BIT_MASK(32)) + return true; + + return domain != NULL; +diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c +index 388bcc2889aa..40a4b9f8b861 100644 +--- a/drivers/gpu/host1x/dev.c ++++ b/drivers/gpu/host1x/dev.c +@@ -502,6 +502,19 @@ static void __exit tegra_host1x_exit(void) + } + module_exit(tegra_host1x_exit); + ++/** ++ * host1x_get_dma_mask() - query the supported DMA mask for host1x ++ * @host1x: host1x instance ++ * ++ * Note that this returns the supported DMA mask for host1x, which can be ++ * different from the applicable DMA mask under certain circumstances. ++ */ ++u64 host1x_get_dma_mask(struct host1x *host1x) ++{ ++ return host1x->info->dma_mask; ++} ++EXPORT_SYMBOL(host1x_get_dma_mask); ++ + MODULE_AUTHOR("Thierry Reding "); + MODULE_AUTHOR("Terje Bergstrom "); + MODULE_DESCRIPTION("Host1x driver for Tegra products"); +diff --git a/include/linux/host1x.h b/include/linux/host1x.h +index 62d216ff1097..c230b4e70d75 100644 +--- a/include/linux/host1x.h ++++ b/include/linux/host1x.h +@@ -17,9 +17,12 @@ enum host1x_class { + HOST1X_CLASS_GR3D = 0x60, + }; + ++struct host1x; + struct host1x_client; + struct iommu_group; + ++u64 host1x_get_dma_mask(struct host1x *host1x); ++ + /** + * struct host1x_client_ops - host1x client operations + * @init: host1x client initialization code + +From patchwork Wed Mar 25 20:16:04 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Thierry Reding +X-Patchwork-Id: 1261639 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=none (no SPF record) + smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; 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+ Wed, 25 Mar 2020 13:16:08 -0700 (PDT) +Received: from localhost + (p200300E41F4A9B0076D02BFFFE273F51.dip0.t-ipconnect.de. + [2003:e4:1f4a:9b00:76d0:2bff:fe27:3f51]) + by smtp.gmail.com with ESMTPSA id + e9sm151985wrw.30.2020.03.25.13.16.07 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Wed, 25 Mar 2020 13:16:07 -0700 (PDT) +From: Thierry Reding +To: Thierry Reding +Cc: dri-devel@lists.freedesktop.org, linux-tegra@vger.kernel.org +Subject: [PATCH 2/2] gpu: host1x: Use SMMU on Tegra124 and Tegra210 +Date: Wed, 25 Mar 2020 21:16:04 +0100 +Message-Id: <20200325201604.833898-2-thierry.reding@gmail.com> +X-Mailer: git-send-email 2.24.1 +In-Reply-To: <20200325201604.833898-1-thierry.reding@gmail.com> +References: <20200325201604.833898-1-thierry.reding@gmail.com> +MIME-Version: 1.0 +Sender: linux-tegra-owner@vger.kernel.org +Precedence: bulk +List-ID: +X-Mailing-List: linux-tegra@vger.kernel.org + +From: Thierry Reding + +Tegra124 and Tegra210 support addressing more than 32 bits of physical +memory. However, since their host1x does not support the wide GATHER +opcode, they should use the SMMU if at all possible to ensure that all +the system memory can be used for command buffers, irrespective of +whether or not the host1x firewall is enabled. + +Signed-off-by: Thierry Reding +Tested-by: Jon Hunter +--- + drivers/gpu/host1x/dev.c | 46 ++++++++++++++++++++++++++++++++++++---- + 1 file changed, 42 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c +index 40a4b9f8b861..d24344e91922 100644 +--- a/drivers/gpu/host1x/dev.c ++++ b/drivers/gpu/host1x/dev.c +@@ -192,17 +192,55 @@ static void host1x_setup_sid_table(struct host1x *host) + } + } + ++static bool host1x_wants_iommu(struct host1x *host1x) ++{ ++ /* ++ * If we support addressing a maximum of 32 bits of physical memory ++ * and if the host1x firewall is enabled, there's no need to enable ++ * IOMMU support. This can happen for example on Tegra20, Tegra30 ++ * and Tegra114. ++ * ++ * Tegra124 and later can address up to 34 bits of physical memory and ++ * many platforms come equipped with more than 2 GiB of system memory, ++ * which requires crossing the 4 GiB boundary. But there's a catch: on ++ * SoCs before Tegra186 (i.e. Tegra124 and Tegra210), the host1x can ++ * only address up to 32 bits of memory in GATHER opcodes, which means ++ * that command buffers need to either be in the first 2 GiB of system ++ * memory (which could quickly lead to memory exhaustion), or command ++ * buffers need to be treated differently from other buffers (which is ++ * not possible with the current ABI). ++ * ++ * A third option is to use the IOMMU in these cases to make sure all ++ * buffers will be mapped into a 32-bit IOVA space that host1x can ++ * address. This allows all of the system memory to be used and works ++ * within the limitations of the host1x on these SoCs. ++ * ++ * In summary, default to enable IOMMU on Tegra124 and later. For any ++ * of the earlier SoCs, only use the IOMMU for additional safety when ++ * the host1x firewall is disabled. ++ */ ++ if (host1x->info->dma_mask <= DMA_BIT_MASK(32)) { ++ if (IS_ENABLED(CONFIG_TEGRA_HOST1X_FIREWALL)) ++ return false; ++ } ++ ++ return true; ++} ++ + static struct iommu_domain *host1x_iommu_attach(struct host1x *host) + { + struct iommu_domain *domain = iommu_get_domain_for_dev(host->dev); + int err; + + /* +- * If the host1x firewall is enabled, there's no need to enable IOMMU +- * support. Similarly, if host1x is already attached to an IOMMU (via +- * the DMA API), don't try to attach again. ++ * We may not always want to enable IOMMU support (for example if the ++ * host1x firewall is already enabled and we don't support addressing ++ * more than 32 bits of physical memory), so check for that first. ++ * ++ * Similarly, if host1x is already attached to an IOMMU (via the DMA ++ * API), don't try to attach again. + */ +- if (IS_ENABLED(CONFIG_TEGRA_HOST1X_FIREWALL) || domain) ++ if (!host1x_wants_iommu(host) || domain) + return domain; + + host->group = iommu_group_get(host->dev); diff --git a/arm64-dts-imx8mq-phanbell-Add-support-for-ethernet.patch b/arm64-dts-imx8mq-phanbell-Add-support-for-ethernet.patch new file mode 100644 index 000000000..efa8393c3 --- /dev/null +++ b/arm64-dts-imx8mq-phanbell-Add-support-for-ethernet.patch @@ -0,0 +1,200 @@ +From patchwork Tue Feb 11 13:48:28 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Alifer Moraes +X-Patchwork-Id: 11375533 +Return-Path: + +Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org + [172.30.200.123]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E7DAC92A + for ; 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+ Tue, 11 Feb 2020 05:48:53 -0800 (PST) +Received: from NXL86673.nxp.com ([177.221.114.206]) + by smtp.googlemail.com with ESMTPSA id h6sm2158936qtr.33.2020.02.11.05.48.50 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Tue, 11 Feb 2020 05:48:52 -0800 (PST) +From: Alifer Moraes +To: robh+dt@kernel.org +Subject: [PATCH] arm64: dts: imx8mq-phanbell: Add support for ethernet +Date: Tue, 11 Feb 2020 10:48:28 -0300 +Message-Id: <20200211134828.138-1-alifer.wsdm@gmail.com> +X-Mailer: git-send-email 2.17.1 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20200211_054858_316312_8FE28FDF +X-CRM114-Status: GOOD ( 10.43 ) +X-Spam-Score: -0.2 (/) +X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: + Content analysis details: (-0.2 points) + pts rule name description + ---- ---------------------- + -------------------------------------------------- + -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, + no trust [2607:f8b0:4864:20:0:0:0:841 listed in] + [list.dnswl.org] + 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail + provider [alifer.wsdm[at]gmail.com] + -0.0 SPF_PASS SPF: sender matches SPF record + 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record + 0.1 DKIM_SIGNED Message has a DKIM or DK signature, + not necessarily + valid + -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from + envelope-from domain + -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature + -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from + author's domain +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.29 +Precedence: list +List-Id: +List-Unsubscribe: + , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: + , + +Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, festevam@gmail.com, + s.hauer@pengutronix.de, linux-kernel@vger.kernel.org, + Alifer Moraes , marco.franchi@nxp.com, + shawnguo@kernel.org, linux-arm-kernel@lists.infradead.org +MIME-Version: 1.0 +Sender: "linux-arm-kernel" +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org + +Add support for ethernet on Google's i.MX 8MQ Phanbell + +Signed-off-by: Alifer Moraes +--- + .../boot/dts/freescale/imx8mq-phanbell.dts | 41 +++++++++++++++++++ + 1 file changed, 41 insertions(+) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mq-phanbell.dts b/arch/arm64/boot/dts/freescale/imx8mq-phanbell.dts +index 3f2a489a4ad8..16ed13c44a47 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mq-phanbell.dts ++++ b/arch/arm64/boot/dts/freescale/imx8mq-phanbell.dts +@@ -201,6 +201,27 @@ + }; + }; + ++&fec1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_fec1>; ++ phy-mode = "rgmii-id"; ++ phy-reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; ++ phy-reset-duration = <10>; ++ phy-reset-post-delay = <30>; ++ phy-handle = <ðphy0>; ++ fsl,magic-packet; ++ status = "okay"; ++ ++ mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ethphy0: ethernet-phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0>; ++ }; ++ }; ++}; ++ + &uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; +@@ -254,6 +275,26 @@ + }; + + &iomuxc { ++ pinctrl_fec1: fec1grp { ++ fsl,pins = < ++ MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3 ++ MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO 0x23 ++ MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f ++ MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f ++ MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f ++ MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f ++ MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 ++ MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 ++ MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 ++ MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 ++ MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f ++ MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 ++ MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 ++ MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f ++ MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19 ++ >; ++ }; ++ + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x4000007f diff --git a/arm64-pine64-pinephone.patch b/arm64-pine64-pinephone.patch new file mode 100644 index 000000000..640d53e33 --- /dev/null +++ b/arm64-pine64-pinephone.patch @@ -0,0 +1,568 @@ +From 836821a0addbd8589e949801aaa7be244703c7f8 Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Thu, 27 Feb 2020 02:26:48 +0100 +Subject: [PATCH 1/3] arm64: dts: sun50i-a64: Add i2c2 pins + +PinePhone needs I2C2 pins description. Add it, and make it default +for i2c2, since it's the only possiblilty. + +Signed-off-by: Ondrej Jirman +Signed-off-by: Maxime Ripard +--- + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +index 862b47dc9dc9..107a48f9c5b3 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +@@ -671,6 +671,11 @@ i2c1_pins: i2c1-pins { + function = "i2c1"; + }; + ++ i2c2_pins: i2c2-pins { ++ pins = "PE14", "PE15"; ++ function = "i2c2"; ++ }; ++ + /omit-if-no-ref/ + lcd_rgb666_pins: lcd-rgb666-pins { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", +@@ -958,12 +963,13 @@ i2c2: i2c@1c2b400 { + interrupts = ; + clocks = <&ccu CLK_BUS_I2C2>; + resets = <&ccu RST_BUS_I2C2>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c2_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + +- + spi0: spi@1c68000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x01c68000 0x1000>; +-- +2.24.1 + +From 5c4e2cd9e8b600cc622c10543f69fcd897557eee Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Thu, 27 Feb 2020 02:26:49 +0100 +Subject: [PATCH 2/3] dt-bindings: arm: sunxi: Add PinePhone 1.0 and 1.1 + bindings + +Document board compatible names for Pine64 PinePhone: + +- 1.0 - Developer variant +- 1.1 - Braveheart variant + +Signed-off-by: Ondrej Jirman +Reviewed-by: Rob Herring +Signed-off-by: Maxime Ripard +--- + Documentation/devicetree/bindings/arm/sunxi.yaml | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml +index 159060b65c5d..c632252be48b 100644 +--- a/Documentation/devicetree/bindings/arm/sunxi.yaml ++++ b/Documentation/devicetree/bindings/arm/sunxi.yaml +@@ -636,6 +636,16 @@ properties: + - const: pine64,pinebook + - const: allwinner,sun50i-a64 + ++ - description: Pine64 PinePhone Developer Batch (1.0) ++ items: ++ - const: pine64,pinephone-1.0 ++ - const: allwinner,sun50i-a64 ++ ++ - description: Pine64 PinePhone Braveheart (1.1) ++ items: ++ - const: pine64,pinephone-1.1 ++ - const: allwinner,sun50i-a64 ++ + - description: Pine64 PineTab + items: + - const: pine64,pinetab +-- +2.24.1 + +From 697f60799172569e8d502a44ad98994f2c48778c Mon Sep 17 00:00:00 2001 +From: Ondrej Jirman +Date: Thu, 27 Feb 2020 02:26:50 +0100 +Subject: [PATCH 3/3] arm64: dts: allwinner: Add initial support for Pine64 + PinePhone + +At the moment PinePhone comes in two slightly incompatible variants: + +- 1.0: Early Developer Batch +- 1.1: Braveheart Batch + +There will be at least one more incompatible variant in the very near +future, so let's start by sharing the dtsi among multiple variants, +right away, even though the HW description doesn't yet include the +different bits. + +The differences between 1.0 and 1.1 are: change in pins that control +the flash LED, differences in modem power status signal routing, and +maybe some other subtler things, that have not been determined yet. + +This is a basic DT that includes only features that are already +supported by mainline drivers. + +Co-developed-by: Samuel Holland +Signed-off-by: Samuel Holland +Co-developed-by: Martijn Braam +Signed-off-by: Martijn Braam +Co-developed-by: Luca Weiss +Signed-off-by: Luca Weiss +Signed-off-by: Bhushan Shah +Signed-off-by: Icenowy Zheng +Signed-off-by: Ondrej Jirman +Signed-off-by: Maxime Ripard +--- + arch/arm64/boot/dts/allwinner/Makefile | 2 + + .../allwinner/sun50i-a64-pinephone-1.0.dts | 11 + + .../allwinner/sun50i-a64-pinephone-1.1.dts | 11 + + .../dts/allwinner/sun50i-a64-pinephone.dtsi | 379 ++++++++++++++++++ + 4 files changed, 403 insertions(+) + create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts + create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts + create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi + +diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile +index 6dad63881cd3..e4d3cd0ac5bb 100644 +--- a/arch/arm64/boot/dts/allwinner/Makefile ++++ b/arch/arm64/boot/dts/allwinner/Makefile +@@ -9,6 +9,8 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-lts.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinebook.dtb ++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinephone-1.0.dtb ++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinephone-1.1.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinetab.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts +new file mode 100644 +index 000000000000..0c42272106af +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.0.dts +@@ -0,0 +1,11 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++// Copyright (C) 2020 Ondrej Jirman ++ ++/dts-v1/; ++ ++#include "sun50i-a64-pinephone.dtsi" ++ ++/ { ++ model = "Pine64 PinePhone Developer Batch (1.0)"; ++ compatible = "pine64,pinephone-1.0", "allwinner,sun50i-a64"; ++}; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts +new file mode 100644 +index 000000000000..06a775c41664 +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts +@@ -0,0 +1,11 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++// Copyright (C) 2020 Ondrej Jirman ++ ++/dts-v1/; ++ ++#include "sun50i-a64-pinephone.dtsi" ++ ++/ { ++ model = "Pine64 PinePhone Braveheart (1.1)"; ++ compatible = "pine64,pinephone-1.1", "allwinner,sun50i-a64"; ++}; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi +new file mode 100644 +index 000000000000..cefda145c3c9 +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi +@@ -0,0 +1,379 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++// Copyright (C) 2019 Icenowy Zheng ++// Copyright (C) 2020 Martijn Braam ++// Copyright (C) 2020 Ondrej Jirman ++ ++#include "sun50i-a64.dtsi" ++#include "sun50i-a64-cpu-opp.dtsi" ++ ++#include ++#include ++#include ++#include ++ ++/ { ++ aliases { ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ blue { ++ function = LED_FUNCTION_INDICATOR; ++ color = ; ++ gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */ ++ }; ++ ++ green { ++ function = LED_FUNCTION_INDICATOR; ++ color = ; ++ gpios = <&pio 3 18 GPIO_ACTIVE_HIGH>; /* PD18 */ ++ }; ++ ++ red { ++ function = LED_FUNCTION_INDICATOR; ++ color = ; ++ gpios = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */ ++ }; ++ }; ++ ++ speaker_amp: audio-amplifier { ++ compatible = "simple-audio-amplifier"; ++ enable-gpios = <&pio 2 7 GPIO_ACTIVE_HIGH>; /* PC7 */ ++ sound-name-prefix = "Speaker Amp"; ++ }; ++ ++ vibrator { ++ compatible = "gpio-vibrator"; ++ enable-gpios = <&pio 3 2 GPIO_ACTIVE_HIGH>; /* PD2 */ ++ vcc-supply = <®_dcdc1>; ++ }; ++}; ++ ++&codec { ++ status = "okay"; ++}; ++ ++&codec_analog { ++ cpvdd-supply = <®_eldo1>; ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu1 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu2 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu3 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&dai { ++ status = "okay"; ++}; ++ ++&ehci0 { ++ status = "okay"; ++}; ++ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ /* Magnetometer */ ++ lis3mdl@1e { ++ compatible = "st,lis3mdl-magn"; ++ reg = <0x1e>; ++ vdd-supply = <®_dldo1>; ++ vddio-supply = <®_dldo1>; ++ }; ++ ++ /* Accelerometer/gyroscope */ ++ mpu6050@68 { ++ compatible = "invensense,mpu6050"; ++ reg = <0x68>; ++ interrupt-parent = <&pio>; ++ interrupts = <7 5 IRQ_TYPE_EDGE_RISING>; /* PH5 */ ++ vdd-supply = <®_dldo1>; ++ vddio-supply = <®_dldo1>; ++ }; ++}; ++ ++/* Connected to pogo pins (external spring based pinheader for user addons) */ ++&i2c2 { ++ status = "okay"; ++}; ++ ++&lradc { ++ vref-supply = <®_aldo3>; ++ status = "okay"; ++ ++ button-200 { ++ label = "Volume Up"; ++ linux,code = ; ++ channel = <0>; ++ voltage = <200000>; ++ }; ++ ++ button-400 { ++ label = "Volume Down"; ++ linux,code = ; ++ channel = <0>; ++ voltage = <400000>; ++ }; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins>; ++ vmmc-supply = <®_dcdc1>; ++ vqmmc-supply = <®_dcdc1>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ ++ disable-wp; ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&mmc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc2_pins>; ++ vmmc-supply = <®_dcdc1>; ++ vqmmc-supply = <®_dcdc1>; ++ bus-width = <8>; ++ non-removable; ++ cap-mmc-hw-reset; ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&pio { ++ vcc-pb-supply = <®_dcdc1>; ++ vcc-pc-supply = <®_dcdc1>; ++ vcc-pd-supply = <®_dcdc1>; ++ vcc-pe-supply = <®_aldo1>; ++ vcc-pf-supply = <®_dcdc1>; ++ vcc-pg-supply = <®_dldo4>; ++ vcc-ph-supply = <®_dcdc1>; ++}; ++ ++&r_pio { ++ /* ++ * FIXME: We can't add that supply for now since it would ++ * create a circular dependency between pinctrl, the regulator ++ * and the RSB Bus. ++ * ++ * vcc-pl-supply = <®_aldo2>; ++ */ ++}; ++ ++&r_rsb { ++ status = "okay"; ++ ++ axp803: pmic@3a3 { ++ compatible = "x-powers,axp803"; ++ reg = <0x3a3>; ++ interrupt-parent = <&r_intc>; ++ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; ++ }; ++}; ++ ++#include "axp803.dtsi" ++ ++&ac_power_supply { ++ status = "okay"; ++}; ++ ++&battery_power_supply { ++ status = "okay"; ++}; ++ ++®_aldo1 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "dovdd-csi"; ++}; ++ ++®_aldo2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc-pl"; ++}; ++ ++®_aldo3 { ++ regulator-always-on; ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-pll-avcc"; ++}; ++ ++®_dcdc1 { ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-3v3"; ++}; ++ ++®_dcdc2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-name = "vdd-cpux"; ++}; ++ ++/* DCDC3 is polyphased with DCDC2 */ ++ ++®_dcdc5 { ++ regulator-always-on; ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "vcc-dram"; ++}; ++ ++®_dcdc6 { ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-sys"; ++}; ++ ++®_dldo1 { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-dsi-sensor"; ++}; ++ ++®_dldo2 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc-mipi-io"; ++}; ++ ++®_dldo3 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++ regulator-name = "avdd-csi"; ++}; ++ ++®_dldo4 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-wifi-io"; ++}; ++ ++®_eldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc-lpddr"; ++}; ++ ++®_eldo3 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "dvdd-1v8-csi"; ++}; ++ ++®_fldo1 { ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "vcc-1v2-hsic"; ++}; ++ ++®_fldo2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-cpus"; ++}; ++ ++®_ldo_io0 { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-lcd-ctp-stk"; ++ status = "okay"; ++}; ++ ++®_ldo_io1 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc-1v8-typec"; ++ status = "okay"; ++}; ++ ++®_rtc_ldo { ++ regulator-name = "vcc-rtc"; ++}; ++ ++&sound { ++ status = "okay"; ++ simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>; ++ simple-audio-card,widgets = "Microphone", "Headset Microphone", ++ "Microphone", "Internal Microphone", ++ "Headphone", "Headphone Jack", ++ "Speaker", "Internal Earpiece", ++ "Speaker", "Internal Speaker"; ++ simple-audio-card,routing = ++ "Headphone Jack", "HP", ++ "Internal Earpiece", "EARPIECE", ++ "Internal Speaker", "Speaker Amp OUTL", ++ "Internal Speaker", "Speaker Amp OUTR", ++ "Speaker Amp INL", "LINEOUT", ++ "Speaker Amp INR", "LINEOUT", ++ "Left DAC", "AIF1 Slot 0 Left", ++ "Right DAC", "AIF1 Slot 0 Right", ++ "AIF1 Slot 0 Left ADC", "Left ADC", ++ "AIF1 Slot 0 Right ADC", "Right ADC", ++ "Internal Microphone", "MBIAS", ++ "MIC1", "Internal Microphone", ++ "Headset Microphone", "HBIAS", ++ "MIC2", "Headset Microphone"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pb_pins>; ++ status = "okay"; ++}; ++ ++/* Connected to the modem (hardware flow control can't be used) */ ++&uart3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart3_pins>; ++ status = "okay"; ++}; ++ ++&usb_otg { ++ dr_mode = "peripheral"; ++ status = "okay"; ++}; ++ ++&usb_power_supply { ++ status = "okay"; ++}; ++ ++&usbphy { ++ status = "okay"; ++}; +-- +2.24.1 + diff --git a/arm64-pine64-pinetab.patch b/arm64-pine64-pinetab.patch new file mode 100644 index 000000000..cafbc71bd --- /dev/null +++ b/arm64-pine64-pinetab.patch @@ -0,0 +1,583 @@ +From e15d9c7cb74033f668c19a65abfd77ed7331f91e Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng +Date: Thu, 16 Jan 2020 11:36:35 +0800 +Subject: [PATCH 1/2] dt-bindings: arm: sunxi: add binding for PineTab tablet + +Add the device tree binding for Pine64's PineTab tablet, which uses +Allwinner A64 SoC. + +Signed-off-by: Icenowy Zheng +Reviewed-by: Rob Herring +Signed-off-by: Maxime Ripard +--- + Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml +index 327ce6730823..159060b65c5d 100644 +--- a/Documentation/devicetree/bindings/arm/sunxi.yaml ++++ b/Documentation/devicetree/bindings/arm/sunxi.yaml +@@ -636,6 +636,11 @@ properties: + - const: pine64,pinebook + - const: allwinner,sun50i-a64 + ++ - description: Pine64 PineTab ++ items: ++ - const: pine64,pinetab ++ - const: allwinner,sun50i-a64 ++ + - description: Pine64 SoPine Baseboard + items: + - const: pine64,sopine-baseboard +-- +2.24.1 + +From d7b56d337bb980f0b996958ec6808253c4f50771 Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng +Date: Thu, 16 Jan 2020 11:36:36 +0800 +Subject: [PATCH 2/2] arm64: dts: allwinner: a64: add support for PineTab + +PineTab is a 10.1" tablet by Pine64 with Allwinner A64 inside. + +It includes the following peripherals: + +USB: +- A microUSB Type-B port connected to the OTG-capable USB PHY of +Allwinner A64. The ID pin is connected to a GPIO of the A64 SoC, and the +Vbus is connected to the Vbus of AXP803 PMIC. These enables OTG +functionality on this port. +- A USB Type-A port is connected to the internal hub attached to the +non-OTG USB PHY of Allwinner A64. +- There are reserved pins for an external keyboard connected to the +internal hub. + +Power: +- The microUSB port has its Vbus connected to AXP803, mentioned above. +- A DC jack (of a strange size, 2.5mm outer diameter) is connected to +the ACIN of AXP803. +- A Li-Polymer battery is connected to the battery pins of AXP803. + +Storage: +- An tradition Pine64 eMMC slot is on the board, mounted with an eMMC +module by factory. +- An external microSD slot is hidden under a protect case. + +Display: +- A MIPI-DSI LCD panel (800x1280) is connected to the DSI port of A64 SoC. +- A mini HDMI port. + +Input: +- A touch panel attached to a Goodix GT9271 touch controller. +- Volume keys connected to the LRADC of the A64 SoC. + +Camera: +- An OV5640 CMOS camera is at rear, connected to the CSI bus of A64 SoC. +- A GC2145 CMOS camera is at front, shares the same CSI bus with OV5640. + +Audio: +- A headphone jack is conencted to the SoC's internal codec. +- A speaker connected is to the Line Out port of SoC's internal codec, via +an amplifier. + +Misc: +- Debug UART is muxed with the headphone jack, with the switch next to +the microSD slot. +- A bosch BMA223 accelerometer is connected to the I2C bus of A64 SoC. +- Wi-Fi and Bluetooth are available via a RTL8723CS chip, similar to the +one in Pinebook. + +This commit adds a basically usable device tree for it, implementing +most of the features mentioned above. HDMI is not supported now because +bad LCD-HDMI coexistence situation of mainline A64 display driver, the +front camera currently lacks a driver and a facility to share the bus +with the rear one, and the accelerometer currently lacks a DT binding. + +Signed-off-by: Icenowy Zheng +Signed-off-by: Maxime Ripard +--- + arch/arm64/boot/dts/allwinner/Makefile | 1 + + .../boot/dts/allwinner/sun50i-a64-pinetab.dts | 460 ++++++++++++++++++ + 2 files changed, 461 insertions(+) + create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts + +diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile +index cf4f78617c3f..6dad63881cd3 100644 +--- a/arch/arm64/boot/dts/allwinner/Makefile ++++ b/arch/arm64/boot/dts/allwinner/Makefile +@@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-lts.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinebook.dtb ++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinetab.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus.dtb +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts +new file mode 100644 +index 000000000000..316e8a443913 +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts +@@ -0,0 +1,460 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (C) 2019 Icenowy Zheng ++ * ++ */ ++ ++/dts-v1/; ++ ++#include "sun50i-a64.dtsi" ++#include "sun50i-a64-cpu-opp.dtsi" ++ ++#include ++#include ++#include ++ ++/ { ++ model = "PineTab"; ++ compatible = "pine64,pinetab", "allwinner,sun50i-a64"; ++ ++ aliases { ++ serial0 = &uart0; ++ ethernet0 = &rtl8723cs; ++ }; ++ ++ backlight: backlight { ++ compatible = "pwm-backlight"; ++ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; ++ brightness-levels = <0 16 18 20 22 24 26 29 32 35 38 42 46 51 56 62 68 75 83 91 100>; ++ default-brightness-level = <15>; ++ enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */ ++ power-supply = <&vdd_bl>; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ i2c-csi { ++ compatible = "i2c-gpio"; ++ sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>; /* PE13 */ ++ scl-gpios = <&pio 4 12 GPIO_ACTIVE_HIGH>; /* PE12 */ ++ i2c-gpio,delay-us = <5>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ /* Rear camera */ ++ ov5640: camera@3c { ++ compatible = "ovti,ov5640"; ++ reg = <0x3c>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&csi_mclk_pin>; ++ clocks = <&ccu CLK_CSI_MCLK>; ++ clock-names = "xclk"; ++ ++ AVDD-supply = <®_dldo3>; ++ DOVDD-supply = <®_aldo1>; ++ DVDD-supply = <®_eldo3>; ++ reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; /* PE14 */ ++ powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */ ++ ++ port { ++ ov5640_ep: endpoint { ++ remote-endpoint = <&csi_ep>; ++ bus-width = <8>; ++ hsync-active = <1>; /* Active high */ ++ vsync-active = <0>; /* Active low */ ++ data-active = <1>; /* Active high */ ++ pclk-sample = <1>; /* Rising */ ++ }; ++ }; ++ }; ++ }; ++ ++ speaker_amp: audio-amplifier { ++ compatible = "simple-audio-amplifier"; ++ enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ ++ sound-name-prefix = "Speaker Amp"; ++ }; ++ ++ vdd_bl: regulator@0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "bl-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ ++ enable-active-high; ++ }; ++ ++ wifi_pwrseq: wifi_pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ ++ post-power-on-delay-ms = <200>; ++ }; ++}; ++ ++&codec { ++ status = "okay"; ++}; ++ ++&codec_analog { ++ hpvcc-supply = <®_eldo1>; ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu1 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu2 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&cpu3 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++&csi { ++ status = "okay"; ++ ++ port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ csi_ep: endpoint { ++ remote-endpoint = <&ov5640_ep>; ++ bus-width = <8>; ++ hsync-active = <1>; /* Active high */ ++ vsync-active = <0>; /* Active low */ ++ data-active = <1>; /* Active high */ ++ pclk-sample = <1>; /* Rising */ ++ }; ++ }; ++}; ++ ++&dai { ++ status = "okay"; ++}; ++ ++&de { ++ status = "okay"; ++}; ++ ++&dphy { ++ status = "okay"; ++}; ++ ++&dsi { ++ vcc-dsi-supply = <®_dldo1>; ++ status = "okay"; ++ ++ panel@0 { ++ compatible = "feixin,k101-im2ba02"; ++ reg = <0>; ++ avdd-supply = <®_dc1sw>; ++ dvdd-supply = <®_dc1sw>; ++ cvdd-supply = <®_ldo_io1>; ++ reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ ++ backlight = <&backlight>; ++ }; ++}; ++ ++&ehci0 { ++ status = "okay"; ++}; ++ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ touchscreen@5d { ++ compatible = "goodix,gt9271"; ++ reg = <0x5d>; ++ interrupt-parent = <&pio>; ++ interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */ ++ irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ ++ reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */ ++ AVDD28-supply = <®_ldo_io1>; ++ }; ++}; ++ ++&i2c0_pins { ++ bias-pull-up; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ /* TODO: add Bochs BMA223 accelerometer here */ ++}; ++ ++&lradc { ++ vref-supply = <®_aldo3>; ++ status = "okay"; ++ ++ button-200 { ++ label = "Volume Up"; ++ linux,code = ; ++ channel = <0>; ++ voltage = <200000>; ++ }; ++ ++ button-400 { ++ label = "Volume Down"; ++ linux,code = ; ++ channel = <0>; ++ voltage = <400000>; ++ }; ++}; ++ ++&mixer1 { ++ status = "okay"; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins>; ++ vmmc-supply = <®_dcdc1>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; ++ disable-wp; ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&mmc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc1_pins>; ++ vmmc-supply = <®_dldo4>; ++ vqmmc-supply = <®_eldo1>; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++ ++ rtl8723cs: wifi@1 { ++ reg = <1>; ++ }; ++}; ++ ++&mmc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc2_pins>; ++ vmmc-supply = <®_dcdc1>; ++ vqmmc-supply = <®_dcdc1>; ++ bus-width = <8>; ++ non-removable; ++ cap-mmc-hw-reset; ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&pwm { ++ status = "okay"; ++}; ++ ++&r_rsb { ++ status = "okay"; ++ ++ axp803: pmic@3a3 { ++ compatible = "x-powers,axp803"; ++ reg = <0x3a3>; ++ interrupt-parent = <&r_intc>; ++ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; ++ x-powers,drive-vbus-en; ++ }; ++}; ++ ++#include "axp803.dtsi" ++ ++&ac_power_supply { ++ status = "okay"; ++}; ++ ++&battery_power_supply { ++ status = "okay"; ++}; ++ ++®_aldo1 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++ regulator-name = "dovdd-csi"; ++}; ++ ++®_aldo2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-pl"; ++}; ++ ++®_aldo3 { ++ regulator-always-on; ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-pll-avcc"; ++}; ++ ++®_dc1sw { ++ regulator-name = "vcc-lcd"; ++}; ++ ++®_dcdc1 { ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-3v3"; ++}; ++ ++®_dcdc2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-name = "vdd-cpux"; ++}; ++ ++/* DCDC3 is polyphased with DCDC2 */ ++ ++®_dcdc5 { ++ regulator-always-on; ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "vcc-dram"; ++}; ++ ++®_dcdc6 { ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-sys"; ++}; ++ ++®_dldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-hdmi-dsi-sensor"; ++}; ++ ++®_dldo3 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++ regulator-name = "avdd-csi"; ++}; ++ ++®_dldo4 { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-wifi"; ++}; ++ ++®_drivevbus { ++ regulator-name = "usb0-vbus"; ++ status = "okay"; ++}; ++ ++®_eldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "cpvdd"; ++}; ++ ++®_eldo2 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca-1v8"; ++}; ++ ++®_eldo3 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "dvdd-1v8-csi"; ++}; ++ ++®_fldo1 { ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "vcc-1v2-hsic"; ++}; ++ ++®_fldo2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-cpus"; ++}; ++ ++®_ldo_io0 { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-usb"; ++ status = "okay"; ++}; ++ ++®_ldo_io1 { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-enable-ramp-delay = <3500000>; ++ regulator-name = "vcc-touchscreen"; ++ status = "okay"; ++}; ++ ++®_rtc_ldo { ++ regulator-name = "vcc-rtc"; ++}; ++ ++&sound { ++ status = "okay"; ++ simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>; ++ simple-audio-card,widgets = "Microphone", "Internal Microphone Left", ++ "Microphone", "Internal Microphone Right", ++ "Headphone", "Headphone Jack", ++ "Speaker", "Internal Speaker"; ++ simple-audio-card,routing = ++ "Left DAC", "AIF1 Slot 0 Left", ++ "Right DAC", "AIF1 Slot 0 Right", ++ "Speaker Amp INL", "LINEOUT", ++ "Speaker Amp INR", "LINEOUT", ++ "Internal Speaker", "Speaker Amp OUTL", ++ "Internal Speaker", "Speaker Amp OUTR", ++ "Headphone Jack", "HP", ++ "AIF1 Slot 0 Left ADC", "Left ADC", ++ "AIF1 Slot 0 Right ADC", "Right ADC", ++ "Internal Microphone Left", "MBIAS", ++ "MIC1", "Internal Microphone Left", ++ "Internal Microphone Right", "HBIAS", ++ "MIC2", "Internal Microphone Right"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pb_pins>; ++ status = "okay"; ++}; ++ ++&usb_otg { ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++&usb_power_supply { ++ status = "okay"; ++}; ++ ++&usbphy { ++ usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ ++ usb0_vbus_power-supply = <&usb_power_supply>; ++ usb0_vbus-supply = <®_drivevbus>; ++ usb1_vbus-supply = <®_ldo_io0>; ++ status = "okay"; ++}; +-- +2.24.1 + diff --git a/arm64-pinebook-fixes.patch b/arm64-pinebook-fixes.patch new file mode 100644 index 000000000..410487293 --- /dev/null +++ b/arm64-pinebook-fixes.patch @@ -0,0 +1,429 @@ +From e7a6e6b0c6506a9f070dbfb2ca948770c47a1d78 Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Sun, 19 Jan 2020 10:30:57 -0600 +Subject: [PATCH 1/8] arm64: dts: allwinner: pinebook: Remove unused vcc3v3 + regulator + +This fixed regulator has no consumers, GPIOs, or other connections. +Remove it. + +Signed-off-by: Samuel Holland +Signed-off-by: Maxime Ripard +--- + arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts | 7 ------- + 1 file changed, 7 deletions(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +index 3d894b208901..ff32ca1a495e 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +@@ -63,13 +63,6 @@ lid_switch { + }; + }; + +- reg_vcc3v3: vcc3v3 { +- compatible = "regulator-fixed"; +- regulator-name = "vcc3v3"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- }; +- + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ +-- +2.24.1 + +From 5eea216437eeff908d6d2942bf893fb77ebfc111 Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Sun, 19 Jan 2020 10:30:59 -0600 +Subject: [PATCH 2/8] arm64: dts: allwinner: pinebook: Sort device tree nodes + +The r_i2c node should come before r_rsb, and in any case should not +separate the axp803 node from its subnodes. + +Signed-off-by: Samuel Holland +Signed-off-by: Maxime Ripard +--- + .../boot/dts/allwinner/sun50i-a64-pinebook.dts | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +index ff32ca1a495e..77784f7b1da7 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +@@ -172,6 +172,14 @@ &pwm { + status = "okay"; + }; + ++/* The ANX6345 eDP-bridge is on r_i2c */ ++&r_i2c { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&r_i2c_pl89_pins>; ++ status = "okay"; ++}; ++ + &r_rsb { + status = "okay"; + +@@ -183,14 +191,6 @@ axp803: pmic@3a3 { + }; + }; + +-/* The ANX6345 eDP-bridge is on r_i2c */ +-&r_i2c { +- clock-frequency = <100000>; +- pinctrl-names = "default"; +- pinctrl-0 = <&r_i2c_pl89_pins>; +- status = "okay"; +-}; +- + #include "axp803.dtsi" + + &ac_power_supply { +-- +2.24.1 + +From 4bdf53ffc64e5c6738c942dcdc422d5ca8a2070a Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Sun, 19 Jan 2020 10:31:00 -0600 +Subject: [PATCH 3/8] arm64: dts: allwinner: pinebook: Make simplefb more + consistent + +Boards generally reference the simplefb nodes from the SoC dtsi by +label, not by full path. simplefb_hdmi is already like this in the +Pinebook DTS. Update simplefb_lcd to match. + +Signed-off-by: Samuel Holland +Signed-off-by: Maxime Ripard +--- + .../arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +index 77784f7b1da7..224bed65d008 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +@@ -41,12 +41,6 @@ backlight: backlight { + + chosen { + stdout-path = "serial0:115200n8"; +- +- framebuffer-lcd { +- panel-supply = <®_dc1sw>; +- dvdd25-supply = <®_dldo2>; +- dvdd12-supply = <®_fldo1>; +- }; + }; + + gpio_keys { +@@ -316,6 +310,12 @@ ®_rtc_ldo { + regulator-name = "vcc-rtc"; + }; + ++&simplefb_lcd { ++ panel-supply = <®_dc1sw>; ++ dvdd25-supply = <®_dldo2>; ++ dvdd12-supply = <®_fldo1>; ++}; ++ + &simplefb_hdmi { + vcc-hdmi-supply = <®_dldo1>; + }; +-- +2.24.1 + +From c0f416de7141bbc713f080ad123b256f6320ec92 Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Sun, 19 Jan 2020 10:31:01 -0600 +Subject: [PATCH 4/8] arm64: dts: allwinner: pinebook: Document MMC0 CD pin + name + +Normally GPIO pin references are followed by a comment giving the pin +name for searchability. Add the comment here where it was missing. + +Signed-off-by: Samuel Holland +Signed-off-by: Maxime Ripard +--- + arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +index 224bed65d008..a1e15777d524 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +@@ -119,7 +119,7 @@ &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + vmmc-supply = <®_dcdc1>; +- cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + disable-wp; + bus-width = <4>; + status = "okay"; +-- +2.24.1 + +From 8818d55ec31fa6e0dc14fb7a4924b3e8d3ecef7d Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Sun, 19 Jan 2020 10:31:02 -0600 +Subject: [PATCH 5/8] arm64: dts: allwinner: pinebook: Add GPIO port regulators + +Allwinner A64 SoC has separate supplies for PC, PD, PE, PG and PL. + +VCC-PC and VCC-PG are supplied by ELDO1 at 1.8v. +VCC-PD is supplied by DCDC1 (VCC-IO) at 3.3v. +VCC-PE is supplied by ALDO1, and is unused. + +VCC-PL creates a circular dependency, so it is omitted for now. + +Signed-off-by: Samuel Holland +Signed-off-by: Maxime Ripard +--- + .../boot/dts/allwinner/sun50i-a64-pinebook.dts | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +index a1e15777d524..1ec39120323f 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +@@ -162,6 +162,13 @@ &ohci1 { + status = "okay"; + }; + ++&pio { ++ vcc-pc-supply = <®_eldo1>; ++ vcc-pd-supply = <®_dcdc1>; ++ vcc-pe-supply = <®_aldo1>; ++ vcc-pg-supply = <®_eldo1>; ++}; ++ + &pwm { + status = "okay"; + }; +@@ -174,6 +181,16 @@ &r_i2c { + status = "okay"; + }; + ++&r_pio { ++ /* ++ * FIXME: We can't add that supply for now since it would ++ * create a circular dependency between pinctrl, the regulator ++ * and the RSB Bus. ++ * ++ * vcc-pl-supply = <®_aldo2>; ++ */ ++}; ++ + &r_rsb { + status = "okay"; + +-- +2.24.1 + +From bd863f25d41173e140850772f9a02ffb3b3e0d6b Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Sun, 19 Jan 2020 10:31:03 -0600 +Subject: [PATCH 6/8] arm64: dts: allwinner: pinebook: Fix backlight regulator + +The output from the backlight regulator is labeled as "VBKLT" in the +schematic. Using the equation and resistor values from the schematic, +the output is approximately 18V, not 3.3V. Since the regulator in use +(SS6640STR) is a boost regulator powered by PS (battery or AC input), +which are both >3.3V, the output could not be 3.3V anyway. + +Signed-off-by: Samuel Holland +Signed-off-by: Maxime Ripard +--- + .../dts/allwinner/sun50i-a64-pinebook.dts | 20 +++++++++---------- + 1 file changed, 10 insertions(+), 10 deletions(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +index 1ec39120323f..313f4e6edc19 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +@@ -21,22 +21,13 @@ aliases { + ethernet0 = &rtl8723cs; + }; + +- vdd_bl: regulator@0 { +- compatible = "regulator-fixed"; +- regulator-name = "bl-3v3"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ +- enable-active-high; +- }; +- + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 0 50000 0>; + brightness-levels = <0 5 10 15 20 30 40 55 70 85 100>; + default-brightness-level = <2>; + enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */ +- power-supply = <&vdd_bl>; ++ power-supply = <®_vbklt>; + }; + + chosen { +@@ -57,6 +48,15 @@ lid_switch { + }; + }; + ++ reg_vbklt: vbklt { ++ compatible = "regulator-fixed"; ++ regulator-name = "vbklt"; ++ regulator-min-microvolt = <18000000>; ++ regulator-max-microvolt = <18000000>; ++ gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ ++ enable-active-high; ++ }; ++ + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ +-- +2.24.1 + +From 425472eb612873c9c64b41df70020de58448bef3 Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Sun, 19 Jan 2020 10:31:04 -0600 +Subject: [PATCH 7/8] arm64: dts: allwinner: pinebook: Fix 5v0 boost regulator + +Now that AXP803 GPIO support is available, we can properly model +the hardware. Replace the use of GPIO0-LDO with a fixed regulator +controlled by GPIO0. This boost regulator is used to power the +(internal and external) USB ports, as well as the speakers. + +Signed-off-by: Samuel Holland +Signed-off-by: Maxime Ripard +--- + .../dts/allwinner/sun50i-a64-pinebook.dts | 27 +++++++++---------- + 1 file changed, 12 insertions(+), 15 deletions(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +index 313f4e6edc19..c06c540e6c08 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +@@ -57,6 +57,15 @@ reg_vbklt: vbklt { + enable-active-high; + }; + ++ reg_vcc5v0: vcc5v0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ gpio = <&axp_gpio 0 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ }; ++ + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ +@@ -64,12 +73,7 @@ wifi_pwrseq: wifi_pwrseq { + + speaker_amp: audio-amplifier { + compatible = "simple-audio-amplifier"; +- /* +- * TODO This is actually a fixed regulator controlled by +- * the GPIO line on the PMIC. This should be corrected +- * once GPIO support is added for this PMIC. +- */ +- VCC-supply = <®_ldo_io0>; ++ VCC-supply = <®_vcc5v0>; + enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ + sound-name-prefix = "Speaker Amp"; + }; +@@ -316,13 +320,6 @@ ®_fldo2 { + regulator-name = "vdd-cpus"; + }; + +-®_ldo_io0 { +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- regulator-name = "vcc-usb"; +- status = "okay"; +-}; +- + ®_rtc_ldo { + regulator-name = "vcc-rtc"; + }; +@@ -371,7 +368,7 @@ &usb_otg { + }; + + &usbphy { +- usb0_vbus-supply = <®_ldo_io0>; +- usb1_vbus-supply = <®_ldo_io0>; ++ usb0_vbus-supply = <®_vcc5v0>; ++ usb1_vbus-supply = <®_vcc5v0>; + status = "okay"; + }; +-- +2.24.1 + +From c3aea4ea2117f5dc28da3d4175fc93296653ecd5 Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Sun, 19 Jan 2020 10:30:58 -0600 +Subject: [PATCH 8/8] arm64: dts: allwinner: pinebook: Remove unused AXP803 + regulators + +The Pinebook does not use the CSI bus on the A64. In fact it does not +use GPIO port E for anything at all. Thus the following regulators are +not used and do not need voltages set: + + - ALDO1: Connected to VCC-PE only + - DLDO3: Not connected + - ELDO3: Not connected + +Signed-off-by: Samuel Holland +Signed-off-by: Maxime Ripard +--- + .../boot/dts/allwinner/sun50i-a64-pinebook.dts | 16 +--------------- + 1 file changed, 1 insertion(+), 15 deletions(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +index c06c540e6c08..12e513ba8f50 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +@@ -217,9 +217,7 @@ &battery_power_supply { + }; + + ®_aldo1 { +- regulator-min-microvolt = <2800000>; +- regulator-max-microvolt = <2800000>; +- regulator-name = "vcc-csi"; ++ regulator-name = "vcc-pe"; + }; + + ®_aldo2 { +@@ -282,12 +280,6 @@ ®_dldo2 { + regulator-name = "vcc-edp"; + }; + +-®_dldo3 { +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- regulator-name = "avdd-csi"; +-}; +- + ®_dldo4 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; +@@ -301,12 +293,6 @@ ®_eldo1 { + regulator-name = "cpvdd"; + }; + +-®_eldo3 { +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- regulator-name = "vdd-1v8-csi"; +-}; +- + ®_fldo1 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; +-- +2.24.1 + diff --git a/arm64-serial-8250_tegra-Create-Tegra-specific-8250-driver.patch b/arm64-serial-8250_tegra-Create-Tegra-specific-8250-driver.patch new file mode 100644 index 000000000..8f9dd4473 --- /dev/null +++ b/arm64-serial-8250_tegra-Create-Tegra-specific-8250-driver.patch @@ -0,0 +1,396 @@ +From patchwork Wed Jan 29 13:28:17 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Jon Hunter +X-Patchwork-Id: 1230891 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; 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Another benefit from doing this, is that the Tegra +specific codec in the generic Open Firmware 8250 driver can now be +removed. + +Signed-off-by: Jeff Brasen +Signed-off-by: Jon Hunter +--- + +Changes since V2: +- Added missing header for devm_ioremap (reported by kbuild test robot) +Changes since V1: +- Added support for COMPILE_TEST + + drivers/tty/serial/8250/8250_of.c | 28 ---- + drivers/tty/serial/8250/8250_tegra.c | 198 +++++++++++++++++++++++++++ + drivers/tty/serial/8250/Kconfig | 9 ++ + drivers/tty/serial/8250/Makefile | 1 + + 4 files changed, 208 insertions(+), 28 deletions(-) + create mode 100644 drivers/tty/serial/8250/8250_tegra.c + +diff --git a/drivers/tty/serial/8250/8250_of.c b/drivers/tty/serial/8250/8250_of.c +index 531ad67395e0..5e45cf8dbc6e 100644 +--- a/drivers/tty/serial/8250/8250_of.c ++++ b/drivers/tty/serial/8250/8250_of.c +@@ -7,7 +7,6 @@ + #include + #include + #include +-#include + #include + #include + #include +@@ -26,28 +25,6 @@ struct of_serial_info { + int line; + }; + +-#ifdef CONFIG_ARCH_TEGRA +-static void tegra_serial_handle_break(struct uart_port *p) +-{ +- unsigned int status, tmout = 10000; +- +- do { +- status = p->serial_in(p, UART_LSR); +- if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS)) +- status = p->serial_in(p, UART_RX); +- else +- break; +- if (--tmout == 0) +- break; +- udelay(1); +- } while (1); +-} +-#else +-static inline void tegra_serial_handle_break(struct uart_port *port) +-{ +-} +-#endif +- + static int of_8250_rs485_config(struct uart_port *port, + struct serial_rs485 *rs485) + { +@@ -211,10 +188,6 @@ static int of_platform_serial_setup(struct platform_device *ofdev, + port->rs485_config = of_8250_rs485_config; + + switch (type) { +- case PORT_TEGRA: +- port->handle_break = tegra_serial_handle_break; +- break; +- + case PORT_RT2880: + port->iotype = UPIO_AU; + break; +@@ -359,7 +332,6 @@ static const struct of_device_id of_platform_serial_table[] = { + { .compatible = "ns16550", .data = (void *)PORT_16550, }, + { .compatible = "ns16750", .data = (void *)PORT_16750, }, + { .compatible = "ns16850", .data = (void *)PORT_16850, }, +- { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, }, + { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, }, + { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, }, + { .compatible = "intel,xscale-uart", .data = (void *)PORT_XSCALE, }, +diff --git a/drivers/tty/serial/8250/8250_tegra.c b/drivers/tty/serial/8250/8250_tegra.c +new file mode 100644 +index 000000000000..c0ffad1572c6 +--- /dev/null ++++ b/drivers/tty/serial/8250/8250_tegra.c +@@ -0,0 +1,198 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Serial Port driver for Tegra devices ++ * ++ * Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "8250.h" ++ ++struct tegra_uart { ++ struct clk *clk; ++ struct reset_control *rst; ++ int line; ++}; ++ ++static void tegra_uart_handle_break(struct uart_port *p) ++{ ++ unsigned int status, tmout = 10000; ++ ++ do { ++ status = p->serial_in(p, UART_LSR); ++ if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS)) ++ status = p->serial_in(p, UART_RX); ++ else ++ break; ++ if (--tmout == 0) ++ break; ++ udelay(1); ++ } while (1); ++} ++ ++static int tegra_uart_probe(struct platform_device *pdev) ++{ ++ struct uart_8250_port port8250; ++ struct tegra_uart *uart; ++ struct uart_port *port; ++ struct resource *res; ++ int ret; ++ ++ uart = devm_kzalloc(&pdev->dev, sizeof(*uart), GFP_KERNEL); ++ if (!uart) ++ return -ENOMEM; ++ ++ memset(&port8250, 0, sizeof(port8250)); ++ ++ port = &port8250.port; ++ spin_lock_init(&port->lock); ++ ++ port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | ++ UPF_FIXED_TYPE; ++ port->iotype = UPIO_MEM32; ++ port->regshift = 2; ++ port->type = PORT_TEGRA; ++ port->irqflags |= IRQF_SHARED; ++ port->dev = &pdev->dev; ++ port->handle_break = tegra_uart_handle_break; ++ ++ ret = of_alias_get_id(pdev->dev.of_node, "serial"); ++ if (ret >= 0) ++ port->line = ret; ++ ++ ret = platform_get_irq(pdev, 0); ++ if (ret < 0) ++ return ret; ++ ++ port->irq = ret; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!res) ++ return -ENODEV; ++ ++ port->membase = devm_ioremap(&pdev->dev, res->start, ++ resource_size(res)); ++ if (!port->membase) ++ return -ENOMEM; ++ ++ port->mapbase = res->start; ++ port->mapsize = resource_size(res); ++ ++ uart->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL); ++ if (IS_ERR(uart->rst)) ++ return PTR_ERR(uart->rst); ++ ++ if (device_property_read_u32(&pdev->dev, "clock-frequency", ++ &port->uartclk)) { ++ uart->clk = devm_clk_get(&pdev->dev, NULL); ++ if (IS_ERR(uart->clk)) { ++ dev_err(&pdev->dev, "failed to get clock!\n"); ++ return -ENODEV; ++ } ++ ++ ret = clk_prepare_enable(uart->clk); ++ if (ret < 0) ++ return ret; ++ ++ port->uartclk = clk_get_rate(uart->clk); ++ } ++ ++ ret = reset_control_deassert(uart->rst); ++ if (ret) ++ goto err_clkdisable; ++ ++ ret = serial8250_register_8250_port(&port8250); ++ if (ret < 0) ++ goto err_clkdisable; ++ ++ platform_set_drvdata(pdev, uart); ++ uart->line = ret; ++ ++ return 0; ++ ++err_clkdisable: ++ clk_disable_unprepare(uart->clk); ++ ++ return ret; ++} ++ ++static int tegra_uart_remove(struct platform_device *pdev) ++{ ++ struct tegra_uart *uart = platform_get_drvdata(pdev); ++ ++ serial8250_unregister_port(uart->line); ++ reset_control_assert(uart->rst); ++ clk_disable_unprepare(uart->clk); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM_SLEEP ++static int tegra_uart_suspend(struct device *dev) ++{ ++ struct tegra_uart *uart = dev_get_drvdata(dev); ++ struct uart_8250_port *port8250 = serial8250_get_port(uart->line); ++ struct uart_port *port = &port8250->port; ++ ++ serial8250_suspend_port(uart->line); ++ ++ if (!uart_console(port) || console_suspend_enabled) ++ clk_disable_unprepare(uart->clk); ++ ++ return 0; ++} ++ ++static int tegra_uart_resume(struct device *dev) ++{ ++ struct tegra_uart *uart = dev_get_drvdata(dev); ++ struct uart_8250_port *port8250 = serial8250_get_port(uart->line); ++ struct uart_port *port = &port8250->port; ++ ++ if (!uart_console(port) || console_suspend_enabled) ++ clk_prepare_enable(uart->clk); ++ ++ serial8250_resume_port(uart->line); ++ ++ return 0; ++} ++#endif ++ ++static SIMPLE_DEV_PM_OPS(tegra_uart_pm_ops, tegra_uart_suspend, ++ tegra_uart_resume); ++ ++static const struct of_device_id tegra_uart_of_match[] = { ++ { .compatible = "nvidia,tegra20-uart", }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(of, tegra_uart_of_match); ++ ++static const struct acpi_device_id tegra_uart_acpi_match[] = { ++ { "NVDA0100", 0 }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(acpi, tegra_uart_acpi_match); ++ ++static struct platform_driver tegra_uart_driver = { ++ .driver = { ++ .name = "tegra-uart", ++ .pm = &tegra_uart_pm_ops, ++ .of_match_table = tegra_uart_of_match, ++ .acpi_match_table = ACPI_PTR(tegra_uart_acpi_match), ++ }, ++ .probe = tegra_uart_probe, ++ .remove = tegra_uart_remove, ++}; ++ ++module_platform_driver(tegra_uart_driver); ++ ++MODULE_AUTHOR("Jeff Brasen "); ++MODULE_DESCRIPTION("NVIDIA Tegra 8250 Driver"); ++MODULE_LICENSE("GPL v2"); +diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kconfig +index f16824bbb573..af0688156dd0 100644 +--- a/drivers/tty/serial/8250/Kconfig ++++ b/drivers/tty/serial/8250/Kconfig +@@ -500,6 +500,15 @@ config SERIAL_8250_PXA + applicable to both devicetree and legacy boards, and early console is + part of its support. + ++config SERIAL_8250_TEGRA ++ tristate "8250 support for Tegra serial ports" ++ default SERIAL_8250 ++ depends on SERIAL_8250 ++ depends on ARCH_TEGRA || COMPILE_TEST ++ help ++ Select this option if you have machine with an NVIDIA Tegra SoC and ++ wish to enable 8250 serial driver for the Tegra serial interfaces. ++ + config SERIAL_OF_PLATFORM + tristate "Devicetree based probing for 8250 ports" + depends on SERIAL_8250 && OF +diff --git a/drivers/tty/serial/8250/Makefile b/drivers/tty/serial/8250/Makefile +index 51a6079d3f1f..a8bfb654d490 100644 +--- a/drivers/tty/serial/8250/Makefile ++++ b/drivers/tty/serial/8250/Makefile +@@ -37,6 +37,7 @@ obj-$(CONFIG_SERIAL_8250_INGENIC) += 8250_ingenic.o + obj-$(CONFIG_SERIAL_8250_LPSS) += 8250_lpss.o + obj-$(CONFIG_SERIAL_8250_MID) += 8250_mid.o + obj-$(CONFIG_SERIAL_8250_PXA) += 8250_pxa.o ++obj-$(CONFIG_SERIAL_8250_TEGRA) += 8250_tegra.o + obj-$(CONFIG_SERIAL_OF_PLATFORM) += 8250_of.o + + CFLAGS_8250_ingenic.o += -I$(srctree)/scripts/dtc/libfdt diff --git a/arm64-tegra-Jetson-TX2-Allow-bootloader-to-configure.patch b/arm64-tegra-Jetson-TX2-Allow-bootloader-to-configure.patch deleted file mode 100644 index 3628a7e6b..000000000 --- a/arm64-tegra-Jetson-TX2-Allow-bootloader-to-configure.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 59780095ba35a49946e726c88caff6f65f3e433a Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 30 Jul 2019 14:22:36 +0100 -Subject: [PATCH] arm64: tegra: Jetson TX2: Allow bootloader to configure - Ethernet MAC - -Add an ethernet alias so that a stable MAC address is added to the -device tree for the wired ethernet interface. - -Signed-off-by: Peter Robinson ---- - arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi -index 5e18acf5cfad..947744d0f04c 100644 ---- a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi -+++ b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi -@@ -8,6 +8,7 @@ - compatible = "nvidia,p3310", "nvidia,tegra186"; - - aliases { -+ ethernet0 = "/ethernet@2490000"; - sdhci0 = "/sdhci@3460000"; - sdhci1 = "/sdhci@3400000"; - serial0 = &uarta; --- -2.21.0 - diff --git a/arm64-tegra-fix-pcie.patch b/arm64-tegra-fix-pcie.patch new file mode 100644 index 000000000..3e93a913c --- /dev/null +++ b/arm64-tegra-fix-pcie.patch @@ -0,0 +1,101 @@ +From 5fc5158c547fc3a2b46cbc6f73b926d8b78cd6e2 Mon Sep 17 00:00:00 2001 +From: "Signed-off-by: Jon Hunter" +Date: Fri, 14 Feb 2020 13:53:53 +0000 +Subject: [PATCH] ARM64: tegra: Fix Tegra194 PCIe compatible string + +If the kernel configuration option CONFIG_PCIE_DW_PLAT_HOST is enabled +then this can cause the kernel to incorrectly probe the generic +designware PCIe platform driver instead of the Tegra194 designware PCIe +driver. This causes a boot failure on Tegra194 because the necessary +configuration to access the hardware is not performed. + +The order in which the compatible strings are populated in Device-Tree +is not relevant in this case, because the kernel will attempt to probe +the device as soon as a driver is loaded and if the generic designware +PCIe driver is loaded first, then this driver will be probed first. +Therefore, to fix this problem, remove the "snps,dw-pcie" string from +the compatible string as we never want this driver to be probe on +Tegra194. + +Fixes: 2602c32f15e7 ("arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT") + +Signed-off-by: Jon Hunter +--- + .../devicetree/bindings/pci/nvidia,tegra194-pcie.txt | 2 +- + arch/arm64/boot/dts/nvidia/tegra194.dtsi | 12 ++++++------ + 2 files changed, 7 insertions(+), 7 deletions(-) + +diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt +index b739f92da58e..1f90eb39870b 100644 +--- a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt ++++ b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt +@@ -118,7 +118,7 @@ Tegra194: + -------- + + pcie@14180000 { +- compatible = "nvidia,tegra194-pcie", "snps,dw-pcie"; ++ compatible = "nvidia,tegra194-pcie"; + power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8B>; + reg = <0x00 0x14180000 0x0 0x00020000 /* appl registers (128K) */ + 0x00 0x38000000 0x0 0x00040000 /* configuration space (256K) */ +diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi +index ccac43be12ac..4c58cb10fb9c 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi ++++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi +@@ -1208,7 +1208,7 @@ sor3: sor@15bc0000 { + }; + + pcie@14100000 { +- compatible = "nvidia,tegra194-pcie", "snps,dw-pcie"; ++ compatible = "nvidia,tegra194-pcie"; + power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX1A>; + reg = <0x00 0x14100000 0x0 0x00020000 /* appl registers (128K) */ + 0x00 0x30000000 0x0 0x00040000 /* configuration space (256K) */ +@@ -1253,7 +1253,7 @@ pcie@14100000 { + }; + + pcie@14120000 { +- compatible = "nvidia,tegra194-pcie", "snps,dw-pcie"; ++ compatible = "nvidia,tegra194-pcie"; + power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX1A>; + reg = <0x00 0x14120000 0x0 0x00020000 /* appl registers (128K) */ + 0x00 0x32000000 0x0 0x00040000 /* configuration space (256K) */ +@@ -1298,7 +1298,7 @@ pcie@14120000 { + }; + + pcie@14140000 { +- compatible = "nvidia,tegra194-pcie", "snps,dw-pcie"; ++ compatible = "nvidia,tegra194-pcie"; + power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX1A>; + reg = <0x00 0x14140000 0x0 0x00020000 /* appl registers (128K) */ + 0x00 0x34000000 0x0 0x00040000 /* configuration space (256K) */ +@@ -1343,7 +1343,7 @@ pcie@14140000 { + }; + + pcie@14160000 { +- compatible = "nvidia,tegra194-pcie", "snps,dw-pcie"; ++ compatible = "nvidia,tegra194-pcie"; + power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX4A>; + reg = <0x00 0x14160000 0x0 0x00020000 /* appl registers (128K) */ + 0x00 0x36000000 0x0 0x00040000 /* configuration space (256K) */ +@@ -1388,7 +1388,7 @@ pcie@14160000 { + }; + + pcie@14180000 { +- compatible = "nvidia,tegra194-pcie", "snps,dw-pcie"; ++ compatible = "nvidia,tegra194-pcie"; + power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8B>; + reg = <0x00 0x14180000 0x0 0x00020000 /* appl registers (128K) */ + 0x00 0x38000000 0x0 0x00040000 /* configuration space (256K) */ +@@ -1433,7 +1433,7 @@ pcie@14180000 { + }; + + pcie@141a0000 { +- compatible = "nvidia,tegra194-pcie", "snps,dw-pcie"; ++ compatible = "nvidia,tegra194-pcie"; + power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8A>; + reg = <0x00 0x141a0000 0x0 0x00020000 /* appl registers (128K) */ + 0x00 0x3a000000 0x0 0x00040000 /* configuration space (256K) */ +-- +2.24.1 + diff --git a/arm64-tegra-jetson-tx1-fixes.patch b/arm64-tegra-jetson-tx1-fixes.patch deleted file mode 100644 index 0f476970f..000000000 --- a/arm64-tegra-jetson-tx1-fixes.patch +++ /dev/null @@ -1,39 +0,0 @@ -From aea4a7a551fd7342299d34f04a8b75f58644ac07 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sat, 23 Mar 2019 17:45:10 +0000 -Subject: [PATCH 2/3] arm64: tegra210: Jetson TX1: disable display panel and - associated backlight - -The Jetson TX1 dev kit doesn't ship with a screen by default and if -it's not there it appears to crash on boot so disable them both by -default until we work out the problem. - -Signed-off-by: Peter Robinson ---- - arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts -index 37e3c46e753f..a16f24f1d5ff 100644 ---- a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts -+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts -@@ -36,7 +36,7 @@ - - host1x@50000000 { - dsi@54300000 { -- status = "okay"; -+ status = "disabled"; - - avdd-dsi-csi-supply = <&vdd_dsi_csi>; - -@@ -54,6 +54,8 @@ - - i2c@7000c400 { - backlight: backlight@2c { -+ status = "disabled"; -+ - compatible = "ti,lp8557"; - reg = <0x2c>; - --- -2.20.1 diff --git a/backlight-lp855x-Ensure-regulators-are-disabled-on-probe-failure.patch b/backlight-lp855x-Ensure-regulators-are-disabled-on-probe-failure.patch new file mode 100644 index 000000000..08c519629 --- /dev/null +++ b/backlight-lp855x-Ensure-regulators-are-disabled-on-probe-failure.patch @@ -0,0 +1,186 @@ +From patchwork Mon Feb 24 14:07:48 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Jon Hunter +X-Patchwork-Id: 1243112 +Return-Path: +X-Original-To: incoming@patchwork.ozlabs.org +Delivered-To: patchwork-incoming@bilbo.ozlabs.org +Authentication-Results: ozlabs.org; spf=none (no SPF record) + smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; + 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(using TLS: TLSv1.2, DES-CBC3-SHA) + id ; Mon, 24 Feb 2020 06:07:00 -0800 +Received: from hqmail.nvidia.com ([172.20.161.6]) + by hqpgpgate101.nvidia.com (PGP Universal service); + Mon, 24 Feb 2020 06:08:16 -0800 +X-PGP-Universal: processed; + by hqpgpgate101.nvidia.com on Mon, 24 Feb 2020 06:08:16 -0800 +Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL107.nvidia.com + (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; + Mon, 24 Feb 2020 14:08:16 +0000 +Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL105.nvidia.com + (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via + Frontend Transport; Mon, 24 Feb 2020 14:08:15 +0000 +Received: from thunderball.nvidia.com (Not Verified[10.21.140.91]) by + rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) + id ; Mon, 24 Feb 2020 06:08:15 -0800 +From: Jon Hunter +To: Milo Kim , Lee Jones , + Daniel Thompson , + Jingoo Han +CC: , , + , Jon Hunter +Subject: [PATCH] backlight: lp855x: Ensure regulators are disabled on probe + failure +Date: Mon, 24 Feb 2020 14:07:48 +0000 +Message-ID: <20200224140748.2182-1-jonathanh@nvidia.com> +X-Mailer: git-send-email 2.17.1 +X-NVConfidentiality: public +MIME-Version: 1.0 +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; + t=1582553220; bh=B1HKOxHeQwu3ZxgJLvSfafO1owYsd38lFNvB2Oh8gBc=; + h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: + X-NVConfidentiality:MIME-Version:Content-Type; + b=bnwYpe6isaqG2Bp36VGI0VAYjd8jtznqNulwkVw85vf5zOMSfv809Oou4taz+1W9g + /eTLeJozbJBXhllQfybYW8hX4fyWIjWNON8aQugt/0HrnKAjg5r9wLT5lTgmy+8n2B + YrCJM3gob7XIi7l0cbONUTfyGssXmyEi+0SUamN4DDOnXIFxHBentnbyQdvOQ9+11P + Dr5X+zeRff1B/SMt2pdNwrja2cVOPDRGAM+U4epkb2bICZZUiGv1fQLKa+KgJ7xMMS + AwmdVrZ/6l2MAKwM+FuIqdF/x7mpCYg64MWX7TFFRwOSCFwNeq1fcK5TWItV01qcCa + mFLwbcDwN/IQA== +Sender: linux-tegra-owner@vger.kernel.org +Precedence: bulk +List-ID: +X-Mailing-List: linux-tegra@vger.kernel.org + +If probing the LP885x backlight fails after the regulators have been +enabled, then the following warning is seen when releasing the +regulators ... + + WARNING: CPU: 1 PID: 289 at drivers/regulator/core.c:2051 _regulator_put.part.28+0x158/0x160 + Modules linked in: tegra_xudc lp855x_bl(+) host1x pwm_tegra ip_tables x_tables ipv6 nf_defrag_ipv6 + CPU: 1 PID: 289 Comm: systemd-udevd Not tainted 5.6.0-rc2-next-20200224 #1 + Hardware name: NVIDIA Jetson TX1 Developer Kit (DT) + + ... + + Call trace: + _regulator_put.part.28+0x158/0x160 + regulator_put+0x34/0x50 + devm_regulator_release+0x10/0x18 + release_nodes+0x12c/0x230 + devres_release_all+0x34/0x50 + really_probe+0x1c0/0x370 + driver_probe_device+0x58/0x100 + device_driver_attach+0x6c/0x78 + __driver_attach+0xb0/0xf0 + bus_for_each_dev+0x68/0xc8 + driver_attach+0x20/0x28 + bus_add_driver+0x160/0x1f0 + driver_register+0x60/0x110 + i2c_register_driver+0x40/0x80 + lp855x_driver_init+0x20/0x1000 [lp855x_bl] + do_one_initcall+0x58/0x1a0 + do_init_module+0x54/0x1d0 + load_module+0x1d80/0x21c8 + __do_sys_finit_module+0xe8/0x100 + __arm64_sys_finit_module+0x18/0x20 + el0_svc_common.constprop.3+0xb0/0x168 + do_el0_svc+0x20/0x98 + el0_sync_handler+0xf4/0x1b0 + el0_sync+0x140/0x180 + +Fix this by ensuring that the regulators are disabled, if enabled, on +probe failure. + +Finally, ensure that the vddio regulator is disabled in the driver +remove handler. + +Signed-off-by: Jon Hunter +Reviewed-by: Daniel Thompson +--- + drivers/video/backlight/lp855x_bl.c | 20 ++++++++++++++++---- + 1 file changed, 16 insertions(+), 4 deletions(-) + +diff --git a/drivers/video/backlight/lp855x_bl.c b/drivers/video/backlight/lp855x_bl.c +index f68920131a4a..e94932c69f54 100644 +--- a/drivers/video/backlight/lp855x_bl.c ++++ b/drivers/video/backlight/lp855x_bl.c +@@ -456,7 +456,7 @@ static int lp855x_probe(struct i2c_client *cl, const struct i2c_device_id *id) + ret = regulator_enable(lp->enable); + if (ret < 0) { + dev_err(lp->dev, "failed to enable vddio: %d\n", ret); +- return ret; ++ goto disable_supply; + } + + /* +@@ -471,24 +471,34 @@ static int lp855x_probe(struct i2c_client *cl, const struct i2c_device_id *id) + ret = lp855x_configure(lp); + if (ret) { + dev_err(lp->dev, "device config err: %d", ret); +- return ret; ++ goto disable_vddio; + } + + ret = lp855x_backlight_register(lp); + if (ret) { + dev_err(lp->dev, + "failed to register backlight. err: %d\n", ret); +- return ret; ++ goto disable_vddio; + } + + ret = sysfs_create_group(&lp->dev->kobj, &lp855x_attr_group); + if (ret) { + dev_err(lp->dev, "failed to register sysfs. err: %d\n", ret); +- return ret; ++ goto disable_vddio; + } + + backlight_update_status(lp->bl); ++ + return 0; ++ ++disable_vddio: ++ if (lp->enable) ++ regulator_disable(lp->enable); ++disable_supply: ++ if (lp->supply) ++ regulator_disable(lp->supply); ++ ++ return ret; + } + + static int lp855x_remove(struct i2c_client *cl) +@@ -497,6 +507,8 @@ static int lp855x_remove(struct i2c_client *cl) + + lp->bl->props.brightness = 0; + backlight_update_status(lp->bl); ++ if (lp->enable) ++ regulator_disable(lp->enable); + if (lp->supply) + regulator_disable(lp->supply); + sysfs_remove_group(&lp->dev->kobj, &lp855x_attr_group); diff --git a/bcm283x-gpu-drm-v3d-Add-ARCH_BCM2835-to-DRM_V3D-Kconfig.patch b/bcm283x-gpu-drm-v3d-Add-ARCH_BCM2835-to-DRM_V3D-Kconfig.patch deleted file mode 100644 index a11f2ce1a..000000000 --- a/bcm283x-gpu-drm-v3d-Add-ARCH_BCM2835-to-DRM_V3D-Kconfig.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 9ad059ee412caed3fc8666dadf0d2e897d621958 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 18 Dec 2019 08:03:36 +0000 -Subject: [PATCH] gpu/drm/v3d: Add ARCH_BCM2835 to DRM_V3D Kconfig - -On arm64 the config ARCH_BCM doesn't exist so to be able to -build for platforms such as the Raspberry Pi 4 we need to add -ARCH_BCM2835 similar to what has been done on vc4. - -Signed-off-by: Peter Robinson ---- - drivers/gpu/drm/v3d/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/v3d/Kconfig b/drivers/gpu/drm/v3d/Kconfig -index 9a5c44606337..b0e048697964 100644 ---- a/drivers/gpu/drm/v3d/Kconfig -+++ b/drivers/gpu/drm/v3d/Kconfig -@@ -1,7 +1,7 @@ - # SPDX-License-Identifier: GPL-2.0-only - config DRM_V3D - tristate "Broadcom V3D 3.x and newer" -- depends on ARCH_BCM || ARCH_BCMSTB || COMPILE_TEST -+ depends on ARCH_BCM || ARCH_BCMSTB || ARCH_BCM2835 || COMPILE_TEST - depends on DRM - depends on COMMON_CLK - depends on MMU --- -2.24.1 - diff --git a/configs/fedora/generic/CONFIG_AD7091R5 b/configs/fedora/generic/CONFIG_AD7091R5 new file mode 100644 index 000000000..a2cd8825e --- /dev/null +++ b/configs/fedora/generic/CONFIG_AD7091R5 @@ -0,0 +1 @@ +# CONFIG_AD7091R5 is not set diff --git a/configs/fedora/generic/CONFIG_ARCH_RANDOM b/configs/fedora/generic/CONFIG_ARCH_RANDOM new file mode 100644 index 000000000..51658fe1c --- /dev/null +++ b/configs/fedora/generic/CONFIG_ARCH_RANDOM @@ -0,0 +1 @@ +CONFIG_ARCH_RANDOM=y diff --git a/configs/fedora/generic/CONFIG_ATH11K b/configs/fedora/generic/CONFIG_ATH11K new file mode 100644 index 000000000..584c5e3f1 --- /dev/null +++ b/configs/fedora/generic/CONFIG_ATH11K @@ -0,0 +1 @@ +# CONFIG_ATH11K is not set diff --git a/configs/fedora/generic/CONFIG_BACKLIGHT_LED b/configs/fedora/generic/CONFIG_BACKLIGHT_LED new file mode 100644 index 000000000..177fa13b5 --- /dev/null +++ b/configs/fedora/generic/CONFIG_BACKLIGHT_LED @@ -0,0 +1 @@ +CONFIG_BACKLIGHT_LED=m diff --git a/configs/fedora/generic/CONFIG_BCM84881_PHY b/configs/fedora/generic/CONFIG_BCM84881_PHY new file mode 100644 index 000000000..6f472549d --- /dev/null +++ b/configs/fedora/generic/CONFIG_BCM84881_PHY @@ -0,0 +1 @@ +# CONFIG_BCM84881_PHY is not set diff --git a/configs/fedora/generic/CONFIG_BMA400 b/configs/fedora/generic/CONFIG_BMA400 new file mode 100644 index 000000000..597efc083 --- /dev/null +++ b/configs/fedora/generic/CONFIG_BMA400 @@ -0,0 +1 @@ +# CONFIG_BMA400 is not set diff --git a/configs/fedora/generic/CONFIG_BOOTTIME_TRACING b/configs/fedora/generic/CONFIG_BOOTTIME_TRACING new file mode 100644 index 000000000..d0462f760 --- /dev/null +++ b/configs/fedora/generic/CONFIG_BOOTTIME_TRACING @@ -0,0 +1 @@ +CONFIG_BOOTTIME_TRACING=y diff --git a/configs/fedora/generic/CONFIG_BOOT_CONFIG b/configs/fedora/generic/CONFIG_BOOT_CONFIG new file mode 100644 index 000000000..6a72346aa --- /dev/null +++ b/configs/fedora/generic/CONFIG_BOOT_CONFIG @@ -0,0 +1 @@ +CONFIG_BOOT_CONFIG=y diff --git a/configs/fedora/generic/CONFIG_CAN_UCAN b/configs/fedora/generic/CONFIG_CAN_UCAN index 80c32eda8..ec2185e3a 100644 --- a/configs/fedora/generic/CONFIG_CAN_UCAN +++ b/configs/fedora/generic/CONFIG_CAN_UCAN @@ -1 +1 @@ -CONFIG_CAN_UCAN=m +# CONFIG_CAN_UCAN is not set diff --git a/configs/fedora/generic/CONFIG_CAPI_AVM b/configs/fedora/generic/CONFIG_CAPI_AVM deleted file mode 100644 index e22084428..000000000 --- a/configs/fedora/generic/CONFIG_CAPI_AVM +++ /dev/null @@ -1 +0,0 @@ -CONFIG_CAPI_AVM=y diff --git a/configs/fedora/generic/CONFIG_COMMON_CLK_FSL_SAI b/configs/fedora/generic/CONFIG_COMMON_CLK_FSL_SAI new file mode 100644 index 000000000..03ef57306 --- /dev/null +++ b/configs/fedora/generic/CONFIG_COMMON_CLK_FSL_SAI @@ -0,0 +1 @@ +# CONFIG_COMMON_CLK_FSL_SAI is not set diff --git a/configs/fedora/generic/CONFIG_CPU_FREQ_THERMAL b/configs/fedora/generic/CONFIG_CPU_FREQ_THERMAL new file mode 100644 index 000000000..25d6ba248 --- /dev/null +++ b/configs/fedora/generic/CONFIG_CPU_FREQ_THERMAL @@ -0,0 +1 @@ +CONFIG_CPU_FREQ_THERMAL=y diff --git a/configs/fedora/generic/CONFIG_DLHL60D b/configs/fedora/generic/CONFIG_DLHL60D new file mode 100644 index 000000000..031f3d2e3 --- /dev/null +++ b/configs/fedora/generic/CONFIG_DLHL60D @@ -0,0 +1 @@ +# CONFIG_DLHL60D is not set diff --git a/configs/fedora/generic/CONFIG_DMABUF_HEAPS b/configs/fedora/generic/CONFIG_DMABUF_HEAPS new file mode 100644 index 000000000..06c5f4cf1 --- /dev/null +++ b/configs/fedora/generic/CONFIG_DMABUF_HEAPS @@ -0,0 +1 @@ +# CONFIG_DMABUF_HEAPS is not set diff --git a/configs/fedora/generic/CONFIG_DM_CLONE b/configs/fedora/generic/CONFIG_DM_CLONE index 03f992664..319d14515 100644 --- a/configs/fedora/generic/CONFIG_DM_CLONE +++ b/configs/fedora/generic/CONFIG_DM_CLONE @@ -1 +1 @@ -# CONFIG_DM_CLONE is not set +CONFIG_DM_CLONE=m diff --git a/configs/fedora/generic/CONFIG_DRM_ANALOGIX_ANX6345 b/configs/fedora/generic/CONFIG_DRM_ANALOGIX_ANX6345 new file mode 100644 index 000000000..8129e7197 --- /dev/null +++ b/configs/fedora/generic/CONFIG_DRM_ANALOGIX_ANX6345 @@ -0,0 +1 @@ +CONFIG_DRM_ANALOGIX_ANX6345=m diff --git a/configs/fedora/generic/CONFIG_DRM_DP_CEC b/configs/fedora/generic/CONFIG_DRM_DP_CEC index 5f9b38555..f0dbdcca2 100644 --- a/configs/fedora/generic/CONFIG_DRM_DP_CEC +++ b/configs/fedora/generic/CONFIG_DRM_DP_CEC @@ -1 +1 @@ -CONFIG_DRM_DP_CEC=y +# CONFIG_DRM_DP_CEC is not set diff --git a/configs/fedora/generic/CONFIG_DRM_LVDS_CODEC b/configs/fedora/generic/CONFIG_DRM_LVDS_CODEC new file mode 100644 index 000000000..9b5f29038 --- /dev/null +++ b/configs/fedora/generic/CONFIG_DRM_LVDS_CODEC @@ -0,0 +1 @@ +# CONFIG_DRM_LVDS_CODEC is not set diff --git a/configs/fedora/generic/CONFIG_DRM_LVDS_ENCODER b/configs/fedora/generic/CONFIG_DRM_LVDS_ENCODER deleted file mode 100644 index e2ea277b3..000000000 --- a/configs/fedora/generic/CONFIG_DRM_LVDS_ENCODER +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_DRM_LVDS_ENCODER is not set diff --git a/configs/fedora/generic/CONFIG_DRM_PANEL_BOE_HIMAX8279D b/configs/fedora/generic/CONFIG_DRM_PANEL_BOE_HIMAX8279D new file mode 100644 index 000000000..96be5cb7a --- /dev/null +++ b/configs/fedora/generic/CONFIG_DRM_PANEL_BOE_HIMAX8279D @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set diff --git a/configs/fedora/generic/CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 b/configs/fedora/generic/CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 new file mode 100644 index 000000000..b4e04533d --- /dev/null +++ b/configs/fedora/generic/CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set diff --git a/configs/fedora/generic/CONFIG_DRM_PANEL_SONY_ACX424AKP b/configs/fedora/generic/CONFIG_DRM_PANEL_SONY_ACX424AKP new file mode 100644 index 000000000..0fa27c807 --- /dev/null +++ b/configs/fedora/generic/CONFIG_DRM_PANEL_SONY_ACX424AKP @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_SONY_ACX424AKP is not set diff --git a/configs/fedora/generic/CONFIG_DRM_PANEL_XINGBANGDA_XBD599 b/configs/fedora/generic/CONFIG_DRM_PANEL_XINGBANGDA_XBD599 new file mode 100644 index 000000000..b3e186e66 --- /dev/null +++ b/configs/fedora/generic/CONFIG_DRM_PANEL_XINGBANGDA_XBD599 @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_XINGBANGDA_XBD599 is not set diff --git a/configs/fedora/generic/CONFIG_DRM_PANEL_XINPENG_XPP055C272 b/configs/fedora/generic/CONFIG_DRM_PANEL_XINPENG_XPP055C272 new file mode 100644 index 000000000..4978faa12 --- /dev/null +++ b/configs/fedora/generic/CONFIG_DRM_PANEL_XINPENG_XPP055C272 @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set diff --git a/configs/fedora/generic/CONFIG_EFI_DISABLE_PCI_DMA b/configs/fedora/generic/CONFIG_EFI_DISABLE_PCI_DMA new file mode 100644 index 000000000..db43b2234 --- /dev/null +++ b/configs/fedora/generic/CONFIG_EFI_DISABLE_PCI_DMA @@ -0,0 +1 @@ +# CONFIG_EFI_DISABLE_PCI_DMA is not set diff --git a/configs/fedora/generic/CONFIG_ETHTOOL_NETLINK b/configs/fedora/generic/CONFIG_ETHTOOL_NETLINK new file mode 100644 index 000000000..7ede260aa --- /dev/null +++ b/configs/fedora/generic/CONFIG_ETHTOOL_NETLINK @@ -0,0 +1 @@ +CONFIG_ETHTOOL_NETLINK=y diff --git a/configs/fedora/generic/CONFIG_EXFAT_FS b/configs/fedora/generic/CONFIG_EXFAT_FS deleted file mode 100644 index 2113d8106..000000000 --- a/configs/fedora/generic/CONFIG_EXFAT_FS +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_EXFAT_FS is not set diff --git a/configs/fedora/generic/CONFIG_F2FS_FS_COMPRESSION b/configs/fedora/generic/CONFIG_F2FS_FS_COMPRESSION new file mode 100644 index 000000000..93db20585 --- /dev/null +++ b/configs/fedora/generic/CONFIG_F2FS_FS_COMPRESSION @@ -0,0 +1 @@ +CONFIG_F2FS_FS_COMPRESSION=y diff --git a/configs/fedora/generic/CONFIG_F2FS_FS_LZ4 b/configs/fedora/generic/CONFIG_F2FS_FS_LZ4 new file mode 100644 index 000000000..93646c6d9 --- /dev/null +++ b/configs/fedora/generic/CONFIG_F2FS_FS_LZ4 @@ -0,0 +1 @@ +CONFIG_F2FS_FS_LZ4=y diff --git a/configs/fedora/generic/CONFIG_F2FS_FS_LZO b/configs/fedora/generic/CONFIG_F2FS_FS_LZO new file mode 100644 index 000000000..2210e5ab4 --- /dev/null +++ b/configs/fedora/generic/CONFIG_F2FS_FS_LZO @@ -0,0 +1 @@ +CONFIG_F2FS_FS_LZO=y diff --git a/configs/fedora/generic/CONFIG_GIGASET_BASE b/configs/fedora/generic/CONFIG_GIGASET_BASE deleted file mode 100644 index fa7bb4bea..000000000 --- a/configs/fedora/generic/CONFIG_GIGASET_BASE +++ /dev/null @@ -1 +0,0 @@ -CONFIG_GIGASET_BASE=m diff --git a/configs/fedora/generic/CONFIG_GIGASET_CAPI b/configs/fedora/generic/CONFIG_GIGASET_CAPI deleted file mode 100644 index b94738045..000000000 --- a/configs/fedora/generic/CONFIG_GIGASET_CAPI +++ /dev/null @@ -1 +0,0 @@ -CONFIG_GIGASET_CAPI=y diff --git a/configs/fedora/generic/CONFIG_GIGASET_DEBUG b/configs/fedora/generic/CONFIG_GIGASET_DEBUG deleted file mode 100644 index 95c9cd104..000000000 --- a/configs/fedora/generic/CONFIG_GIGASET_DEBUG +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_GIGASET_DEBUG is not set diff --git a/configs/fedora/generic/CONFIG_GIGASET_M101 b/configs/fedora/generic/CONFIG_GIGASET_M101 deleted file mode 100644 index 10388d0a9..000000000 --- a/configs/fedora/generic/CONFIG_GIGASET_M101 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_GIGASET_M101=m diff --git a/configs/fedora/generic/CONFIG_GIGASET_M105 b/configs/fedora/generic/CONFIG_GIGASET_M105 deleted file mode 100644 index cf3d1db9f..000000000 --- a/configs/fedora/generic/CONFIG_GIGASET_M105 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_GIGASET_M105=m diff --git a/configs/fedora/generic/CONFIG_GPIO_LOGICVC b/configs/fedora/generic/CONFIG_GPIO_LOGICVC new file mode 100644 index 000000000..1ee4eb11a --- /dev/null +++ b/configs/fedora/generic/CONFIG_GPIO_LOGICVC @@ -0,0 +1 @@ +# CONFIG_GPIO_LOGICVC is not set diff --git a/configs/fedora/generic/CONFIG_GPIO_MPC8XXX b/configs/fedora/generic/CONFIG_GPIO_MPC8XXX deleted file mode 100644 index 876fd6a58..000000000 --- a/configs/fedora/generic/CONFIG_GPIO_MPC8XXX +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_GPIO_MPC8XXX is not set diff --git a/configs/fedora/generic/CONFIG_GPIO_SIFIVE b/configs/fedora/generic/CONFIG_GPIO_SIFIVE new file mode 100644 index 000000000..461cb49e4 --- /dev/null +++ b/configs/fedora/generic/CONFIG_GPIO_SIFIVE @@ -0,0 +1 @@ +# CONFIG_GPIO_SIFIVE is not set diff --git a/configs/fedora/generic/CONFIG_HYSDN b/configs/fedora/generic/CONFIG_HYSDN deleted file mode 100644 index 2f1ddde6c..000000000 --- a/configs/fedora/generic/CONFIG_HYSDN +++ /dev/null @@ -1 +0,0 @@ -CONFIG_HYSDN=m diff --git a/configs/fedora/generic/CONFIG_HYSDN_CAPI b/configs/fedora/generic/CONFIG_HYSDN_CAPI deleted file mode 100644 index db9a861ab..000000000 --- a/configs/fedora/generic/CONFIG_HYSDN_CAPI +++ /dev/null @@ -1 +0,0 @@ -CONFIG_HYSDN_CAPI=y diff --git a/configs/fedora/generic/CONFIG_I2C_PARPORT_LIGHT b/configs/fedora/generic/CONFIG_I2C_PARPORT_LIGHT deleted file mode 100644 index e18239222..000000000 --- a/configs/fedora/generic/CONFIG_I2C_PARPORT_LIGHT +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_I2C_PARPORT_LIGHT is not set diff --git a/configs/fedora/generic/CONFIG_INET_ESPINTCP b/configs/fedora/generic/CONFIG_INET_ESPINTCP new file mode 100644 index 000000000..ebf9d9fe6 --- /dev/null +++ b/configs/fedora/generic/CONFIG_INET_ESPINTCP @@ -0,0 +1 @@ +CONFIG_INET_ESPINTCP=y diff --git a/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_BZIP2 b/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_BZIP2 new file mode 100644 index 000000000..1fa2256b7 --- /dev/null +++ b/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_BZIP2 @@ -0,0 +1 @@ +# CONFIG_INITRAMFS_COMPRESSION_BZIP2 is not set diff --git a/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_GZIP b/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_GZIP new file mode 100644 index 000000000..c196b5c5e --- /dev/null +++ b/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_GZIP @@ -0,0 +1 @@ +# CONFIG_INITRAMFS_COMPRESSION_GZIP is not set diff --git a/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_LZ4 b/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_LZ4 new file mode 100644 index 000000000..001bc786f --- /dev/null +++ b/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_LZ4 @@ -0,0 +1 @@ +# CONFIG_INITRAMFS_COMPRESSION_LZ4 is not set diff --git a/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_LZMA b/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_LZMA new file mode 100644 index 000000000..dad4d574a --- /dev/null +++ b/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_LZMA @@ -0,0 +1 @@ +# CONFIG_INITRAMFS_COMPRESSION_LZMA is not set diff --git a/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_LZO b/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_LZO new file mode 100644 index 000000000..14032648b --- /dev/null +++ b/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_LZO @@ -0,0 +1 @@ +# CONFIG_INITRAMFS_COMPRESSION_LZO is not set diff --git a/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_NONE b/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_NONE new file mode 100644 index 000000000..5a21322e6 --- /dev/null +++ b/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_NONE @@ -0,0 +1 @@ +CONFIG_INITRAMFS_COMPRESSION_NONE=y diff --git a/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_XZ b/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_XZ new file mode 100644 index 000000000..8059cfb74 --- /dev/null +++ b/configs/fedora/generic/CONFIG_INITRAMFS_COMPRESSION_XZ @@ -0,0 +1 @@ +# CONFIG_INITRAMFS_COMPRESSION_XZ is not set diff --git a/configs/fedora/generic/CONFIG_KPROBE_EVENT_GEN_TEST b/configs/fedora/generic/CONFIG_KPROBE_EVENT_GEN_TEST new file mode 100644 index 000000000..01e6cc50d --- /dev/null +++ b/configs/fedora/generic/CONFIG_KPROBE_EVENT_GEN_TEST @@ -0,0 +1 @@ +# CONFIG_KPROBE_EVENT_GEN_TEST is not set diff --git a/configs/fedora/generic/CONFIG_LTC2496 b/configs/fedora/generic/CONFIG_LTC2496 new file mode 100644 index 000000000..b63c5163c --- /dev/null +++ b/configs/fedora/generic/CONFIG_LTC2496 @@ -0,0 +1 @@ +# CONFIG_LTC2496 is not set diff --git a/configs/fedora/generic/CONFIG_MFD_ROHM_BD71828 b/configs/fedora/generic/CONFIG_MFD_ROHM_BD71828 new file mode 100644 index 000000000..e60c1237e --- /dev/null +++ b/configs/fedora/generic/CONFIG_MFD_ROHM_BD71828 @@ -0,0 +1 @@ +# CONFIG_MFD_ROHM_BD71828 is not set diff --git a/configs/fedora/generic/CONFIG_MFD_WCD934X b/configs/fedora/generic/CONFIG_MFD_WCD934X new file mode 100644 index 000000000..77d877e00 --- /dev/null +++ b/configs/fedora/generic/CONFIG_MFD_WCD934X @@ -0,0 +1 @@ +# CONFIG_MFD_WCD934X is not set diff --git a/configs/fedora/generic/CONFIG_MICROCHIP_PIT64B b/configs/fedora/generic/CONFIG_MICROCHIP_PIT64B new file mode 100644 index 000000000..eae364473 --- /dev/null +++ b/configs/fedora/generic/CONFIG_MICROCHIP_PIT64B @@ -0,0 +1 @@ +# CONFIG_MICROCHIP_PIT64B is not set diff --git a/configs/fedora/generic/CONFIG_MPTCP b/configs/fedora/generic/CONFIG_MPTCP new file mode 100644 index 000000000..3bfe60494 --- /dev/null +++ b/configs/fedora/generic/CONFIG_MPTCP @@ -0,0 +1 @@ +CONFIG_MPTCP=y diff --git a/configs/fedora/generic/CONFIG_MPTCP_HMAC_TEST b/configs/fedora/generic/CONFIG_MPTCP_HMAC_TEST new file mode 100644 index 000000000..bbf062136 --- /dev/null +++ b/configs/fedora/generic/CONFIG_MPTCP_HMAC_TEST @@ -0,0 +1 @@ +# CONFIG_MPTCP_HMAC_TEST is not set diff --git a/configs/fedora/generic/CONFIG_MPTCP_IPV6 b/configs/fedora/generic/CONFIG_MPTCP_IPV6 new file mode 100644 index 000000000..d0780145d --- /dev/null +++ b/configs/fedora/generic/CONFIG_MPTCP_IPV6 @@ -0,0 +1 @@ +CONFIG_MPTCP_IPV6=y diff --git a/configs/fedora/generic/CONFIG_MSM_MMCC_8998 b/configs/fedora/generic/CONFIG_MSM_MMCC_8998 new file mode 100644 index 000000000..8c52ae545 --- /dev/null +++ b/configs/fedora/generic/CONFIG_MSM_MMCC_8998 @@ -0,0 +1 @@ +# CONFIG_MSM_MMCC_8998 is not set diff --git a/configs/fedora/generic/CONFIG_MTD_NAND_FSL_IFC b/configs/fedora/generic/CONFIG_MTD_NAND_FSL_IFC deleted file mode 100644 index b8a44ee19..000000000 --- a/configs/fedora/generic/CONFIG_MTD_NAND_FSL_IFC +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MTD_NAND_FSL_IFC is not set diff --git a/configs/fedora/generic/CONFIG_NET_DSA_AR9331 b/configs/fedora/generic/CONFIG_NET_DSA_AR9331 new file mode 100644 index 000000000..c0f369f09 --- /dev/null +++ b/configs/fedora/generic/CONFIG_NET_DSA_AR9331 @@ -0,0 +1 @@ +# CONFIG_NET_DSA_AR9331 is not set diff --git a/configs/fedora/generic/CONFIG_NET_DSA_TAG_AR9331 b/configs/fedora/generic/CONFIG_NET_DSA_TAG_AR9331 new file mode 100644 index 000000000..96e408b5b --- /dev/null +++ b/configs/fedora/generic/CONFIG_NET_DSA_TAG_AR9331 @@ -0,0 +1 @@ +# CONFIG_NET_DSA_TAG_AR9331 is not set diff --git a/configs/fedora/generic/CONFIG_NET_SCH_ETS b/configs/fedora/generic/CONFIG_NET_SCH_ETS new file mode 100644 index 000000000..95ea61e43 --- /dev/null +++ b/configs/fedora/generic/CONFIG_NET_SCH_ETS @@ -0,0 +1 @@ +# CONFIG_NET_SCH_ETS is not set diff --git a/configs/fedora/generic/CONFIG_NET_SCH_FQ_PIE b/configs/fedora/generic/CONFIG_NET_SCH_FQ_PIE new file mode 100644 index 000000000..71241b274 --- /dev/null +++ b/configs/fedora/generic/CONFIG_NET_SCH_FQ_PIE @@ -0,0 +1 @@ +# CONFIG_NET_SCH_FQ_PIE is not set diff --git a/configs/fedora/generic/CONFIG_NFSD_V4_2_INTER_SSC b/configs/fedora/generic/CONFIG_NFSD_V4_2_INTER_SSC new file mode 100644 index 000000000..ee88cb4c9 --- /dev/null +++ b/configs/fedora/generic/CONFIG_NFSD_V4_2_INTER_SSC @@ -0,0 +1 @@ +CONFIG_NFSD_V4_2_INTER_SSC=y diff --git a/configs/fedora/generic/CONFIG_NFS_DISABLE_UDP_SUPPORT b/configs/fedora/generic/CONFIG_NFS_DISABLE_UDP_SUPPORT new file mode 100644 index 000000000..b0be4a26c --- /dev/null +++ b/configs/fedora/generic/CONFIG_NFS_DISABLE_UDP_SUPPORT @@ -0,0 +1 @@ +# CONFIG_NFS_DISABLE_UDP_SUPPORT is not set diff --git a/configs/fedora/generic/CONFIG_PHY_INTEL_EMMC b/configs/fedora/generic/CONFIG_PHY_INTEL_EMMC new file mode 100644 index 000000000..ac88cb5bd --- /dev/null +++ b/configs/fedora/generic/CONFIG_PHY_INTEL_EMMC @@ -0,0 +1 @@ +# CONFIG_PHY_INTEL_EMMC is not set diff --git a/configs/fedora/generic/CONFIG_PING b/configs/fedora/generic/CONFIG_PING new file mode 100644 index 000000000..d0dcdc8ed --- /dev/null +++ b/configs/fedora/generic/CONFIG_PING @@ -0,0 +1 @@ +# CONFIG_PING is not set diff --git a/configs/fedora/generic/CONFIG_PLX_DMA b/configs/fedora/generic/CONFIG_PLX_DMA new file mode 100644 index 000000000..61c623f9c --- /dev/null +++ b/configs/fedora/generic/CONFIG_PLX_DMA @@ -0,0 +1 @@ +# CONFIG_PLX_DMA is not set diff --git a/configs/fedora/generic/CONFIG_PTDUMP_DEBUGFS b/configs/fedora/generic/CONFIG_PTDUMP_DEBUGFS new file mode 100644 index 000000000..57785aa59 --- /dev/null +++ b/configs/fedora/generic/CONFIG_PTDUMP_DEBUGFS @@ -0,0 +1 @@ +# CONFIG_PTDUMP_DEBUGFS is not set diff --git a/configs/fedora/generic/CONFIG_PTP_1588_CLOCK_INES b/configs/fedora/generic/CONFIG_PTP_1588_CLOCK_INES new file mode 100644 index 000000000..ccff0ec88 --- /dev/null +++ b/configs/fedora/generic/CONFIG_PTP_1588_CLOCK_INES @@ -0,0 +1 @@ +# CONFIG_PTP_1588_CLOCK_INES is not set diff --git a/configs/fedora/generic/CONFIG_QCOM_CPR b/configs/fedora/generic/CONFIG_QCOM_CPR new file mode 100644 index 000000000..96eea8d43 --- /dev/null +++ b/configs/fedora/generic/CONFIG_QCOM_CPR @@ -0,0 +1 @@ +# CONFIG_QCOM_CPR is not set diff --git a/configs/fedora/generic/CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT b/configs/fedora/generic/CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT deleted file mode 100644 index 8f9c32859..000000000 --- a/configs/fedora/generic/CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT is not set diff --git a/configs/fedora/generic/CONFIG_REGULATOR_MP8859 b/configs/fedora/generic/CONFIG_REGULATOR_MP8859 new file mode 100644 index 000000000..754940abf --- /dev/null +++ b/configs/fedora/generic/CONFIG_REGULATOR_MP8859 @@ -0,0 +1 @@ +# CONFIG_REGULATOR_MP8859 is not set diff --git a/configs/fedora/generic/CONFIG_REGULATOR_MPQ7920 b/configs/fedora/generic/CONFIG_REGULATOR_MPQ7920 new file mode 100644 index 000000000..c1a23686c --- /dev/null +++ b/configs/fedora/generic/CONFIG_REGULATOR_MPQ7920 @@ -0,0 +1 @@ +# CONFIG_REGULATOR_MPQ7920 is not set diff --git a/configs/fedora/generic/CONFIG_REGULATOR_VQMMC_IPQ4019 b/configs/fedora/generic/CONFIG_REGULATOR_VQMMC_IPQ4019 new file mode 100644 index 000000000..2fe47853d --- /dev/null +++ b/configs/fedora/generic/CONFIG_REGULATOR_VQMMC_IPQ4019 @@ -0,0 +1 @@ +# CONFIG_REGULATOR_VQMMC_IPQ4019 is not set diff --git a/configs/fedora/generic/CONFIG_RESET_BRCMSTB_RESCAL b/configs/fedora/generic/CONFIG_RESET_BRCMSTB_RESCAL new file mode 100644 index 000000000..299201c6f --- /dev/null +++ b/configs/fedora/generic/CONFIG_RESET_BRCMSTB_RESCAL @@ -0,0 +1 @@ +# CONFIG_RESET_BRCMSTB_RESCAL is not set diff --git a/configs/fedora/generic/CONFIG_RESET_INTEL_GW b/configs/fedora/generic/CONFIG_RESET_INTEL_GW new file mode 100644 index 000000000..eab682e0b --- /dev/null +++ b/configs/fedora/generic/CONFIG_RESET_INTEL_GW @@ -0,0 +1 @@ +# CONFIG_RESET_INTEL_GW is not set diff --git a/configs/fedora/generic/CONFIG_SC_DISPCC_7180 b/configs/fedora/generic/CONFIG_SC_DISPCC_7180 new file mode 100644 index 000000000..4e4aa7bc0 --- /dev/null +++ b/configs/fedora/generic/CONFIG_SC_DISPCC_7180 @@ -0,0 +1 @@ +# CONFIG_SC_DISPCC_7180 is not set diff --git a/configs/fedora/generic/CONFIG_SC_GPUCC_7180 b/configs/fedora/generic/CONFIG_SC_GPUCC_7180 new file mode 100644 index 000000000..754bb8b3f --- /dev/null +++ b/configs/fedora/generic/CONFIG_SC_GPUCC_7180 @@ -0,0 +1 @@ +# CONFIG_SC_GPUCC_7180 is not set diff --git a/configs/fedora/generic/CONFIG_SC_VIDEOCC_7180 b/configs/fedora/generic/CONFIG_SC_VIDEOCC_7180 new file mode 100644 index 000000000..4abd39b9b --- /dev/null +++ b/configs/fedora/generic/CONFIG_SC_VIDEOCC_7180 @@ -0,0 +1 @@ +# CONFIG_SC_VIDEOCC_7180 is not set diff --git a/configs/fedora/generic/CONFIG_SECURITY_SELINUX_SID2STR_CACHE_SIZE b/configs/fedora/generic/CONFIG_SECURITY_SELINUX_SID2STR_CACHE_SIZE new file mode 100644 index 000000000..e8e9e3ea8 --- /dev/null +++ b/configs/fedora/generic/CONFIG_SECURITY_SELINUX_SID2STR_CACHE_SIZE @@ -0,0 +1 @@ +CONFIG_SECURITY_SELINUX_SID2STR_CACHE_SIZE=256 diff --git a/configs/fedora/generic/CONFIG_SECURITY_SELINUX_SIDTAB_HASH_BITS b/configs/fedora/generic/CONFIG_SECURITY_SELINUX_SIDTAB_HASH_BITS new file mode 100644 index 000000000..5e8c57ec5 --- /dev/null +++ b/configs/fedora/generic/CONFIG_SECURITY_SELINUX_SIDTAB_HASH_BITS @@ -0,0 +1 @@ +CONFIG_SECURITY_SELINUX_SIDTAB_HASH_BITS=9 diff --git a/configs/fedora/generic/CONFIG_SENSORS_ADM1177 b/configs/fedora/generic/CONFIG_SENSORS_ADM1177 new file mode 100644 index 000000000..73f1d35f4 --- /dev/null +++ b/configs/fedora/generic/CONFIG_SENSORS_ADM1177 @@ -0,0 +1 @@ +# CONFIG_SENSORS_ADM1177 is not set diff --git a/configs/fedora/generic/CONFIG_SENSORS_DRIVETEMP b/configs/fedora/generic/CONFIG_SENSORS_DRIVETEMP new file mode 100644 index 000000000..6ca481ecc --- /dev/null +++ b/configs/fedora/generic/CONFIG_SENSORS_DRIVETEMP @@ -0,0 +1 @@ +CONFIG_SENSORS_DRIVETEMP=m diff --git a/configs/fedora/generic/CONFIG_SENSORS_MAX20730 b/configs/fedora/generic/CONFIG_SENSORS_MAX20730 new file mode 100644 index 000000000..38f8a8dd9 --- /dev/null +++ b/configs/fedora/generic/CONFIG_SENSORS_MAX20730 @@ -0,0 +1 @@ +# CONFIG_SENSORS_MAX20730 is not set diff --git a/configs/fedora/generic/CONFIG_SENSORS_MAX31730 b/configs/fedora/generic/CONFIG_SENSORS_MAX31730 new file mode 100644 index 000000000..463fd89b1 --- /dev/null +++ b/configs/fedora/generic/CONFIG_SENSORS_MAX31730 @@ -0,0 +1 @@ +# CONFIG_SENSORS_MAX31730 is not set diff --git a/configs/fedora/generic/CONFIG_SENSORS_XDPE122 b/configs/fedora/generic/CONFIG_SENSORS_XDPE122 new file mode 100644 index 000000000..4de67bfd0 --- /dev/null +++ b/configs/fedora/generic/CONFIG_SENSORS_XDPE122 @@ -0,0 +1 @@ +# CONFIG_SENSORS_XDPE122 is not set diff --git a/configs/fedora/generic/CONFIG_SERIAL_8250_16550A_VARIANTS b/configs/fedora/generic/CONFIG_SERIAL_8250_16550A_VARIANTS new file mode 100644 index 000000000..056bf6f16 --- /dev/null +++ b/configs/fedora/generic/CONFIG_SERIAL_8250_16550A_VARIANTS @@ -0,0 +1 @@ +# CONFIG_SERIAL_8250_16550A_VARIANTS is not set diff --git a/configs/fedora/generic/CONFIG_SND_CTL_VALIDATION b/configs/fedora/generic/CONFIG_SND_CTL_VALIDATION new file mode 100644 index 000000000..a882af4c8 --- /dev/null +++ b/configs/fedora/generic/CONFIG_SND_CTL_VALIDATION @@ -0,0 +1 @@ +# CONFIG_SND_CTL_VALIDATION is not set diff --git a/configs/fedora/generic/CONFIG_SND_SOC_MT6660 b/configs/fedora/generic/CONFIG_SND_SOC_MT6660 new file mode 100644 index 000000000..7e78d6d6e --- /dev/null +++ b/configs/fedora/generic/CONFIG_SND_SOC_MT6660 @@ -0,0 +1 @@ +# CONFIG_SND_SOC_MT6660 is not set diff --git a/configs/fedora/generic/CONFIG_SND_SOC_RT1308_SDW b/configs/fedora/generic/CONFIG_SND_SOC_RT1308_SDW new file mode 100644 index 000000000..46419fa28 --- /dev/null +++ b/configs/fedora/generic/CONFIG_SND_SOC_RT1308_SDW @@ -0,0 +1 @@ +# CONFIG_SND_SOC_RT1308_SDW is not set diff --git a/configs/fedora/generic/CONFIG_SND_SOC_RT700_SDW b/configs/fedora/generic/CONFIG_SND_SOC_RT700_SDW new file mode 100644 index 000000000..fbb2dab88 --- /dev/null +++ b/configs/fedora/generic/CONFIG_SND_SOC_RT700_SDW @@ -0,0 +1 @@ +# CONFIG_SND_SOC_RT700_SDW is not set diff --git a/configs/fedora/generic/CONFIG_SND_SOC_RT711_SDW b/configs/fedora/generic/CONFIG_SND_SOC_RT711_SDW new file mode 100644 index 000000000..f37826a01 --- /dev/null +++ b/configs/fedora/generic/CONFIG_SND_SOC_RT711_SDW @@ -0,0 +1 @@ +# CONFIG_SND_SOC_RT711_SDW is not set diff --git a/configs/fedora/generic/CONFIG_SND_SOC_RT715_SDW b/configs/fedora/generic/CONFIG_SND_SOC_RT715_SDW new file mode 100644 index 000000000..828094466 --- /dev/null +++ b/configs/fedora/generic/CONFIG_SND_SOC_RT715_SDW @@ -0,0 +1 @@ +# CONFIG_SND_SOC_RT715_SDW is not set diff --git a/configs/fedora/generic/CONFIG_SND_SOC_WSA881X b/configs/fedora/generic/CONFIG_SND_SOC_WSA881X new file mode 100644 index 000000000..0d83e772a --- /dev/null +++ b/configs/fedora/generic/CONFIG_SND_SOC_WSA881X @@ -0,0 +1 @@ +# CONFIG_SND_SOC_WSA881X is not set diff --git a/configs/fedora/generic/CONFIG_SPI_HISI_SFC_V3XX b/configs/fedora/generic/CONFIG_SPI_HISI_SFC_V3XX new file mode 100644 index 000000000..e36c66c7e --- /dev/null +++ b/configs/fedora/generic/CONFIG_SPI_HISI_SFC_V3XX @@ -0,0 +1 @@ +# CONFIG_SPI_HISI_SFC_V3XX is not set diff --git a/configs/fedora/generic/CONFIG_STAGING_EXFAT_FS b/configs/fedora/generic/CONFIG_STAGING_EXFAT_FS new file mode 100644 index 000000000..ddd3656b3 --- /dev/null +++ b/configs/fedora/generic/CONFIG_STAGING_EXFAT_FS @@ -0,0 +1 @@ +# CONFIG_STAGING_EXFAT_FS is not set diff --git a/configs/fedora/generic/CONFIG_STRICT_KERNEL_RWX b/configs/fedora/generic/CONFIG_STRICT_KERNEL_RWX new file mode 100644 index 000000000..8c57b454a --- /dev/null +++ b/configs/fedora/generic/CONFIG_STRICT_KERNEL_RWX @@ -0,0 +1 @@ +CONFIG_STRICT_KERNEL_RWX=y diff --git a/configs/fedora/generic/CONFIG_SYNTH_EVENT_GEN_TEST b/configs/fedora/generic/CONFIG_SYNTH_EVENT_GEN_TEST new file mode 100644 index 000000000..23019ea4c --- /dev/null +++ b/configs/fedora/generic/CONFIG_SYNTH_EVENT_GEN_TEST @@ -0,0 +1 @@ +# CONFIG_SYNTH_EVENT_GEN_TEST is not set diff --git a/configs/fedora/generic/CONFIG_THUNDERBOLT b/configs/fedora/generic/CONFIG_THUNDERBOLT deleted file mode 100644 index dce0561e8..000000000 --- a/configs/fedora/generic/CONFIG_THUNDERBOLT +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_THUNDERBOLT is not set diff --git a/configs/fedora/generic/CONFIG_VIRTIO_BLK_SCSI b/configs/fedora/generic/CONFIG_VIRTIO_BLK_SCSI deleted file mode 100644 index e551a8ba1..000000000 --- a/configs/fedora/generic/CONFIG_VIRTIO_BLK_SCSI +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_VIRTIO_BLK_SCSI is not set diff --git a/configs/fedora/generic/CONFIG_VSOCKETS_LOOPBACK b/configs/fedora/generic/CONFIG_VSOCKETS_LOOPBACK new file mode 100644 index 000000000..e07891f5b --- /dev/null +++ b/configs/fedora/generic/CONFIG_VSOCKETS_LOOPBACK @@ -0,0 +1 @@ +CONFIG_VSOCKETS_LOOPBACK=m diff --git a/configs/fedora/generic/CONFIG_WIREGUARD b/configs/fedora/generic/CONFIG_WIREGUARD new file mode 100644 index 000000000..f4bb670b4 --- /dev/null +++ b/configs/fedora/generic/CONFIG_WIREGUARD @@ -0,0 +1 @@ +CONFIG_WIREGUARD=m diff --git a/configs/fedora/generic/CONFIG_WIREGUARD_DEBUG b/configs/fedora/generic/CONFIG_WIREGUARD_DEBUG new file mode 100644 index 000000000..bcd811328 --- /dev/null +++ b/configs/fedora/generic/CONFIG_WIREGUARD_DEBUG @@ -0,0 +1 @@ +# CONFIG_WIREGUARD_DEBUG is not set diff --git a/configs/fedora/generic/CONFIG_X86_PTDUMP b/configs/fedora/generic/CONFIG_X86_PTDUMP deleted file mode 100644 index 74f8094eb..000000000 --- a/configs/fedora/generic/CONFIG_X86_PTDUMP +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_X86_PTDUMP is not set diff --git a/configs/fedora/generic/CONFIG_ZONEFS_FS b/configs/fedora/generic/CONFIG_ZONEFS_FS new file mode 100644 index 000000000..557a55ca1 --- /dev/null +++ b/configs/fedora/generic/CONFIG_ZONEFS_FS @@ -0,0 +1 @@ +# CONFIG_ZONEFS_FS is not set diff --git a/configs/fedora/generic/arm/CONFIG_ARM_IMX8M_DDRC_DEVFREQ b/configs/fedora/generic/arm/CONFIG_ARM_IMX8M_DDRC_DEVFREQ new file mode 100644 index 000000000..167c189ca --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_ARM_IMX8M_DDRC_DEVFREQ @@ -0,0 +1 @@ +CONFIG_ARM_IMX8M_DDRC_DEVFREQ=m diff --git a/configs/fedora/generic/arm/CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS b/configs/fedora/generic/arm/CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS new file mode 100644 index 000000000..a8cf80f89 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS @@ -0,0 +1 @@ +# CONFIG_ARM_SMMU_LEGACY_DT_BINDINGS is not set diff --git a/configs/fedora/generic/arm/CONFIG_CRYPTO_DEV_QCE_ENABLE_ALL b/configs/fedora/generic/arm/CONFIG_CRYPTO_DEV_QCE_ENABLE_ALL new file mode 100644 index 000000000..5c7d98e5a --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_CRYPTO_DEV_QCE_ENABLE_ALL @@ -0,0 +1 @@ +CONFIG_CRYPTO_DEV_QCE_ENABLE_ALL=y diff --git a/configs/fedora/generic/arm/CONFIG_CRYPTO_DEV_QCE_ENABLE_SHA b/configs/fedora/generic/arm/CONFIG_CRYPTO_DEV_QCE_ENABLE_SHA new file mode 100644 index 000000000..94f96317e --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_CRYPTO_DEV_QCE_ENABLE_SHA @@ -0,0 +1 @@ +# CONFIG_CRYPTO_DEV_QCE_ENABLE_SHA is not set diff --git a/configs/fedora/generic/arm/CONFIG_CRYPTO_DEV_QCE_ENABLE_SKCIPHER b/configs/fedora/generic/arm/CONFIG_CRYPTO_DEV_QCE_ENABLE_SKCIPHER new file mode 100644 index 000000000..b0a7986d5 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_CRYPTO_DEV_QCE_ENABLE_SKCIPHER @@ -0,0 +1 @@ +# CONFIG_CRYPTO_DEV_QCE_ENABLE_SKCIPHER is not set diff --git a/configs/fedora/generic/arm/CONFIG_DRM_LVDS_ENCODER b/configs/fedora/generic/arm/CONFIG_DRM_LVDS_ENCODER deleted file mode 100644 index 53f0efb59..000000000 --- a/configs/fedora/generic/arm/CONFIG_DRM_LVDS_ENCODER +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_LVDS_ENCODER=m diff --git a/configs/fedora/generic/arm/CONFIG_GPIO_MPC8XXX b/configs/fedora/generic/arm/CONFIG_GPIO_MPC8XXX new file mode 100644 index 000000000..876fd6a58 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_GPIO_MPC8XXX @@ -0,0 +1 @@ +# CONFIG_GPIO_MPC8XXX is not set diff --git a/configs/fedora/generic/arm/CONFIG_HW_RANDOM_IPROC_RNG200 b/configs/fedora/generic/arm/CONFIG_HW_RANDOM_IPROC_RNG200 new file mode 100644 index 000000000..afe147710 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_HW_RANDOM_IPROC_RNG200 @@ -0,0 +1 @@ +CONFIG_HW_RANDOM_IPROC_RNG200=m diff --git a/configs/fedora/generic/arm/CONFIG_IMX_DSP b/configs/fedora/generic/arm/CONFIG_IMX_DSP index e7d6b097b..21b752db3 100644 --- a/configs/fedora/generic/arm/CONFIG_IMX_DSP +++ b/configs/fedora/generic/arm/CONFIG_IMX_DSP @@ -1 +1 @@ -CONFIG_IMX_DSP=y +CONFIG_IMX_DSP=m diff --git a/configs/fedora/generic/arm/CONFIG_INA2XX_ADC b/configs/fedora/generic/arm/CONFIG_INA2XX_ADC new file mode 100644 index 000000000..32f6a0524 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_INA2XX_ADC @@ -0,0 +1 @@ +CONFIG_INA2XX_ADC=m diff --git a/configs/fedora/generic/arm/CONFIG_INTERCONNECT_QCOM_MSM8916 b/configs/fedora/generic/arm/CONFIG_INTERCONNECT_QCOM_MSM8916 new file mode 100644 index 000000000..09742187e --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_INTERCONNECT_QCOM_MSM8916 @@ -0,0 +1 @@ +CONFIG_INTERCONNECT_QCOM_MSM8916=m diff --git a/configs/fedora/generic/arm/CONFIG_IPQ_GCC_6018 b/configs/fedora/generic/arm/CONFIG_IPQ_GCC_6018 new file mode 100644 index 000000000..15fac8f98 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_IPQ_GCC_6018 @@ -0,0 +1 @@ +# CONFIG_IPQ_GCC_6018 is not set diff --git a/configs/fedora/generic/arm/CONFIG_MTD_DATAFLASH b/configs/fedora/generic/arm/CONFIG_MTD_DATAFLASH new file mode 100644 index 000000000..811074928 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_MTD_DATAFLASH @@ -0,0 +1 @@ +CONFIG_MTD_DATAFLASH=m diff --git a/configs/fedora/generic/arm/CONFIG_MTD_DATAFLASH_OTP b/configs/fedora/generic/arm/CONFIG_MTD_DATAFLASH_OTP new file mode 100644 index 000000000..9b951bd56 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_MTD_DATAFLASH_OTP @@ -0,0 +1 @@ +CONFIG_MTD_DATAFLASH_OTP=y diff --git a/configs/fedora/generic/arm/CONFIG_MTD_DATAFLASH_WRITE_VERIFY b/configs/fedora/generic/arm/CONFIG_MTD_DATAFLASH_WRITE_VERIFY new file mode 100644 index 000000000..8549afbbc --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_MTD_DATAFLASH_WRITE_VERIFY @@ -0,0 +1 @@ +CONFIG_MTD_DATAFLASH_WRITE_VERIFY=y diff --git a/configs/fedora/generic/arm/CONFIG_MTD_PHYSMAP_GEMINI b/configs/fedora/generic/arm/CONFIG_MTD_PHYSMAP_GEMINI new file mode 100644 index 000000000..0a5178936 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_MTD_PHYSMAP_GEMINI @@ -0,0 +1 @@ +# CONFIG_MTD_PHYSMAP_GEMINI is not set diff --git a/configs/fedora/generic/arm/CONFIG_MTD_PHYSMAP_IXP4XX b/configs/fedora/generic/arm/CONFIG_MTD_PHYSMAP_IXP4XX new file mode 100644 index 000000000..51968d79e --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_MTD_PHYSMAP_IXP4XX @@ -0,0 +1 @@ +# CONFIG_MTD_PHYSMAP_IXP4XX is not set diff --git a/configs/fedora/generic/arm/CONFIG_MTD_PHYSMAP_OF b/configs/fedora/generic/arm/CONFIG_MTD_PHYSMAP_OF index 20f59ebc7..6cdadf044 100644 --- a/configs/fedora/generic/arm/CONFIG_MTD_PHYSMAP_OF +++ b/configs/fedora/generic/arm/CONFIG_MTD_PHYSMAP_OF @@ -1 +1 @@ -# CONFIG_MTD_PHYSMAP_OF is not set +CONFIG_MTD_PHYSMAP_OF=y diff --git a/configs/fedora/generic/arm/CONFIG_MTD_PHYSMAP_VERSATILE b/configs/fedora/generic/arm/CONFIG_MTD_PHYSMAP_VERSATILE new file mode 100644 index 000000000..54ac1e2a8 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_MTD_PHYSMAP_VERSATILE @@ -0,0 +1 @@ +# CONFIG_MTD_PHYSMAP_VERSATILE is not set diff --git a/configs/fedora/generic/arm/CONFIG_MTD_SST25L b/configs/fedora/generic/arm/CONFIG_MTD_SST25L new file mode 100644 index 000000000..b1da0c467 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_MTD_SST25L @@ -0,0 +1 @@ +CONFIG_MTD_SST25L=m diff --git a/configs/fedora/generic/arm/CONFIG_NVMEM_SPMI_SDAM b/configs/fedora/generic/arm/CONFIG_NVMEM_SPMI_SDAM new file mode 100644 index 000000000..e3925e528 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_NVMEM_SPMI_SDAM @@ -0,0 +1 @@ +CONFIG_NVMEM_SPMI_SDAM=m diff --git a/configs/fedora/generic/arm/CONFIG_PHY_ROCKCHIP_DPHY_RX0 b/configs/fedora/generic/arm/CONFIG_PHY_ROCKCHIP_DPHY_RX0 new file mode 100644 index 000000000..b13045cf4 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_PHY_ROCKCHIP_DPHY_RX0 @@ -0,0 +1 @@ +CONFIG_PHY_ROCKCHIP_DPHY_RX0=m diff --git a/configs/fedora/generic/arm/CONFIG_QCOM_SCM b/configs/fedora/generic/arm/CONFIG_QCOM_SCM new file mode 100644 index 000000000..58e98180c --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_QCOM_SCM @@ -0,0 +1 @@ +CONFIG_QCOM_SCM=y diff --git a/configs/fedora/generic/arm/CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT b/configs/fedora/generic/arm/CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT new file mode 100644 index 000000000..8f9c32859 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT @@ -0,0 +1 @@ +# CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT is not set diff --git a/configs/fedora/generic/arm/CONFIG_QUICC_ENGINE b/configs/fedora/generic/arm/CONFIG_QUICC_ENGINE new file mode 100644 index 000000000..b340a0279 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_QUICC_ENGINE @@ -0,0 +1 @@ +# CONFIG_QUICC_ENGINE is not set diff --git a/configs/fedora/generic/arm/CONFIG_ROCKCHIP_CDN_DP b/configs/fedora/generic/arm/CONFIG_ROCKCHIP_CDN_DP index 86d2137bd..98a696d76 100644 --- a/configs/fedora/generic/arm/CONFIG_ROCKCHIP_CDN_DP +++ b/configs/fedora/generic/arm/CONFIG_ROCKCHIP_CDN_DP @@ -1 +1 @@ -CONFIG_ROCKCHIP_CDN_DP=y +# CONFIG_ROCKCHIP_CDN_DP is not set diff --git a/configs/fedora/generic/arm/CONFIG_RTC_DRV_PCF85363 b/configs/fedora/generic/arm/CONFIG_RTC_DRV_PCF85363 new file mode 100644 index 000000000..41451f50b --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_RTC_DRV_PCF85363 @@ -0,0 +1 @@ +CONFIG_RTC_DRV_PCF85363=m diff --git a/configs/fedora/generic/arm/CONFIG_SERIAL_8250_TEGRA b/configs/fedora/generic/arm/CONFIG_SERIAL_8250_TEGRA new file mode 100644 index 000000000..b9ebe4268 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_SERIAL_8250_TEGRA @@ -0,0 +1 @@ +CONFIG_SERIAL_8250_TEGRA=y diff --git a/configs/fedora/generic/arm/CONFIG_SND_IMX_SOC b/configs/fedora/generic/arm/CONFIG_SND_IMX_SOC new file mode 100644 index 000000000..25cc80938 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_SND_IMX_SOC @@ -0,0 +1 @@ +CONFIG_SND_IMX_SOC=m diff --git a/configs/fedora/generic/arm/CONFIG_SND_SOC_IMX_AUDMUX b/configs/fedora/generic/arm/CONFIG_SND_SOC_IMX_AUDMUX new file mode 100644 index 000000000..efa06fed2 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_SND_SOC_IMX_AUDMUX @@ -0,0 +1 @@ +CONFIG_SND_SOC_IMX_AUDMUX=m diff --git a/configs/fedora/generic/arm/CONFIG_SND_SOC_IMX_SGTL5000 b/configs/fedora/generic/arm/CONFIG_SND_SOC_IMX_SGTL5000 new file mode 100644 index 000000000..9bc19346c --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_SND_SOC_IMX_SGTL5000 @@ -0,0 +1 @@ +CONFIG_SND_SOC_IMX_SGTL5000=m diff --git a/configs/fedora/generic/arm/CONFIG_SND_SOC_IMX_SPDIF b/configs/fedora/generic/arm/CONFIG_SND_SOC_IMX_SPDIF new file mode 100644 index 000000000..58a211e43 --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_SND_SOC_IMX_SPDIF @@ -0,0 +1 @@ +CONFIG_SND_SOC_IMX_SPDIF=m diff --git a/configs/fedora/generic/arm/CONFIG_SND_SOC_WM8962 b/configs/fedora/generic/arm/CONFIG_SND_SOC_WM8962 new file mode 100644 index 000000000..cfebf5ded --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_SND_SOC_WM8962 @@ -0,0 +1 @@ +CONFIG_SND_SOC_WM8962=m diff --git a/configs/fedora/generic/arm/CONFIG_SUN8I_THERMAL b/configs/fedora/generic/arm/CONFIG_SUN8I_THERMAL new file mode 100644 index 000000000..32182a25f --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_SUN8I_THERMAL @@ -0,0 +1 @@ +CONFIG_SUN8I_THERMAL=m diff --git a/configs/fedora/generic/arm/CONFIG_VIDEO_ROCKCHIP_ISP1 b/configs/fedora/generic/arm/CONFIG_VIDEO_ROCKCHIP_ISP1 new file mode 100644 index 000000000..c8db5948b --- /dev/null +++ b/configs/fedora/generic/arm/CONFIG_VIDEO_ROCKCHIP_ISP1 @@ -0,0 +1 @@ +CONFIG_VIDEO_ROCKCHIP_ISP1=m diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_ARM64_E0PD b/configs/fedora/generic/arm/aarch64/CONFIG_ARM64_E0PD new file mode 100644 index 000000000..cba9bf0b8 --- /dev/null +++ b/configs/fedora/generic/arm/aarch64/CONFIG_ARM64_E0PD @@ -0,0 +1 @@ +CONFIG_ARM64_E0PD=y diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_ARM64_ERRATUM_1530923 b/configs/fedora/generic/arm/aarch64/CONFIG_ARM64_ERRATUM_1530923 new file mode 100644 index 000000000..4cc427c4a --- /dev/null +++ b/configs/fedora/generic/arm/aarch64/CONFIG_ARM64_ERRATUM_1530923 @@ -0,0 +1 @@ +CONFIG_ARM64_ERRATUM_1530923=y diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_ARM64_USE_LSE_ATOMICS b/configs/fedora/generic/arm/aarch64/CONFIG_ARM64_USE_LSE_ATOMICS new file mode 100644 index 000000000..bb1ab4cb2 --- /dev/null +++ b/configs/fedora/generic/arm/aarch64/CONFIG_ARM64_USE_LSE_ATOMICS @@ -0,0 +1 @@ +CONFIG_ARM64_USE_LSE_ATOMICS=y diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_CLK_IMX8MP b/configs/fedora/generic/arm/aarch64/CONFIG_CLK_IMX8MP new file mode 100644 index 000000000..f6d939b0e --- /dev/null +++ b/configs/fedora/generic/arm/aarch64/CONFIG_CLK_IMX8MP @@ -0,0 +1 @@ +# CONFIG_CLK_IMX8MP is not set diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_CLK_LS1028A_PLLDIG b/configs/fedora/generic/arm/aarch64/CONFIG_CLK_LS1028A_PLLDIG new file mode 100644 index 000000000..d558056c3 --- /dev/null +++ b/configs/fedora/generic/arm/aarch64/CONFIG_CLK_LS1028A_PLLDIG @@ -0,0 +1 @@ +CONFIG_CLK_LS1028A_PLLDIG=y diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_CLK_QORIQ b/configs/fedora/generic/arm/aarch64/CONFIG_CLK_QORIQ index b05638e5c..def0884d5 100644 --- a/configs/fedora/generic/arm/aarch64/CONFIG_CLK_QORIQ +++ b/configs/fedora/generic/arm/aarch64/CONFIG_CLK_QORIQ @@ -1 +1 @@ -# CONFIG_CLK_QORIQ is not set +CONFIG_CLK_QORIQ=y diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_DRM_PANEL_XINGBANGDA_XBD599 b/configs/fedora/generic/arm/aarch64/CONFIG_DRM_PANEL_XINGBANGDA_XBD599 new file mode 100644 index 000000000..aba5e985e --- /dev/null +++ b/configs/fedora/generic/arm/aarch64/CONFIG_DRM_PANEL_XINGBANGDA_XBD599 @@ -0,0 +1 @@ +CONFIG_DRM_PANEL_XINGBANGDA_XBD599=m diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_HISI_DMA b/configs/fedora/generic/arm/aarch64/CONFIG_HISI_DMA new file mode 100644 index 000000000..be503d27c --- /dev/null +++ b/configs/fedora/generic/arm/aarch64/CONFIG_HISI_DMA @@ -0,0 +1 @@ +CONFIG_HISI_DMA=m diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_INA2XX_ADC b/configs/fedora/generic/arm/aarch64/CONFIG_INA2XX_ADC deleted file mode 100644 index 32f6a0524..000000000 --- a/configs/fedora/generic/arm/aarch64/CONFIG_INA2XX_ADC +++ /dev/null @@ -1 +0,0 @@ -CONFIG_INA2XX_ADC=m diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_MTD_NAND_FSL_IFC b/configs/fedora/generic/arm/aarch64/CONFIG_MTD_NAND_FSL_IFC new file mode 100644 index 000000000..38acef3a9 --- /dev/null +++ b/configs/fedora/generic/arm/aarch64/CONFIG_MTD_NAND_FSL_IFC @@ -0,0 +1 @@ +CONFIG_MTD_NAND_FSL_IFC=m diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_NET_DSA_MSCC_FELIX b/configs/fedora/generic/arm/aarch64/CONFIG_NET_DSA_MSCC_FELIX new file mode 100644 index 000000000..47506f794 --- /dev/null +++ b/configs/fedora/generic/arm/aarch64/CONFIG_NET_DSA_MSCC_FELIX @@ -0,0 +1 @@ +CONFIG_NET_DSA_MSCC_FELIX=m diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_OCTEONTX2_PF b/configs/fedora/generic/arm/aarch64/CONFIG_OCTEONTX2_PF new file mode 100644 index 000000000..69cbb9236 --- /dev/null +++ b/configs/fedora/generic/arm/aarch64/CONFIG_OCTEONTX2_PF @@ -0,0 +1 @@ +CONFIG_OCTEONTX2_PF=m diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_PINCTRL_IMX8MP b/configs/fedora/generic/arm/aarch64/CONFIG_PINCTRL_IMX8MP new file mode 100644 index 000000000..5d797be71 --- /dev/null +++ b/configs/fedora/generic/arm/aarch64/CONFIG_PINCTRL_IMX8MP @@ -0,0 +1 @@ +# CONFIG_PINCTRL_IMX8MP is not set diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_QCOM_CPR b/configs/fedora/generic/arm/aarch64/CONFIG_QCOM_CPR new file mode 100644 index 000000000..e86e12294 --- /dev/null +++ b/configs/fedora/generic/arm/aarch64/CONFIG_QCOM_CPR @@ -0,0 +1 @@ +CONFIG_QCOM_CPR=m diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_QCOM_SOCINFO b/configs/fedora/generic/arm/aarch64/CONFIG_QCOM_SOCINFO deleted file mode 100644 index 8e56160a2..000000000 --- a/configs/fedora/generic/arm/aarch64/CONFIG_QCOM_SOCINFO +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_QCOM_SOCINFO is not set diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_QORIQ_CPUFREQ b/configs/fedora/generic/arm/aarch64/CONFIG_QORIQ_CPUFREQ new file mode 100644 index 000000000..f70531603 --- /dev/null +++ b/configs/fedora/generic/arm/aarch64/CONFIG_QORIQ_CPUFREQ @@ -0,0 +1 @@ +CONFIG_QORIQ_CPUFREQ=m diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_REGULATOR_MP8859 b/configs/fedora/generic/arm/aarch64/CONFIG_REGULATOR_MP8859 new file mode 100644 index 000000000..730804512 --- /dev/null +++ b/configs/fedora/generic/arm/aarch64/CONFIG_REGULATOR_MP8859 @@ -0,0 +1 @@ +CONFIG_REGULATOR_MP8859=m diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_SND_IMX_SOC b/configs/fedora/generic/arm/aarch64/CONFIG_SND_IMX_SOC deleted file mode 100644 index f0bf90c04..000000000 --- a/configs/fedora/generic/arm/aarch64/CONFIG_SND_IMX_SOC +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SND_IMX_SOC is not set diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_SOUNDWIRE_QCOM b/configs/fedora/generic/arm/aarch64/CONFIG_SOUNDWIRE_QCOM new file mode 100644 index 000000000..bfb00c97e --- /dev/null +++ b/configs/fedora/generic/arm/aarch64/CONFIG_SOUNDWIRE_QCOM @@ -0,0 +1 @@ +CONFIG_SOUNDWIRE_QCOM=m diff --git a/configs/fedora/generic/arm/aarch64/CONFIG_SPI_QCOM_GENI b/configs/fedora/generic/arm/aarch64/CONFIG_SPI_QCOM_GENI index 7b081b181..e5284e9c8 100644 --- a/configs/fedora/generic/arm/aarch64/CONFIG_SPI_QCOM_GENI +++ b/configs/fedora/generic/arm/aarch64/CONFIG_SPI_QCOM_GENI @@ -1 +1 @@ -# CONFIG_SPI_QCOM_GENI is not set +CONFIG_SPI_QCOM_GENI=m diff --git a/configs/fedora/generic/arm/armv7/CONFIG_CRYPTO_DEV_OMAP_AES b/configs/fedora/generic/arm/armv7/CONFIG_CRYPTO_DEV_OMAP_AES index eb6803b74..1b126b18e 100644 --- a/configs/fedora/generic/arm/armv7/CONFIG_CRYPTO_DEV_OMAP_AES +++ b/configs/fedora/generic/arm/armv7/CONFIG_CRYPTO_DEV_OMAP_AES @@ -1 +1 @@ -# CONFIG_CRYPTO_DEV_OMAP_AES is not set +CONFIG_CRYPTO_DEV_OMAP_AES=m diff --git a/configs/fedora/generic/arm/armv7/CONFIG_MTD_DATAFLASH b/configs/fedora/generic/arm/armv7/CONFIG_MTD_DATAFLASH deleted file mode 100644 index 811074928..000000000 --- a/configs/fedora/generic/arm/armv7/CONFIG_MTD_DATAFLASH +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MTD_DATAFLASH=m diff --git a/configs/fedora/generic/arm/armv7/CONFIG_MTD_DATAFLASH_OTP b/configs/fedora/generic/arm/armv7/CONFIG_MTD_DATAFLASH_OTP deleted file mode 100644 index 9b951bd56..000000000 --- a/configs/fedora/generic/arm/armv7/CONFIG_MTD_DATAFLASH_OTP +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MTD_DATAFLASH_OTP=y diff --git a/configs/fedora/generic/arm/armv7/CONFIG_MTD_DATAFLASH_WRITE_VERIFY b/configs/fedora/generic/arm/armv7/CONFIG_MTD_DATAFLASH_WRITE_VERIFY deleted file mode 100644 index 8549afbbc..000000000 --- a/configs/fedora/generic/arm/armv7/CONFIG_MTD_DATAFLASH_WRITE_VERIFY +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MTD_DATAFLASH_WRITE_VERIFY=y diff --git a/configs/fedora/generic/arm/armv7/CONFIG_MTD_SST25L b/configs/fedora/generic/arm/armv7/CONFIG_MTD_SST25L deleted file mode 100644 index b1da0c467..000000000 --- a/configs/fedora/generic/arm/armv7/CONFIG_MTD_SST25L +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MTD_SST25L=m diff --git a/configs/fedora/generic/arm/armv7/CONFIG_SOC_LS1021A b/configs/fedora/generic/arm/armv7/CONFIG_SOC_LS1021A new file mode 100644 index 000000000..3df043f0c --- /dev/null +++ b/configs/fedora/generic/arm/armv7/CONFIG_SOC_LS1021A @@ -0,0 +1 @@ +# CONFIG_SOC_LS1021A is not set diff --git a/configs/fedora/generic/arm/armv7/CONFIG_SPI_FSL_SPI b/configs/fedora/generic/arm/armv7/CONFIG_SPI_FSL_SPI new file mode 100644 index 000000000..834ceae37 --- /dev/null +++ b/configs/fedora/generic/arm/armv7/CONFIG_SPI_FSL_SPI @@ -0,0 +1 @@ +CONFIG_SPI_FSL_SPI=m diff --git a/configs/fedora/generic/arm/armv7/CONFIG_USB_MUSB_AM335X_CHILD b/configs/fedora/generic/arm/armv7/CONFIG_USB_MUSB_AM335X_CHILD deleted file mode 100644 index e16720b6a..000000000 --- a/configs/fedora/generic/arm/armv7/CONFIG_USB_MUSB_AM335X_CHILD +++ /dev/null @@ -1 +0,0 @@ -CONFIG_USB_MUSB_AM335X_CHILD=m diff --git a/configs/fedora/generic/arm/armv7/armv7/CONFIG_SND_IMX_SOC b/configs/fedora/generic/arm/armv7/armv7/CONFIG_SND_IMX_SOC deleted file mode 100644 index 25cc80938..000000000 --- a/configs/fedora/generic/arm/armv7/armv7/CONFIG_SND_IMX_SOC +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SND_IMX_SOC=m diff --git a/configs/fedora/generic/arm/armv7/armv7/CONFIG_SND_SOC_IMX_AUDMUX b/configs/fedora/generic/arm/armv7/armv7/CONFIG_SND_SOC_IMX_AUDMUX deleted file mode 100644 index efa06fed2..000000000 --- a/configs/fedora/generic/arm/armv7/armv7/CONFIG_SND_SOC_IMX_AUDMUX +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SND_SOC_IMX_AUDMUX=m diff --git a/configs/fedora/generic/arm/armv7/armv7/CONFIG_SND_SOC_IMX_SGTL5000 b/configs/fedora/generic/arm/armv7/armv7/CONFIG_SND_SOC_IMX_SGTL5000 deleted file mode 100644 index 9bc19346c..000000000 --- a/configs/fedora/generic/arm/armv7/armv7/CONFIG_SND_SOC_IMX_SGTL5000 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SND_SOC_IMX_SGTL5000=m diff --git a/configs/fedora/generic/arm/armv7/armv7/CONFIG_SND_SOC_IMX_SPDIF b/configs/fedora/generic/arm/armv7/armv7/CONFIG_SND_SOC_IMX_SPDIF deleted file mode 100644 index 58a211e43..000000000 --- a/configs/fedora/generic/arm/armv7/armv7/CONFIG_SND_SOC_IMX_SPDIF +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SND_SOC_IMX_SPDIF=m diff --git a/configs/fedora/generic/arm/armv7/armv7/CONFIG_SND_SOC_WM8962 b/configs/fedora/generic/arm/armv7/armv7/CONFIG_SND_SOC_WM8962 deleted file mode 100644 index cfebf5ded..000000000 --- a/configs/fedora/generic/arm/armv7/armv7/CONFIG_SND_SOC_WM8962 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SND_SOC_WM8962=m diff --git a/configs/fedora/generic/arm/armv7/armv7/CONFIG_SOC_LS1021A b/configs/fedora/generic/arm/armv7/armv7/CONFIG_SOC_LS1021A deleted file mode 100644 index 3df043f0c..000000000 --- a/configs/fedora/generic/arm/armv7/armv7/CONFIG_SOC_LS1021A +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SOC_LS1021A is not set diff --git a/configs/fedora/generic/powerpc/CONFIG_HOTPLUG_PCI_POWERNV b/configs/fedora/generic/powerpc/CONFIG_HOTPLUG_PCI_POWERNV index d304d6073..3224c1e00 100644 --- a/configs/fedora/generic/powerpc/CONFIG_HOTPLUG_PCI_POWERNV +++ b/configs/fedora/generic/powerpc/CONFIG_HOTPLUG_PCI_POWERNV @@ -1 +1 @@ -# CONFIG_HOTPLUG_PCI_POWERNV is not set +CONFIG_HOTPLUG_PCI_POWERNV=m diff --git a/configs/fedora/generic/powerpc/CONFIG_QUICC_ENGINE b/configs/fedora/generic/powerpc/CONFIG_QUICC_ENGINE new file mode 100644 index 000000000..b340a0279 --- /dev/null +++ b/configs/fedora/generic/powerpc/CONFIG_QUICC_ENGINE @@ -0,0 +1 @@ +# CONFIG_QUICC_ENGINE is not set diff --git a/configs/fedora/generic/s390x/CONFIG_ARCH_RANDOM b/configs/fedora/generic/s390x/CONFIG_ARCH_RANDOM deleted file mode 100644 index 51658fe1c..000000000 --- a/configs/fedora/generic/s390x/CONFIG_ARCH_RANDOM +++ /dev/null @@ -1 +0,0 @@ -CONFIG_ARCH_RANDOM=y diff --git a/configs/fedora/generic/s390x/CONFIG_ZLIB_DFLTCC b/configs/fedora/generic/s390x/CONFIG_ZLIB_DFLTCC new file mode 100644 index 000000000..a1bcfe6b5 --- /dev/null +++ b/configs/fedora/generic/s390x/CONFIG_ZLIB_DFLTCC @@ -0,0 +1 @@ +CONFIG_ZLIB_DFLTCC=y diff --git a/configs/fedora/generic/x86/CONFIG_EFI_RCI2_TABLE b/configs/fedora/generic/x86/CONFIG_EFI_RCI2_TABLE deleted file mode 100644 index 083461929..000000000 --- a/configs/fedora/generic/x86/CONFIG_EFI_RCI2_TABLE +++ /dev/null @@ -1 +0,0 @@ -CONFIG_EFI_RCI2_TABLE=y diff --git a/configs/fedora/generic/x86/CONFIG_I2C_PARPORT_LIGHT b/configs/fedora/generic/x86/CONFIG_I2C_PARPORT_LIGHT deleted file mode 100644 index 1dbc68883..000000000 --- a/configs/fedora/generic/x86/CONFIG_I2C_PARPORT_LIGHT +++ /dev/null @@ -1 +0,0 @@ -CONFIG_I2C_PARPORT_LIGHT=m diff --git a/configs/fedora/generic/x86/CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON b/configs/fedora/generic/x86/CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON new file mode 100644 index 000000000..e0046c4d9 --- /dev/null +++ b/configs/fedora/generic/x86/CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON @@ -0,0 +1 @@ +CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON=y diff --git a/configs/fedora/generic/x86/CONFIG_PCIE_INTEL_GW b/configs/fedora/generic/x86/CONFIG_PCIE_INTEL_GW new file mode 100644 index 000000000..2047fe3b5 --- /dev/null +++ b/configs/fedora/generic/x86/CONFIG_PCIE_INTEL_GW @@ -0,0 +1 @@ +# CONFIG_PCIE_INTEL_GW is not set diff --git a/configs/fedora/generic/x86/CONFIG_PHY_INTEL_EMMC b/configs/fedora/generic/x86/CONFIG_PHY_INTEL_EMMC new file mode 100644 index 000000000..7829f20cf --- /dev/null +++ b/configs/fedora/generic/x86/CONFIG_PHY_INTEL_EMMC @@ -0,0 +1 @@ +CONFIG_PHY_INTEL_EMMC=m diff --git a/configs/fedora/generic/x86/CONFIG_PINCTRL_LYNXPOINT b/configs/fedora/generic/x86/CONFIG_PINCTRL_LYNXPOINT new file mode 100644 index 000000000..49e70e671 --- /dev/null +++ b/configs/fedora/generic/x86/CONFIG_PINCTRL_LYNXPOINT @@ -0,0 +1 @@ +CONFIG_PINCTRL_LYNXPOINT=m diff --git a/configs/fedora/generic/x86/CONFIG_SND_HDA_PREALLOC_SIZE b/configs/fedora/generic/x86/CONFIG_SND_HDA_PREALLOC_SIZE new file mode 100644 index 000000000..c7493fadb --- /dev/null +++ b/configs/fedora/generic/x86/CONFIG_SND_HDA_PREALLOC_SIZE @@ -0,0 +1 @@ +CONFIG_SND_HDA_PREALLOC_SIZE=0 diff --git a/configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_BDW_RT5650_MACH b/configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_BDW_RT5650_MACH new file mode 100644 index 000000000..08ec882bb --- /dev/null +++ b/configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_BDW_RT5650_MACH @@ -0,0 +1 @@ +CONFIG_SND_SOC_INTEL_BDW_RT5650_MACH=m diff --git a/configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC~ b/configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC~ deleted file mode 100644 index 4181a1dd2..000000000 --- a/configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC~ +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC=n diff --git a/configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_SOF_CML_RT1011_RT5682_MACH b/configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_SOF_CML_RT1011_RT5682_MACH index c13580570..7cc6669fd 100644 --- a/configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_SOF_CML_RT1011_RT5682_MACH +++ b/configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_SOF_CML_RT1011_RT5682_MACH @@ -1,2 +1 @@ CONFIG_SND_SOC_INTEL_SOF_CML_RT1011_RT5682_MACH=m - diff --git a/configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_SOF_CML_RT1011_RT5682_MACH~ b/configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_SOF_CML_RT1011_RT5682_MACH~ deleted file mode 100644 index bad67ba0e..000000000 --- a/configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_SOF_CML_RT1011_RT5682_MACH~ +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SND_SOC_INTEL_SOF_CML_RT1011_RT5682_MACH is not set diff --git a/configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_SOF_DA7219_MAX98373_MACH b/configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_SOF_DA7219_MAX98373_MACH new file mode 100644 index 000000000..a96d1ad40 --- /dev/null +++ b/configs/fedora/generic/x86/CONFIG_SND_SOC_INTEL_SOF_DA7219_MAX98373_MACH @@ -0,0 +1 @@ +CONFIG_SND_SOC_INTEL_SOF_DA7219_MAX98373_MACH=m diff --git a/configs/fedora/generic/x86/CONFIG_SND_SOC_SOF_HDA_ALWAYS_ENABLE_DMI_L1~ b/configs/fedora/generic/x86/CONFIG_SND_SOC_SOF_HDA_ALWAYS_ENABLE_DMI_L1~ deleted file mode 100644 index df1d44aef..000000000 --- a/configs/fedora/generic/x86/CONFIG_SND_SOC_SOF_HDA_ALWAYS_ENABLE_DMI_L1~ +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SND_SOC_SOF_HDA_ALWAYS_ENABLE_DMI_L1=n diff --git a/configs/fedora/generic/x86/CONFIG_STACKPROTECTOR_STRONG b/configs/fedora/generic/x86/CONFIG_STACKPROTECTOR_STRONG deleted file mode 100644 index 6c885445e..000000000 --- a/configs/fedora/generic/x86/CONFIG_STACKPROTECTOR_STRONG +++ /dev/null @@ -1 +0,0 @@ -CONFIG_STACKPROTECTOR_STRONG=y diff --git a/configs/fedora/generic/x86/CONFIG_THUNDERBOLT_NET b/configs/fedora/generic/x86/CONFIG_THUNDERBOLT_NET deleted file mode 100644 index 1cfc06a79..000000000 --- a/configs/fedora/generic/x86/CONFIG_THUNDERBOLT_NET +++ /dev/null @@ -1 +0,0 @@ -CONFIG_THUNDERBOLT_NET=m diff --git a/configs/fedora/generic/x86/CONFIG_TIME_NS b/configs/fedora/generic/x86/CONFIG_TIME_NS new file mode 100644 index 000000000..4480620f6 --- /dev/null +++ b/configs/fedora/generic/x86/CONFIG_TIME_NS @@ -0,0 +1 @@ +CONFIG_TIME_NS=y diff --git a/configs/fedora/generic/x86/CONFIG_USB4 b/configs/fedora/generic/x86/CONFIG_USB4 new file mode 100644 index 000000000..2b50250e8 --- /dev/null +++ b/configs/fedora/generic/x86/CONFIG_USB4 @@ -0,0 +1 @@ +CONFIG_USB4=m diff --git a/configs/fedora/generic/x86/CONFIG_USB4_NET b/configs/fedora/generic/x86/CONFIG_USB4_NET new file mode 100644 index 000000000..2d51af31b --- /dev/null +++ b/configs/fedora/generic/x86/CONFIG_USB4_NET @@ -0,0 +1 @@ +CONFIG_USB4_NET=m diff --git a/configs/fedora/generic/x86/CONFIG_X86_INTEL_MPX b/configs/fedora/generic/x86/CONFIG_X86_INTEL_MPX deleted file mode 100644 index ed1a6daeb..000000000 --- a/configs/fedora/generic/x86/CONFIG_X86_INTEL_MPX +++ /dev/null @@ -1 +0,0 @@ -CONFIG_X86_INTEL_MPX=y diff --git a/configs/fedora/generic/x86/x86_64/CONFIG_EFI_RCI2_TABLE b/configs/fedora/generic/x86/x86_64/CONFIG_EFI_RCI2_TABLE new file mode 100644 index 000000000..083461929 --- /dev/null +++ b/configs/fedora/generic/x86/x86_64/CONFIG_EFI_RCI2_TABLE @@ -0,0 +1 @@ +CONFIG_EFI_RCI2_TABLE=y diff --git a/configs/fedora/generic/x86/x86_64/CONFIG_INTEL_IDXD b/configs/fedora/generic/x86/x86_64/CONFIG_INTEL_IDXD new file mode 100644 index 000000000..5ca68a398 --- /dev/null +++ b/configs/fedora/generic/x86/x86_64/CONFIG_INTEL_IDXD @@ -0,0 +1 @@ +CONFIG_INTEL_IDXD=m diff --git a/configs/fedora/generic/x86/x86_64/CONFIG_INTEL_UNCORE_FREQ_CONTROL b/configs/fedora/generic/x86/x86_64/CONFIG_INTEL_UNCORE_FREQ_CONTROL new file mode 100644 index 000000000..f8e5172cf --- /dev/null +++ b/configs/fedora/generic/x86/x86_64/CONFIG_INTEL_UNCORE_FREQ_CONTROL @@ -0,0 +1 @@ +CONFIG_INTEL_UNCORE_FREQ_CONTROL=m diff --git a/configs/fedora/generic/x86/x86_64/CONFIG_THUNDERBOLT b/configs/fedora/generic/x86/x86_64/CONFIG_THUNDERBOLT deleted file mode 100644 index 12b8cdd76..000000000 --- a/configs/fedora/generic/x86/x86_64/CONFIG_THUNDERBOLT +++ /dev/null @@ -1 +0,0 @@ -CONFIG_THUNDERBOLT=m diff --git a/drm-dp-mst-error-handling-improvements.patch b/drm-dp-mst-error-handling-improvements.patch new file mode 100644 index 000000000..91e396940 --- /dev/null +++ b/drm-dp-mst-error-handling-improvements.patch @@ -0,0 +1,471 @@ +From 52bd42038880354565bd5ca0bcc1d24b15136b0d Mon Sep 17 00:00:00 2001 +From: Benjamin Gaignard +Date: Wed, 5 Feb 2020 09:48:42 +0100 +Subject: [PATCH 1/3] drm/dp_mst: Fix W=1 warnings + +Fix the warnings that show up with W=1. +They are all about unused but set variables. +If functions returns are not used anymore make them void. + +Signed-off-by: Benjamin Gaignard +Reviewed-by: Lyude Paul +Link: https://patchwork.freedesktop.org/patch/msgid/20200205084842.5642-1-benjamin.gaignard@st.com +--- + drivers/gpu/drm/drm_dp_mst_topology.c | 114 +++++++++++++++----------- + 1 file changed, 65 insertions(+), 49 deletions(-) + +diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c +index 415bd0770eab..95e08d908dd2 100644 +--- a/drivers/gpu/drm/drm_dp_mst_topology.c ++++ b/drivers/gpu/drm/drm_dp_mst_topology.c +@@ -1035,7 +1035,8 @@ static bool drm_dp_sideband_parse_req(struct drm_dp_sideband_msg_rx *raw, + } + } + +-static int build_dpcd_write(struct drm_dp_sideband_msg_tx *msg, u8 port_num, u32 offset, u8 num_bytes, u8 *bytes) ++static void build_dpcd_write(struct drm_dp_sideband_msg_tx *msg, ++ u8 port_num, u32 offset, u8 num_bytes, u8 *bytes) + { + struct drm_dp_sideband_msg_req_body req; + +@@ -1045,17 +1046,14 @@ static int build_dpcd_write(struct drm_dp_sideband_msg_tx *msg, u8 port_num, u32 + req.u.dpcd_write.num_bytes = num_bytes; + req.u.dpcd_write.bytes = bytes; + drm_dp_encode_sideband_req(&req, msg); +- +- return 0; + } + +-static int build_link_address(struct drm_dp_sideband_msg_tx *msg) ++static void build_link_address(struct drm_dp_sideband_msg_tx *msg) + { + struct drm_dp_sideband_msg_req_body req; + + req.req_type = DP_LINK_ADDRESS; + drm_dp_encode_sideband_req(&req, msg); +- return 0; + } + + static int build_clear_payload_id_table(struct drm_dp_sideband_msg_tx *msg) +@@ -1067,7 +1065,8 @@ static int build_clear_payload_id_table(struct drm_dp_sideband_msg_tx *msg) + return 0; + } + +-static int build_enum_path_resources(struct drm_dp_sideband_msg_tx *msg, int port_num) ++static int build_enum_path_resources(struct drm_dp_sideband_msg_tx *msg, ++ int port_num) + { + struct drm_dp_sideband_msg_req_body req; + +@@ -1078,10 +1077,11 @@ static int build_enum_path_resources(struct drm_dp_sideband_msg_tx *msg, int por + return 0; + } + +-static int build_allocate_payload(struct drm_dp_sideband_msg_tx *msg, int port_num, +- u8 vcpi, uint16_t pbn, +- u8 number_sdp_streams, +- u8 *sdp_stream_sink) ++static void build_allocate_payload(struct drm_dp_sideband_msg_tx *msg, ++ int port_num, ++ u8 vcpi, uint16_t pbn, ++ u8 number_sdp_streams, ++ u8 *sdp_stream_sink) + { + struct drm_dp_sideband_msg_req_body req; + memset(&req, 0, sizeof(req)); +@@ -1094,11 +1094,10 @@ static int build_allocate_payload(struct drm_dp_sideband_msg_tx *msg, int port_n + number_sdp_streams); + drm_dp_encode_sideband_req(&req, msg); + msg->path_msg = true; +- return 0; + } + +-static int build_power_updown_phy(struct drm_dp_sideband_msg_tx *msg, +- int port_num, bool power_up) ++static void build_power_updown_phy(struct drm_dp_sideband_msg_tx *msg, ++ int port_num, bool power_up) + { + struct drm_dp_sideband_msg_req_body req; + +@@ -1110,7 +1109,6 @@ static int build_power_updown_phy(struct drm_dp_sideband_msg_tx *msg, + req.u.port_num.port_number = port_num; + drm_dp_encode_sideband_req(&req, msg); + msg->path_msg = true; +- return 0; + } + + static int drm_dp_mst_assign_payload_id(struct drm_dp_mst_topology_mgr *mgr, +@@ -2073,29 +2071,24 @@ ssize_t drm_dp_mst_dpcd_write(struct drm_dp_aux *aux, + offset, size, buffer); + } + +-static void drm_dp_check_mstb_guid(struct drm_dp_mst_branch *mstb, u8 *guid) ++static int drm_dp_check_mstb_guid(struct drm_dp_mst_branch *mstb, u8 *guid) + { +- int ret; ++ int ret = 0; + + memcpy(mstb->guid, guid, 16); + + if (!drm_dp_validate_guid(mstb->mgr, mstb->guid)) { + if (mstb->port_parent) { +- ret = drm_dp_send_dpcd_write( +- mstb->mgr, +- mstb->port_parent, +- DP_GUID, +- 16, +- mstb->guid); ++ ret = drm_dp_send_dpcd_write(mstb->mgr, ++ mstb->port_parent, ++ DP_GUID, 16, mstb->guid); + } else { +- +- ret = drm_dp_dpcd_write( +- mstb->mgr->aux, +- DP_GUID, +- mstb->guid, +- 16); ++ ret = drm_dp_dpcd_write(mstb->mgr->aux, ++ DP_GUID, mstb->guid, 16); + } + } ++ ++ return ret; + } + + static void build_mst_prop_path(const struct drm_dp_mst_branch *mstb, +@@ -2641,7 +2634,8 @@ static bool drm_dp_validate_guid(struct drm_dp_mst_topology_mgr *mgr, + return false; + } + +-static int build_dpcd_read(struct drm_dp_sideband_msg_tx *msg, u8 port_num, u32 offset, u8 num_bytes) ++static void build_dpcd_read(struct drm_dp_sideband_msg_tx *msg, ++ u8 port_num, u32 offset, u8 num_bytes) + { + struct drm_dp_sideband_msg_req_body req; + +@@ -2650,8 +2644,6 @@ static int build_dpcd_read(struct drm_dp_sideband_msg_tx *msg, u8 port_num, u32 + req.u.dpcd_read.dpcd_address = offset; + req.u.dpcd_read.num_bytes = num_bytes; + drm_dp_encode_sideband_req(&req, msg); +- +- return 0; + } + + static int drm_dp_send_sideband_msg(struct drm_dp_mst_topology_mgr *mgr, +@@ -2877,7 +2869,7 @@ static int drm_dp_send_link_address(struct drm_dp_mst_topology_mgr *mgr, + struct drm_dp_sideband_msg_tx *txmsg; + struct drm_dp_link_address_ack_reply *reply; + struct drm_dp_mst_port *port, *tmp; +- int i, len, ret, port_mask = 0; ++ int i, ret, port_mask = 0; + bool changed = false; + + txmsg = kzalloc(sizeof(*txmsg), GFP_KERNEL); +@@ -2885,7 +2877,7 @@ static int drm_dp_send_link_address(struct drm_dp_mst_topology_mgr *mgr, + return -ENOMEM; + + txmsg->dst = mstb; +- len = build_link_address(txmsg); ++ build_link_address(txmsg); + + mstb->link_address_sent = true; + drm_dp_queue_down_tx(mgr, txmsg); +@@ -2906,7 +2898,9 @@ static int drm_dp_send_link_address(struct drm_dp_mst_topology_mgr *mgr, + DRM_DEBUG_KMS("link address reply: %d\n", reply->nports); + drm_dp_dump_link_address(reply); + +- drm_dp_check_mstb_guid(mstb, reply->guid); ++ ret = drm_dp_check_mstb_guid(mstb, reply->guid); ++ if (ret) ++ goto out; + + for (i = 0; i < reply->nports; i++) { + port_mask |= BIT(reply->ports[i].port_number); +@@ -2947,14 +2941,14 @@ void drm_dp_send_clear_payload_id_table(struct drm_dp_mst_topology_mgr *mgr, + struct drm_dp_mst_branch *mstb) + { + struct drm_dp_sideband_msg_tx *txmsg; +- int len, ret; ++ int ret; + + txmsg = kzalloc(sizeof(*txmsg), GFP_KERNEL); + if (!txmsg) + return; + + txmsg->dst = mstb; +- len = build_clear_payload_id_table(txmsg); ++ build_clear_payload_id_table(txmsg); + + drm_dp_queue_down_tx(mgr, txmsg); + +@@ -2972,7 +2966,6 @@ drm_dp_send_enum_path_resources(struct drm_dp_mst_topology_mgr *mgr, + { + struct drm_dp_enum_path_resources_ack_reply *path_res; + struct drm_dp_sideband_msg_tx *txmsg; +- int len; + int ret; + + txmsg = kzalloc(sizeof(*txmsg), GFP_KERNEL); +@@ -2980,7 +2973,7 @@ drm_dp_send_enum_path_resources(struct drm_dp_mst_topology_mgr *mgr, + return -ENOMEM; + + txmsg->dst = mstb; +- len = build_enum_path_resources(txmsg, port->port_num); ++ build_enum_path_resources(txmsg, port->port_num); + + drm_dp_queue_down_tx(mgr, txmsg); + +@@ -3073,7 +3066,7 @@ static int drm_dp_payload_send_msg(struct drm_dp_mst_topology_mgr *mgr, + { + struct drm_dp_sideband_msg_tx *txmsg; + struct drm_dp_mst_branch *mstb; +- int len, ret, port_num; ++ int ret, port_num; + u8 sinks[DRM_DP_MAX_SDP_STREAMS]; + int i; + +@@ -3098,9 +3091,9 @@ static int drm_dp_payload_send_msg(struct drm_dp_mst_topology_mgr *mgr, + sinks[i] = i; + + txmsg->dst = mstb; +- len = build_allocate_payload(txmsg, port_num, +- id, +- pbn, port->num_sdp_streams, sinks); ++ build_allocate_payload(txmsg, port_num, ++ id, ++ pbn, port->num_sdp_streams, sinks); + + drm_dp_queue_down_tx(mgr, txmsg); + +@@ -3129,7 +3122,7 @@ int drm_dp_send_power_updown_phy(struct drm_dp_mst_topology_mgr *mgr, + struct drm_dp_mst_port *port, bool power_up) + { + struct drm_dp_sideband_msg_tx *txmsg; +- int len, ret; ++ int ret; + + port = drm_dp_mst_topology_get_port_validated(mgr, port); + if (!port) +@@ -3142,7 +3135,7 @@ int drm_dp_send_power_updown_phy(struct drm_dp_mst_topology_mgr *mgr, + } + + txmsg->dst = port->parent; +- len = build_power_updown_phy(txmsg, port->port_num, power_up); ++ build_power_updown_phy(txmsg, port->port_num, power_up); + drm_dp_queue_down_tx(mgr, txmsg); + + ret = drm_dp_mst_wait_tx_reply(port->parent, txmsg); +@@ -3364,7 +3357,6 @@ static int drm_dp_send_dpcd_read(struct drm_dp_mst_topology_mgr *mgr, + struct drm_dp_mst_port *port, + int offset, int size, u8 *bytes) + { +- int len; + int ret = 0; + struct drm_dp_sideband_msg_tx *txmsg; + struct drm_dp_mst_branch *mstb; +@@ -3379,7 +3371,7 @@ static int drm_dp_send_dpcd_read(struct drm_dp_mst_topology_mgr *mgr, + goto fail_put; + } + +- len = build_dpcd_read(txmsg, port->port_num, offset, size); ++ build_dpcd_read(txmsg, port->port_num, offset, size); + txmsg->dst = port->parent; + + drm_dp_queue_down_tx(mgr, txmsg); +@@ -3417,7 +3409,6 @@ static int drm_dp_send_dpcd_write(struct drm_dp_mst_topology_mgr *mgr, + struct drm_dp_mst_port *port, + int offset, int size, u8 *bytes) + { +- int len; + int ret; + struct drm_dp_sideband_msg_tx *txmsg; + struct drm_dp_mst_branch *mstb; +@@ -3432,7 +3423,7 @@ static int drm_dp_send_dpcd_write(struct drm_dp_mst_topology_mgr *mgr, + goto fail_put; + } + +- len = build_dpcd_write(txmsg, port->port_num, offset, size, bytes); ++ build_dpcd_write(txmsg, port->port_num, offset, size, bytes); + txmsg->dst = mstb; + + drm_dp_queue_down_tx(mgr, txmsg); +@@ -3682,7 +3673,12 @@ int drm_dp_mst_topology_mgr_resume(struct drm_dp_mst_topology_mgr *mgr, + DRM_DEBUG_KMS("dpcd read failed - undocked during suspend?\n"); + goto out_fail; + } +- drm_dp_check_mstb_guid(mgr->mst_primary, guid); ++ ++ ret = drm_dp_check_mstb_guid(mgr->mst_primary, guid); ++ if (ret) { ++ DRM_DEBUG_KMS("check mstb failed - undocked during suspend?\n"); ++ goto out_fail; ++ } + + /* + * For the final step of resuming the topology, we need to bring the +@@ -4625,15 +4621,34 @@ void drm_dp_mst_dump_topology(struct seq_file *m, + int ret; + + ret = drm_dp_dpcd_read(mgr->aux, DP_DPCD_REV, buf, DP_RECEIVER_CAP_SIZE); ++ if (ret) { ++ seq_printf(m, "dpcd read failed\n"); ++ goto out; ++ } + seq_printf(m, "dpcd: %*ph\n", DP_RECEIVER_CAP_SIZE, buf); ++ + ret = drm_dp_dpcd_read(mgr->aux, DP_FAUX_CAP, buf, 2); ++ if (ret) { ++ seq_printf(m, "faux/mst read failed\n"); ++ goto out; ++ } + seq_printf(m, "faux/mst: %*ph\n", 2, buf); ++ + ret = drm_dp_dpcd_read(mgr->aux, DP_MSTM_CTRL, buf, 1); ++ if (ret) { ++ seq_printf(m, "mst ctrl read failed\n"); ++ goto out; ++ } + seq_printf(m, "mst ctrl: %*ph\n", 1, buf); + + /* dump the standard OUI branch header */ + ret = drm_dp_dpcd_read(mgr->aux, DP_BRANCH_OUI, buf, DP_BRANCH_OUI_HEADER_SIZE); ++ if (ret) { ++ seq_printf(m, "branch oui read failed\n"); ++ goto out; ++ } + seq_printf(m, "branch oui: %*phN devid: ", 3, buf); ++ + for (i = 0x3; i < 0x8 && buf[i]; i++) + seq_printf(m, "%c", buf[i]); + seq_printf(m, " revision: hw: %x.%x sw: %x.%x\n", +@@ -4642,6 +4657,7 @@ void drm_dp_mst_dump_topology(struct seq_file *m, + seq_printf(m, "payload table: %*ph\n", DP_PAYLOAD_TABLE_SIZE, buf); + } + ++out: + mutex_unlock(&mgr->lock); + + } +-- +2.25.1 + +From 9004e704af8486da3dcbde0fb35a2a309152a5c3 Mon Sep 17 00:00:00 2001 +From: Lyude Paul +Date: Fri, 6 Mar 2020 18:49:21 -0500 +Subject: [PATCH 2/3] drm/dp_mst: Make drm_dp_mst_dpcd_write() consistent with + drm_dp_dpcd_write() + +Noticed this while having some problems with hubs sometimes not being +detected on the first plug. Every single dpcd read or write function +returns the number of bytes transferred on success or a negative error +code, except apparently for drm_dp_mst_dpcd_write() - which returns 0 on +success. + +There's not really any good reason for this difference that I can tell, +and having the two functions give differing behavior means that +drm_dp_dpcd_write() will end up returning 0 on success for MST devices, +but the number of bytes transferred for everything else. + +So, fix that and update the kernel doc. + +Signed-off-by: Lyude Paul +Fixes: 2f221a5efed4 ("drm/dp_mst: Add MST support to DP DPCD R/W functions") +Cc: Hans de Goede +Cc: Mikita Lipski +Cc: Sean Paul +--- + drivers/gpu/drm/drm_dp_mst_topology.c | 11 ++++------- + 1 file changed, 4 insertions(+), 7 deletions(-) + +diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c +index 95e08d908dd2..2dc1c0ba456b 100644 +--- a/drivers/gpu/drm/drm_dp_mst_topology.c ++++ b/drivers/gpu/drm/drm_dp_mst_topology.c +@@ -2059,7 +2059,7 @@ ssize_t drm_dp_mst_dpcd_read(struct drm_dp_aux *aux, + * sideband messaging as drm_dp_dpcd_write() does for local + * devices via actual AUX CH. + * +- * Return: 0 on success, negative error code on failure. ++ * Return: number of bytes written on success, negative error code on failure. + */ + ssize_t drm_dp_mst_dpcd_write(struct drm_dp_aux *aux, + unsigned int offset, void *buffer, size_t size) +@@ -3429,12 +3429,9 @@ static int drm_dp_send_dpcd_write(struct drm_dp_mst_topology_mgr *mgr, + drm_dp_queue_down_tx(mgr, txmsg); + + ret = drm_dp_mst_wait_tx_reply(mstb, txmsg); +- if (ret > 0) { +- if (txmsg->reply.reply_type == DP_SIDEBAND_REPLY_NAK) +- ret = -EIO; +- else +- ret = 0; +- } ++ if (ret > 0 && txmsg->reply.reply_type == DP_SIDEBAND_REPLY_NAK) ++ ret = -EIO; ++ + kfree(txmsg); + fail_put: + drm_dp_mst_topology_put_mstb(mstb); +-- +2.25.1 + +From ff18e1a7ef709cdd3dcbf7b4ae2b37e1c6695289 Mon Sep 17 00:00:00 2001 +From: Lyude Paul +Date: Fri, 6 Mar 2020 18:49:22 -0500 +Subject: [PATCH 3/3] drm/dp_mst: Fix drm_dp_check_mstb_guid() return code + +We actually expect this to return a 0 on success, or negative error code +on failure. In order to do that, we check whether or not we managed to +write the whole GUID and then return 0 if so, otherwise return a +negative error code. Also, let's add an error message here so it's a +little more obvious when this fails in the middle of a link address +probe. + +This should fix issues with certain MST hubs seemingly stopping for no +reason in the middle of the link address probe process. + +Fixes: cb897542c6d2 ("drm/dp_mst: Fix W=1 warnings") +Cc: Benjamin Gaignard +Cc: Sean Paul +Cc: Hans de Goede +Signed-off-by: Lyude Paul +--- + drivers/gpu/drm/drm_dp_mst_topology.c | 13 +++++++++++-- + 1 file changed, 11 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c +index 2dc1c0ba456b..d0e5993b0622 100644 +--- a/drivers/gpu/drm/drm_dp_mst_topology.c ++++ b/drivers/gpu/drm/drm_dp_mst_topology.c +@@ -2088,7 +2088,10 @@ static int drm_dp_check_mstb_guid(struct drm_dp_mst_branch *mstb, u8 *guid) + } + } + +- return ret; ++ if (ret < 16 && ret > 0) ++ return -EPROTO; ++ ++ return ret == 16 ? 0 : ret; + } + + static void build_mst_prop_path(const struct drm_dp_mst_branch *mstb, +@@ -2899,8 +2902,14 @@ static int drm_dp_send_link_address(struct drm_dp_mst_topology_mgr *mgr, + drm_dp_dump_link_address(reply); + + ret = drm_dp_check_mstb_guid(mstb, reply->guid); +- if (ret) ++ if (ret) { ++ char buf[64]; ++ ++ drm_dp_mst_rad_to_str(mstb->rad, mstb->lct, buf, sizeof(buf)); ++ DRM_ERROR("GUID check on %s failed: %d\n", ++ buf, ret); + goto out; ++ } + + for (i = 0; i < reply->nports; i++) { + port_mask |= BIT(reply->ports[i].port_number); +-- +2.25.1 + diff --git a/drm-i915-backports.patch b/drm-i915-backports.patch new file mode 100644 index 000000000..6fa8d2849 --- /dev/null +++ b/drm-i915-backports.patch @@ -0,0 +1,894 @@ +From 0fdb20f83f9962a3501e9cbdbfcc37ed5e721ab8 Mon Sep 17 00:00:00 2001 +From: Lyude Paul +Date: Tue, 10 Mar 2020 14:07:31 -0400 +Subject: [PATCH 1/7] drm/i915: Fix eDP DPCD aux max backlight calculations + +Max backlight value for the panel was being calculated using byte +count i.e. 0xffff if 2 bytes are supported for backlight brightness +and 0xff if 1 byte is supported. However, EDP_PWMGEN_BIT_COUNT +determines the number of active control bits used for the brightness +setting. Thus, even if the panel uses 2 byte setting, it might not use +all the control bits. Thus, max backlight should be set based on the +value of EDP_PWMGEN_BIT_COUNT instead of assuming 65535 or 255. + +Additionally, EDP_PWMGEN_BIT_COUNT was being updated based on the VBT +frequency which results in a different max backlight value. Thus, +setting of EDP_PWMGEN_BIT_COUNT is moved to setup phase instead of +enable so that max backlight can be calculated correctly. Only the +frequency divider is set during the enable phase using the value of +EDP_PWMGEN_BIT_COUNT. + +This is based off the original patch series from Furquan Shaikh +: + +https://patchwork.freedesktop.org/patch/317255/?series=62326&rev=3 + +Changes since original patch: +* Remove unused intel_dp variable in intel_dp_aux_setup_backlight() +* Fix checkpatch issues +* Make sure that we rewrite the pwmgen bit count whenever we bring the + panel out of D3 mode + +v2 by Jani: +* rebase +* fix readb return value check + +Cc: Furquan Shaikh +Tested-by: AceLan Kao +Tested-by: Perry Yuan +Signed-off-by: Lyude Paul +Signed-off-by: Jani Nikula +Link: https://patchwork.freedesktop.org/patch/msgid/20200116211623.53799-2-lyude@redhat.com +--- + .../drm/i915/display/intel_display_types.h | 3 + + .../drm/i915/display/intel_dp_aux_backlight.c | 139 ++++++++++++------ + 2 files changed, 95 insertions(+), 47 deletions(-) + +diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h +index 888ea8a170d1..778bd30743e5 100644 +--- a/drivers/gpu/drm/i915/display/intel_display_types.h ++++ b/drivers/gpu/drm/i915/display/intel_display_types.h +@@ -214,6 +214,9 @@ struct intel_panel { + u8 controller; /* bxt+ only */ + struct pwm_device *pwm; + ++ /* DPCD backlight */ ++ u8 pwmgen_bit_count; ++ + struct backlight_device *device; + + /* Connector and platform specific backlight functions */ +diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c +index 7c653f8c307f..345eed641455 100644 +--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c ++++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c +@@ -111,61 +111,28 @@ static bool intel_dp_aux_set_pwm_freq(struct intel_connector *connector) + { + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); +- int freq, fxp, fxp_min, fxp_max, fxp_actual, f = 1; +- u8 pn, pn_min, pn_max; ++ const u8 pn = connector->panel.backlight.pwmgen_bit_count; ++ int freq, fxp, f, fxp_actual, fxp_min, fxp_max; + +- /* Find desired value of (F x P) +- * Note that, if F x P is out of supported range, the maximum value or +- * minimum value will applied automatically. So no need to check that. +- */ + freq = dev_priv->vbt.backlight.pwm_freq_hz; +- DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n", freq); + if (!freq) { + DRM_DEBUG_KMS("Use panel default backlight frequency\n"); + return false; + } + + fxp = DIV_ROUND_CLOSEST(KHz(DP_EDP_BACKLIGHT_FREQ_BASE_KHZ), freq); ++ f = clamp(DIV_ROUND_CLOSEST(fxp, 1 << pn), 1, 255); ++ fxp_actual = f << pn; + +- /* Use highest possible value of Pn for more granularity of brightness +- * adjustment while satifying the conditions below. +- * - Pn is in the range of Pn_min and Pn_max +- * - F is in the range of 1 and 255 +- * - FxP is within 25% of desired value. +- * Note: 25% is arbitrary value and may need some tweak. +- */ +- if (drm_dp_dpcd_readb(&intel_dp->aux, +- DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN, &pn_min) != 1) { +- DRM_DEBUG_KMS("Failed to read pwmgen bit count cap min\n"); +- return false; +- } +- if (drm_dp_dpcd_readb(&intel_dp->aux, +- DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX, &pn_max) != 1) { +- DRM_DEBUG_KMS("Failed to read pwmgen bit count cap max\n"); +- return false; +- } +- pn_min &= DP_EDP_PWMGEN_BIT_COUNT_MASK; +- pn_max &= DP_EDP_PWMGEN_BIT_COUNT_MASK; +- ++ /* Ensure frequency is within 25% of desired value */ + fxp_min = DIV_ROUND_CLOSEST(fxp * 3, 4); + fxp_max = DIV_ROUND_CLOSEST(fxp * 5, 4); +- if (fxp_min < (1 << pn_min) || (255 << pn_max) < fxp_max) { +- DRM_DEBUG_KMS("VBT defined backlight frequency out of range\n"); +- return false; +- } + +- for (pn = pn_max; pn >= pn_min; pn--) { +- f = clamp(DIV_ROUND_CLOSEST(fxp, 1 << pn), 1, 255); +- fxp_actual = f << pn; +- if (fxp_min <= fxp_actual && fxp_actual <= fxp_max) +- break; +- } +- +- if (drm_dp_dpcd_writeb(&intel_dp->aux, +- DP_EDP_PWMGEN_BIT_COUNT, pn) < 0) { +- DRM_DEBUG_KMS("Failed to write aux pwmgen bit count\n"); ++ if (fxp_min > fxp_actual || fxp_actual > fxp_max) { ++ DRM_DEBUG_KMS("Actual frequency out of range\n"); + return false; + } ++ + if (drm_dp_dpcd_writeb(&intel_dp->aux, + DP_EDP_BACKLIGHT_FREQ_SET, (u8) f) < 0) { + DRM_DEBUG_KMS("Failed to write aux backlight freq\n"); +@@ -179,6 +146,7 @@ static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_st + { + struct intel_connector *connector = to_intel_connector(conn_state->connector); + struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); ++ struct intel_panel *panel = &connector->panel; + u8 dpcd_buf, new_dpcd_buf, edp_backlight_mode; + + if (drm_dp_dpcd_readb(&intel_dp->aux, +@@ -197,6 +165,12 @@ static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_st + case DP_EDP_BACKLIGHT_CONTROL_MODE_PRODUCT: + new_dpcd_buf &= ~DP_EDP_BACKLIGHT_CONTROL_MODE_MASK; + new_dpcd_buf |= DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD; ++ ++ if (drm_dp_dpcd_writeb(&intel_dp->aux, ++ DP_EDP_PWMGEN_BIT_COUNT, ++ panel->backlight.pwmgen_bit_count) < 0) ++ DRM_DEBUG_KMS("Failed to write aux pwmgen bit count\n"); ++ + break; + + /* Do nothing when it is already DPCD mode */ +@@ -226,20 +200,91 @@ static void intel_dp_aux_disable_backlight(const struct drm_connector_state *old + false); + } + ++static u32 intel_dp_aux_calc_max_backlight(struct intel_connector *connector) ++{ ++ struct drm_i915_private *i915 = to_i915(connector->base.dev); ++ struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); ++ struct intel_panel *panel = &connector->panel; ++ u32 max_backlight = 0; ++ int freq, fxp, fxp_min, fxp_max, fxp_actual, f = 1; ++ u8 pn, pn_min, pn_max; ++ ++ if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_PWMGEN_BIT_COUNT, &pn) == 1) { ++ pn &= DP_EDP_PWMGEN_BIT_COUNT_MASK; ++ max_backlight = (1 << pn) - 1; ++ } ++ ++ /* Find desired value of (F x P) ++ * Note that, if F x P is out of supported range, the maximum value or ++ * minimum value will applied automatically. So no need to check that. ++ */ ++ freq = i915->vbt.backlight.pwm_freq_hz; ++ DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n", freq); ++ if (!freq) { ++ DRM_DEBUG_KMS("Use panel default backlight frequency\n"); ++ return max_backlight; ++ } ++ ++ fxp = DIV_ROUND_CLOSEST(KHz(DP_EDP_BACKLIGHT_FREQ_BASE_KHZ), freq); ++ ++ /* Use highest possible value of Pn for more granularity of brightness ++ * adjustment while satifying the conditions below. ++ * - Pn is in the range of Pn_min and Pn_max ++ * - F is in the range of 1 and 255 ++ * - FxP is within 25% of desired value. ++ * Note: 25% is arbitrary value and may need some tweak. ++ */ ++ if (drm_dp_dpcd_readb(&intel_dp->aux, ++ DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN, &pn_min) != 1) { ++ DRM_DEBUG_KMS("Failed to read pwmgen bit count cap min\n"); ++ return max_backlight; ++ } ++ if (drm_dp_dpcd_readb(&intel_dp->aux, ++ DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX, &pn_max) != 1) { ++ DRM_DEBUG_KMS("Failed to read pwmgen bit count cap max\n"); ++ return max_backlight; ++ } ++ pn_min &= DP_EDP_PWMGEN_BIT_COUNT_MASK; ++ pn_max &= DP_EDP_PWMGEN_BIT_COUNT_MASK; ++ ++ fxp_min = DIV_ROUND_CLOSEST(fxp * 3, 4); ++ fxp_max = DIV_ROUND_CLOSEST(fxp * 5, 4); ++ if (fxp_min < (1 << pn_min) || (255 << pn_max) < fxp_max) { ++ DRM_DEBUG_KMS("VBT defined backlight frequency out of range\n"); ++ return max_backlight; ++ } ++ ++ for (pn = pn_max; pn >= pn_min; pn--) { ++ f = clamp(DIV_ROUND_CLOSEST(fxp, 1 << pn), 1, 255); ++ fxp_actual = f << pn; ++ if (fxp_min <= fxp_actual && fxp_actual <= fxp_max) ++ break; ++ } ++ ++ DRM_DEBUG_KMS("Using eDP pwmgen bit count of %d\n", pn); ++ if (drm_dp_dpcd_writeb(&intel_dp->aux, ++ DP_EDP_PWMGEN_BIT_COUNT, pn) < 0) { ++ DRM_DEBUG_KMS("Failed to write aux pwmgen bit count\n"); ++ return max_backlight; ++ } ++ panel->backlight.pwmgen_bit_count = pn; ++ ++ max_backlight = (1 << pn) - 1; ++ ++ return max_backlight; ++} ++ + static int intel_dp_aux_setup_backlight(struct intel_connector *connector, + enum pipe pipe) + { +- struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); + struct intel_panel *panel = &connector->panel; + +- if (intel_dp->edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_BYTE_COUNT) +- panel->backlight.max = 0xFFFF; +- else +- panel->backlight.max = 0xFF; ++ panel->backlight.max = intel_dp_aux_calc_max_backlight(connector); ++ if (!panel->backlight.max) ++ return -ENODEV; + + panel->backlight.min = 0; + panel->backlight.level = intel_dp_aux_get_backlight(connector); +- + panel->backlight.enabled = panel->backlight.level != 0; + + return 0; +-- +2.25.1 + +From 7dbe3f659d364de34b210baf0598913dc8c3cabd Mon Sep 17 00:00:00 2001 +From: Lyude Paul +Date: Tue, 10 Mar 2020 14:07:32 -0400 +Subject: [PATCH 2/7] drm/i915: Assume 100% brightness when not in DPCD control + mode + +Currently we always determine the initial panel brightness level by +simply reading the value from DP_EDP_BACKLIGHT_BRIGHTNESS_MSB/LSB. This +seems wrong though, because if the panel is not currently in DPCD +control mode there's not really any reason why there would be any +brightness value programmed in the first place. + +This appears to be the case on the Lenovo ThinkPad X1 Extreme 2nd +Generation, where the default value in these registers is always 0 on +boot despite the fact the panel runs at max brightness by default. +Getting the initial brightness value correct here is important as well, +since the panel on this laptop doesn't behave well if it's ever put into +DPCD control mode while the brightness level is programmed to 0. + +So, let's fix this by checking what the current backlight control mode +is before reading the brightness level. If it's in DPCD control mode, we +return the programmed brightness level. Otherwise we assume 100% +brightness and return the highest possible brightness level. This also +prevents us from accidentally programming a brightness level of 0. + +This is one of the many fixes that gets backlight controls working on +the ThinkPad X1 Extreme 2nd Generation with optional 4K AMOLED screen. + +Changes since v1: +* s/DP_EDP_DISPLAY_CONTROL_REGISTER/DP_EDP_BACKLIGHT_MODE_SET_REGISTER/ + - Jani + +Tested-by: AceLan Kao +Tested-by: Perry Yuan +Signed-off-by: Lyude Paul +Signed-off-by: Jani Nikula +Link: https://patchwork.freedesktop.org/patch/msgid/20200116211623.53799-3-lyude@redhat.com +--- + .../drm/i915/display/intel_dp_aux_backlight.c | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c +index 345eed641455..5d4db5f8a165 100644 +--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c ++++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c +@@ -59,8 +59,25 @@ static u32 intel_dp_aux_get_backlight(struct intel_connector *connector) + { + struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); + u8 read_val[2] = { 0x0 }; ++ u8 mode_reg; + u16 level = 0; + ++ if (drm_dp_dpcd_readb(&intel_dp->aux, ++ DP_EDP_BACKLIGHT_MODE_SET_REGISTER, ++ &mode_reg) != 1) { ++ DRM_DEBUG_KMS("Failed to read the DPCD register 0x%x\n", ++ DP_EDP_BACKLIGHT_MODE_SET_REGISTER); ++ return 0; ++ } ++ ++ /* ++ * If we're not in DPCD control mode yet, the programmed brightness ++ * value is meaningless and we should assume max brightness ++ */ ++ if ((mode_reg & DP_EDP_BACKLIGHT_CONTROL_MODE_MASK) != ++ DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD) ++ return connector->panel.backlight.max; ++ + if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_BACKLIGHT_BRIGHTNESS_MSB, + &read_val, sizeof(read_val)) < 0) { + DRM_DEBUG_KMS("Failed to read DPCD register 0x%x\n", +-- +2.25.1 + +From b2a29a70e386c2fbd92e1b7980091e7980495211 Mon Sep 17 00:00:00 2001 +From: Lyude Paul +Date: Tue, 10 Mar 2020 14:07:33 -0400 +Subject: [PATCH 3/7] drm/i915: Fix DPCD register order in + intel_dp_aux_enable_backlight() + +For eDP panels, it appears it's expected that so long as the panel is in +DPCD control mode that the brightness value is never set to 0. Instead, +if the desired effect is to set the panel's backlight to 0 we're +expected to simply turn off the backlight through the +DP_EDP_DISPLAY_CONTROL_REGISTER. + +We already do the latter correctly in intel_dp_aux_disable_backlight(). +But, we make the mistake of writing the DPCD registers in the wrong +order when enabling the backlight in intel_dp_aux_enable_backlight() +since we currently enable the backlight through +DP_EDP_DISPLAY_CONTROL_REGISTER before writing the brightness level. On +the X1 Extreme 2nd Generation, this appears to have the potential of +confusing the panel in such a way that further attempts to set the +brightness don't actually change the backlight as expected and leave it +off. Presumably, this happens because the incorrect register writing +order briefly leaves the panel with DPCD mode enabled and a 0 brightness +level set. + +So, reverse the order we write the DPCD registers when enabling the +panel backlight so that we write the brightness value first, and enable +the backlight second. This fix appears to be the final bit needed to get +the backlight on the ThinkPad X1 Extreme 2nd Generation's AMOLED screen +working. + +Tested-by: AceLan Kao +Tested-by: Perry Yuan +Signed-off-by: Lyude Paul +Signed-off-by: Jani Nikula +Link: https://patchwork.freedesktop.org/patch/msgid/20200116211623.53799-4-lyude@redhat.com +--- + drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c +index 5d4db5f8a165..77a759361c5c 100644 +--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c ++++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c +@@ -207,8 +207,9 @@ static void intel_dp_aux_enable_backlight(const struct intel_crtc_state *crtc_st + } + } + ++ intel_dp_aux_set_backlight(conn_state, ++ connector->panel.backlight.level); + set_aux_backlight_enable(intel_dp, true); +- intel_dp_aux_set_backlight(conn_state, connector->panel.backlight.level); + } + + static void intel_dp_aux_disable_backlight(const struct drm_connector_state *old_conn_state) +-- +2.25.1 + +From 8b2e6f450c1f8d34632d4789369030008e874a75 Mon Sep 17 00:00:00 2001 +From: Lyude Paul +Date: Tue, 10 Mar 2020 14:07:34 -0400 +Subject: [PATCH 4/7] drm/i915: Auto detect DPCD backlight support by default + +Turns out we actually already have some companies, such as Lenovo, +shipping machines with AMOLED screens that don't allow controlling the +backlight through the usual PWM interface and only allow controlling it +through the standard EDP DPCD interface. One example of one of these +laptops is the X1 Extreme 2nd Generation. + +Since we've got systems that need this turned on by default now to have +backlight controls working out of the box, let's start auto-detecting it +for systems by default based on what the VBT tells us. We do this by +changing the default value for the enable_dpcd_backlight module param +from 0 to -1. + +Tested-by: AceLan Kao +Tested-by: Perry Yuan +Signed-off-by: Lyude Paul +Signed-off-by: Jani Nikula +Link: https://patchwork.freedesktop.org/patch/msgid/20200116211623.53799-6-lyude@redhat.com +--- + drivers/gpu/drm/i915/i915_params.c | 2 +- + drivers/gpu/drm/i915/i915_params.h | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c +index 1dd1f3652795..31eed60c167e 100644 +--- a/drivers/gpu/drm/i915/i915_params.c ++++ b/drivers/gpu/drm/i915/i915_params.c +@@ -172,7 +172,7 @@ i915_param_named_unsafe(inject_probe_failure, uint, 0400, + + i915_param_named(enable_dpcd_backlight, int, 0600, + "Enable support for DPCD backlight control" +- "(-1=use per-VBT LFP backlight type setting, 0=disabled [default], 1=enabled)"); ++ "(-1=use per-VBT LFP backlight type setting [default], 0=disabled, 1=enabled)"); + + #if IS_ENABLED(CONFIG_DRM_I915_GVT) + i915_param_named(enable_gvt, bool, 0400, +diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h +index 31b88f297fbc..a79d0867f77a 100644 +--- a/drivers/gpu/drm/i915/i915_params.h ++++ b/drivers/gpu/drm/i915/i915_params.h +@@ -64,7 +64,7 @@ struct drm_printer; + param(int, reset, 3) \ + param(unsigned int, inject_probe_failure, 0) \ + param(int, fastboot, -1) \ +- param(int, enable_dpcd_backlight, 0) \ ++ param(int, enable_dpcd_backlight, -1) \ + param(char *, force_probe, CONFIG_DRM_I915_FORCE_PROBE) \ + param(unsigned long, fake_lmem_start, 0) \ + /* leave bools at the end to not create holes */ \ +-- +2.25.1 + +From c10b0dfaac8385f9b712a552c9a5eed9976aacf2 Mon Sep 17 00:00:00 2001 +From: Lyude Paul +Date: Tue, 10 Mar 2020 14:07:35 -0400 +Subject: [PATCH 5/7] drm/dp: Introduce EDID-based quirks + +The whole point of using OUIs is so that we can recognize certain +devices and potentially apply quirks for them. Normally this should work +quite well, but there appears to be quite a number of laptop panels out +there that will fill the OUI but not the device ID. As such, for devices +like this I can't imagine it's a very good idea to try relying on OUIs +for applying quirks. As well, some laptop vendors have confirmed to us +that their panels have this exact issue. + +So, let's introduce the ability to apply DP quirks based on EDID +identification. We reuse the same quirk bits for OUI-based quirks, so +that callers can simply check all possible quirks using +drm_dp_has_quirk(). + +Signed-off-by: Lyude Paul +Reviewed-by: Adam Jackson +Cc: Jani Nikula +--- + drivers/gpu/drm/drm_dp_helper.c | 61 +++++++++++++++++++ + drivers/gpu/drm/drm_dp_mst_topology.c | 3 +- + .../drm/i915/display/intel_display_types.h | 1 + + drivers/gpu/drm/i915/display/intel_dp.c | 11 ++-- + drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +- + drivers/gpu/drm/i915/display/intel_psr.c | 2 +- + include/drm/drm_dp_helper.h | 11 +++- + 7 files changed, 81 insertions(+), 10 deletions(-) + +diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c +index a5364b5192b8..9b2ea2ae0204 100644 +--- a/drivers/gpu/drm/drm_dp_helper.c ++++ b/drivers/gpu/drm/drm_dp_helper.c +@@ -1222,6 +1222,67 @@ drm_dp_get_quirks(const struct drm_dp_dpcd_ident *ident, bool is_branch) + #undef DEVICE_ID_ANY + #undef DEVICE_ID + ++struct edid_quirk { ++ u8 mfg_id[2]; ++ u8 prod_id[2]; ++ u32 quirks; ++}; ++ ++#define MFG(first, second) { (first), (second) } ++#define PROD_ID(first, second) { (first), (second) } ++ ++/* ++ * Some devices have unreliable OUIDs where they don't set the device ID ++ * correctly, and as a result we need to use the EDID for finding additional ++ * DP quirks in such cases. ++ */ ++static const struct edid_quirk edid_quirk_list[] = { ++}; ++ ++#undef MFG ++#undef PROD_ID ++ ++/** ++ * drm_dp_get_edid_quirks() - Check the EDID of a DP device to find additional ++ * DP-specific quirks ++ * @edid: The EDID to check ++ * ++ * While OUIDs are meant to be used to recognize a DisplayPort device, a lot ++ * of manufacturers don't seem to like following standards and neglect to fill ++ * the dev-ID in, making it impossible to only use OUIDs for determining ++ * quirks in some cases. This function can be used to check the EDID and look ++ * up any additional DP quirks. The bits returned by this function correspond ++ * to the quirk bits in &drm_dp_quirk. ++ * ++ * Returns: a bitmask of quirks, if any. The driver can check this using ++ * drm_dp_has_quirk(). ++ */ ++u32 drm_dp_get_edid_quirks(const struct edid *edid) ++{ ++ const struct edid_quirk *quirk; ++ u32 quirks = 0; ++ int i; ++ ++ if (!edid) ++ return 0; ++ ++ for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { ++ quirk = &edid_quirk_list[i]; ++ if (memcmp(quirk->mfg_id, edid->mfg_id, ++ sizeof(edid->mfg_id)) == 0 && ++ memcmp(quirk->prod_id, edid->prod_code, ++ sizeof(edid->prod_code)) == 0) ++ quirks |= quirk->quirks; ++ } ++ ++ DRM_DEBUG_KMS("DP sink: EDID mfg %*phD prod-ID %*phD quirks: 0x%04x\n", ++ (int)sizeof(edid->mfg_id), edid->mfg_id, ++ (int)sizeof(edid->prod_code), edid->prod_code, quirks); ++ ++ return quirks; ++} ++EXPORT_SYMBOL(drm_dp_get_edid_quirks); ++ + /** + * drm_dp_read_desc - read sink/branch descriptor from DPCD + * @aux: DisplayPort AUX channel +diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c +index cce0b1bba591..685c35e67144 100644 +--- a/drivers/gpu/drm/drm_dp_mst_topology.c ++++ b/drivers/gpu/drm/drm_dp_mst_topology.c +@@ -5461,7 +5461,8 @@ struct drm_dp_aux *drm_dp_mst_dsc_aux_for_port(struct drm_dp_mst_port *port) + if (drm_dp_read_desc(port->mgr->aux, &desc, true)) + return NULL; + +- if (drm_dp_has_quirk(&desc, DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD) && ++ if (drm_dp_has_quirk(&desc, 0, ++ DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD) && + port->mgr->dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14 && + port->parent == port->mgr->mst_primary) { + u8 downstreamport; +diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h +index 778bd30743e5..8e3c5569603b 100644 +--- a/drivers/gpu/drm/i915/display/intel_display_types.h ++++ b/drivers/gpu/drm/i915/display/intel_display_types.h +@@ -1253,6 +1253,7 @@ struct intel_dp { + int max_link_rate; + /* sink or branch descriptor */ + struct drm_dp_desc desc; ++ u32 edid_quirks; + struct drm_dp_aux aux; + u32 aux_busy_last_status; + u8 train_set[4]; +diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c +index c7424e2a04a3..e20b85ff937d 100644 +--- a/drivers/gpu/drm/i915/display/intel_dp.c ++++ b/drivers/gpu/drm/i915/display/intel_dp.c +@@ -2373,7 +2373,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, + struct intel_connector *intel_connector = intel_dp->attached_connector; + struct intel_digital_connector_state *intel_conn_state = + to_intel_digital_connector_state(conn_state); +- bool constant_n = drm_dp_has_quirk(&intel_dp->desc, ++ bool constant_n = drm_dp_has_quirk(&intel_dp->desc, 0, + DP_DPCD_QUIRK_CONSTANT_N); + int ret = 0, output_bpp; + +@@ -4466,7 +4466,8 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) + * it don't care about read it here and in intel_edp_init_dpcd(). + */ + if (!intel_dp_is_edp(intel_dp) && +- !drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_NO_SINK_COUNT)) { ++ !drm_dp_has_quirk(&intel_dp->desc, 0, ++ DP_DPCD_QUIRK_NO_SINK_COUNT)) { + u8 count; + ssize_t r; + +@@ -5631,6 +5632,7 @@ intel_dp_set_edid(struct intel_dp *intel_dp) + + intel_dp->has_audio = drm_detect_monitor_audio(edid); + drm_dp_cec_set_edid(&intel_dp->aux, edid); ++ intel_dp->edid_quirks = drm_dp_get_edid_quirks(edid); + } + + static void +@@ -5643,6 +5645,7 @@ intel_dp_unset_edid(struct intel_dp *intel_dp) + intel_connector->detect_edid = NULL; + + intel_dp->has_audio = false; ++ intel_dp->edid_quirks = 0; + } + + static int +@@ -7356,8 +7359,8 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, + edid = drm_get_edid(connector, &intel_dp->aux.ddc); + if (edid) { + if (drm_add_edid_modes(connector, edid)) { +- drm_connector_update_edid_property(connector, +- edid); ++ drm_connector_update_edid_property(connector, edid); ++ intel_dp->edid_quirks = drm_dp_get_edid_quirks(edid); + } else { + kfree(edid); + edid = ERR_PTR(-EINVAL); +diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c +index cba68c5a80fa..4a1a2f868423 100644 +--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c ++++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c +@@ -50,7 +50,7 @@ static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder, + const struct drm_display_mode *adjusted_mode = + &crtc_state->hw.adjusted_mode; + void *port = connector->port; +- bool constant_n = drm_dp_has_quirk(&intel_dp->desc, ++ bool constant_n = drm_dp_has_quirk(&intel_dp->desc, 0, + DP_DPCD_QUIRK_CONSTANT_N); + int bpp, slots = -EINVAL; + +diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c +index 83025052c965..82ba5624d14f 100644 +--- a/drivers/gpu/drm/i915/display/intel_psr.c ++++ b/drivers/gpu/drm/i915/display/intel_psr.c +@@ -282,7 +282,7 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp) + DRM_DEBUG_KMS("eDP panel supports PSR version %x\n", + intel_dp->psr_dpcd[0]); + +- if (drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_NO_PSR)) { ++ if (drm_dp_has_quirk(&intel_dp->desc, 0, DP_DPCD_QUIRK_NO_PSR)) { + DRM_DEBUG_KMS("PSR support not currently available for this panel\n"); + return; + } +diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h +index bc04467f7c3a..1fe49e202dfb 100644 +--- a/include/drm/drm_dp_helper.h ++++ b/include/drm/drm_dp_helper.h +@@ -1493,13 +1493,16 @@ struct drm_dp_desc { + + int drm_dp_read_desc(struct drm_dp_aux *aux, struct drm_dp_desc *desc, + bool is_branch); ++u32 drm_dp_get_edid_quirks(const struct edid *edid); + + /** + * enum drm_dp_quirk - Display Port sink/branch device specific quirks + * + * Display Port sink and branch devices in the wild have a variety of bugs, try + * to collect them here. The quirks are shared, but it's up to the drivers to +- * implement workarounds for them. ++ * implement workarounds for them. Note that because some devices have ++ * unreliable OUIDs, the EDID of sinks should also be checked for quirks using ++ * drm_dp_get_edid_quirks(). + */ + enum drm_dp_quirk { + /** +@@ -1535,14 +1538,16 @@ enum drm_dp_quirk { + /** + * drm_dp_has_quirk() - does the DP device have a specific quirk + * @desc: Device decriptor filled by drm_dp_read_desc() ++ * @edid_quirks: Optional quirk bitmask filled by drm_dp_get_edid_quirks() + * @quirk: Quirk to query for + * + * Return true if DP device identified by @desc has @quirk. + */ + static inline bool +-drm_dp_has_quirk(const struct drm_dp_desc *desc, enum drm_dp_quirk quirk) ++drm_dp_has_quirk(const struct drm_dp_desc *desc, u32 edid_quirks, ++ enum drm_dp_quirk quirk) + { +- return desc->quirks & BIT(quirk); ++ return (desc->quirks | edid_quirks) & BIT(quirk); + } + + #ifdef CONFIG_DRM_DP_CEC +-- +2.25.1 + +From a21ec8aec8452de788d6b1fc175dc8281a57d5de Mon Sep 17 00:00:00 2001 +From: Lyude Paul +Date: Tue, 10 Mar 2020 14:07:36 -0400 +Subject: [PATCH 6/7] drm/i915: Force DPCD backlight mode on X1 Extreme 2nd Gen + 4K AMOLED panel + +The X1 Extreme is one of the systems that lies about which backlight +interface that it uses in its VBIOS as PWM backlight controls don't work +at all on this machine. It's possible that this panel could be one of +the infamous ones that can switch between PWM mode and DPCD backlight +control mode, but we haven't gotten any more details on this from Lenovo +just yet. For the time being though, making sure the backlight 'just +works' is a bit more important. + +So, add a quirk to force DPCD backlight controls on for these systems +based on EDID (since this panel doesn't appear to fill in the device ID). +Hopefully in the future we'll figure out a better way of probing this. + +Signed-off-by: Lyude Paul +Reviewed-by: Adam Jackson +Cc: Jani Nikula + +Changes since v2: +* The bugzilla URL is deprecated, bug reporting happens on gitlab now. + Update the messages we print to reflect this +* Also, take the opportunity to move FDO_BUG_URL out of i915_utils.c and + into i915_utils.h so that other places which print things that aren't + traditional errors but are worth filing bugs about, can actually use + it. + +Signed-off-by: Lyude Paul +--- + drivers/gpu/drm/drm_dp_helper.c | 4 ++++ + .../drm/i915/display/intel_dp_aux_backlight.c | 24 +++++++++++++++---- + drivers/gpu/drm/i915/i915_utils.c | 1 - + drivers/gpu/drm/i915/i915_utils.h | 2 ++ + include/drm/drm_dp_helper.h | 10 ++++++++ + 5 files changed, 36 insertions(+), 5 deletions(-) + +diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c +index 9b2ea2ae0204..026f701eac69 100644 +--- a/drivers/gpu/drm/drm_dp_helper.c ++++ b/drivers/gpu/drm/drm_dp_helper.c +@@ -1237,6 +1237,10 @@ struct edid_quirk { + * DP quirks in such cases. + */ + static const struct edid_quirk edid_quirk_list[] = { ++ /* Optional 4K AMOLED panel in the ThinkPad X1 Extreme 2nd Generation ++ * only supports DPCD backlight controls ++ */ ++ { MFG(0x4c, 0x83), PROD_ID(0x41, 0x41), BIT(DP_QUIRK_FORCE_DPCD_BACKLIGHT) }, + }; + + #undef MFG +diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c +index 77a759361c5c..a7c94c201b38 100644 +--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c ++++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c +@@ -328,15 +328,31 @@ intel_dp_aux_display_control_capable(struct intel_connector *connector) + int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector) + { + struct intel_panel *panel = &intel_connector->panel; +- struct drm_i915_private *dev_priv = to_i915(intel_connector->base.dev); ++ struct intel_dp *intel_dp = enc_to_intel_dp(intel_connector->encoder); ++ struct drm_device *dev = intel_connector->base.dev; ++ struct drm_i915_private *dev_priv = to_i915(dev); + + if (i915_modparams.enable_dpcd_backlight == 0 || +- (i915_modparams.enable_dpcd_backlight == -1 && +- dev_priv->vbt.backlight.type != INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE)) ++ !intel_dp_aux_display_control_capable(intel_connector)) + return -ENODEV; + +- if (!intel_dp_aux_display_control_capable(intel_connector)) ++ /* ++ * There are a lot of machines that don't advertise the backlight ++ * control interface to use properly in their VBIOS, :\ ++ */ ++ if (dev_priv->vbt.backlight.type != ++ INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE && ++ !drm_dp_has_quirk(&intel_dp->desc, intel_dp->edid_quirks, ++ DP_QUIRK_FORCE_DPCD_BACKLIGHT)) { ++ DRM_DEV_INFO(dev->dev, ++ "Panel advertises DPCD backlight support, but " ++ "VBT disagrees. If your backlight controls " ++ "don't work try booting with " ++ "i915.enable_dpcd_backlight=1. If your machine " ++ "needs this, please file a _new_ bug report on " ++ "drm/i915, see " FDO_BUG_URL " for details.\n"); + return -ENODEV; ++ } + + panel->backlight.setup = intel_dp_aux_setup_backlight; + panel->backlight.enable = intel_dp_aux_enable_backlight; +diff --git a/drivers/gpu/drm/i915/i915_utils.c b/drivers/gpu/drm/i915/i915_utils.c +index 632d6953c78d..029854ae65fc 100644 +--- a/drivers/gpu/drm/i915/i915_utils.c ++++ b/drivers/gpu/drm/i915/i915_utils.c +@@ -8,7 +8,6 @@ + #include "i915_drv.h" + #include "i915_utils.h" + +-#define FDO_BUG_URL "https://gitlab.freedesktop.org/drm/intel/-/wikis/How-to-file-i915-bugs" + #define FDO_BUG_MSG "Please file a bug on drm/i915; see " FDO_BUG_URL " for details." + + void +diff --git a/drivers/gpu/drm/i915/i915_utils.h b/drivers/gpu/drm/i915/i915_utils.h +index b0ade76bec90..cae0ae520398 100644 +--- a/drivers/gpu/drm/i915/i915_utils.h ++++ b/drivers/gpu/drm/i915/i915_utils.h +@@ -34,6 +34,8 @@ + struct drm_i915_private; + struct timer_list; + ++#define FDO_BUG_URL "https://gitlab.freedesktop.org/drm/intel/-/wikis/How-to-file-i915-bugs" ++ + #undef WARN_ON + /* Many gcc seem to no see through this and fall over :( */ + #if 0 +diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h +index 1fe49e202dfb..eff5a69051d6 100644 +--- a/include/drm/drm_dp_helper.h ++++ b/include/drm/drm_dp_helper.h +@@ -1533,6 +1533,16 @@ enum drm_dp_quirk { + * The DSC caps can be read from the physical aux instead. + */ + DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD, ++ /** ++ * @DP_QUIRK_FORCE_DPCD_BACKLIGHT: ++ * ++ * The device is telling the truth when it says that it uses DPCD ++ * backlight controls, even if the system's firmware disagrees. This ++ * quirk should be checked against both the ident and panel EDID. ++ * When present, the driver should honor the DPCD backlight ++ * capabilities advertised. ++ */ ++ DP_QUIRK_FORCE_DPCD_BACKLIGHT, + }; + + /** +-- +2.25.1 + +From 057e7f8db05c2382b666270b1fbf986fdd172769 Mon Sep 17 00:00:00 2001 +From: Lyude Paul +Date: Tue, 10 Mar 2020 14:07:37 -0400 +Subject: [PATCH 7/7] drm/i915: Force DPCD backlight mode for some Dell CML + 2020 panels + +According to Dell, trying to match their panels via OUI is not reliable +enough and we've been told that we should check against the EDID +instead. As well, Dell seems to have some panels that are actually +intended to switch between using PWM for backlight controls and DPCD for +backlight controls depending on whether or not the panel is in HDR or +SDR mode. Yikes. + +Regardless, we need to add quirks for these so that DPCD backlight +controls get enabled by default, since without additional driver support +that's the only form of brightness control that will work. Hopefully in +the future we can remove these quirks once we have a better way of +probing for this. + +Changes since v1: +* Add one more EDID per Dell's request +* Remove model number (which is possibly wrong) and replace with Dell + CML 2020 systems + +Signed-off-by: Lyude Paul +Reviewed-by: Adam Jackson +Cc: Jani Nikula +--- + drivers/gpu/drm/drm_dp_helper.c | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c +index 026f701eac69..d3a636a925d4 100644 +--- a/drivers/gpu/drm/drm_dp_helper.c ++++ b/drivers/gpu/drm/drm_dp_helper.c +@@ -1241,6 +1241,20 @@ static const struct edid_quirk edid_quirk_list[] = { + * only supports DPCD backlight controls + */ + { MFG(0x4c, 0x83), PROD_ID(0x41, 0x41), BIT(DP_QUIRK_FORCE_DPCD_BACKLIGHT) }, ++ /* ++ * Some Dell CML 2020 systems have panels support both AUX and PWM ++ * backlight control, and some only support AUX backlight control. All ++ * said panels start up in AUX mode by default, and we don't have any ++ * support for disabling HDR mode on these panels which would be ++ * required to switch to PWM backlight control mode (plus, I'm not ++ * even sure we want PWM backlight controls over DPCD backlight ++ * controls anyway...). Until we have a better way of detecting these, ++ * force DPCD backlight mode on all of them. ++ */ ++ { MFG(0x06, 0xaf), PROD_ID(0x9b, 0x32), BIT(DP_QUIRK_FORCE_DPCD_BACKLIGHT) }, ++ { MFG(0x06, 0xaf), PROD_ID(0xeb, 0x41), BIT(DP_QUIRK_FORCE_DPCD_BACKLIGHT) }, ++ { MFG(0x4d, 0x10), PROD_ID(0xc7, 0x14), BIT(DP_QUIRK_FORCE_DPCD_BACKLIGHT) }, ++ { MFG(0x4d, 0x10), PROD_ID(0xe6, 0x14), BIT(DP_QUIRK_FORCE_DPCD_BACKLIGHT) }, + }; + + #undef MFG +-- +2.25.1 + diff --git a/drm-vc4-Fix-HDMI-mode-validation.patch b/drm-vc4-Fix-HDMI-mode-validation.patch new file mode 100644 index 000000000..224c8fa27 --- /dev/null +++ b/drm-vc4-Fix-HDMI-mode-validation.patch @@ -0,0 +1,65 @@ +From patchwork Thu Mar 26 12:20:01 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: drm/vc4: Fix HDMI mode validation +From: Nicolas Saenz Julienne +X-Patchwork-Id: 358980 +Message-Id: <20200326122001.22215-1-nsaenzjulienne@suse.de> +To: Eric Anholt , + Daniel Vetter +Cc: Stefan Wahren , f.fainelli@gmail.com, + Dave Stevenson , + David Airlie , linux-kernel@vger.kernel.org, + dri-devel@lists.freedesktop.org, maxime@cerno.tech, + Nicolas Saenz Julienne , + linux-rpi-kernel@lists.infradead.org +Date: Thu, 26 Mar 2020 13:20:01 +0100 + +Current mode validation impedes setting up some video modes which should +be supported otherwise. Namely 1920x1200@60Hz. + +Fix this by lowering the minimum HDMI state machine clock to pixel clock +ratio allowed. + +Fixes: 32e823c63e90 ("drm/vc4: Reject HDMI modes with too high of clocks") +Reported-by: Stefan Wahren +Suggested-by: Dave Stevenson +Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Maxime Ripard +--- + drivers/gpu/drm/vc4/vc4_hdmi.c | 20 ++++++++++++++++---- + 1 file changed, 16 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c +index cea18dc15f77..340719238753 100644 +--- a/drivers/gpu/drm/vc4/vc4_hdmi.c ++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c +@@ -681,11 +681,23 @@ static enum drm_mode_status + vc4_hdmi_encoder_mode_valid(struct drm_encoder *crtc, + const struct drm_display_mode *mode) + { +- /* HSM clock must be 108% of the pixel clock. Additionally, +- * the AXI clock needs to be at least 25% of pixel clock, but +- * HSM ends up being the limiting factor. ++ /* ++ * As stated in RPi's vc4 firmware "HDMI state machine (HSM) clock must ++ * be faster than pixel clock, infinitesimally faster, tested in ++ * simulation. Otherwise, exact value is unimportant for HDMI ++ * operation." This conflicts with bcm2835's vc4 documentation, which ++ * states HSM's clock has to be at least 108% of the pixel clock. ++ * ++ * Real life tests reveal that vc4's firmware statement holds up, and ++ * users are able to use pixel clocks closer to HSM's, namely for ++ * 1920x1200@60Hz. So it was decided to have leave a 1% margin between ++ * both clocks. Which, for RPi0-3 implies a maximum pixel clock of ++ * 162MHz. ++ * ++ * Additionally, the AXI clock needs to be at least 25% of ++ * pixel clock, but HSM ends up being the limiting factor. + */ +- if (mode->clock > HSM_CLOCK_FREQ / (1000 * 108 / 100)) ++ if (mode->clock > HSM_CLOCK_FREQ / (1000 * 101 / 100)) + return MODE_CLOCK_HIGH; + + return MODE_OK; diff --git a/efi-secureboot.patch b/efi-secureboot.patch index 227805e8c..90ac9feca 100644 --- a/efi-secureboot.patch +++ b/efi-secureboot.patch @@ -131,10 +131,10 @@ Signed-off-by: Jeremy Cline create mode 100644 drivers/firmware/efi/secureboot.c diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c -index bbe35bf879f5..7e528b6af86b 100644 +index 2441b64d061f..1797623b0c3a 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c -@@ -1179,19 +1179,7 @@ void __init setup_arch(char **cmdline_p) +@@ -1126,19 +1126,7 @@ void __init setup_arch(char **cmdline_p) /* Allocate bigger log buffer */ setup_log_buf(1); @@ -156,10 +156,10 @@ index bbe35bf879f5..7e528b6af86b 100644 reserve_initrd(); diff --git a/drivers/firmware/efi/Makefile b/drivers/firmware/efi/Makefile -index 4ac2de4dfa72..195b078a423c 100644 +index 554d795270d9..d2e17e26ac55 100644 --- a/drivers/firmware/efi/Makefile +++ b/drivers/firmware/efi/Makefile -@@ -24,6 +24,7 @@ obj-$(CONFIG_EFI_FAKE_MEMMAP) += fake_mem.o +@@ -24,6 +24,7 @@ obj-$(CONFIG_EFI_FAKE_MEMMAP) += fake_map.o obj-$(CONFIG_EFI_BOOTLOADER_CONTROL) += efibc.o obj-$(CONFIG_EFI_TEST) += test/ obj-$(CONFIG_EFI_DEV_PATH_PARSER) += dev-path-parser.o @@ -169,7 +169,7 @@ index 4ac2de4dfa72..195b078a423c 100644 diff --git a/drivers/firmware/efi/secureboot.c b/drivers/firmware/efi/secureboot.c new file mode 100644 -index 000000000000..9070055de0a1 +index 000000000000..de0a3714a5d4 --- /dev/null +++ b/drivers/firmware/efi/secureboot.c @@ -0,0 +1,38 @@ @@ -212,10 +212,10 @@ index 000000000000..9070055de0a1 + } +} diff --git a/include/linux/efi.h b/include/linux/efi.h -index 21d81021c1f4..758ec061d03b 100644 +index 5062683d4d08..6ae0e02f461e 100644 --- a/include/linux/efi.h +++ b/include/linux/efi.h -@@ -1204,6 +1204,14 @@ extern int __init efi_setup_pcdp_console(char *); +@@ -1126,6 +1126,14 @@ extern int __init efi_setup_pcdp_console(char *); #define EFI_NX_PE_DATA 9 /* Can runtime data regions be mapped non-executable? */ #define EFI_MEM_ATTR 10 /* Did firmware publish an EFI_MEMORY_ATTRIBUTES table? */ #define EFI_MEM_NO_SOFT_RESERVE 11 /* Is the kernel configured to ignore soft reservations? */ @@ -230,25 +230,25 @@ index 21d81021c1f4..758ec061d03b 100644 #ifdef CONFIG_EFI /* -@@ -1214,6 +1222,8 @@ static inline bool efi_enabled(int feature) - return test_bit(feature, &efi.flags) != 0; +@@ -1137,6 +1145,8 @@ static inline bool efi_enabled(int feature) } extern void efi_reboot(enum reboot_mode reboot_mode, const char *__unused); -+ -+extern void __init efi_set_secure_boot(enum efi_secureboot_mode mode); ++extern void __init efi_set_secure_boot(enum efi_secureboot_mode mode); ++ bool __pure __efi_soft_reserve_enabled(void); -@@ -1227,6 +1237,8 @@ efi_capsule_pending(int *reset_type) - { + static inline bool __pure efi_soft_reserve_enabled(void) +@@ -1158,6 +1168,8 @@ efi_capsule_pending(int *reset_type) return false; } -+ -+static inline void efi_set_secure_boot(enum efi_secureboot_mode mode) {} ++static inline void efi_set_secure_boot(enum efi_secureboot_mode mode) {} ++ static inline bool efi_soft_reserve_enabled(void) { -@@ -1619,12 +1631,6 @@ static inline bool efi_runtime_disabled(void) { return true; } + return false; +@@ -1541,12 +1553,6 @@ static inline bool efi_runtime_disabled(void) { return true; } extern void efi_call_virt_check_flags(unsigned long flags, const char *call); extern unsigned long efi_call_virt_save_flags(void); @@ -258,11 +258,11 @@ index 21d81021c1f4..758ec061d03b 100644 - efi_secureboot_mode_disabled, - efi_secureboot_mode_enabled, -}; - enum efi_secureboot_mode efi_get_secureboot(efi_system_table_t *sys_table); + enum efi_secureboot_mode efi_get_secureboot(void); #ifdef CONFIG_RESET_ATTACK_MITIGATION -- -2.21.0 +2.24.1 From 15368f76d4997912318d35c52bfeb9041d85098e Mon Sep 17 00:00:00 2001 @@ -284,18 +284,18 @@ Signed-off-by: Jeremy Cline 2 files changed, 21 insertions(+) diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c -index 77ea96b794bd..a119e1bc9623 100644 +index 1797623b0c3a..fa8ac411bf6e 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c -@@ -73,6 +73,7 @@ - #include - #include - #include +@@ -17,6 +17,7 @@ + #include + #include + #include +#include - #include - #include