From 7d2c2f2d91793b5da452bee9bea4fa32051c8608 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Wed, 22 Jun 2016 16:48:16 +0200 Subject: Bring in patch-series from drm-next to fix skl_update_other_pipe_wm issues (rhbz 1305038) - Disable fbc on haswell by default (fdo#96461) --- ...n9-Use-a-bitmask-to-track-dirty-pipe-wate.patch | 81 ++++++++++++++++++++++ 1 file changed, 81 insertions(+) create mode 100644 0013-drm-i915-gen9-Use-a-bitmask-to-track-dirty-pipe-wate.patch (limited to '0013-drm-i915-gen9-Use-a-bitmask-to-track-dirty-pipe-wate.patch') diff --git a/0013-drm-i915-gen9-Use-a-bitmask-to-track-dirty-pipe-wate.patch b/0013-drm-i915-gen9-Use-a-bitmask-to-track-dirty-pipe-wate.patch new file mode 100644 index 000000000..1eafe831b --- /dev/null +++ b/0013-drm-i915-gen9-Use-a-bitmask-to-track-dirty-pipe-wate.patch @@ -0,0 +1,81 @@ +From bb7c6f4efe65f77ba2ed3a09e6d6bc4d021a395d Mon Sep 17 00:00:00 2001 +From: Matt Roper +Date: Thu, 12 May 2016 07:06:07 -0700 +Subject: [PATCH 13/17] drm/i915/gen9: Use a bitmask to track dirty pipe + watermarks + +Slightly easier to work with than an array of bools. + +Signed-off-by: Matt Roper +Reviewed-by: Maarten Lankhorst +Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-14-git-send-email-matthew.d.roper@intel.com +--- + drivers/gpu/drm/i915/i915_drv.h | 2 +- + drivers/gpu/drm/i915/intel_pm.c | 10 +++++----- + 2 files changed, 6 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h +index b908a41..e7bde72 100644 +--- a/drivers/gpu/drm/i915/i915_drv.h ++++ b/drivers/gpu/drm/i915/i915_drv.h +@@ -1591,7 +1591,7 @@ struct skl_ddb_allocation { + }; + + struct skl_wm_values { +- bool dirty[I915_MAX_PIPES]; ++ unsigned dirty_pipes; + struct skl_ddb_allocation ddb; + uint32_t wm_linetime[I915_MAX_PIPES]; + uint32_t plane[I915_MAX_PIPES][I915_MAX_PLANES][8]; +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index c9f050e..cb6b6f4 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -3516,7 +3516,7 @@ static void skl_write_wm_values(struct drm_i915_private *dev_priv, + int i, level, max_level = ilk_wm_max_level(dev); + enum pipe pipe = crtc->pipe; + +- if (!new->dirty[pipe]) ++ if ((new->dirty_pipes & drm_crtc_mask(&crtc->base)) == 0) + continue; + + I915_WRITE(PIPE_WM_LINETIME(pipe), new->wm_linetime[pipe]); +@@ -3741,7 +3741,7 @@ static void skl_update_other_pipe_wm(struct drm_device *dev, + WARN_ON(!wm_changed); + + skl_compute_wm_results(dev, &pipe_wm, r, intel_crtc); +- r->dirty[intel_crtc->pipe] = true; ++ r->dirty_pipes |= drm_crtc_mask(&intel_crtc->base); + } + } + +@@ -3844,7 +3844,7 @@ static void skl_update_wm(struct drm_crtc *crtc) + + + /* Clear all dirty flags */ +- memset(results->dirty, 0, sizeof(bool) * I915_MAX_PIPES); ++ results->dirty_pipes = 0; + + skl_clear_wm(results, intel_crtc->pipe); + +@@ -3852,7 +3852,7 @@ static void skl_update_wm(struct drm_crtc *crtc) + return; + + skl_compute_wm_results(dev, pipe_wm, results, intel_crtc); +- results->dirty[intel_crtc->pipe] = true; ++ results->dirty_pipes |= drm_crtc_mask(&intel_crtc->base); + + skl_update_other_pipe_wm(dev, crtc, results); + skl_write_wm_values(dev_priv, results); +@@ -4011,7 +4011,7 @@ static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc) + if (!intel_crtc->active) + return; + +- hw->dirty[pipe] = true; ++ hw->dirty_pipes |= drm_crtc_mask(crtc); + + active->linetime = hw->wm_linetime[pipe]; + +-- +2.7.4 + -- cgit