From 614b7d7d7b10d8e3f146bed311215f818be5accd Mon Sep 17 00:00:00 2001 From: "Justin M. Forbes" Date: Wed, 10 Jun 2020 17:15:58 -0500 Subject: Initial 5.7.2 rebase Signed-off-by: Justin M. Forbes --- ...ms-gv100-Add-support-for-interlaced-modes.patch | 64 ++++++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 0001-kms-gv100-Add-support-for-interlaced-modes.patch (limited to '0001-kms-gv100-Add-support-for-interlaced-modes.patch') diff --git a/0001-kms-gv100-Add-support-for-interlaced-modes.patch b/0001-kms-gv100-Add-support-for-interlaced-modes.patch new file mode 100644 index 000000000..c50c826b8 --- /dev/null +++ b/0001-kms-gv100-Add-support-for-interlaced-modes.patch @@ -0,0 +1,64 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Lyude Paul +Date: Mon, 11 May 2020 18:41:25 -0400 +Subject: [PATCH] kms/gv100-: Add support for interlaced modes + +We advertise being able to set interlaced modes, so let's actually make +sure to do that. Otherwise, we'll end up hanging the display engine due +to trying to set a mode with timings adjusted for interlacing without +telling the hardware it's actually an interlaced mode. + +Signed-off-by: Lyude Paul +Signed-off-by: Ben Skeggs +--- + drivers/gpu/drm/nouveau/dispnv50/headc37d.c | 5 +++-- + drivers/gpu/drm/nouveau/dispnv50/headc57d.c | 5 +++-- + 2 files changed, 6 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/nouveau/dispnv50/headc37d.c b/drivers/gpu/drm/nouveau/dispnv50/headc37d.c +index 00011ce109a6..4a9a32b89f74 100644 +--- a/drivers/gpu/drm/nouveau/dispnv50/headc37d.c ++++ b/drivers/gpu/drm/nouveau/dispnv50/headc37d.c +@@ -168,14 +168,15 @@ headc37d_mode(struct nv50_head *head, struct nv50_head_atom *asyh) + struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan; + struct nv50_head_mode *m = &asyh->mode; + u32 *push; +- if ((push = evo_wait(core, 12))) { ++ if ((push = evo_wait(core, 13))) { + evo_mthd(push, 0x2064 + (head->base.index * 0x400), 5); + evo_data(push, (m->v.active << 16) | m->h.active ); + evo_data(push, (m->v.synce << 16) | m->h.synce ); + evo_data(push, (m->v.blanke << 16) | m->h.blanke ); + evo_data(push, (m->v.blanks << 16) | m->h.blanks ); + evo_data(push, (m->v.blank2e << 16) | m->v.blank2s); +- evo_mthd(push, 0x200c + (head->base.index * 0x400), 1); ++ evo_mthd(push, 0x2008 + (head->base.index * 0x400), 2); ++ evo_data(push, m->interlace); + evo_data(push, m->clock * 1000); + evo_mthd(push, 0x2028 + (head->base.index * 0x400), 1); + evo_data(push, m->clock * 1000); +diff --git a/drivers/gpu/drm/nouveau/dispnv50/headc57d.c b/drivers/gpu/drm/nouveau/dispnv50/headc57d.c +index 938d910a1b1e..859131a8bc3c 100644 +--- a/drivers/gpu/drm/nouveau/dispnv50/headc57d.c ++++ b/drivers/gpu/drm/nouveau/dispnv50/headc57d.c +@@ -173,14 +173,15 @@ headc57d_mode(struct nv50_head *head, struct nv50_head_atom *asyh) + struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan; + struct nv50_head_mode *m = &asyh->mode; + u32 *push; +- if ((push = evo_wait(core, 12))) { ++ if ((push = evo_wait(core, 13))) { + evo_mthd(push, 0x2064 + (head->base.index * 0x400), 5); + evo_data(push, (m->v.active << 16) | m->h.active ); + evo_data(push, (m->v.synce << 16) | m->h.synce ); + evo_data(push, (m->v.blanke << 16) | m->h.blanke ); + evo_data(push, (m->v.blanks << 16) | m->h.blanks ); + evo_data(push, (m->v.blank2e << 16) | m->v.blank2s); +- evo_mthd(push, 0x200c + (head->base.index * 0x400), 1); ++ evo_mthd(push, 0x2008 + (head->base.index * 0x400), 2); ++ evo_data(push, m->interlace); + evo_data(push, m->clock * 1000); + evo_mthd(push, 0x2028 + (head->base.index * 0x400), 1); + evo_data(push, m->clock * 1000); +-- +2.26.2 + -- cgit