From c1d5388741c67796c728a41e28949b05ed72e52c Mon Sep 17 00:00:00 2001 From: "Justin M. Forbes" Date: Thu, 28 May 2020 10:35:15 -0500 Subject: kernel-5.7.0-0.rc7.20200528gitb0c3ba31be3e.1 * Thu May 28 2020 CKI@GitLab [5.7.0-0.rc7.20200528gitb0c3ba31be3e.1] - b0c3ba31be3e rebase - Updated changelog for the release based on 444fc5cde643 ("CKI@GitLab") Resolves: rhbz# Signed-off-by: Justin M. Forbes --- 0001-disp-gv100-expose-capabilities-class.patch | 149 ++++++++++++++++++++++++ 1 file changed, 149 insertions(+) create mode 100644 0001-disp-gv100-expose-capabilities-class.patch (limited to '0001-disp-gv100-expose-capabilities-class.patch') diff --git a/0001-disp-gv100-expose-capabilities-class.patch b/0001-disp-gv100-expose-capabilities-class.patch new file mode 100644 index 000000000..60293792f --- /dev/null +++ b/0001-disp-gv100-expose-capabilities-class.patch @@ -0,0 +1,149 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Ben Skeggs +Date: Thu, 13 Feb 2020 09:39:34 +1000 +Subject: [PATCH] disp/gv100-: expose capabilities class + +Signed-off-by: Ben Skeggs +--- + drivers/gpu/drm/nouveau/include/nvif/class.h | 2 + + .../gpu/drm/nouveau/nvkm/engine/disp/Kbuild | 2 + + .../drm/nouveau/nvkm/engine/disp/capsgv100.c | 60 +++++++++++++++++++ + .../drm/nouveau/nvkm/engine/disp/rootgv100.c | 1 + + .../drm/nouveau/nvkm/engine/disp/rootnv50.h | 3 + + .../drm/nouveau/nvkm/engine/disp/roottu102.c | 1 + + 6 files changed, 69 insertions(+) + create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/disp/capsgv100.c + +diff --git a/drivers/gpu/drm/nouveau/include/nvif/class.h b/drivers/gpu/drm/nouveau/include/nvif/class.h +index 30659747ffe8..2c79beb41126 100644 +--- a/drivers/gpu/drm/nouveau/include/nvif/class.h ++++ b/drivers/gpu/drm/nouveau/include/nvif/class.h +@@ -89,6 +89,8 @@ + #define GV100_DISP /* cl5070.h */ 0x0000c370 + #define TU102_DISP /* cl5070.h */ 0x0000c570 + ++#define GV100_DISP_CAPS 0x0000c373 ++ + #define NV31_MPEG 0x00003174 + #define G82_MPEG 0x00008274 + +diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild +index 0d584d0da59c..f7af648e0c17 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild ++++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild +@@ -74,6 +74,8 @@ nvkm-y += nvkm/engine/disp/rootgp102.o + nvkm-y += nvkm/engine/disp/rootgv100.o + nvkm-y += nvkm/engine/disp/roottu102.o + ++nvkm-y += nvkm/engine/disp/capsgv100.o ++ + nvkm-y += nvkm/engine/disp/channv50.o + nvkm-y += nvkm/engine/disp/changf119.o + nvkm-y += nvkm/engine/disp/changv100.o +diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/capsgv100.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/capsgv100.c +new file mode 100644 +index 000000000000..5026e530f4bb +--- /dev/null ++++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/capsgv100.c +@@ -0,0 +1,60 @@ ++/* ++ * Copyright 2020 Red Hat Inc. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR ++ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ++ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++#define gv100_disp_caps(p) container_of((p), struct gv100_disp_caps, object) ++#include "rootnv50.h" ++ ++struct gv100_disp_caps { ++ struct nvkm_object object; ++ struct nv50_disp *disp; ++}; ++ ++static int ++gv100_disp_caps_map(struct nvkm_object *object, void *argv, u32 argc, ++ enum nvkm_object_map *type, u64 *addr, u64 *size) ++{ ++ struct gv100_disp_caps *caps = gv100_disp_caps(object); ++ struct nvkm_device *device = caps->disp->base.engine.subdev.device; ++ *type = NVKM_OBJECT_MAP_IO; ++ *addr = 0x640000 + device->func->resource_addr(device, 0); ++ *size = 0x1000; ++ return 0; ++} ++ ++static const struct nvkm_object_func ++gv100_disp_caps = { ++ .map = gv100_disp_caps_map, ++}; ++ ++int ++gv100_disp_caps_new(const struct nvkm_oclass *oclass, void *argv, u32 argc, ++ struct nv50_disp *disp, struct nvkm_object **pobject) ++{ ++ struct gv100_disp_caps *caps; ++ ++ if (!(caps = kzalloc(sizeof(*caps), GFP_KERNEL))) ++ return -ENOMEM; ++ *pobject = &caps->object; ++ ++ nvkm_object_ctor(&gv100_disp_caps, oclass, &caps->object); ++ caps->disp = disp; ++ return 0; ++} +diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgv100.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgv100.c +index 9c658d632d37..47efb48d769a 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgv100.c ++++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgv100.c +@@ -27,6 +27,7 @@ + static const struct nv50_disp_root_func + gv100_disp_root = { + .user = { ++ {{-1,-1,GV100_DISP_CAPS }, gv100_disp_caps_new }, + {{0,0,GV100_DISP_CURSOR }, gv100_disp_curs_new }, + {{0,0,GV100_DISP_WINDOW_IMM_CHANNEL_DMA}, gv100_disp_wimm_new }, + {{0,0,GV100_DISP_CORE_CHANNEL_DMA }, gv100_disp_core_new }, +diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.h b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.h +index a1f942793f98..7070f5408d92 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.h ++++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.h +@@ -24,6 +24,9 @@ int nv50_disp_root_new_(const struct nv50_disp_root_func *, struct nvkm_disp *, + const struct nvkm_oclass *, void *data, u32 size, + struct nvkm_object **); + ++int gv100_disp_caps_new(const struct nvkm_oclass *, void *, u32, ++ struct nv50_disp *, struct nvkm_object **); ++ + extern const struct nvkm_disp_oclass nv50_disp_root_oclass; + extern const struct nvkm_disp_oclass g84_disp_root_oclass; + extern const struct nvkm_disp_oclass g94_disp_root_oclass; +diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/roottu102.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/roottu102.c +index 579a5d02308a..d8719d38b98a 100644 +--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/roottu102.c ++++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/roottu102.c +@@ -27,6 +27,7 @@ + static const struct nv50_disp_root_func + tu102_disp_root = { + .user = { ++ {{-1,-1,GV100_DISP_CAPS }, gv100_disp_caps_new }, + {{0,0,TU102_DISP_CURSOR }, gv100_disp_curs_new }, + {{0,0,TU102_DISP_WINDOW_IMM_CHANNEL_DMA}, gv100_disp_wimm_new }, + {{0,0,TU102_DISP_CORE_CHANNEL_DMA }, gv100_disp_core_new }, +-- +2.26.2 + -- cgit