diff options
Diffstat (limited to 'drm-enable-uncached-DMA-optimization-for-ARM-and-arm64.patch')
| -rw-r--r-- | drm-enable-uncached-DMA-optimization-for-ARM-and-arm64.patch | 196 |
1 files changed, 196 insertions, 0 deletions
diff --git a/drm-enable-uncached-DMA-optimization-for-ARM-and-arm64.patch b/drm-enable-uncached-DMA-optimization-for-ARM-and-arm64.patch new file mode 100644 index 000000000..5e151ce57 --- /dev/null +++ b/drm-enable-uncached-DMA-optimization-for-ARM-and-arm64.patch @@ -0,0 +1,196 @@ +From patchwork Thu Jan 24 12:06:58 2019 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Ard Biesheuvel <ard.biesheuvel@linaro.org> +X-Patchwork-Id: 10778815 +Return-Path: + <linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org> +Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org + [172.30.200.125]) + by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B27A191E + for <patchwork-linux-arm@patchwork.kernel.org>; + Thu, 24 Jan 2019 12:07:20 +0000 (UTC) +Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) + by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DFBE72EC6C + for <patchwork-linux-arm@patchwork.kernel.org>; + Thu, 24 Jan 2019 12:07:17 +0000 (UTC) +Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) + id D30BC2ECE2; Thu, 24 Jan 2019 12:07:17 +0000 (UTC) +X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on + pdx-wl-mail.web.codeaurora.org +X-Spam-Level: +X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, + DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 +Received: from bombadil.infradead.org (bombadil.infradead.org + [198.137.202.133]) + (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C03122EC6C + for <patchwork-linux-arm@patchwork.kernel.org>; + Thu, 24 Jan 2019 12:07:16 +0000 (UTC) +DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; + d=lists.infradead.org; s=bombadil.20170209; h=Sender: + Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: + List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To + :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: + Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: + List-Owner; bh=xo5AgoUtS0FBdf9ZXAO75L7eu+GEGqebznBMcwnNXS0=; b=EUK2XskaTLLGNd + PLBm/AVgfZr2j3GzaOOAh6rJqVHuQ4k98saArkFu8aSFtVkvkSPF3PKCDKnV+7mZibl17Kqiup2Cv + HsRzfxwZzeksoNjDcZMYK82pttYA+iizpIYq16Wp+SXMzm6HRuku9XhW7tygG9zNr+cUVzaN6QU6b + mO5CAPgeGsluExNwC+4i4fRNqtN4z7rTMPuHkZ6jSy6tTy/OyKUApjhrgphDWEjtelAKeqn8Jwg+i + YnZQMi8l6B4Ffn7IlU2wHVKU7/yk9hO46AC+uKKYTV5RmcC0xFqKNK0TnBQzum5FdK2/h7h/3f0CA + GflIczkPfOItaFoJvs3g==; +Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) + by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) + id 1gmdmr-0000p2-1K; Thu, 24 Jan 2019 12:07:13 +0000 +Received: from mail-wm1-x341.google.com ([2a00:1450:4864:20::341]) + by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) + id 1gmdmm-0000oP-Sk + for linux-arm-kernel@lists.infradead.org; Thu, 24 Jan 2019 12:07:11 +0000 +Received: by mail-wm1-x341.google.com with SMTP id b11so2875125wmj.1 + for <linux-arm-kernel@lists.infradead.org>; + Thu, 24 Jan 2019 04:07:07 -0800 (PST) +DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; + h=from:to:cc:subject:date:message-id:mime-version + :content-transfer-encoding; + bh=GsPSU83pbk1uWSobF359Hmb25tSiPCSXYSiAdhiX2K0=; + b=MVHv9eioSsA83BVb2J9fi21oGdNAhe8L5mYX67nd+XBNW59IxbYWyPCjLtaUXXFxQx + C8eDCimc2jtV5LiHYUHkJKhoQYN40/4u2K6EOoUunE10yy3C+J6aGY9JX5gh7mgstcNp + Dvdm9CHYXs35/N3s4bzP1fUHVnLbpVKVammw0= +X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; + d=1e100.net; s=20161025; + h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version + :content-transfer-encoding; + bh=GsPSU83pbk1uWSobF359Hmb25tSiPCSXYSiAdhiX2K0=; + b=DtNKUeOnwDAjpgolmP7hnQugxkX3XqgSxg6WUAlVeQyxIk+8QlEAWLNFtKPL57EnLP + G9R1qiTnF1TI4PM8DFH+URNkVNcI9hvhGKtO4fya+BjPd6dqPJVwct1+KZWM8lTJfDX+ + pMKL1ZiDeYMlHAMkd2CfCckaEptq5FjtvwJ8pyPbdN5qNxVJ6CEPIl9HORWWMuwrsxaj + xo5MK/UpOqhomOXRe5WxGor2JPNit68hT1PvHQwqNXCoRRTtCUANoV7s1nJ2Ad+pkhV7 + FW5IV/JnVetKbeCIhe2I/m6VlJ+6x3wPOpiWN/Fd8z5tYX0zI0vjKqdjdfr/QJCNF69Z + +cuw== +X-Gm-Message-State: AJcUukcCDAeH11orvgS33hS4OKLhp1Vglp0ChrGS5Ol91KaBPDqURaLX + WKQRIEAwB4phU3pS/I/nkTBzdQ== +X-Google-Smtp-Source: + ALg8bN55gm82WRKfoWS5g8dy3rATbR8W4MaKwupN1EALKBkI9t9KdMSE60V2HSnI4wy7yU44++cGoA== +X-Received: by 2002:a1c:bdc5:: with SMTP id n188mr2530824wmf.69.1548331626262; + Thu, 24 Jan 2019 04:07:06 -0800 (PST) +Received: from localhost.localdomain + (laubervilliers-657-1-83-120.w92-154.abo.wanadoo.fr. [92.154.90.120]) + by smtp.gmail.com with ESMTPSA id t12sm98842348wrr.65.2019.01.24.04.07.04 + (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); + Thu, 24 Jan 2019 04:07:05 -0800 (PST) +From: Ard Biesheuvel <ard.biesheuvel@linaro.org> +To: linux-kernel@vger.kernel.org +Subject: [PATCH] drm: enable uncached DMA optimization for ARM and arm64 +Date: Thu, 24 Jan 2019 13:06:58 +0100 +Message-Id: <20190124120658.30288-1-ard.biesheuvel@linaro.org> +X-Mailer: git-send-email 2.20.1 +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20190124_040708_952827_D4810358 +X-CRM114-Status: GOOD ( 13.64 ) +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.21 +Precedence: list +List-Id: <linux-arm-kernel.lists.infradead.org> +List-Unsubscribe: + <http://lists.infradead.org/mailman/options/linux-arm-kernel>, + <mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe> +List-Archive: <http://lists.infradead.org/pipermail/linux-arm-kernel/> +List-Post: <mailto:linux-arm-kernel@lists.infradead.org> +List-Help: <mailto:linux-arm-kernel-request@lists.infradead.org?subject=help> +List-Subscribe: + <http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>, + <mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe> +Cc: David Zhou <David1.Zhou@amd.com>, + Maxime Ripard <maxime.ripard@bootlin.com>, + Benjamin Herrenschmidt <benh@kernel.crashing.org>, + Carsten Haitzler <Carsten.Haitzler@arm.com>, + Ard Biesheuvel <ard.biesheuvel@linaro.org>, David Airlie <airlied@linux.ie>, + Maarten Lankhorst <maarten.lankhorst@linux.intel.com>, + dri-devel <dri-devel@lists.freedesktop.org>, + Michel Daenzer <michel.daenzer@amd.com>, Robin Murphy <robin.murphy@arm.com>, + Will Deacon <will.deacon@arm.com>, Christoph Hellwig <hch@infradead.org>, + Junwei Zhang <Jerry.Zhang@amd.com>, Huang Rui <ray.huang@amd.com>, + amd-gfx list <amd-gfx@lists.freedesktop.org>, + Daniel Vetter <daniel@ffwll.ch>, + Michael Ellerman <mpe@ellerman.id.au>, + Alex Deucher <alexander.deucher@amd.com>, Sean Paul <sean@poorly.run>, + Christian Koenig <christian.koenig@amd.com>, + linux-arm-kernel@lists.infradead.org +Content-Type: text/plain; charset="us-ascii" +Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> +Errors-To: + linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org +X-Virus-Scanned: ClamAV using ClamSMTP + +The DRM driver stack is designed to work with cache coherent devices +only, but permits an optimization to be enabled in some cases, where +for some buffers, both the CPU and the GPU use uncached mappings, +removing the need for DMA snooping and allocation in the CPU caches. + +The use of uncached GPU mappings relies on the correct implementation +of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU +will use cached mappings nonetheless. On x86 platforms, this does not +seem to matter, as uncached CPU mappings will snoop the caches in any +case. However, on ARM and arm64, enabling this optimization on a +platform where NoSnoop is ignored results in loss of coherency, which +breaks correct operation of the device. Since we have no way of +detecting whether NoSnoop works or not, just disable this +optimization entirely for ARM and arm64. + +Cc: Christian Koenig <christian.koenig@amd.com> +Cc: Alex Deucher <alexander.deucher@amd.com> +Cc: David Zhou <David1.Zhou@amd.com> +Cc: Huang Rui <ray.huang@amd.com> +Cc: Junwei Zhang <Jerry.Zhang@amd.com> +Cc: Michel Daenzer <michel.daenzer@amd.com> +Cc: David Airlie <airlied@linux.ie> +Cc: Daniel Vetter <daniel@ffwll.ch> +Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> +Cc: Maxime Ripard <maxime.ripard@bootlin.com> +Cc: Sean Paul <sean@poorly.run> +Cc: Michael Ellerman <mpe@ellerman.id.au> +Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> +Cc: Will Deacon <will.deacon@arm.com> +Cc: Christoph Hellwig <hch@infradead.org> +Cc: Robin Murphy <robin.murphy@arm.com> +Cc: amd-gfx list <amd-gfx@lists.freedesktop.org> +Cc: dri-devel <dri-devel@lists.freedesktop.org> +Reported-by: Carsten Haitzler <Carsten.Haitzler@arm.com> +Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +--- + include/drm/drm_cache.h | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +diff --git a/include/drm/drm_cache.h b/include/drm/drm_cache.h +index bfe1639df02d..97fc498dc767 100644 +--- a/include/drm/drm_cache.h ++++ b/include/drm/drm_cache.h +@@ -47,6 +47,24 @@ static inline bool drm_arch_can_wc_memory(void) + return false; + #elif defined(CONFIG_MIPS) && defined(CONFIG_CPU_LOONGSON3) + return false; ++#elif defined(CONFIG_ARM) || defined(CONFIG_ARM64) ++ /* ++ * The DRM driver stack is designed to work with cache coherent devices ++ * only, but permits an optimization to be enabled in some cases, where ++ * for some buffers, both the CPU and the GPU use uncached mappings, ++ * removing the need for DMA snooping and allocation in the CPU caches. ++ * ++ * The use of uncached GPU mappings relies on the correct implementation ++ * of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU ++ * will use cached mappings nonetheless. On x86 platforms, this does not ++ * seem to matter, as uncached CPU mappings will snoop the caches in any ++ * case. However, on ARM and arm64, enabling this optimization on a ++ * platform where NoSnoop is ignored results in loss of coherency, which ++ * breaks correct operation of the device. Since we have no way of ++ * detecting whether NoSnoop works or not, just disable this ++ * optimization entirely for ARM and arm64. ++ */ ++ return false; + #else + return true; + #endif |