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+# CONFIG_ARM64_ERRATUM_1508412:
+#
+# This option adds a workaround for Arm Cortex-A77 erratum 1508412.
+#
+# Affected Cortex-A77 cores (r0p0, r1p0) could deadlock on a sequence
+# of a store-exclusive or read of PAR_EL1 and a load with device or
+# non-cacheable memory attributes. The workaround depends on a firmware
+# counterpart.
+#
+# KVM guests must also have the workaround implemented or they can
+# deadlock the system.
+#
+# Work around the issue by inserting DMB SY barriers around PAR_EL1
+# register reads and warning KVM users. The DMB barrier is sufficient
+# to prevent a speculative PAR_EL1 read.
+#
+# If unsure, say Y.
+#
+# Symbol: ARM64_ERRATUM_1508412 [=y]
+# Type : bool
+# Defined at arch/arm64/Kconfig:639
+# Prompt: Cortex-A77: 1508412: workaround deadlock on sequence of NC/Device load and store exclusive or PAR read
+# Location:
+# -> Kernel Features
+# -> ARM errata workarounds via the alternatives framework
+#
+#
+#
+CONFIG_ARM64_ERRATUM_1508412=y