kernel.git - Linux vanilla kernels for Fedora – https://fedoraproject.org/wiki/Kernel_Vanilla

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Diffstat (limited to 'configs/fedora/generic/CONFIG_DRM_DP_CEC')

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configs/fedora/generic/CONFIG_DRM_DP_CEC

1 files changed, 0 insertions, 1 deletions

/* linux/arch/arm/plat-s5p/irq-gpioint.c * * Copyright (c) 2010 Samsung Electronics Co., Ltd. * Author: Kyungmin Park <kyungmin.park@samsung.com> * Author: Joonyoung Shim <jy0922.shim@samsung.com> * Author: Marek Szyprowski <m.szyprowski@samsung.com> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * */ #include <linux/kernel.h> #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/io.h> #include <linux/gpio.h> #include <linux/slab.h> #include <mach/map.h> #include <plat/gpio-core.h> #include <plat/gpio-cfg.h> #define GPIO_BASE(chip) (((unsigned long)(chip)->base) & 0xFFFFF000u) #define CON_OFFSET 0x700 #define MASK_OFFSET 0x900 #define PEND_OFFSET 0xA00 #define REG_OFFSET(x) ((x) << 2) struct s5p_gpioint_bank { struct list_head list; int start; int nr_groups; int irq; struct s3c_gpio_chip **chips; void (*handler)(unsigned int, struct irq_desc *); }; LIST_HEAD(banks); static int s5p_gpioint_set_type(struct irq_data *d, unsigned int type) { struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); struct irq_chip_type *ct = gc->chip_types; unsigned int shift = (d->irq - gc->irq_base) << 2; switch (type) { case IRQ_TYPE_EDGE_RISING: type = S5P_IRQ_TYPE_EDGE_RISING; break; case IRQ_TYPE_EDGE_FALLING: type = S5P_IRQ_TYPE_EDGE_FALLING; break; case IRQ_TYPE_EDGE_BOTH: type = S5P_IRQ_TYPE_EDGE_BOTH; break; case IRQ_TYPE_LEVEL_HIGH: type = S5P_IRQ_TYPE_LEVEL_HIGH; break; case IRQ_TYPE_LEVEL_LOW: type = S5P_IRQ_TYPE_LEVEL_LOW; break; case IRQ_TYPE_NONE: default: printk(KERN_WARNING "No irq type\n"); return -EINVAL; } gc->type_cache &= ~(0x7 << shift); gc->type_cache |= type << shift; writel(gc->type_cache, gc->reg_base + ct->regs.type); return 0; } static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc) { struct s5p_gpioint_bank *bank = irq_get_handler_data(irq); int group, pend_offset, mask_offset; unsigned int pend, mask; for (group = 0; group < bank->nr_groups; group++) { struct s3c_gpio_chip *chip = bank->chips[group]; if (!chip) continue; pend_offset = REG_OFFSET(group); pend = __raw_readl(GPIO_BASE(chip) + PEND_OFFSET + pend_offset); if (!pend) continue; mask_offset = REG_OFFSET(group); mask = __raw_readl(GPIO_BASE(chip) + MASK_OFFSET + mask_offset); pend &= ~mask; while (pend) { int offset = fls(pend) - 1; int real_irq = chip->irq_base + offset; generic_handle_irq(real_irq); pend &= ~BIT(offset); } } } static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip) { static int used_gpioint_groups = 0; int group = chip->group; struct s5p_gpioint_bank *bank = NULL; struct irq_chip_generic *gc; struct irq_chip_type *ct; if (used_gpioint_groups >= S5P_GPIOINT_GROUP_COUNT) return -ENOMEM; list_for_each_entry(bank, &banks, list) { if (group >= bank->start && group < bank->start + bank->nr_groups) break; } if (!bank) return -EINVAL;


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