diff options
Diffstat (limited to 'bcm283x-clk-audio-fixes.patch')
| -rw-r--r-- | bcm283x-clk-audio-fixes.patch | 43 |
1 files changed, 0 insertions, 43 deletions
diff --git a/bcm283x-clk-audio-fixes.patch b/bcm283x-clk-audio-fixes.patch index 51c9fa791..03369ccdb 100644 --- a/bcm283x-clk-audio-fixes.patch +++ b/bcm283x-clk-audio-fixes.patch @@ -1,46 +1,3 @@ -From aa964d59aab2cb04bc011ffd370822ac79f82a0b Mon Sep 17 00:00:00 2001 -From: Boris Brezillon <boris.brezillon@bootlin.com> -Date: Wed, 7 Mar 2018 15:39:17 +0100 -Subject: [PATCH] clk: bcm2835: De-assert/assert PLL reset signal when - appropriate - -In order to enable a PLL, not only the PLL has to be powered up and -locked, but you also have to de-assert the reset signal. The last part -was missing. Add it so PLLs that were not enabled by the FW/bootloader -can be enabled from Linux. - -Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks") -Cc: <stable@vger.kernel.org> -Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> ---- - drivers/clk/bcm/clk-bcm2835.c | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c -index a07f6451694a..6c5d4a8e426c 100644 ---- a/drivers/clk/bcm/clk-bcm2835.c -+++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -602,6 +602,9 @@ static void bcm2835_pll_off(struct clk_hw *hw) - const struct bcm2835_pll_data *data = pll->data; - - spin_lock(&cprman->regs_lock); -+ cprman_write(cprman, data->a2w_ctrl_reg, -+ cprman_read(cprman, data->a2w_ctrl_reg) & -+ ~A2W_PLL_CTRL_PRST_DISABLE); - cprman_write(cprman, data->cm_ctrl_reg, - cprman_read(cprman, data->cm_ctrl_reg) | - CM_PLL_ANARST); -@@ -640,6 +643,10 @@ static int bcm2835_pll_on(struct clk_hw *hw) - cpu_relax(); - } - -+ cprman_write(cprman, data->a2w_ctrl_reg, -+ cprman_read(cprman, data->a2w_ctrl_reg) | -+ A2W_PLL_CTRL_PRST_DISABLE); -+ - return 0; - } - From 1b6867ee05d84cc6ec23b5ec0b78684187d3190a Mon Sep 17 00:00:00 2001 From: Boris Brezillon <boris.brezillon@bootlin.com> Date: Wed, 7 Mar 2018 15:41:14 +0100 |